arm: mx5: add support for core voltage change when switching clock frequency

[karo-tx-uboot.git] / arch / arm / include / asm / arch-mx5 / clock.h

diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h
index 8d8fa18fc5fe9d0642e218ca8a2ca2075be884fd..6de0077383d5ddebfc572914f33b5cc7bc9b517d 100644 (file)
--- a/arch/arm/include/asm/arch-mx5/clock.h
+++ b/arch/arm/include/asm/arch-mx5/clock.h
@@ -2,28 +2,26 @@
  * (C) Copyright 2009
  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __ASM_ARCH_CLOCK_H
 #define __ASM_ARCH_CLOCK_H
 
+#include <common.h>
+
+#ifdef CONFIG_SYS_MX5_HCLK
+#define MXC_HCLK       CONFIG_SYS_MX5_HCLK
+#else
+#define MXC_HCLK       24000000
+#endif
+
+#ifdef CONFIG_SYS_MX5_CLK32
+#define MXC_CLK32      CONFIG_SYS_MX5_CLK32
+#else
+#define MXC_CLK32      32768
+#endif
+
 enum mxc_clock {
        MXC_ARM_CLK = 0,
        MXC_AHB_CLK,
@@ -31,22 +29,92 @@ enum mxc_clock {
        MXC_IPG_PERCLK,
        MXC_UART_CLK,
        MXC_CSPI_CLK,
+       MXC_ESDHC_CLK,
+       MXC_ESDHC2_CLK,
+       MXC_ESDHC3_CLK,
+       MXC_ESDHC4_CLK,
        MXC_FEC_CLK,
        MXC_SATA_CLK,
        MXC_DDR_CLK,
        MXC_NFC_CLK,
        MXC_PERIPH_CLK,
+       MXC_I2C_CLK,
+};
+
+
+struct clk {
+       const char *name;
+       int id;
+       /* Source clock this clk depends on */
+       struct clk *parent;
+       /* Secondary clock to enable/disable with this clock */
+       struct clk *secondary;
+       /* Current clock rate */
+       unsigned long rate;
+       /* Reference count of clock enable/disable */
+       __s8 usecount;
+       /* Register bit position for clock's enable/disable control. */
+       u8 enable_shift;
+       /* Register address for clock's enable/disable control. */
+       void *enable_reg;
+       u32 flags;
+       /*
+        * Function ptr to recalculate the clock's rate based on parent
+        * clock's rate
+        */
+       void (*recalc) (struct clk *);
+       /*
+        * Function ptr to set the clock to a new rate. The rate must match a
+        * supported rate returned from round_rate. Leave blank if clock is not
+       * programmable
+        */
+       int (*set_rate) (struct clk *, unsigned long);
+       /*
+        * Function ptr to round the requested clock rate to the nearest
+        * supported rate that is less than or equal to the requested rate.
+        */
+       unsigned long (*round_rate) (struct clk *, unsigned long);
+       /*
+        * Function ptr to enable the clock. Leave blank if clock can not
+        * be gated.
+        */
+       int (*enable) (struct clk *);
+       /*
+        * Function ptr to disable the clock. Leave blank if clock can not
+        * be gated.
+        */
+       void (*disable) (struct clk *);
+       /* Function ptr to set the parent clock of the clock. */
+       int (*set_parent) (struct clk *, struct clk *);
 };
 
 u32 imx_get_uartclk(void);
 u32 imx_get_fecclk(void);
 unsigned int mxc_get_clock(enum mxc_clock clk);
-int mxc_set_clock(u32 ref, u32 freq, u32 clk_type);
-void set_usb_phy2_clk(void);
+int mxc_set_clock(u32 ref, u32 freq, enum mxc_clock clk);
+int adjust_core_voltage(u32 freq);
+void set_usb_phy_clk(void);
+void enable_usb_phy1_clk(unsigned char enable);
 void enable_usb_phy2_clk(unsigned char enable);
 void set_usboh3_clk(void);
 void enable_usboh3_clk(unsigned char enable);
 void mxc_set_sata_internal_clock(void);
 int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
+void enable_nfc_clk(unsigned char enable);
+void ipu_clk_enable(void);
+void ipu_clk_disable(void);
+void ipu_di_clk_enable(int di);
+void ipu_di_clk_disable(int di);
+#ifdef CONFIG_MX53
+void ldb_clk_enable(int ldb);
+void ldb_clk_disable(int ldb);
+#else
+static inline void ldb_clk_enable(int ldb)
+{
+}
+static inline void ldb_clk_disable(int ldb)
+{
+}
+#endif /* CONFIG_MX53 */
 
 #endif /* __ASM_ARCH_CLOCK_H */