ARM: DRA7: Enable clocks for USB OTGSS2 and USB PHY2

[karo-tx-uboot.git] / arch / arm / include / asm / omap_common.h

diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 056affc3fabdccdf6be6a4ec2dd8ea32118fd1dc..37117e2827c74c233c728f2046668dcf3ebe788e 100644 (file)
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -145,6 +145,7 @@ struct prcm_regs {
        u32 cm_ssc_modfreqdiv_dpll_unipro;
        u32 cm_coreaon_usb_phy1_core_clkctrl;
        u32 cm_coreaon_usb_phy2_core_clkctrl;
+       u32 cm_coreaon_l3init_60m_gfclk_clkctrl;
 
        /* cm2.core */
        u32 cm_coreaon_bandgap_clkctrl;
@@ -231,6 +232,7 @@ struct prcm_regs {
        u32 cm_l3init_ocp2scp1_clkctrl;
        u32 cm_l3init_ocp2scp3_clkctrl;
        u32 cm_l3init_usb_otg_ss1_clkctrl;
+       u32 cm_l3init_usb_otg_ss2_clkctrl;
 
        u32 prm_irqstatus_mpu_2;
 
@@ -349,6 +351,10 @@ struct prcm_regs {
        /* IPU */
        u32 cm_ipu_clkstctrl;
        u32 cm_ipu_i2c5_clkctrl;
+
+       /*l3main1 edma*/
+       u32 cm_l3main1_tptc1_clkctrl;
+       u32 cm_l3main1_tptc2_clkctrl;
 };
 
 struct omap_sys_ctrl_regs {
@@ -462,6 +468,7 @@ struct omap_sys_ctrl_regs {
        u32 control_padconf_wkup_base;
        u32 iodelay_config_base;
        u32 ctrl_core_sma_sw_0;
+       u32 ctrl_core_sma_sw_1;
 };
 
 struct dpll_params {
@@ -575,6 +582,10 @@ void do_enable_clocks(u32 const *clk_domains,
                      u32 const *clk_modules_explicit_en,
                      u8 wait_for_enable);
 
+void do_disable_clocks(u32 const *clk_domains,
+                      u32 const *clk_modules_disable,
+                      u8 wait_for_disable);
+
 void setup_post_dividers(u32 const base,
                        const struct dpll_params *params);
 u32 omap_ddr_clk(void);
@@ -594,6 +605,9 @@ void recalibrate_iodelay(void);
 
 void omap_smc1(u32 service, u32 val);
 
+void enable_edma3_clocks(void);
+void disable_edma3_clocks(void);
+
 /* ABB */
 #define OMAP_ABB_NOMINAL_OPP           0
 #define OMAP_ABB_FAST_OPP              1
@@ -672,6 +686,7 @@ static inline u8 is_dra72x(void)
 /* DRA7XX */
 #define DRA752_ES1_0   0x07520100
 #define DRA752_ES1_1   0x07520110
+#define DRA752_ES2_0   0x07520200
 #define DRA722_ES1_0   0x07220100
 
 /*