arm: mx5: add support for core voltage change when switching clock frequency

[karo-tx-uboot.git] / arch / arm / include / asm / system.h

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 2b28a261ba0218692cf0a121807d44429ce026af..8b5b9f47b465bb047f632d9da1a6f71457bd0d54 100644 (file)
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -61,10 +61,16 @@
 
 #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
 
+#ifdef __ARM_ARCH_7A__
+#define wfi() __asm__ __volatile__ ("wfi" : : : "memory")
+#else
+#define wfi()
+#endif
+
 static inline unsigned int get_cr(void)
 {
        unsigned int val;
-       asm("mrc p15, 0, %0, c1, c0, 0  @ get CR" : "=r" (val) : : "cc");
+       asm volatile("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc");
        return val;
 }
 
@@ -75,6 +81,51 @@ static inline void set_cr(unsigned int val)
        isb();
 }
 
+static inline unsigned int get_dacr(void)
+{
+       unsigned int val;
+       asm("mrc p15, 0, %0, c3, c0, 0  @ get DACR" : "=r" (val) : : "cc");
+       return val;
+}
+
+static inline void set_dacr(unsigned int val)
+{
+       asm volatile("mcr p15, 0, %0, c3, c0, 0 @ set DACR"
+         : : "r" (val) : "cc");
+       isb();
+}
+
+/* options available for data cache on each page */
+enum dcache_option {
+       DCACHE_OFF = 0x12,
+       DCACHE_WRITETHROUGH = 0x1a,
+       DCACHE_WRITEBACK = 0x1e,
+};
+
+/* Size of an MMU section */
+enum {
+       MMU_SECTION_SHIFT       = 20,
+       MMU_SECTION_SIZE        = 1 << MMU_SECTION_SHIFT,
+};
+
+/**
+ * Change the cache settings for a region.
+ *
+ * \param start                start address of memory region to change
+ * \param size         size of memory region to change
+ * \param option       dcache option to select
+ */
+void mmu_set_region_dcache_behaviour(u32 start, int size,
+                                    enum dcache_option option);
+
+/**
+ * Register an update to the page tables, and flush the TLB
+ *
+ * \param start                start address of update in page table
+ * \param stop         stop address of update in page table
+ */
+void mmu_page_table_flush(unsigned long start, unsigned long stop);
+
 #endif /* __ASSEMBLY__ */
 
 #define arch_align_stack(x) (x)