ARM: keystone2: Use common definition for clk_get_rate

[karo-tx-uboot.git] / arch / arm / mach-keystone / include / mach / clock-k2e.h

diff --git a/arch/arm/mach-keystone/include/mach/clock-k2e.h b/arch/arm/mach-keystone/include/mach/clock-k2e.h
index e66ad692da9e91c437944194d2dca4f52a259f6f..4618560dd8737c86b05a641c8c65161c3e2a9fa1 100644 (file)
--- a/arch/arm/mach-keystone/include/mach/clock-k2e.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2e.h
@@ -10,27 +10,6 @@
 #ifndef __ASM_ARCH_CLOCK_K2E_H
 #define __ASM_ARCH_CLOCK_K2E_H
 
-#define CLK_LIST(CLK)\
-       CLK(0, core_pll_clk)\
-       CLK(1, pass_pll_clk)\
-       CLK(2, ddr3_pll_clk)\
-       CLK(3, sys_clk0_clk)\
-       CLK(4, sys_clk0_1_clk)\
-       CLK(5, sys_clk0_2_clk)\
-       CLK(6, sys_clk0_3_clk)\
-       CLK(7, sys_clk0_4_clk)\
-       CLK(8, sys_clk0_6_clk)\
-       CLK(9, sys_clk0_8_clk)\
-       CLK(10, sys_clk0_12_clk)\
-       CLK(11, sys_clk0_24_clk)\
-       CLK(12, sys_clk1_clk)\
-       CLK(13, sys_clk1_3_clk)\
-       CLK(14, sys_clk1_4_clk)\
-       CLK(15, sys_clk1_6_clk)\
-       CLK(16, sys_clk1_12_clk)\
-       CLK(17, sys_clk2_clk)\
-       CLK(18, sys_clk3_clk)
-
 #define PLLSET_CMD_LIST        "<pa|ddr3>"
 
 #define KS2_CLK1_6     sys_clk0_6_clk