Update from 2013.01 to 2013.07

[karo-tx-uboot.git] / arch / powerpc / cpu / mpc85xx / fdt.c

diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index d381cf9da2aeb7c02ebd551f033aa2809425482b..cfaa2edcedb510cb9764fb3fe644373cfbeec14a 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -4,23 +4,7 @@
  * (C) Copyright 2000
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -663,6 +647,13 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 #ifdef CONFIG_FSL_CORENET
        do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
                "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
+       do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0",
+               "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
+       do_fixup_by_compat_u32(blob, "fsl,mpic",
+               "clock-frequency", get_bus_freq(0)/2, 1);
+#else
+       do_fixup_by_compat_u32(blob, "fsl,mpic",
+               "clock-frequency", get_bus_freq(0), 1);
 #endif
 
        fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
@@ -811,7 +802,7 @@ int ft_verify_fdt(void *fdt)
 #ifdef CONFIG_SYS_LBC_ADDR
        off = fdt_node_offset_by_compatible(fdt, -1, "fsl,elbc");
        if (off > 0) {
-               const u32 *reg = fdt_getprop(fdt, off, "reg", NULL);
+               const fdt32_t *reg = fdt_getprop(fdt, off, "reg", NULL);
                if (reg) {
                        uint64_t uaddr = CCSR_VIRT_TO_PHYS(CONFIG_SYS_LBC_ADDR);