* (C) Copyright 2000-2011
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#if defined(CONFIG_CMD_DOC)
void doc_init(void);
#endif
-#if defined(CONFIG_HARD_I2C) || \
- defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
#include <i2c.h>
#endif
#include <spi.h>
#endif
extern ulong __init_end;
-extern ulong __bss_end__;
+extern ulong __bss_end;
ulong monitor_flash_len;
#if defined(CONFIG_CMD_BEDBUG)
/***********************************************************************/
-void __board_add_ram_info(int use_default)
+static void __board_add_ram_info(int use_default)
{
/* please define platform specific board_add_ram_info() */
}
void board_add_ram_info(int)
__attribute__ ((weak, alias("__board_add_ram_info")));
-int __board_flash_wp_on(void)
+static int __board_flash_wp_on(void)
{
/*
* Most flashes can't be detected when write protection is enabled,
int board_flash_wp_on(void)
__attribute__ ((weak, alias("__board_flash_wp_on")));
-void __cpu_secondary_init_r(void)
+static void __cpu_secondary_init_r(void)
{
}
/***********************************************************************/
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
static int init_func_i2c(void)
{
puts("I2C: ");
+#ifdef CONFIG_SYS_I2C
+ i2c_init_all();
+#else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+#endif
puts("ready\n");
return 0;
}
/***********************************************************************/
#if defined(CONFIG_WATCHDOG)
-static int init_func_watchdog_init(void)
+int init_func_watchdog_init(void)
{
puts(" Watchdog enabled\n");
WATCHDOG_RESET();
return 0;
}
-#define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
-
-static int init_func_watchdog_reset(void)
+int init_func_watchdog_reset(void)
{
WATCHDOG_RESET();
return 0;
}
-
-#define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
-#else
-#define INIT_FUNC_WATCHDOG_INIT /* undef */
-#define INIT_FUNC_WATCHDOG_RESET /* undef */
#endif /* CONFIG_WATCHDOG */
/*
* Initialization sequence
*/
-init_fnc_t *init_sequence[] = {
+static init_fnc_t *init_sequence[] = {
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
probecpu,
#endif
serial_init,
console_init_f,
display_options,
-#if defined(CONFIG_8260)
+#if defined(CONFIG_MPC8260)
prt_8260_rsr,
prt_8260_clks,
-#endif /* CONFIG_8260 */
+#endif /* CONFIG_MPC8260 */
#if defined(CONFIG_MPC83xx)
prt_83xx_rsr,
#endif
#if defined(CONFIG_MPC5xxx)
prt_mpc5xxx_clks,
#endif /* CONFIG_MPC5xxx */
-#if defined(CONFIG_MPC8220)
- prt_mpc8220_clks,
-#endif
checkboard,
INIT_FUNC_WATCHDOG_INIT
#if defined(CONFIG_MISC_INIT_F)
misc_init_f,
#endif
INIT_FUNC_WATCHDOG_RESET
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
init_func_i2c,
#endif
#if defined(CONFIG_HARD_SPI)
#ifdef CONFIG_POST
post_init_f,
#endif
- INIT_FUNC_WATCHDOG_RESET init_func_ram,
+ INIT_FUNC_WATCHDOG_RESET
+ init_func_ram,
#if defined(CONFIG_SYS_DRAM_TEST)
testdram,
#endif /* CONFIG_SYS_DRAM_TEST */
NULL, /* Terminate this list */
};
-ulong get_effective_memsize(void)
-{
-#ifndef CONFIG_VERY_BIG_RAM
- return gd->ram_size;
-#else
- /* limit stack to what we can reasonable map */
- return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
- CONFIG_MAX_MEM_MAPPED : gd->ram_size);
-#endif
-}
-
-int __fixup_cpu(void)
+static int __fixup_cpu(void)
{
return 0;
}
* initialized, and stack space is limited to a few kB.
*/
-#ifdef CONFIG_LOGBUFFER
-unsigned long logbuffer_base(void)
-{
- return CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - LOGBUFF_LEN;
-}
-#endif
-
void board_init_f(ulong bootflag)
{
bd_t *bd;
#ifdef CONFIG_PRAM
ulong reg;
#endif
+#ifdef CONFIG_DEEP_SLEEP
+ const ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ struct ccsr_scfg *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
+ u32 start_addr;
+ typedef void (*func_t)(void);
+ func_t kernel_resume;
+#endif
/* Pointer is writable since we allocated a register for it */
gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
if ((*init_fnc_ptr) () != 0)
hang();
+#ifdef CONFIG_DEEP_SLEEP
+ /* Jump to kernel in deep sleep case */
+ if (in_be32(&gur->scrtsr[0]) & (1 << 3)) {
+ start_addr = in_be32(&scfg->sparecr[1]);
+ kernel_resume = (func_t)start_addr;
+ kernel_resume();
+ }
+#endif
+
#ifdef CONFIG_POST
post_bootmode_init();
- post_run(NULL, POST_ROM | post_bootmode_get(0));
+ post_run(NULL, POST_ROM | post_bootmode_get(NULL));
#endif
WATCHDOG_RESET();
* - monitor code
* - board info struct
*/
- len = (ulong)&__bss_end__ - CONFIG_SYS_MONITOR_BASE;
+ len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
/*
* Subtract specified amount of memory to hide so that it won't
bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
#endif
-#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
+#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
#endif
#if defined(CONFIG_MPC83xx)
bd->bi_immrbar = CONFIG_SYS_IMMR;
#endif
-#if defined(CONFIG_MPC8220)
- bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
- bd->bi_inpfreq = gd->inp_clk;
- bd->bi_pcifreq = gd->pci_clk;
- bd->bi_vcofreq = gd->vco_clk;
- bd->bi_pevfreq = gd->pev_clk;
- bd->bi_flbfreq = gd->flb_clk;
-
- /* store bootparam to sram (backward compatible), here? */
- {
- u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
-
- *sram++ = gd->ram_size;
- *sram++ = gd->bus_clk;
- *sram++ = gd->inp_clk;
- *sram++ = gd->cpu_clk;
- *sram++ = gd->vco_clk;
- *sram++ = gd->flb_clk;
- *sram++ = 0xb8c3ba11; /* boot signature */
- }
-#endif
WATCHDOG_RESET();
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
#if defined(CONFIG_CPM2)
- bd->bi_cpmfreq = gd->cpm_clk;
- bd->bi_brgfreq = gd->brg_clk;
- bd->bi_sccfreq = gd->scc_clk;
- bd->bi_vco = gd->vco_out;
+ bd->bi_cpmfreq = gd->arch.cpm_clk;
+ bd->bi_brgfreq = gd->arch.brg_clk;
+ bd->bi_sccfreq = gd->arch.scc_clk;
+ bd->bi_vco = gd->arch.vco_out;
#endif /* CONFIG_CPM2 */
#if defined(CONFIG_MPC512X)
- bd->bi_ipsfreq = gd->ips_clk;
+ bd->bi_ipsfreq = gd->arch.ips_clk;
#endif /* CONFIG_MPC512X */
#if defined(CONFIG_MPC5xxx)
- bd->bi_ipbfreq = gd->ipb_clk;
+ bd->bi_ipbfreq = gd->arch.ipb_clk;
bd->bi_pcifreq = gd->pci_clk;
#endif /* CONFIG_MPC5xxx */
- bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
#ifdef CONFIG_SYS_EXTBDINFO
strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
/*
- * The gd->cpu pointer is set to an address in flash before relocation.
- * We need to update it to point to the same CPU entry in RAM.
+ * The gd->arch.cpu pointer is set to an address in flash before
+ * relocation. We need to update it to point to the same CPU entry
+ * in RAM.
*/
- gd->cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
+ gd->arch.cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
/*
* If we didn't know the cpu mask & # cores, we can save them of
flash_size = 0;
} else if ((flash_size = flash_init()) > 0) {
#ifdef CONFIG_SYS_FLASH_CHECKSUM
- char *s;
-
print_size(flash_size, "");
/*
* Compute and print flash CRC if flashchecksum is set to 'y'
*
* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
*/
- s = getenv("flashchecksum");
- if (s && (*s == 'y')) {
+ if (getenv_yesno("flashchecksum") == 1) {
printf(" CRC: %08X",
crc32(0,
(const unsigned char *)
* "i2cfast" into account
*/
{
- char *s = getenv("i2cfast");
-
- if (s && ((*s == 'y') || (*s == 'Y'))) {
+ if (getenv_yesno("i2cfast") == 1) {
bd->bi_iic_fast[0] = 1;
bd->bi_iic_fast[1] = 1;
}
pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
#endif
#endif
- sprintf(memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
+ sprintf(memsz, "%ldk", (ulong) (bd->bi_memsize / 1024) - pram);
setenv("mem", memsz);
}
#endif
kbd_init();
#endif
-#ifdef CONFIG_MODEM_SUPPORT
- {
- extern int do_mdm_init;
-
- do_mdm_init = gd->do_mdm_init;
- }
-#endif
-
/* Initialization complete - start the monitor */
/* main_loop() can return to retry autoboot, if so just run it again. */
/* NOTREACHED - no way out of command loop except booting */
}
-void hang(void)
-{
- puts("### ERROR ### Please RESET the board ###\n");
- bootstage_error(BOOTSTAGE_ID_NEED_RESET);
- for (;;)
- ;
-}
-
-
#if 0 /* We could use plain global data, but the resulting code is bigger */
/*
* Pointer to initial global data area
projects / karo-tx-uboot.git / blobdiff