]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - board/boundary/nitrogen6x/nitrogen6x.c
Merge remote-tracking branch 'u-boot-imx/master'
[karo-tx-uboot.git] / board / boundary / nitrogen6x / nitrogen6x.c
index 7edfe19367521dcee2d3a56f9d953fa5790d33ed..951b820cbba8ab6d4c82150f6224ae7e76434973 100644 (file)
@@ -28,6 +28,9 @@
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/mxc_hdmi.h>
 #include <i2c.h>
+#include <input.h>
+#include <netdev.h>
+#include <usb/ehci-fsl.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 #define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22)
@@ -70,12 +73,12 @@ int dram_init(void)
        return 0;
 }
 
-iomux_v3_cfg_t const uart1_pads[] = {
+static iomux_v3_cfg_t const uart1_pads[] = {
        MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
        MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
-iomux_v3_cfg_t const uart2_pads[] = {
+static iomux_v3_cfg_t const uart2_pads[] = {
        MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
        MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
@@ -83,7 +86,7 @@ iomux_v3_cfg_t const uart2_pads[] = {
 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 
 /* I2C1, SGTL5000 */
-struct i2c_pads_info i2c_pad_info0 = {
+static struct i2c_pads_info i2c_pad_info0 = {
        .scl = {
                .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC,
                .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC,
@@ -97,7 +100,7 @@ struct i2c_pads_info i2c_pad_info0 = {
 };
 
 /* I2C2 Camera, MIPI */
-struct i2c_pads_info i2c_pad_info1 = {
+static struct i2c_pads_info i2c_pad_info1 = {
        .scl = {
                .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC,
                .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC,
@@ -111,7 +114,7 @@ struct i2c_pads_info i2c_pad_info1 = {
 };
 
 /* I2C3, J15 - RGB connector */
-struct i2c_pads_info i2c_pad_info2 = {
+static struct i2c_pads_info i2c_pad_info2 = {
        .scl = {
                .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC,
                .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC,
@@ -124,7 +127,16 @@ struct i2c_pads_info i2c_pad_info2 = {
        }
 };
 
-iomux_v3_cfg_t const usdhc3_pads[] = {
+static iomux_v3_cfg_t const usdhc2_pads[] = {
+       MX6_PAD_SD2_CLK__SD2_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX6_PAD_SD2_CMD__SD2_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+};
+
+static iomux_v3_cfg_t const usdhc3_pads[] = {
        MX6_PAD_SD3_CLK__SD3_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD3_CMD__SD3_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@@ -134,7 +146,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = {
        MX6_PAD_SD3_DAT5__GPIO7_IO00    | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
 };
 
-iomux_v3_cfg_t const usdhc4_pads[] = {
+static iomux_v3_cfg_t const usdhc4_pads[] = {
        MX6_PAD_SD4_CLK__SD4_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD4_CMD__SD4_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@@ -144,7 +156,7 @@ iomux_v3_cfg_t const usdhc4_pads[] = {
        MX6_PAD_NANDF_D6__GPIO2_IO06    | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
 };
 
-iomux_v3_cfg_t const enet_pads1[] = {
+static iomux_v3_cfg_t const enet_pads1[] = {
        MX6_PAD_ENET_MDIO__ENET_MDIO            | MUX_PAD_CTRL(ENET_PAD_CTRL),
        MX6_PAD_ENET_MDC__ENET_MDC              | MUX_PAD_CTRL(ENET_PAD_CTRL),
        MX6_PAD_RGMII_TXC__RGMII_TXC    | MUX_PAD_CTRL(ENET_PAD_CTRL),
@@ -171,7 +183,7 @@ iomux_v3_cfg_t const enet_pads1[] = {
        MX6_PAD_ENET_RXD0__GPIO1_IO27           | MUX_PAD_CTRL(NO_PAD_CTRL),
 };
 
-iomux_v3_cfg_t const enet_pads2[] = {
+static iomux_v3_cfg_t const enet_pads2[] = {
        MX6_PAD_RGMII_RXC__RGMII_RXC    | MUX_PAD_CTRL(ENET_PAD_CTRL),
        MX6_PAD_RGMII_RD0__RGMII_RD0    | MUX_PAD_CTRL(ENET_PAD_CTRL),
        MX6_PAD_RGMII_RD1__RGMII_RD1    | MUX_PAD_CTRL(ENET_PAD_CTRL),
@@ -189,7 +201,7 @@ static iomux_v3_cfg_t const misc_pads[] = {
 };
 
 /* wl1271 pads on nitrogen6x */
-iomux_v3_cfg_t const wl12xx_pads[] = {
+static iomux_v3_cfg_t const wl12xx_pads[] = {
        (MX6_PAD_NANDF_CS1__GPIO6_IO14 & ~MUX_PAD_CTRL_MASK)
                | MUX_PAD_CTRL(WEAK_PULLDOWN),
        (MX6_PAD_NANDF_CS2__GPIO6_IO15 & ~MUX_PAD_CTRL_MASK)
@@ -235,9 +247,10 @@ static void setup_iomux_enet(void)
        gpio_set_value(IMX_GPIO_NR(1, 27), 1); /* Nitrogen6X PHY reset */
 
        imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2));
+       udelay(100);    /* Wait 100 us before using mii interface */
 }
 
-iomux_v3_cfg_t const usb_pads[] = {
+static iomux_v3_cfg_t const usb_pads[] = {
        MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL),
 };
 
@@ -271,7 +284,7 @@ int board_ehci_power(int port, int on)
 #endif
 
 #ifdef CONFIG_FSL_ESDHC
-struct fsl_esdhc_cfg usdhc_cfg[2] = {
+static struct fsl_esdhc_cfg usdhc_cfg[2] = {
        {USDHC3_BASE_ADDR},
        {USDHC4_BASE_ADDR},
 };
@@ -279,17 +292,11 @@ struct fsl_esdhc_cfg usdhc_cfg[2] = {
 int board_mmc_getcd(struct mmc *mmc)
 {
        struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-       int ret;
+       int gp_cd = (cfg->esdhc_base == USDHC3_BASE_ADDR) ? IMX_GPIO_NR(7, 0) :
+                       IMX_GPIO_NR(2, 6);
 
-       if (cfg->esdhc_base == USDHC3_BASE_ADDR) {
-               gpio_direction_input(IMX_GPIO_NR(7, 0));
-               ret = !gpio_get_value(IMX_GPIO_NR(7, 0));
-       } else {
-               gpio_direction_input(IMX_GPIO_NR(2, 6));
-               ret = !gpio_get_value(IMX_GPIO_NR(2, 6));
-       }
-
-       return ret;
+       gpio_direction_input(gp_cd);
+       return !gpio_get_value(gp_cd);
 }
 
 int board_mmc_init(bd_t *bis)
@@ -333,7 +340,7 @@ int board_spi_cs_gpio(unsigned bus, unsigned cs)
        return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1;
 }
 
-iomux_v3_cfg_t const ecspi1_pads[] = {
+static iomux_v3_cfg_t const ecspi1_pads[] = {
        /* SS1 */
        MX6_PAD_EIM_D19__GPIO3_IO19  | MUX_PAD_CTRL(NO_PAD_CTRL),
        MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
@@ -341,7 +348,7 @@ iomux_v3_cfg_t const ecspi1_pads[] = {
        MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
 };
 
-void setup_spi(void)
+static void setup_spi(void)
 {
        imx_iomux_v3_setup_multiple_pads(ecspi1_pads,
                                         ARRAY_SIZE(ecspi1_pads));
@@ -472,6 +479,17 @@ static void enable_lvds(struct display_info_t const *dev)
        gpio_direction_output(LVDS_BACKLIGHT_GP, 1);
 }
 
+static void enable_lvds_jeida(struct display_info_t const *dev)
+{
+       struct iomuxc *iomux = (struct iomuxc *)
+                               IOMUXC_BASE_ADDR;
+       u32 reg = readl(&iomux->gpr[2]);
+       reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT
+            |IOMUXC_GPR2_BIT_MAPPING_CH0_JEIDA;
+       writel(reg, &iomux->gpr[2]);
+       gpio_direction_output(LVDS_BACKLIGHT_GP, 1);
+}
+
 static void enable_rgb(struct display_info_t const *dev)
 {
        imx_iomux_v3_setup_multiple_pads(
@@ -481,10 +499,10 @@ static void enable_rgb(struct display_info_t const *dev)
 }
 
 struct display_info_t const displays[] = {{
-       .bus    = -1,
-       .addr   = 0,
+       .bus    = 1,
+       .addr   = 0x50,
        .pixfmt = IPU_PIX_FMT_RGB24,
-       .detect = detect_hdmi,
+       .detect = detect_i2c,
        .enable = do_enable_hdmi,
        .mode   = {
                .name           = "HDMI",
@@ -500,6 +518,46 @@ struct display_info_t const displays[] = {{
                .vsync_len      = 10,
                .sync           = FB_SYNC_EXT,
                .vmode          = FB_VMODE_NONINTERLACED
+} }, {
+       .bus    = 0,
+       .addr   = 0,
+       .pixfmt = IPU_PIX_FMT_RGB24,
+       .detect = NULL,
+       .enable = enable_lvds_jeida,
+       .mode   = {
+               .name           = "LDB-WXGA",
+               .refresh        = 60,
+               .xres           = 1280,
+               .yres           = 800,
+               .pixclock       = 14065,
+               .left_margin    = 40,
+               .right_margin   = 40,
+               .upper_margin   = 3,
+               .lower_margin   = 80,
+               .hsync_len      = 10,
+               .vsync_len      = 10,
+               .sync           = FB_SYNC_EXT,
+               .vmode          = FB_VMODE_NONINTERLACED
+} }, {
+       .bus    = 0,
+       .addr   = 0,
+       .pixfmt = IPU_PIX_FMT_RGB24,
+       .detect = NULL,
+       .enable = enable_lvds,
+       .mode   = {
+               .name           = "LDB-WXGA-S",
+               .refresh        = 60,
+               .xres           = 1280,
+               .yres           = 800,
+               .pixclock       = 14065,
+               .left_margin    = 40,
+               .right_margin   = 40,
+               .upper_margin   = 3,
+               .lower_margin   = 80,
+               .hsync_len      = 10,
+               .vsync_len      = 10,
+               .sync           = FB_SYNC_EXT,
+               .vmode          = FB_VMODE_NONINTERLACED
 } }, {
        .bus    = 2,
        .addr   = 0x4,
@@ -520,6 +578,26 @@ struct display_info_t const displays[] = {{
                .vsync_len      = 10,
                .sync           = FB_SYNC_EXT,
                .vmode          = FB_VMODE_NONINTERLACED
+} }, {
+       .bus    = 0,
+       .addr   = 0,
+       .pixfmt = IPU_PIX_FMT_LVDS666,
+       .detect = NULL,
+       .enable = enable_lvds,
+       .mode   = {
+               .name           = "LG-9.7",
+               .refresh        = 60,
+               .xres           = 1024,
+               .yres           = 768,
+               .pixclock       = 15385, /* ~65MHz */
+               .left_margin    = 480,
+               .right_margin   = 260,
+               .upper_margin   = 16,
+               .lower_margin   = 6,
+               .hsync_len      = 250,
+               .vsync_len      = 10,
+               .sync           = FB_SYNC_EXT,
+               .vmode          = FB_VMODE_NONINTERLACED
 } }, {
        .bus    = 2,
        .addr   = 0x38,
@@ -540,6 +618,86 @@ struct display_info_t const displays[] = {{
                .vsync_len      = 10,
                .sync           = FB_SYNC_EXT,
                .vmode          = FB_VMODE_NONINTERLACED
+} }, {
+       .bus    = 2,
+       .addr   = 0x10,
+       .pixfmt = IPU_PIX_FMT_RGB666,
+       .detect = detect_i2c,
+       .enable = enable_rgb,
+       .mode   = {
+               .name           = "fusion7",
+               .refresh        = 60,
+               .xres           = 800,
+               .yres           = 480,
+               .pixclock       = 33898,
+               .left_margin    = 96,
+               .right_margin   = 24,
+               .upper_margin   = 3,
+               .lower_margin   = 10,
+               .hsync_len      = 72,
+               .vsync_len      = 7,
+               .sync           = 0x40000002,
+               .vmode          = FB_VMODE_NONINTERLACED
+} }, {
+       .bus    = 0,
+       .addr   = 0,
+       .pixfmt = IPU_PIX_FMT_RGB666,
+       .detect = NULL,
+       .enable = enable_rgb,
+       .mode   = {
+               .name           = "svga",
+               .refresh        = 60,
+               .xres           = 800,
+               .yres           = 600,
+               .pixclock       = 15385,
+               .left_margin    = 220,
+               .right_margin   = 40,
+               .upper_margin   = 21,
+               .lower_margin   = 7,
+               .hsync_len      = 60,
+               .vsync_len      = 10,
+               .sync           = 0,
+               .vmode          = FB_VMODE_NONINTERLACED
+} }, {
+       .bus    = 2,
+       .addr   = 0x41,
+       .pixfmt = IPU_PIX_FMT_LVDS666,
+       .detect = detect_i2c,
+       .enable = enable_lvds,
+       .mode   = {
+               .name           = "amp1024x600",
+               .refresh        = 60,
+               .xres           = 1024,
+               .yres           = 600,
+               .pixclock       = 15385,
+               .left_margin    = 220,
+               .right_margin   = 40,
+               .upper_margin   = 21,
+               .lower_margin   = 7,
+               .hsync_len      = 60,
+               .vsync_len      = 10,
+               .sync           = FB_SYNC_EXT,
+               .vmode          = FB_VMODE_NONINTERLACED
+} }, {
+       .bus    = 0,
+       .addr   = 0,
+       .pixfmt = IPU_PIX_FMT_LVDS666,
+       .detect = 0,
+       .enable = enable_lvds,
+       .mode   = {
+               .name           = "wvga-lvds",
+               .refresh        = 57,
+               .xres           = 800,
+               .yres           = 480,
+               .pixclock       = 15385,
+               .left_margin    = 220,
+               .right_margin   = 40,
+               .upper_margin   = 21,
+               .lower_margin   = 7,
+               .hsync_len      = 60,
+               .vsync_len      = 10,
+               .sync           = FB_SYNC_EXT,
+               .vmode          = FB_VMODE_NONINTERLACED
 } }, {
        .bus    = 2,
        .addr   = 0x48,
@@ -560,9 +718,34 @@ struct display_info_t const displays[] = {{
                .vsync_len      = 10,
                .sync           = 0,
                .vmode          = FB_VMODE_NONINTERLACED
+} }, {
+       .bus    = 0,
+       .addr   = 0,
+       .pixfmt = IPU_PIX_FMT_RGB24,
+       .detect = NULL,
+       .enable = enable_rgb,
+       .mode   = {
+               .name           = "qvga",
+               .refresh        = 60,
+               .xres           = 320,
+               .yres           = 240,
+               .pixclock       = 37037,
+               .left_margin    = 38,
+               .right_margin   = 37,
+               .upper_margin   = 16,
+               .lower_margin   = 15,
+               .hsync_len      = 30,
+               .vsync_len      = 3,
+               .sync           = 0,
+               .vmode          = FB_VMODE_NONINTERLACED
 } } };
 size_t display_count = ARRAY_SIZE(displays);
 
+int board_cfb_skip(void)
+{
+       return NULL != getenv("novideo");
+}
+
 static void setup_display(void)
 {
        struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@@ -619,17 +802,62 @@ static void setup_display(void)
 }
 #endif
 
+static iomux_v3_cfg_t const init_pads[] = {
+       /* SGTL5000 sys_mclk */
+       NEW_PAD_CTRL(MX6_PAD_GPIO_0__CCM_CLKO1, OUTPUT_40OHM),
+
+       /* J5 - Camera MCLK */
+       NEW_PAD_CTRL(MX6_PAD_GPIO_3__CCM_CLKO2, OUTPUT_40OHM),
+
+       /* wl1271 pads on nitrogen6x */
+       /* WL12XX_WL_IRQ_GP */
+       NEW_PAD_CTRL(MX6_PAD_NANDF_CS1__GPIO6_IO14, WEAK_PULLDOWN),
+       /* WL12XX_WL_ENABLE_GP */
+       NEW_PAD_CTRL(MX6_PAD_NANDF_CS2__GPIO6_IO15, OUTPUT_40OHM),
+       /* WL12XX_BT_ENABLE_GP */
+       NEW_PAD_CTRL(MX6_PAD_NANDF_CS3__GPIO6_IO16, OUTPUT_40OHM),
+       /* USB otg power */
+       NEW_PAD_CTRL(MX6_PAD_EIM_D22__GPIO3_IO22, OUTPUT_40OHM),
+       NEW_PAD_CTRL(MX6_PAD_NANDF_D5__GPIO2_IO05, OUTPUT_40OHM),
+       NEW_PAD_CTRL(MX6_PAD_NANDF_WP_B__GPIO6_IO09, OUTPUT_40OHM),
+       NEW_PAD_CTRL(MX6_PAD_GPIO_8__GPIO1_IO08, OUTPUT_40OHM),
+       NEW_PAD_CTRL(MX6_PAD_GPIO_6__GPIO1_IO06, OUTPUT_40OHM),
+};
+
+#define WL12XX_WL_IRQ_GP       IMX_GPIO_NR(6, 14)
+
+static unsigned gpios_out_low[] = {
+       /* Disable wl1271 */
+       IMX_GPIO_NR(6, 15),     /* disable wireless */
+       IMX_GPIO_NR(6, 16),     /* disable bluetooth */
+       IMX_GPIO_NR(3, 22),     /* disable USB otg power */
+       IMX_GPIO_NR(2, 5),      /* ov5640 mipi camera reset */
+       IMX_GPIO_NR(1, 8),      /* ov5642 reset */
+};
+
+static unsigned gpios_out_high[] = {
+       IMX_GPIO_NR(1, 6),      /* ov5642 powerdown */
+       IMX_GPIO_NR(6, 9),      /* ov5640 mipi camera power down */
+};
+
+static void set_gpios(unsigned *p, int cnt, int val)
+{
+       int i;
+
+       for (i = 0; i < cnt; i++)
+               gpio_direction_output(*p++, val);
+}
+
 int board_early_init_f(void)
 {
        setup_iomux_uart();
 
-       /* Disable wl1271 For Nitrogen6w */
+       set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1);
+       set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0);
        gpio_direction_input(WL12XX_WL_IRQ_GP);
-       gpio_direction_output(WL12XX_WL_ENABLE_GP, 0);
-       gpio_direction_output(WL12XX_BT_ENABLE_GP, 0);
-       gpio_direction_output(GP_USB_OTG_PWR, 0); /* OTG power off */
 
        imx_iomux_v3_setup_multiple_pads(wl12xx_pads, ARRAY_SIZE(wl12xx_pads));
+       imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads));
        setup_buttons();
 
 #if defined(CONFIG_VIDEO_IPUV3)
@@ -663,6 +891,8 @@ int board_init(void)
 #ifdef CONFIG_MXC_SPI
        setup_spi();
 #endif
+       imx_iomux_v3_setup_multiple_pads(
+               usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
        setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0);
        setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
        setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);