Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash

[karo-tx-uboot.git] / board / esd / plu405 / plu405.c

diff --git a/board/esd/plu405/plu405.c b/board/esd/plu405/plu405.c
index e41545a9369c8badbf3b2d17c91ecb9861a4a276..03bf9c8fe5ce6dafa851135e5d8a1324fb085d91 100644 (file)
--- a/board/esd/plu405/plu405.c
+++ b/board/esd/plu405/plu405.c
@@ -2,23 +2,7 @@
  * (C) Copyright 2001-2003
  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -26,12 +10,12 @@
 #include <asm/io.h>
 #include <command.h>
 #include <malloc.h>
+#include <sja1000.h>
 
 #undef FPGA_DEBUG
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
 extern void lxt971_no_sleep(void);
 
 /* fpga configuration data - gzip compressed and generated by bin2c */
@@ -46,23 +30,32 @@ const unsigned char fpgadata[] =
 #include "../common/fpga.c"
 
 /*
- * include common auto-update code (for esd boards)
+ * generate a short spike on the CAN tx line
+ * to bring the couplers in sync
  */
-#include "../common/auto_update.h"
-
-au_image_t au_image[] = {
-       {"plu405/preinst.img", 0, -1, AU_SCRIPT},
-       {"plu405/u-boot.img", 0xfffc0000, 0x00040000, AU_FIRMWARE},
-       {"plu405/pImage_${bd_type}", 0x00000000, 0x00100000, AU_NAND},
-       {"plu405/pImage.initrd", 0x00100000, 0x00200000, AU_NAND},
-       {"plu405/yaffsmt2.img", 0x00300000, 0x01c00000, AU_NAND},
-       {"plu405/postinst.img", 0, 0, AU_SCRIPT},
-};
-
-int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0]));
-
-/* Prototypes */
-int gunzip(void *, int, unsigned char *, unsigned long *);
+void init_coupler(u32 addr)
+{
+       struct sja1000_basic_s *ctrl = (struct sja1000_basic_s *)addr;
+
+       /* reset */
+       out_8(&ctrl->cr, CR_RR);
+
+       /* dominant */
+       out_8(&ctrl->btr0, 0x00); /* btr setup is required */
+       out_8(&ctrl->btr1, 0x14); /* we use 1Mbit/s */
+       out_8(&ctrl->oc, OC_TP1 | OC_TN1 | OC_POL1 |
+             OC_TP0 | OC_TN0 | OC_POL0 | OC_MODE1);
+       out_8(&ctrl->cr, 0x00);
+
+       /* delay */
+       in_8(&ctrl->cr);
+       in_8(&ctrl->cr);
+       in_8(&ctrl->cr);
+       in_8(&ctrl->cr);
+
+       /* reset */
+       out_8(&ctrl->cr, CR_RR);
+}
 
 int board_early_init_f(void)
 {
@@ -78,19 +71,19 @@ int board_early_init_f(void)
         * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
         * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
         */
-       mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
-       mtdcr(uicer, 0x00000000);       /* disable all ints */
-       mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
-       mtdcr(uicpr, 0xFFFFFF99);       /* set int polarities */
-       mtdcr(uictr, 0x10000000);       /* set int trigger levels */
-       mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest prio */
-       mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+       mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
+       mtdcr(UIC0ER, 0x00000000);       /* disable all ints */
+       mtdcr(UIC0CR, 0x00000000);       /* set all to be non-critical*/
+       mtdcr(UIC0PR, 0xFFFFFF99);       /* set int polarities */
+       mtdcr(UIC0TR, 0x10000000);       /* set int trigger levels */
+       mtdcr(UIC0VCR, 0x00000001);      /* set vect base=0,INT0 highest prio */
+       mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
 
        /*
         * EBC Configuration Register: set ready timeout to
         * 512 ebc-clks -> ca. 15 us
         */
-       mtebc(epcr, 0xa8400000); /* ebc always driven */
+       mtebc(EBC0_CFG, 0xa8400000); /* ebc always driven */
 
        return 0;
 }
@@ -214,6 +207,13 @@ int misc_init_r(void)
        out_8((void *)DUART1_BA + 1, fctr); /* write FCTR */
        out_8((void *)DUART1_BA + 3, 0);    /* write LCR */
 
+       /*
+        * Init magnetic couplers
+        */
+       if (!getenv("noinitcoupler")) {
+               init_coupler(CAN0_BA);
+               init_coupler(CAN1_BA);
+       }
        return 0;
 }
 
@@ -223,7 +223,7 @@ int misc_init_r(void)
 int checkboard(void)
 {
        char str[64];
-       int i = getenv_r("serial#", str, sizeof(str));
+       int i = getenv_f("serial#", str, sizeof(str));
 
        puts("Board: ");
 
@@ -305,7 +305,7 @@ int eeprom_write_enable(unsigned dev_addr, int state)
        return state;
 }
 
-int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
        int query = argc == 1;
        int state = 0;