* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
*/
#include <common.h>
#include <lcd.h>
#include <netdev.h>
#include <mmc.h>
-#include <imx_ssp_mmc.h>
#include <linux/list.h>
#include <linux/fb.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <asm/arch/iomux-mx28.h>
#include <asm/arch/clock.h>
-#include <asm/arch/mxsfb.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
/*
* Functions
*/
+
+/* provide at least _some_ sort of randomness */
+#define MAX_LOOPS 100
+
+static u32 random;
+
+static inline void random_init(void)
+{
+ struct mxs_digctl_regs *digctl_regs = (void *)MXS_DIGCTL_BASE;
+ u32 seed = 0;
+ int i;
+
+ for (i = 0; i < MAX_LOOPS; i++) {
+ unsigned int usec = readl(&digctl_regs->hw_digctl_microseconds);
+
+ seed = get_timer(usec + random + seed);
+ srand(seed);
+ random = rand();
+ }
+}
+
+#define RTC_PERSISTENT0_CLK32_MASK (RTC_PERSISTENT0_CLOCKSOURCE | \
+ RTC_PERSISTENT0_XTAL32KHZ_PWRUP)
+static u32 boot_cause __attribute__((section("data")));
+
int board_early_init_f(void)
{
+ struct mxs_rtc_regs *rtc_regs = (void *)MXS_RTC_BASE;
+ u32 rtc_stat;
+ int timeout = 5000;
+
+ random_init();
+
/* IO0 clock at 480MHz */
- mx28_set_ioclk(MXC_IOCLK0, 480000);
+ mxs_set_ioclk(MXC_IOCLK0, 480000);
/* IO1 clock at 480MHz */
- mx28_set_ioclk(MXC_IOCLK1, 480000);
+ mxs_set_ioclk(MXC_IOCLK1, 480000);
/* SSP0 clock at 96MHz */
- mx28_set_sspclk(MXC_SSPCLK0, 96000, 0);
+ mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
/* SSP2 clock at 96MHz */
- mx28_set_sspclk(MXC_SSPCLK2, 96000, 0);
+ mxs_set_sspclk(MXC_SSPCLK2, 96000, 0);
gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
mxs_iomux_setup_multiple_pads(tx28_pads, ARRAY_SIZE(tx28_pads));
+
+ while ((rtc_stat = readl(&rtc_regs->hw_rtc_stat)) &
+ RTC_STAT_STALE_REGS_PERSISTENT0) {
+ if (timeout-- < 0)
+ return 0;
+ udelay(1);
+ }
+ boot_cause = readl(&rtc_regs->hw_rtc_persistent0);
+ if ((boot_cause & RTC_PERSISTENT0_CLK32_MASK) !=
+ RTC_PERSISTENT0_CLK32_MASK) {
+ if (boot_cause & RTC_PERSISTENT0_CLOCKSOURCE)
+ goto rtc_err;
+ writel(RTC_PERSISTENT0_CLK32_MASK,
+ &rtc_regs->hw_rtc_persistent0_set);
+ }
+ return 0;
+
+rtc_err:
+ serial_puts("Inconsistent value in RTC_PERSISTENT0 register; power-on-reset required\n");
return 0;
}
int board_init(void)
{
/* Address of boot parameters */
+#ifdef CONFIG_OF_LIBFDT
+ gd->bd->bi_arch_number = -1;
+#endif
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
return 0;
}
int board_mmc_init(bd_t *bis)
{
- return mxsmmc_initialize(bis, 0, tx28_mmc_wp);
+ return mxsmmc_initialize(bis, 0, tx28_mmc_wp, NULL);
}
#endif /* CONFIG_CMD_MMC */
#else
#define FEC_MAX_IDX 0
#endif
+#ifndef ETH_ALEN
+#define ETH_ALEN 6
+#endif
static int fec_get_mac_addr(int index)
{
- u32 val1, val2;
int timeout = 1000;
struct mxs_ocotp_regs *ocotp_regs =
(struct mxs_ocotp_regs *)MXS_OCOTP_BASE;
u32 *cust = &ocotp_regs->hw_ocotp_cust0;
- char mac[6 * 3];
+ u8 mac[ETH_ALEN];
char env_name[] = "eth.addr";
+ u32 val = 0;
+ int i;
if (index < 0 || index > FEC_MAX_IDX)
return -EINVAL;
udelay(100);
}
- val1 = readl(&cust[index * 8]);
- val2 = readl(&cust[index * 8 + 4]);
- if ((val1 | val2) == 0)
+ for (i = 0; i < sizeof(mac); i++) {
+ int shift = 24 - i % 4 * 8;
+
+ if (i % 4 == 0)
+ val = readl(&cust[index * 8 + i]);
+ mac[i] = val >> shift;
+ }
+ if (!is_valid_ether_addr(mac))
return 0;
- snprintf(mac, sizeof(mac), "%02x:%02x:%02x:%02x:%02x:%02x",
- (val1 >> 24) & 0xFF, (val1 >> 16) & 0xFF,
- (val1 >> 8) & 0xFF, (val1 >> 0) & 0xFF,
- (val2 >> 24) & 0xFF, (val2 >> 16) & 0xFF);
+
if (index == 0)
snprintf(env_name, sizeof(env_name), "ethaddr");
else
snprintf(env_name, sizeof(env_name), "eth%daddr", index);
- setenv(env_name, mac);
+ eth_setenv_enetaddr(env_name, mac);
return 0;
}
#endif /* CONFIG_GET_FEC_MAC_ADDR_FROM_IIM */
};
#ifdef CONFIG_LCD
+static ushort tx28_cmap[256];
+vidinfo_t panel_info = {
+ /* set to max. size supported by SoC */
+ .vl_col = 1600,
+ .vl_row = 1200,
+
+ .vl_bpix = LCD_COLOR24, /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
+ .cmap = tx28_cmap,
+};
+
static struct fb_videomode tx28_fb_modes[] = {
{
/* Standard VGA timing */
.upper_margin = 31,
.vsync_len = 2,
.lower_margin = 12,
- .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
.vmode = FB_VMODE_NONINTERLACED,
},
{
.upper_margin = 32,
.vsync_len = 3,
.lower_margin = 10,
- .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
.vmode = FB_VMODE_NONINTERLACED,
},
{
.upper_margin = 18 - 3,
.vsync_len = 3,
.lower_margin = 4,
- .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
.vmode = FB_VMODE_NONINTERLACED,
},
{
.upper_margin = 2,
.vsync_len = 10,
.lower_margin = 2,
- .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
.vmode = FB_VMODE_NONINTERLACED,
},
{
.upper_margin = 35 - 2,
.vsync_len = 2,
.lower_margin = 525 - 480 - 35,
- .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
.vmode = FB_VMODE_NONINTERLACED,
},
{
.upper_margin = 16, /* 15 according to datasheet */
.vsync_len = 3, /* TVP -> 1>x>5 */
.lower_margin = 4, /* 4.5 according to datasheet */
- .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
.vmode = FB_VMODE_NONINTERLACED,
},
{
.upper_margin = 35 - 2,
.vsync_len = 2,
.lower_margin = 525 - 480 - 35,
- .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
.vmode = FB_VMODE_NONINTERLACED,
},
{
/* unnamed entry for assigning parameters parsed from 'video_mode' string */
- .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
.vmode = FB_VMODE_NONINTERLACED,
},
};
void lcd_disable(void)
{
- mxsfb_disable();
}
void lcd_panel_disable(void)
char *vm;
unsigned long val;
int refresh = 60;
- struct fb_videomode *p = &tx28_fb_modes[0];
+ struct fb_videomode *p = tx28_fb_modes;
+ struct fb_videomode fb_mode;
int xres_set = 0, yres_set = 0, bpp_set = 0, refresh_set = 0;
if (!lcd_enabled) {
return;
}
+ karo_fdt_move_fdt();
+
vm = getenv("video_mode");
if (vm == NULL) {
debug("Disabling LCD\n");
lcd_enabled = 0;
return;
}
+ if (karo_fdt_get_fb_mode(working_fdt, vm, &fb_mode) == 0) {
+ p = &fb_mode;
+ debug("Using video mode from FDT\n");
+ vm += strlen(vm);
+ }
+ if (p->name != NULL)
+ debug("Trying compiled-in video modes\n");
while (p->name != NULL) {
if (strcmp(p->name, vm) == 0) {
- printf("Using video mode: '%s'\n", p->name);
+ debug("Using video mode: '%s'\n", p->name);
vm += strlen(vm);
break;
}
p++;
}
-
+ if (*vm != '\0')
+ debug("Trying to decode video_mode: '%s'\n", vm);
while (*vm != '\0') {
if (*vm >= '0' && *vm <= '9') {
char *end;
if (karo_load_splashimage(0) == 0) {
debug("Initializing LCD controller\n");
- mxsfb_init(p, PIX_FMT_RGB24, color_depth);
video_hw_init(lcdbase);
} else {
debug("Skipping initialization of LCD controller\n");
strcmp(baseboard, "stk5-v3") == 0) {
stk5v3_board_init();
} else if (strcmp(baseboard, "stk5-v5") == 0) {
+ const char *otg_mode = getenv("otg_mode");
+
+ if (otg_mode && strcmp(otg_mode, "host") == 0) {
+ printf("otg_mode='%s' is incompatible with baseboard %s; setting to 'none'\n",
+ otg_mode, baseboard);
+ setenv("otg_mode", "none");
+ }
stk5v5_board_init();
} else {
printf("WARNING: Unsupported STK5 board rev.: %s\n",
return 0;
}
+#define BOOT_CAUSE_MASK (RTC_PERSISTENT0_EXTERNAL_RESET | \
+ RTC_PERSISTENT0_ALARM_WAKE | \
+ RTC_PERSISTENT0_THERMAL_RESET)
+
+static void thermal_init(void)
+{
+ struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs = (void *)MXS_CLKCTRL_BASE;
+
+ writel(POWER_THERMAL_LOW_POWER | POWER_THERMAL_OFFSET_ADJ_ENABLE |
+ POWER_THERMAL_OFFSET_ADJ_OFFSET(3),
+ &power_regs->hw_power_thermal);
+
+ writel(CLKCTRL_RESET_EXTERNAL_RESET_ENABLE |
+ CLKCTRL_RESET_THERMAL_RESET_ENABLE,
+ &clkctrl_regs->hw_clkctrl_reset);
+}
+
int checkboard(void)
{
- printf("Board: Ka-Ro TX28-4%sxx\n", TX28_MOD_SUFFIX);
+ struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
+ u32 pwr_sts = readl(&power_regs->hw_power_sts);
+ u32 pwrup_src = (pwr_sts >> 24) & 0x3f;
+ const char *dlm = "";
+
+ printf("Board: Ka-Ro TX28-4%sx%d\n", TX28_MOD_SUFFIX,
+ CONFIG_SDRAM_SIZE / SZ_128M);
+
+ printf("POWERUP Source: ");
+ if (pwrup_src & (3 << 0)) {
+ printf("%sPSWITCH %s voltage", dlm,
+ pwrup_src & (1 << 1) ? "HIGH" : "MID");
+ dlm = " | ";
+ }
+ if (pwrup_src & (1 << 4)) {
+ printf("%sRTC", dlm);
+ dlm = " | ";
+ }
+ if (pwrup_src & (1 << 5)) {
+ printf("%s5V", dlm);
+ dlm = " | ";
+ }
+ printf("\n");
+
+ if (boot_cause & BOOT_CAUSE_MASK) {
+ dlm="";
+ printf("Last boot cause: ");
+ if (boot_cause & RTC_PERSISTENT0_EXTERNAL_RESET) {
+ printf("%sEXTERNAL", dlm);
+ dlm = " | ";
+ }
+ if (boot_cause & RTC_PERSISTENT0_THERMAL_RESET) {
+ printf("%sTHERMAL", dlm);
+ dlm = " | ";
+ }
+ if (*dlm != '\0')
+ printf(" RESET");
+ if (boot_cause & RTC_PERSISTENT0_ALARM_WAKE) {
+ printf("%sALARM WAKE", dlm);
+ dlm = " | ";
+ }
+ printf("\n");
+ }
+
+ while (pwr_sts & POWER_STS_THERMAL_WARNING) {
+ static int first = 1;
+
+ if (first) {
+ printf("CPU too hot to boot\n");
+ first = 0;
+ }
+ if (tstc())
+ break;
+ pwr_sts = readl(&power_regs->hw_power_sts);
+ }
+
+ if (!(boot_cause & RTC_PERSISTENT0_THERMAL_RESET))
+ thermal_init();
+
return 0;
}
#include <jffs2/jffs2.h>
#include <mtd_node.h>
struct node_info tx28_nand_nodes[] = {
- { "gpmi-nand", MTD_DEV_TYPE_NAND, },
+ { "fsl,imx28-gpmi-nand", MTD_DEV_TYPE_NAND, },
};
#else
#define fdt_fixup_mtdparts(b,n,c) do { } while (0)
#endif
-static void tx28_fixup_flexcan(void *blob)
+static int flexcan_enabled(void *blob)
+{
+ const char *status;
+ int off = fdt_path_offset(blob, "can0");
+
+ if (off < 0) {
+ printf("node 'can0' not found\n");
+ } else {
+ status = fdt_getprop(blob, off, "status", NULL);
+ if (status && strcmp(status, "okay") == 0) {
+ printf("can0 is enabled\n");
+ return 1;
+ }
+ }
+ off = fdt_path_offset(blob, "can1");
+ if (off < 0) {
+ printf("node 'can1' not found\n");
+ return 0;
+ }
+ status = fdt_getprop(blob, off, "status", NULL);
+ if (status && strcmp(status, "okay") == 0) {
+ printf("can1 is enabled\n");
+ return 1;
+ }
+ printf("can driver disabled\n");
+ return 0;
+}
+
+static void tx28_set_lcd_pins(void *blob, const char *name)
+{
+ int off = fdt_path_offset(blob, name);
+ u32 ph;
+ const struct fdt_property *pc;
+ int len;
+
+ if (off < 0)
+ return;
+
+ ph = fdt32_to_cpu(fdt_create_phandle(blob, off));
+ if (!ph)
+ return;
+
+ off = fdt_path_offset(blob, "lcdif");
+ if (off < 0)
+ return;
+
+ pc = fdt_get_property(blob, off, "pinctrl-0", &len);
+ if (!pc || len < sizeof(ph))
+ return;
+
+ memcpy((void *)pc->data, &ph, sizeof(ph));
+ fdt_setprop(blob, off, "pinctrl-0", pc->data, len);
+}
+
+static void tx28_fixup_flexcan(void *blob, int stk5_v5)
{
- karo_fdt_del_prop(blob, "fsl,p1010-flexcan", 0x80032000, "transceiver-switch");
- karo_fdt_del_prop(blob, "fsl,p1010-flexcan", 0x80034000, "transceiver-switch");
+ const char *can_xcvr = "disabled";
+
+ if (stk5_v5) {
+ if (flexcan_enabled(blob)) {
+ tx28_set_lcd_pins(blob, "lcdif_23bit_pins_a");
+ can_xcvr = "okay";
+ } else {
+ tx28_set_lcd_pins(blob, "lcdif_24bit_pins_a");
+ }
+ } else {
+ const char *otg_mode = getenv("otg_mode");
+
+ if (otg_mode && (strcmp(otg_mode, "host") == 0))
+ karo_fdt_enable_node(blob, "can1", 0);
+ }
+ fdt_find_and_setprop(blob, "/regulators/can-xcvr", "status",
+ can_xcvr, strlen(can_xcvr) + 1, 1);
}
static void tx28_fixup_fec(void *blob)
{
- karo_fdt_remove_node(blob, "ethernet1");
+ karo_fdt_enable_node(blob, "ethernet1", 0);
}
void ft_board_setup(void *blob, bd_t *bd)
{
const char *baseboard = getenv("baseboard");
+ int stk5_v5 = baseboard != NULL && (strcmp(baseboard, "stk5-v5") == 0);
#ifdef CONFIG_TX28_S
/* TX28-41xx (aka TX28S) has no external RTC
* and no I2C GPIO extender
*/
karo_fdt_remove_node(blob, "ds1339");
- karo_fdt_remove_node(blob, "pca9554");
+ karo_fdt_remove_node(blob, "gpio5");
#endif
- if (baseboard != NULL && strcmp(baseboard, "stk5-v5") == 0) {
- const char *otg_mode = getenv("otg_mode");
-
- if (otg_mode && strcmp(otg_mode, "host") == 0) {
- printf("otg_mode=%s incompatible with baseboard %s\n",
- otg_mode, baseboard);
- setenv(otg_mode, "none");
- }
+ if (stk5_v5) {
karo_fdt_remove_node(blob, "stk5led");
} else {
- tx28_fixup_flexcan(blob);
tx28_fixup_fec(blob);
}
-
- if (baseboard != NULL && strcmp(baseboard, "stk5-v3") == 0) {
- const char *otg_mode = getenv("otg_mode");
-
- if (otg_mode && strcmp(otg_mode, "device") == 0)
- karo_fdt_remove_node(blob, "can1");
- }
+ tx28_fixup_flexcan(blob, stk5_v5);
fdt_fixup_mtdparts(blob, tx28_nand_nodes, ARRAY_SIZE(tx28_nand_nodes));
fdt_fixup_ethernet(blob);
karo_fdt_fixup_touchpanel(blob);
- karo_fdt_fixup_usb_otg(blob, "fsl,imx28-usbphy", 0x8007c000);
+ karo_fdt_fixup_usb_otg(blob, "usbotg", "fsl,usbphy");
+ karo_fdt_update_fb_mode(blob, getenv("video_mode"));
}
#endif
projects / karo-tx-uboot.git / blobdiff