#include <asm/arch/sys_proto.h>
#include "../common/karo.h"
+#include "pmic.h"
#define TX6_FEC_RST_GPIO IMX_GPIO_NR(7, 6)
#define TX6_FEC_PWR_GPIO IMX_GPIO_NR(3, 20)
check_cpu_temperature(1);
}
-#define RN5T618_NOETIMSET 0x11
-#define RN5T618_LDORTC1_SLOT 0x2a
-#define RN5T618_DC1CTL 0x2c
-#define RN5T618_DC1CTL2 0x2d
-#define RN5T618_DC2CTL 0x2e
-#define RN5T618_DC2CTL2 0x2f
-#define RN5T618_DC3CTL 0x30
-#define RN5T618_DC3CTL2 0x31
-#define RN5T618_DC1DAC 0x36 /* CORE */
-#define RN5T618_DC2DAC 0x37 /* SOC */
-#define RN5T618_DC3DAC 0x38 /* DDR */
-#define RN5T618_DC1DAC_SLP 0x3b
-#define RN5T618_DC2DAC_SLP 0x3c
-#define RN5T618_DC3DAC_SLP 0x3d
-#define RN5T618_LDOEN1 0x44
-#define RN5T618_LDODIS 0x46
-#define RN5T618_LDOEN2 0x48
-#define RN5T618_LDO3DAC 0x4e /* IO */
-#define RN5T618_LDORTCDAC 0x56 /* VBACKUP */
-
-#define VDD_RTC_VAL mV_to_regval_rtc(3000 * 10)
-#define VDD_HIGH_VAL mV_to_regval3(3000 * 10)
-#define VDD_HIGH_VAL_LP mV_to_regval3(3000 * 10)
-#define VDD_CORE_VAL mV_to_regval(1425 * 10)
-#define VDD_CORE_VAL_LP mV_to_regval(900 * 10)
-#define VDD_SOC_VAL mV_to_regval(1425 * 10)
-#define VDD_SOC_VAL_LP mV_to_regval(900 * 10)
-#define VDD_DDR_VAL mV_to_regval(1500 * 10)
-#define VDD_DDR_VAL_LP mV_to_regval(1500 * 10)
-
-/* calculate voltages in 10mV */
-#define mV_to_regval(mV) DIV_ROUND(((((mV) < 6000) ? 6000 : (mV)) - 6000), 125)
-#define regval_to_mV(v) (((v) * 125 + 6000))
-
-#define mV_to_regval2(mV) DIV_ROUND(((((mV) < 9000) ? 9000 : (mV)) - 9000), 250)
-#define regval2_to_mV(v) (((v) * 250 + 9000))
-
-#define mV_to_regval3(mV) DIV_ROUND(((((mV) < 6000) ? 6000 : (mV)) - 6000), 250)
-#define regval3_to_mV(v) (((v) * 250 + 6000))
-
-#define mV_to_regval_rtc(mV) DIV_ROUND(((((mV) < 17000) ? 17000 : (mV)) - 17000), 250)
-#define regval_rtc_to_mV(v) (((v) * 250 + 17000))
-
-static struct rn5t618_regs {
- u8 addr;
- u8 val;
- u8 mask;
-} rn5t618_regs[] = {
- { RN5T618_NOETIMSET, 0, },
- { RN5T618_DC1DAC, VDD_CORE_VAL, },
- { RN5T618_DC2DAC, VDD_SOC_VAL, },
- { RN5T618_DC3DAC, VDD_DDR_VAL, },
- { RN5T618_DC1DAC_SLP, VDD_CORE_VAL_LP, },
- { RN5T618_DC2DAC_SLP, VDD_SOC_VAL_LP, },
- { RN5T618_DC3DAC_SLP, VDD_DDR_VAL_LP, },
- { RN5T618_LDOEN1, 0x04, ~0x1f, },
- { RN5T618_LDOEN2, 0x10, ~0x30, },
- { RN5T618_LDODIS, 0x00, },
- { RN5T618_LDO3DAC, VDD_HIGH_VAL, },
- { RN5T618_LDORTCDAC, VDD_RTC_VAL, },
- { RN5T618_LDORTC1_SLOT, 0x0f, ~0x3f, },
-};
-
-static int tx6_rn5t618_setup_regs(struct rn5t618_regs *r, size_t count)
-{
- int ret;
- int i;
-
- for (i = 0; i < count; i++, r++) {
-#ifdef DEBUG
- unsigned char value;
-
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
- if ((value & ~r->mask) != r->val) {
- printf("Changing PMIC reg %02x from %02x to %02x\n",
- r->addr, value, r->val);
- }
- if (ret) {
- printf("%s: failed to read PMIC register %02x: %d\n",
- __func__, r->addr, ret);
- return ret;
- }
-#endif
- ret = i2c_write(CONFIG_SYS_I2C_SLAVE,
- r->addr, 1, &r->val, 1);
- if (ret) {
- printf("%s: failed to write PMIC register %02x: %d\n",
- __func__, r->addr, ret);
- return ret;
- }
-#ifdef DEBUG
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
- printf("PMIC reg %02x is %02x\n", r->addr, value);
-#endif
- }
- return 0;
-}
-
-static int setup_pmic_voltages(void)
-{
- int ret;
- unsigned char value;
-
- ret = i2c_probe(CONFIG_SYS_I2C_SLAVE);
- if (ret != 0) {
- printf("Failed to initialize I2C\n");
- return ret;
- }
-
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, 0x11, 1, &value, 1);
- if (ret) {
- printf("%s: i2c_read error: %d\n", __func__, ret);
- return ret;
- }
-
- ret = tx6_rn5t618_setup_regs(rn5t618_regs, ARRAY_SIZE(rn5t618_regs));
- if (ret)
- return ret;
-
- printf("VDDCORE set to %umV\n",
- DIV_ROUND(regval_to_mV(VDD_CORE_VAL), 10));
- printf("VDDSOC set to %umV\n",
- DIV_ROUND(regval_to_mV(VDD_SOC_VAL), 10));
-
- return ret;
-}
-
int board_early_init_f(void)
{
gpio_request_array(tx6qdl_gpios, ARRAY_SIZE(tx6qdl_gpios));
MX6_PAD_SD3_CLK__GPIO_7_3,
};
-static const iomux_v3_cfg_t mmc4_pads[] = {
+static const iomux_v3_cfg_t mmc3_pads[] = {
MX6_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD4_DAT0__USDHC4_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD4_DAT1__USDHC4_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD4_DAT2__USDHC4_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD4_DAT3__USDHC4_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ /* eMMC RESET */
MX6_PAD_NANDF_ALE__USDHC4_RST,
};
struct fsl_esdhc_cfg cfg;
int cd_gpio;
} tx6qdl_esdhc_cfg[] = {
+ {
+ .pads = mmc3_pads,
+ .num_pads = ARRAY_SIZE(mmc3_pads),
+ .clkid = MXC_ESDHC4_CLK,
+ .cfg = {
+ .esdhc_base = (void __iomem *)USDHC4_BASE_ADDR,
+ .max_bus_width = 4,
+ },
+ .cd_gpio = -EINVAL,
+ },
{
.pads = mmc0_pads,
.num_pads = ARRAY_SIZE(mmc0_pads),
},
.cd_gpio = IMX_GPIO_NR(7, 3),
},
- {
- .pads = mmc4_pads,
- .num_pads = ARRAY_SIZE(mmc4_pads),
- .clkid = MXC_ESDHC4_CLK,
- .cfg = {
- .esdhc_base = (void __iomem *)USDHC4_BASE_ADDR,
- .max_bus_width = 4,
- },
- .cd_gpio = -EINVAL,
- },
};
static inline struct tx6_esdhc_cfg *to_tx6_esdhc_cfg(struct fsl_esdhc_cfg *cfg)
*/
lcd_is_enabled = 0;
- karo_load_splashimage(1);
-
if (lcd_enabled) {
+ karo_load_splashimage(1);
+
debug("Switching LCD on\n");
gpio_set_value(TX6_LCD_PWR_GPIO, 1);
udelay(100);
karo_fdt_fixup_touchpanel(blob, tx6_touchpanels,
ARRAY_SIZE(tx6_touchpanels));
- karo_fdt_fixup_usb_otg(blob, "usbotg", "fsl,usbphy");
+ karo_fdt_fixup_usb_otg(blob, "usbotg", "fsl,usbphy", "vbus-supply");
karo_fdt_fixup_flexcan(blob, stk5_v5);
karo_fdt_update_fb_mode(blob, video_mode);
projects / karo-tx-uboot.git / blobdiff