* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
-#ifndef DEBUG
#define DEBUG
-#endif
//#define TIMER_TEST
#include <common.h>
#include "../common/karo.h"
-#define TX6DL_FEC_RST_GPIO IMX_GPIO_NR(7, 6)
-#define TX6DL_FEC_PWR_GPIO IMX_GPIO_NR(3, 20)
-#define TX6DL_FEC_INT_GPIO IMX_GPIO_NR(2, 4)
-#define TX6DL_LED_GPIO IMX_GPIO_NR(2, 20)
+#define TX6_FEC_RST_GPIO IMX_GPIO_NR(7, 6)
+#define TX6_FEC_PWR_GPIO IMX_GPIO_NR(3, 20)
+#define TX6_FEC_INT_GPIO IMX_GPIO_NR(2, 4)
+#define TX6_LED_GPIO IMX_GPIO_NR(2, 20)
-#define TX6DL_LCD_PWR_GPIO IMX_GPIO_NR(2, 31)
-#define TX6DL_LCD_RST_GPIO IMX_GPIO_NR(3, 29)
-#define TX6DL_LCD_BACKLIGHT_GPIO IMX_GPIO_NR(1, 1)
+#define TX6_LCD_PWR_GPIO IMX_GPIO_NR(2, 31)
+#define TX6_LCD_RST_GPIO IMX_GPIO_NR(3, 29)
+#define TX6_LCD_BACKLIGHT_GPIO IMX_GPIO_NR(1, 1)
-#define TX6DL_RESET_OUT_GPIO IMX_GPIO_NR(7, 12)
+#define TX6_RESET_OUT_GPIO IMX_GPIO_NR(7, 12)
#define TEMPERATURE_MIN -40
#define TEMPERATURE_HOT 80
DECLARE_GLOBAL_DATA_PTR;
-#define MUX_CFG_SION IOMUX_PAD(0, 0, IOMUX_CONFIG_SION, 0, 0, 0)
+#define MUX_CFG_SION IOMUX_PAD(0, 0, MUX_CONFIG_SION, 0, 0, 0)
-static const iomux_v3_cfg_t tx6dl_pads[] = {
+static const iomux_v3_cfg_t tx6qdl_pads[] = {
/* NAND flash pads */
MX6_PAD_NANDF_CLE__RAWNAND_CLE,
MX6_PAD_NANDF_ALE__RAWNAND_ALE,
MX6_PAD_SD3_DAT4__GPIO_7_1, /* PHY INT */
};
-static const iomux_v3_cfg_t tx6dl_fec_pads[] = {
+static const iomux_v3_cfg_t tx6qdl_fec_pads[] = {
/* FEC functions */
MX6_PAD_ENET_MDC__ENET_MDC,
MX6_PAD_ENET_MDIO__ENET_MDIO,
MX6_PAD_ENET_TXD0__ENET_TDATA_0,
};
-static const struct gpio tx6dl_gpios[] = {
- { TX6DL_RESET_OUT_GPIO, GPIOF_OUTPUT_INIT_HIGH, "#RESET_OUT", },
- { TX6DL_FEC_PWR_GPIO, GPIOF_OUTPUT_INIT_HIGH, "FEC PHY PWR", },
- { TX6DL_FEC_RST_GPIO, GPIOF_OUTPUT_INIT_LOW, "FEC PHY RESET", },
- { TX6DL_FEC_INT_GPIO, GPIOF_INPUT, "FEC PHY INT", },
+static const struct gpio tx6qdl_gpios[] = {
+ { TX6_RESET_OUT_GPIO, GPIOF_OUTPUT_INIT_HIGH, "#RESET_OUT", },
+ { TX6_FEC_PWR_GPIO, GPIOF_OUTPUT_INIT_HIGH, "FEC PHY PWR", },
+ { TX6_FEC_RST_GPIO, GPIOF_OUTPUT_INIT_LOW, "FEC PHY RESET", },
+ { TX6_FEC_INT_GPIO, GPIOF_INPUT, "FEC PHY INT", },
};
/*
int board_early_init_f(void)
{
- gpio_request_array(tx6dl_gpios, ARRAY_SIZE(tx6dl_gpios));
- imx_iomux_v3_setup_multiple_pads(tx6dl_pads, ARRAY_SIZE(tx6dl_pads));
+ gpio_request_array(tx6qdl_gpios, ARRAY_SIZE(tx6qdl_gpios));
+ imx_iomux_v3_setup_multiple_pads(tx6qdl_pads, ARRAY_SIZE(tx6qdl_pads));
return 0;
}
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
-#if 1
+#ifdef CONFIG_OF_LIBFDT
+ gd->bd->bi_arch_number = -1;
+#else
gd->bd->bi_arch_number = 4429;
#endif
ret = setup_pmic_voltages();
MX6_PAD_SD3_CLK__GPIO_7_3,
};
-static struct tx6dl_esdhc_cfg {
+static struct tx6q_esdhc_cfg {
const iomux_v3_cfg_t *pads;
int num_pads;
enum mxc_clock clkid;
struct fsl_esdhc_cfg cfg;
-} tx6dl_esdhc_cfg[] = {
+} tx6qdl_esdhc_cfg[] = {
{
.pads = mmc0_pads,
.num_pads = ARRAY_SIZE(mmc0_pads),
},
};
-static inline struct tx6dl_esdhc_cfg *to_tx6dl_esdhc_cfg(struct fsl_esdhc_cfg *cfg)
+static inline struct tx6q_esdhc_cfg *to_tx6q_esdhc_cfg(struct fsl_esdhc_cfg *cfg)
{
void *p = cfg;
- return p - offsetof(struct tx6dl_esdhc_cfg, cfg);
+ return p - offsetof(struct tx6q_esdhc_cfg, cfg);
}
int board_mmc_getcd(struct mmc *mmc)
return cfg->cd_gpio;
debug("SD card %d is %spresent\n",
- to_tx6dl_esdhc_cfg(cfg) - tx6dl_esdhc_cfg, gpio_get_value(cfg->cd_gpio) ? "NOT " : "");
+ to_tx6q_esdhc_cfg(cfg) - tx6qdl_esdhc_cfg,
+ gpio_get_value(cfg->cd_gpio) ? "NOT " : "");
return !gpio_get_value(cfg->cd_gpio);
}
{
int i;
- for (i = 0; i < ARRAY_SIZE(tx6dl_esdhc_cfg); i++) {
+ for (i = 0; i < ARRAY_SIZE(tx6qdl_esdhc_cfg); i++) {
struct mmc *mmc;
- struct fsl_esdhc_cfg *cfg = &tx6dl_esdhc_cfg[i].cfg;
+ struct fsl_esdhc_cfg *cfg = &tx6qdl_esdhc_cfg[i].cfg;
if (i >= CONFIG_SYS_FSL_ESDHC_NUM)
break;
- cfg->sdhc_clk = mxc_get_clock(tx6dl_esdhc_cfg[i].clkid);
- imx_iomux_v3_setup_multiple_pads(tx6dl_esdhc_cfg[i].pads,
- tx6dl_esdhc_cfg[i].num_pads);
+ cfg->sdhc_clk = mxc_get_clock(tx6qdl_esdhc_cfg[i].clkid);
+ imx_iomux_v3_setup_multiple_pads(tx6qdl_esdhc_cfg[i].pads,
+ tx6qdl_esdhc_cfg[i].num_pads);
debug("%s: Initializing MMC slot %d\n", __func__, i);
fsl_esdhc_initialize(bis, cfg);
/* delay at least 21ms for the PHY internal POR signal to deassert */
udelay(22000);
- imx_iomux_v3_setup_multiple_pads(tx6dl_fec_pads, ARRAY_SIZE(tx6dl_fec_pads));
+ imx_iomux_v3_setup_multiple_pads(tx6qdl_fec_pads, ARRAY_SIZE(tx6qdl_fec_pads));
/* Deassert RESET to the external phy */
- gpio_set_value(TX6DL_FEC_RST_GPIO, 1);
+ gpio_set_value(TX6_FEC_RST_GPIO, 1);
ret = cpu_eth_init(bis);
if (ret)
if (led_state == LED_STATE_INIT) {
last = get_timer(0);
- gpio_set_value(TX6DL_LED_GPIO, 1);
+ gpio_set_value(TX6_LED_GPIO, 1);
led_state = LED_STATE_ON;
blink_rate = calc_blink_rate(check_cpu_temperature(0));
} else {
blink_rate = calc_blink_rate(check_cpu_temperature(0));
last = get_timer_masked();
if (led_state == LED_STATE_ON) {
- gpio_set_value(TX6DL_LED_GPIO, 0);
+ gpio_set_value(TX6_LED_GPIO, 0);
} else {
- gpio_set_value(TX6DL_LED_GPIO, 1);
+ gpio_set_value(TX6_LED_GPIO, 1);
}
led_state = 1 - led_state;
}
};
static const struct gpio stk5_gpios[] = {
- { TX6DL_LED_GPIO, GPIOF_OUTPUT_INIT_LOW, "HEARTBEAT LED", },
+ { TX6_LED_GPIO, GPIOF_OUTPUT_INIT_LOW, "HEARTBEAT LED", },
{ IMX_GPIO_NR(3, 23), GPIOF_INPUT, "USBOTG ID", },
{ IMX_GPIO_NR(1, 8), GPIOF_INPUT, "USBOTG OC", },
.vl_bpix = LCD_COLOR24, /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
};
-static struct fb_videomode tx6dl_fb_mode = {
- /* Standard VGA timing */
- .name = "VGA",
- .refresh = 60,
- .xres = 640,
- .yres = 480,
- .pixclock = KHZ2PICOS(25175),
- .left_margin = 48,
- .hsync_len = 96,
- .right_margin = 16,
- .upper_margin = 31,
- .vsync_len = 2,
- .lower_margin = 12,
- .sync = FB_SYNC_CLK_LAT_FALL,
- .vmode = FB_VMODE_NONINTERLACED,
+static struct fb_videomode tx6_fb_modes[] = {
+ {
+ /* Standard VGA timing */
+ .name = "VGA",
+ .refresh = 60,
+ .xres = 640,
+ .yres = 480,
+ .pixclock = KHZ2PICOS(25175),
+ .left_margin = 48,
+ .hsync_len = 96,
+ .right_margin = 16,
+ .upper_margin = 31,
+ .vsync_len = 2,
+ .lower_margin = 12,
+ .sync = FB_SYNC_CLK_LAT_FALL,
+ },
+ {
+ /* Emerging ETV570 640 x 480 display. Syncs low active,
+ * DE high active, 115.2 mm x 86.4 mm display area
+ * VGA compatible timing
+ */
+ .name = "ETV570",
+ .refresh = 60,
+ .xres = 640,
+ .yres = 480,
+ .pixclock = KHZ2PICOS(25175),
+ .left_margin = 114,
+ .hsync_len = 30,
+ .right_margin = 16,
+ .upper_margin = 32,
+ .vsync_len = 3,
+ .lower_margin = 10,
+ .sync = FB_SYNC_CLK_LAT_FALL,
+ },
+ {
+ /* Emerging ET0350G0DH6 320 x 240 display.
+ * 70.08 mm x 52.56 mm display area.
+ */
+ .name = "ET0350",
+ .refresh = 60,
+ .xres = 320,
+ .yres = 240,
+ .pixclock = KHZ2PICOS(6500),
+ .left_margin = 68 - 34,
+ .hsync_len = 34,
+ .right_margin = 20,
+ .upper_margin = 18 - 3,
+ .vsync_len = 3,
+ .lower_margin = 4,
+ .sync = FB_SYNC_CLK_LAT_FALL,
+ },
+ {
+ /* Emerging ET0430G0DH6 480 x 272 display.
+ * 95.04 mm x 53.856 mm display area.
+ */
+ .name = "ET0430",
+ .refresh = 60,
+ .xres = 480,
+ .yres = 272,
+ .pixclock = KHZ2PICOS(9000),
+ .left_margin = 2,
+ .hsync_len = 41,
+ .right_margin = 2,
+ .upper_margin = 2,
+ .vsync_len = 10,
+ .lower_margin = 2,
+ .sync = FB_SYNC_CLK_LAT_FALL,
+ },
+ {
+ /* Emerging ET0500G0DH6 800 x 480 display.
+ * 109.6 mm x 66.4 mm display area.
+ */
+ .name = "ET0500",
+ .refresh = 60,
+ .xres = 800,
+ .yres = 480,
+ .pixclock = KHZ2PICOS(33260),
+ .left_margin = 216 - 128,
+ .hsync_len = 128,
+ .right_margin = 1056 - 800 - 216,
+ .upper_margin = 35 - 2,
+ .vsync_len = 2,
+ .lower_margin = 525 - 480 - 35,
+ .sync = FB_SYNC_CLK_LAT_FALL,
+ },
+ {
+ /* Emerging ETQ570G0DH6 320 x 240 display.
+ * 115.2 mm x 86.4 mm display area.
+ */
+ .name = "ETQ570",
+ .refresh = 60,
+ .xres = 320,
+ .yres = 240,
+ .pixclock = KHZ2PICOS(6400),
+ .left_margin = 38,
+ .hsync_len = 30,
+ .right_margin = 30,
+ .upper_margin = 16, /* 15 according to datasheet */
+ .vsync_len = 3, /* TVP -> 1>x>5 */
+ .lower_margin = 4, /* 4.5 according to datasheet */
+ .sync = FB_SYNC_CLK_LAT_FALL,
+ },
+ {
+ /* Emerging ET0700G0DH6 800 x 480 display.
+ * 152.4 mm x 91.44 mm display area.
+ */
+ .name = "ET0700",
+ .refresh = 60,
+ .xres = 800,
+ .yres = 480,
+ .pixclock = KHZ2PICOS(33260),
+ .left_margin = 216 - 128,
+ .hsync_len = 128,
+ .right_margin = 1056 - 800 - 216,
+ .upper_margin = 35 - 2,
+ .vsync_len = 2,
+ .lower_margin = 525 - 480 - 35,
+ .sync = FB_SYNC_CLK_LAT_FALL,
+ },
+ {
+ /* unnamed entry for assigning parameters parsed from 'video_mode' string */
+ .refresh = 60,
+ .left_margin = 48,
+ .hsync_len = 96,
+ .right_margin = 16,
+ .upper_margin = 31,
+ .vsync_len = 2,
+ .lower_margin = 12,
+ .sync = FB_SYNC_CLK_LAT_FALL,
+ },
};
static int lcd_enabled = 1;
karo_load_splashimage(1);
if (lcd_enabled) {
debug("Switching LCD on\n");
- gpio_set_value(TX6DL_LCD_PWR_GPIO, 1);
+ gpio_set_value(TX6_LCD_PWR_GPIO, 1);
udelay(100);
- gpio_set_value(TX6DL_LCD_RST_GPIO, 1);
+ gpio_set_value(TX6_LCD_RST_GPIO, 1);
udelay(300000);
- gpio_set_value(TX6DL_LCD_BACKLIGHT_GPIO, 0);
+ gpio_set_value(TX6_LCD_BACKLIGHT_GPIO, 0);
}
}
};
static const struct gpio stk5_lcd_gpios[] = {
- { TX6DL_LCD_RST_GPIO, GPIOF_OUTPUT_INIT_LOW, "LCD RESET", },
- { TX6DL_LCD_PWR_GPIO, GPIOF_OUTPUT_INIT_LOW, "LCD POWER", },
- { TX6DL_LCD_BACKLIGHT_GPIO, GPIOF_OUTPUT_INIT_HIGH, "LCD BACKLIGHT", },
+ { TX6_LCD_RST_GPIO, GPIOF_OUTPUT_INIT_LOW, "LCD RESET", },
+ { TX6_LCD_PWR_GPIO, GPIOF_OUTPUT_INIT_LOW, "LCD POWER", },
+ { TX6_LCD_BACKLIGHT_GPIO, GPIOF_OUTPUT_INIT_HIGH, "LCD BACKLIGHT", },
};
void lcd_ctrl_init(void *lcdbase)
char *vm;
unsigned long val;
int refresh = 60;
- struct fb_videomode *p = &tx6dl_fb_mode;
+ struct fb_videomode *p = &tx6_fb_modes[0];
+ struct fb_videomode fb_mode;
int xres_set = 0, yres_set = 0, bpp_set = 0, refresh_set = 0;
int pix_fmt = 0;
ipu_di_clk_parent_t di_clk_parent = DI_PCLK_PLL3;
return;
}
+ karo_fdt_move_fdt();
+
vm = getenv("video_mode");
if (vm == NULL) {
debug("Disabling LCD\n");
lcd_enabled = 0;
return;
}
+ if (karo_fdt_get_fb_mode(working_fdt, vm, &fb_mode) == 0) {
+ p = &fb_mode;
+ debug("Using video mode from FDT\n");
+ vm += strlen(vm);
+ if (fb_mode.xres < panel_info.vl_col)
+ panel_info.vl_col = fb_mode.xres;
+ if (fb_mode.yres < panel_info.vl_row)
+ panel_info.vl_row = fb_mode.yres;
+ }
+ if (p->name != NULL)
+ debug("Trying compiled-in video modes\n");
+ while (p->name != NULL) {
+ if (strcmp(p->name, vm) == 0) {
+ debug("Using video mode: '%s'\n", p->name);
+ vm += strlen(vm);
+ break;
+ }
+ p++;
+ }
+ if (*vm != '\0')
+ debug("Trying to decode video_mode: '%s'\n", vm);
while (*vm != '\0') {
if (*vm >= '0' && *vm <= '9') {
char *end;
vm++;
}
}
- switch (color_depth) {
- case 8:
- panel_info.vl_bpix = 3;
- break;
-
- case 16:
- panel_info.vl_bpix = 4;
- break;
-
- case 18:
- case 24:
- panel_info.vl_bpix = 5;
+ if (p->xres == 0 || p->yres == 0) {
+ printf("Invalid video mode: %s\n", getenv("video_mode"));
+ lcd_enabled = 0;
+ printf("Supported video modes are:");
+ for (p = &tx6_fb_modes[0]; p->name != NULL; p++) {
+ printf(" %s", p->name);
+ }
+ printf("\n");
+ return;
}
p->pixclock = KHZ2PICOS(refresh *
imx_iomux_v3_setup_pad(MX6_PAD_DISP0_DAT0__GPIO_4_21);
}
-static void tx6dl_set_cpu_clock(void)
+static void tx6qdl_set_cpu_clock(void)
{
unsigned long cpu_clk = getenv_ulong("cpu_clk", 10, 0);
int ret = 0;
const char *baseboard;
- tx6dl_set_cpu_clock();
+ tx6qdl_set_cpu_clock();
karo_fdt_move_fdt();
baseboard = getenv("baseboard");
exit:
tx6_init_mac();
- gpio_set_value(TX6DL_RESET_OUT_GPIO, 1);
+ gpio_set_value(TX6_RESET_OUT_GPIO, 1);
return ret;
}
-#define iomux_field(v,f) (((iomux_v3_cfg_t)(v) << f##_SHIFT) & f##_MASK)
-
-#define chk_iomux_field(f1,f2) ({ \
- iomux_v3_cfg_t __c = iomux_field(~0, f1); \
- if (__c & f2##_MASK) { \
- printf("%18s[%016llx] overlaps with:\n%18s[%016llx]\n", \
- #f1, f1##_MASK, \
- #f2, f2##_MASK); \
- } \
- (__c & f2##_MASK) != 0; \
-})
-
-#define chk_iomux_bit(f1,f2) ({ \
- iomux_v3_cfg_t __c = iomux_field(~0, f1); \
- if (__c & f2) { \
- printf("%18s[%016llx] overlaps with:\n%18s[%016llx]\n", \
- #f1, f1##_MASK, \
- #f2, (iomux_v3_cfg_t)f2); \
- } \
- (__c & f2) != 0; \
-})
-
int checkboard(void)
{
print_cpuinfo();
-
+#if defined(CONFIG_MX6Q)
+ printf("Board: Ka-Ro TX6Q\n");
+#elif defined(CONFIG_MX6DL)
printf("Board: Ka-Ro TX6DL\n");
-
- printf("mtdparts='%s'\n", MTDPARTS_DEFAULT);
+#else
+#error Unsupported i.MX6 variant selected
+#endif
#ifdef TIMER_TEST
{
#define fdt_fixup_mtdparts(b,n,c) do { } while (0)
#endif
-static void tx6dl_fixup_flexcan(void *blob)
+static void tx6qdl_fixup_flexcan(void *blob)
{
const char *baseboard = getenv("baseboard");
if (baseboard && strcmp(baseboard, "stk5-v5") == 0)
return;
- /* TODO: handle flexcan transceiver GPIO */
+
+ karo_fdt_del_prop(blob, "fsl,p1010-flexcan", 0x02090000, "transceiver-switch");
+ karo_fdt_del_prop(blob, "fsl,p1010-flexcan", 0x02094000, "transceiver-switch");
}
void ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_ethernet(blob);
karo_fdt_fixup_touchpanel(blob);
- karo_fdt_fixup_usb_otg(blob, "", 0);
- tx6dl_fixup_flexcan(blob);
+ karo_fdt_fixup_usb_otg(blob, "usbotg", "fsl,usbphy");
+ tx6qdl_fixup_flexcan(blob);
}
#endif
projects / karo-tx-uboot.git / blobdiff