ppc4xx: TLB init file cleanup

[karo-tx-uboot.git] / board / korat / init.S

diff --git a/board/korat/init.S b/board/korat/init.S
index c725bbbb44d4b9e4a4673172812284d96fd64eed..bfc6bc15253a982c4ce9ce935a236837044605a3 100644 (file)
--- a/board/korat/init.S
+++ b/board/korat/init.S
@@ -43,7 +43,7 @@ tlbtab:
         * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
         * speed up boot process. It is patched after relocation to enable SA_I
         */
-       tlbentry( 0xF0000000, SZ_256M, 0xF0000000, 1, AC_R|AC_W|AC_X|SA_G )
+       tlbentry( 0xF0000000, SZ_256M, 0xF0000000, 1, AC_RWX | SA_G )
 
        /*
         * TLB entries for SDRAM are not needed on this platform.  They are
@@ -53,37 +53,37 @@ tlbtab:
 #ifdef CONFIG_SYS_INIT_RAM_DCACHE
        /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
        tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0,
-                 AC_R|AC_W|AC_X|SA_G )
+                 AC_RWX | SA_G )
 #endif
 
        /* TLB-entry for PCI Memory */
        tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x00000000, SZ_256M,
-                 CONFIG_SYS_PCI_MEMBASE + 0x00000000, 1, AC_R|AC_W|SA_G|SA_I )
+                 CONFIG_SYS_PCI_MEMBASE + 0x00000000, 1, AC_RW | SA_IG )
 
        tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x10000000, SZ_256M,
-                 CONFIG_SYS_PCI_MEMBASE + 0x10000000, 1, AC_R|AC_W|SA_G|SA_I )
+                 CONFIG_SYS_PCI_MEMBASE + 0x10000000, 1, AC_RW | SA_IG )
 
        tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x20000000, SZ_256M,
-                 CONFIG_SYS_PCI_MEMBASE + 0x20000000, 1, AC_R|AC_W|SA_G|SA_I )
+                 CONFIG_SYS_PCI_MEMBASE + 0x20000000, 1, AC_RW | SA_IG )
 
        tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x30000000, SZ_256M,
-                 CONFIG_SYS_PCI_MEMBASE + 0x30000000, 1, AC_R|AC_W|SA_G|SA_I )
+                 CONFIG_SYS_PCI_MEMBASE + 0x30000000, 1, AC_RW | SA_IG )
 
        /* TLB-entry for EBC */
-       tlbentry( CONFIG_SYS_CPLD_BASE, SZ_1K, CONFIG_SYS_CPLD_BASE, 1, AC_R|AC_W|SA_G|SA_I )
+       tlbentry( CONFIG_SYS_CPLD_BASE, SZ_1K, CONFIG_SYS_CPLD_BASE, 1, AC_RW | SA_IG )
 
        /* TLB-entry for Internal Registers & OCM */
        /* I wonder why this must be executable -- lrj@acm.org 2007-10-08 */
-       tlbentry( 0xE0000000, SZ_16M, 0xE0000000, 0, AC_R|AC_W|AC_X|SA_I )
+       tlbentry( 0xE0000000, SZ_16M, 0xE0000000, 0, AC_RWX | SA_I )
 
        /*TLB-entry PCI registers*/
-       tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_R|AC_W|SA_G|SA_I )
+       tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_RW | SA_IG )
 
        /* TLB-entry for peripherals */
-       tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|SA_G|SA_I)
+       tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_RW | SA_IG)
 
        /* TLB-entry PCI IO Space - from sr@denx.de */
-       tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_R|AC_W|SA_G|SA_I)
+       tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_RW | SA_IG)
 
        tlbtab_end