imported Freescale specific U-Boot additions for i.MX28,... release L2.6.31_10.08.01

[karo-tx-uboot.git] / board / kup / kup4x / kup4x.c

diff --git a/board/kup/kup4x/kup4x.c b/board/kup/kup4x/kup4x.c
index cd9ed13d6d5f4ee53027c1b6a138f6af5c9973bc..65a222b5ef1c4f5f9f49a8f383593fffed43e7f2 100755 (executable)
--- a/board/kup/kup4x/kup4x.c
+++ b/board/kup/kup4x/kup4x.c
@@ -114,7 +114,7 @@ const uint sdram_table[] = {
 
 int checkboard (void)
 {
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
        volatile memctl8xx_t *memctl = &immap->im_memctl;
        volatile uchar *latch;
        uchar rev, mod;
@@ -134,9 +134,9 @@ int checkboard (void)
 
 /* ------------------------------------------------------------------------- */
 
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
 {
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
        volatile memctl8xx_t *memctl = &immap->im_memctl;
        long int size_b0 = 0;
        long int size_b1 = 0;
@@ -151,7 +151,7 @@ long int initdram (int board_type)
         * with two SDRAM banks or four cycles every 31.2 us with one
         * bank. It will be adjusted after memory sizing.
         */
-       memctl->memc_mptpr = CFG_MPTPR;
+       memctl->memc_mptpr = CONFIG_SYS_MPTPR;
 
        memctl->memc_mar = 0x00000088;
 
@@ -160,13 +160,13 @@ long int initdram (int board_type)
         * preliminary addresses - these have to be modified after the
         * SDRAM size has been determined.
         */
-/*     memctl->memc_or1 = CFG_OR1_PRELIM;      */
-/*     memctl->memc_br1 = CFG_BR1_PRELIM;      */
+/*     memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;       */
+/*     memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM;       */
 
-/*     memctl->memc_or2 = CFG_OR2_PRELIM;      */
-/*     memctl->memc_br2 = CFG_BR2_PRELIM;      */
+/*     memctl->memc_or2 = CONFIG_SYS_OR2_PRELIM;       */
+/*     memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM;       */
 
-       memctl->memc_mamr = CFG_MAMR & (~(MAMR_PTAE));  /* no refresh yet */
+       memctl->memc_mamr = CONFIG_SYS_MAMR & (~(MAMR_PTAE));   /* no refresh yet */
 
        udelay (200);
 
@@ -207,7 +207,7 @@ long int initdram (int board_type)
        size_b1 = 0x00800000;
        size_b2 = 0x00800000;
        size_b3 = 0x00800000;
-       memctl->memc_mptpr = CFG_MPTPR;
+       memctl->memc_mptpr = CONFIG_SYS_MPTPR;
        udelay (1000);
        memctl->memc_or1 = 0xFF800A00;
        memctl->memc_br1 = 0x00000081;
@@ -222,7 +222,7 @@ long int initdram (int board_type)
        size_b1 = 0x01000000;
        size_b2 = 0x01000000;
        size_b3 = 0x01000000;
-       memctl->memc_mptpr = CFG_MPTPR;
+       memctl->memc_mptpr = CONFIG_SYS_MPTPR;
        udelay (1000);
        memctl->memc_or1 = 0xFF000A00;
        memctl->memc_br1 = 0x00000081;
@@ -251,7 +251,7 @@ long int initdram (int board_type)
 static long int dram_size (long int mamr_value, long int *base,
                           long int maxsize)
 {
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
        volatile memctl8xx_t *memctl = &immap->im_memctl;
        volatile long int *addr;
        ulong cnt, val;
@@ -294,8 +294,7 @@ static long int dram_size (long int mamr_value, long int *base,
 
 int misc_init_r (void)
 {
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
-
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 #ifdef CONFIG_IDE_LED
        /* Configure PA8 as output port */
        immap->im_ioport.iop_padir |= 0x80;
@@ -306,6 +305,7 @@ int misc_init_r (void)
 #ifdef KUP4X_USB
        usb_init_kup4x ();
 #endif
+       load_sernum_ethaddr();
        setenv ("hw", "4x");
        poweron_key ();
        return (0);