The patch adds new POST tests for the Lwmon5 board.

[karo-tx-uboot.git] / board / lwmon5 / lwmon5.c

diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c
index 815c01f4e4827973a58aa3bd71f76fb674b719d4..73d5de5886b80d99f44417404da4c6c0a17a9bf9 100644 (file)
--- a/board/lwmon5/lwmon5.c
+++ b/board/lwmon5/lwmon5.c
@@ -96,6 +96,25 @@ int board_early_init_f(void)
 
        gpio_write_bit(CFG_GPIO_FLASH_WP, 1);
 
+#if CONFIG_POST & CFG_POST_BSPEC1
+       gpio_write_bit(CFG_GPIO_HIGHSIDE, 1);
+
+       reg = 0; /* reuse as counter */
+       out_be32((void *)CFG_DSPIC_TEST_ADDR,
+               in_be32((void *)CFG_DSPIC_TEST_ADDR)
+                       & ~CFG_DSPIC_TEST_MASK);
+       while (!gpio_read_in_bit(CFG_GPIO_DSPIC_READY) && reg++ < 1000) {
+               udelay(1000);
+       }
+       gpio_write_bit(CFG_GPIO_HIGHSIDE, 0);
+       if (gpio_read_in_bit(CFG_GPIO_DSPIC_READY)) {
+               /* set "boot error" flag */
+               out_be32((void *)CFG_DSPIC_TEST_ADDR,
+                       in_be32((void *)CFG_DSPIC_TEST_ADDR) |
+                       CFG_DSPIC_TEST_MASK);
+       }
+#endif
+
        /*
         * Reset PHY's:
         * The PHY's need a 2nd reset pulse, since the MDIO address is latched