imported Freescale specific U-Boot additions for i.MX28,... release L2.6.31_10.08.01

[karo-tx-uboot.git] / board / mx1ads / syncflash.c

diff --git a/board/mx1ads/syncflash.c b/board/mx1ads/syncflash.c
index eb7fde5071a8e1105c06f51b88bb5b8663f25315..47f613c7fe4d294679310846d74af365997f3a23 100755 (executable)
--- a/board/mx1ads/syncflash.c
+++ b/board/mx1ads/syncflash.c
@@ -31,7 +31,7 @@ typedef unsigned long * p_u32;
 
 /* 4Mx16x2 IAM=0 CSD1 */
 
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];  /* info for FLASH chips    */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];   /* info for FLASH chips    */
 
 /*  Following Setting is for CSD1      */
 #define SFCTL                  0x00221004
@@ -40,13 +40,13 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS];       /* info for FLASH chips    */
 #define SYNCFLASH_A10          (0x00100000)
 
 #define CMD_NORMAL             (0x81020300)                    /* Normal Mode                  */
-#define CMD_PREC               (CMD_NORMAL + 0x10000000)       /* Precharge Command            */
-#define CMD_AUTO               (CMD_NORMAL + 0x20000000)       /* Auto Refresh Command         */
-#define CMD_LMR                        (CMD_NORMAL + 0x30000000)       /* Load Mode Register Command   */
-#define CMD_LCR                        (CMD_NORMAL + 0x60000000)       /* LCR Command                  */
+#define CMD_PREC               (CMD_NORMAL + 0x10000000)       /* Precharge Command            */
+#define CMD_AUTO               (CMD_NORMAL + 0x20000000)       /* Auto Refresh Command         */
+#define CMD_LMR                        (CMD_NORMAL + 0x30000000)       /* Load Mode Register Command   */
+#define CMD_LCR                        (CMD_NORMAL + 0x60000000)       /* LCR Command                  */
 #define CMD_PROGRAM            (CMD_NORMAL + 0x70000000)
 
-#define MODE_REG_VAL           (CFG_FLASH_BASE+0x0008CC00)     /* Cas Latency 3                */
+#define MODE_REG_VAL           (CONFIG_SYS_FLASH_BASE+0x0008CC00)      /* Cas Latency 3                */
 
 /* LCR Command */
 #define LCR_READSTATUS         (0x0001C000)                    /* 0x70                         */
@@ -55,22 +55,22 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS];       /* info for FLASH chips    */
 #define LCR_PROG_NVMODE                (0x00028000)                    /* 0xA0                         */
 #define LCR_SR_CLEAR           (0x00014000)                    /* 0x50                         */
 
-/* Get Status register                         */
+/* Get Status register                 */
 u32 SF_SR(void) {
        u32 tmp,tmp1;
 
        reg_SFCTL       = CMD_PROGRAM;
-       tmp             = __REG(CFG_FLASH_BASE);
+       tmp             = __REG(CONFIG_SYS_FLASH_BASE);
 
        reg_SFCTL       = CMD_NORMAL;
 
-       reg_SFCTL       = CMD_LCR;                      /* Activate LCR Mode            */
-       tmp1            = __REG(CFG_FLASH_BASE + LCR_SR_CLEAR);
+       reg_SFCTL       = CMD_LCR;                      /* Activate LCR Mode            */
+       tmp1            = __REG(CONFIG_SYS_FLASH_BASE + LCR_SR_CLEAR);
 
        return tmp;
 }
 
-/* check if SyncFlash is ready                 */
+/* check if SyncFlash is ready         */
 u8 SF_Ready(void) {
        u32 tmp;
 
@@ -84,19 +84,19 @@ u8 SF_Ready(void) {
                printf ("SyncFlash Error code %08x\n",tmp);
        };
 
-       if (tmp == 0x00800080)          /* Test Bit 7 of SR     */
+       if (tmp == 0x00800080)          /* Test Bit 7 of SR     */
                return 1;
        else
                return 0;
 }
 
-/* Issue the precharge all command             */
+/* Issue the precharge all command             */
 void SF_PrechargeAll(void) {
 
        u32 tmp;
 
-       reg_SFCTL       = CMD_PREC;                     /* Set Precharge Command        */
-       tmp             = __REG(CFG_FLASH_BASE + SYNCFLASH_A10); /* Issue Precharge All Command */
+       reg_SFCTL       = CMD_PREC;                     /* Set Precharge Command        */
+       tmp             = __REG(CONFIG_SYS_FLASH_BASE + SYNCFLASH_A10); /* Issue Precharge All Command */
 }
 
 /* set SyncFlash to normal mode                        */
@@ -107,21 +107,21 @@ void SF_Normal(void) {
        reg_SFCTL       = CMD_NORMAL;
 }
 
-/* Erase SyncFlash                             */
+/* Erase SyncFlash                             */
 void SF_Erase(u32 RowAddress) {
        u32 tmp;
 
        reg_SFCTL       = CMD_NORMAL;
-       tmp             = __REG(RowAddress);
+       tmp             = __REG(RowAddress);
 
        reg_SFCTL       = CMD_PREC;
-       tmp             = __REG(RowAddress);
+       tmp             = __REG(RowAddress);
 
-       reg_SFCTL       = CMD_LCR;                      /* Set LCR mode                 */
-       __REG(RowAddress + LCR_ERASE_CONFIRM)   = 0;    /* Issue Erase Setup Command    */
+       reg_SFCTL       = CMD_LCR;                      /* Set LCR mode         */
+       __REG(RowAddress + LCR_ERASE_CONFIRM)   = 0;    /* Issue Erase Setup Command    */
 
-       reg_SFCTL       = CMD_NORMAL;                   /* return to Normal mode        */
-       __REG(RowAddress)       = 0xD0D0D0D0;           /* Confirm                      */
+       reg_SFCTL       = CMD_NORMAL;                   /* return to Normal mode        */
+       __REG(RowAddress)       = 0xD0D0D0D0;           /* Confirm                      */
 
        while(!SF_Ready());
 }
@@ -130,10 +130,10 @@ void SF_NvmodeErase(void) {
        SF_PrechargeAll();
 
        reg_SFCTL       = CMD_LCR;                      /* Set to LCR mode              */
-       __REG(CFG_FLASH_BASE + LCR_ERASE_NVMODE)  = 0;  /* Issue Erase Nvmode Reg Command */
+       __REG(CONFIG_SYS_FLASH_BASE + LCR_ERASE_NVMODE)  = 0;   /* Issue Erase Nvmode Reg Command */
 
-       reg_SFCTL       = CMD_NORMAL;                   /* Return to Normal mode        */
-       __REG(CFG_FLASH_BASE + LCR_ERASE_NVMODE) = 0xC0C0C0C0;  /* Confirm              */
+       reg_SFCTL       = CMD_NORMAL;                   /* Return to Normal mode        */
+       __REG(CONFIG_SYS_FLASH_BASE + LCR_ERASE_NVMODE) = 0xC0C0C0C0;   /* Confirm              */
 
        while(!SF_Ready());
 }
@@ -141,11 +141,11 @@ void SF_NvmodeErase(void) {
 void SF_NvmodeWrite(void) {
        SF_PrechargeAll();
 
-       reg_SFCTL       = CMD_LCR;                      /* Set to LCR mode              */
-       __REG(CFG_FLASH_BASE+LCR_PROG_NVMODE) = 0;      /* Issue Program Nvmode reg command */
+       reg_SFCTL       = CMD_LCR;                      /* Set to LCR mode              */
+       __REG(CONFIG_SYS_FLASH_BASE+LCR_PROG_NVMODE) = 0;       /* Issue Program Nvmode reg command */
 
-       reg_SFCTL       = CMD_NORMAL;                   /* Return to Normal mode        */
-       __REG(CFG_FLASH_BASE+LCR_PROG_NVMODE) = 0xC0C0C0C0;     /* Confirm not needed   */
+       reg_SFCTL       = CMD_NORMAL;                   /* Return to Normal mode        */
+       __REG(CONFIG_SYS_FLASH_BASE+LCR_PROG_NVMODE) = 0xC0C0C0C0;      /* Confirm not needed   */
 }
 
 /****************************************************************************************/
@@ -156,35 +156,35 @@ ulong flash_init(void) {
 
 /* Turn on CSD1 for negating RESETSF of SyncFLash */
 
-       reg_SFCTL       |= 0x80000000;          /* enable CSD1 for SyncFlash            */
+       reg_SFCTL       |= 0x80000000;          /* enable CSD1 for SyncFlash            */
        udelay(200);
 
-       reg_SFCTL       = CMD_LMR;              /* Set Load Mode Register Command       */
-       tmp             = __REG(MODE_REG_VAL);  /* Issue Load Mode Register Command     */
+       reg_SFCTL       = CMD_LMR;              /* Set Load Mode Register Command       */
+       tmp             = __REG(MODE_REG_VAL);  /* Issue Load Mode Register Command     */
 
        SF_Normal();
 
        i = 0;
 
-       flash_info[i].flash_id  =  FLASH_MAN_MT | FLASH_MT28S4M16LC;
+       flash_info[i].flash_id  =  FLASH_MAN_MT | FLASH_MT28S4M16LC;
 
-       flash_info[i].size      = FLASH_BANK_SIZE;
-       flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
+       flash_info[i].size      = FLASH_BANK_SIZE;
+       flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
 
-       memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
+       memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
 
        for (j = 0; j < flash_info[i].sector_count; j++) {
-               flash_info[i].start[j] = CFG_FLASH_BASE + j * 0x00100000;
+               flash_info[i].start[j] = CONFIG_SYS_FLASH_BASE + j * 0x00100000;
        }
 
        flash_protect(FLAG_PROTECT_SET,
-               CFG_FLASH_BASE,
-               CFG_FLASH_BASE + monitor_flash_len - 1,
+               CONFIG_SYS_FLASH_BASE,
+               CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
                &flash_info[0]);
 
        flash_protect(FLAG_PROTECT_SET,
-               CFG_ENV_ADDR,
-               CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
+               CONFIG_ENV_ADDR,
+               CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
                &flash_info[0]);
 
        return FLASH_BANK_SIZE;
@@ -281,7 +281,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) {
                SF_NvmodeErase();
                SF_NvmodeWrite();
 
-               SF_Erase(CFG_FLASH_BASE + (0x0100000 * sect));
+               SF_Erase(CONFIG_SYS_FLASH_BASE + (0x0100000 * sect));
                SF_Normal();
 
                printf("ok.\n");