#include <asm/arch/gpio.h>
#include <netdev.h>
#include <asm/io.h>
+#include <dm/platdata.h>
+#include <dm/platform_data/serial_pl01x.h>
DECLARE_GLOBAL_DATA_PTR;
struct gpio_regs *const gpioa_regs =
(struct gpio_regs *) GPIOA_BASE_ADDR;
+#ifndef CONFIG_OF_CONTROL
+static const struct pl01x_serial_platdata serial_platdata = {
+ .base = 0x80406000,
+ .type = TYPE_PL011,
+ .clock = 2700 * 1000,
+};
+
+U_BOOT_DEVICE(stv09911_serials) = {
+ .name = "serial_pl01x",
+ .platdata = &serial_platdata,
+};
+#endif
+
#ifdef CONFIG_SHOW_BOOT_PROGRESS
void show_boot_progress(int progress)
{
return 0;
}
+int board_qspi_enable(void)
+{
+ stv0991_pinmux_config(QSPI_CS_CLK_PAD);
+ clock_setup(QSPI_CLOCK_CFG);
+ return 0;
+}
+
/*
* Miscellaneous platform dependent initialisations
*/
int board_init(void)
{
board_eth_enable();
+ board_qspi_enable();
return 0;
}
{
int ret = 0;
-#if defined(CONFIG_DESIGNWARE_ETH)
+#if defined(CONFIG_ETH_DESIGNWARE)
u32 interface = PHY_INTERFACE_MODE_MII;
if (designware_initialize(GMAC_BASE_ADDR, interface) >= 0)
ret++;