*
* (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
-#define DEBUG
-
#include <common.h>
#include <command.h>
#include <malloc.h>
typedef struct _TSI148_DEV TSI148_DEV;
struct _TSI148_DEV {
- int bus;
- pci_dev_t busdevfn;
- TSI148 *uregs;
- unsigned int pci_bs;
+ int bus;
+ pci_dev_t busdevfn;
+ TSI148 *uregs;
+ unsigned int pci_bs;
};
static TSI148_DEV *dev;
int tsi148_init(void)
{
- int j, result, lastError = 0;
+ int j, result;
pci_dev_t busdevfn;
unsigned int val;
dev = malloc(sizeof(*dev));
if (NULL == dev) {
puts("Tsi148: No memory!\n");
- result = -1;
- goto break_20;
+ return -1;
}
memset(dev, 0, sizeof(*dev));
debug("Tsi148: Base : %p\n", dev->uregs);
- /* check mapping */
- debug("Tsi148: Read via mapping, PCI_ID = %08X\n", readl(&dev->uregs->pci_id));
- if (((PCI_DEVICE << 16) | PCI_VENDOR) != readl(&dev->uregs->pci_id)) {
+ /* check mapping */
+ debug("Tsi148: Read via mapping, PCI_ID = %08X\n",
+ readl(&dev->uregs->pci_id));
+ if (((PCI_DEVICE << 16) | PCI_VENDOR) != readl(&dev->uregs->pci_id)) {
printf("Tsi148: Cannot read PCI-ID via Mapping: %08x\n",
- readl(&dev->uregs->pci_id));
+ readl(&dev->uregs->pci_id));
result = -1;
goto break_30;
}
/* Tsi148 VME timeout etc */
__raw_writel(htonl(0x00000084), &dev->uregs->vctrl);
+#ifdef DEBUG
if ((__raw_readl(&dev->uregs->vstat) & 0x00000100) != 0)
- debug("Tsi148: System Controller!\n");
+ printf("Tsi148: System Controller!\n");
else
- debug("Tsi148: Not System Controller!\n");
+ printf("Tsi148: Not System Controller!\n");
+#endif
/*
* Lets turn off interrupts
__raw_writel(htonl(0x00000000), &dev->uregs->intm2);
eieio();
- val = __raw_readl(&dev->uregs->vstat);
+ val = __raw_readl(&dev->uregs->vstat);
val &= ~(0x00004000);
__raw_writel(val, &dev->uregs->vstat);
eieio();
break_30:
free(dev);
dev = NULL;
- break_20:
- lastError = result;
return result;
}
/*
* Create pci slave window (access: pci -> vme)
*/
-int tsi148_pci_slave_window(unsigned int pciAddr, unsigned int vmeAddr, int size, int vam, int vdw)
+int tsi148_pci_slave_window(unsigned int pciAddr, unsigned int vmeAddr,
+ int size, int vam, int vdw)
{
int result, i;
unsigned int ctl = 0;
printf("Tsi148: Pci addr %08x\n", pciAddr);
-
- __raw_writel(htonl(pciAddr) , &dev->uregs->outbound[i].otsal);
- __raw_writel(0x00000000 , &dev->uregs->outbound[i].otsau);
+ __raw_writel(htonl(pciAddr), &dev->uregs->outbound[i].otsal);
+ __raw_writel(0x00000000, &dev->uregs->outbound[i].otsau);
__raw_writel(htonl(pciAddr + size), &dev->uregs->outbound[i].oteal);
- __raw_writel(0x00000000 , &dev->uregs->outbound[i].oteau);
+ __raw_writel(0x00000000, &dev->uregs->outbound[i].oteau);
__raw_writel(htonl(vmeAddr - pciAddr), &dev->uregs->outbound[i].otofl);
- __raw_writel(0x00000000 , &dev->uregs->outbound[i].otofu);
+ __raw_writel(0x00000000, &dev->uregs->outbound[i].otofu);
switch (vam & VME_AM_Axx) {
case VME_AM_A16:
break;
}
- ctl |= 0x80040000; /* enable, no prefetch */
+ ctl |= 0x80040000; /* enable, no prefetch */
__raw_writel(htonl(ctl), &dev->uregs->outbound[i].otat);
/*
* Create vme slave window (access: vme -> pci)
*/
-int tsi148_vme_slave_window(unsigned int vmeAddr, unsigned int pciAddr, int size, int vam)
+int tsi148_vme_slave_window(unsigned int vmeAddr, unsigned int pciAddr,
+ int size, int vam)
{
int result, i;
unsigned int ctl = 0;
__raw_writel(0x00000000, &dev->uregs->inbound[i].itofu);
ctl = tsi148_eval_vam(vam);
- ctl |= 0x80000000; /* enable */
+ ctl |= 0x80000000; /* enable */
__raw_writel(htonl(ctl), &dev->uregs->inbound[i].itat);
debug("Tsi148: window-addr =%p\n",
&dev->uregs->inbound[i].itsau);
debug("Tsi148: vme slave window[%d] attr =%08x\n",
- i, ntohl(__raw_readl(&dev->uregs->inbound[i].itat))) ;
+ i, ntohl(__raw_readl(&dev->uregs->inbound[i].itat)));
debug("Tsi148: vme slave window[%d] start =%08x\n",
i, ntohl(__raw_readl(&dev->uregs->inbound[i].itsal)));
debug("Tsi148: vme slave window[%d] end =%08x\n",
if (NULL == dev) {
result = 1;
} else {
- __raw_writel(htonl(vmeAddr), &dev->uregs->gbal);
- __raw_writel(0x00000000, &dev->uregs->gbau);
+ __raw_writel(htonl(vmeAddr), &dev->uregs->gbal);
+ __raw_writel(0x00000000, &dev->uregs->gbau);
- ctl = tsi148_eval_vam(vam);
- ctl |= 0x00000080; /* enable */
- __raw_writel(htonl(ctl), &dev->uregs->gcsrat);
+ ctl = tsi148_eval_vam(vam);
+ ctl |= 0x00000080; /* enable */
+ __raw_writel(htonl(ctl), &dev->uregs->gcsrat);
}
return result;
if (NULL == dev) {
result = 1;
} else {
- __raw_writel(htonl(vmeAddr), &dev->uregs->crol);
- __raw_writel(0x00000000, &dev->uregs->crou);
+ __raw_writel(htonl(vmeAddr), &dev->uregs->crol);
+ __raw_writel(0x00000000, &dev->uregs->crou);
- ctl = 0x00000080; /* enable */
- __raw_writel(htonl(ctl), &dev->uregs->crat);
+ ctl = 0x00000080; /* enable */
+ __raw_writel(htonl(ctl), &dev->uregs->crat);
}
return result;
}
-
/*
* Create vme slave window (access: vme -> crg)
*/
if (NULL == dev) {
result = 1;
} else {
- __raw_writel(htonl(vmeAddr), &dev->uregs->cbal);
- __raw_writel(0x00000000, &dev->uregs->cbau);
+ __raw_writel(htonl(vmeAddr), &dev->uregs->cbal);
+ __raw_writel(0x00000000, &dev->uregs->cbau);
- ctl = tsi148_eval_vam(vam);
- ctl |= 0x00000080; /* enable */
- __raw_writel(htonl(ctl), &dev->uregs->crgat);
+ ctl = tsi148_eval_vam(vam);
+ ctl |= 0x00000080; /* enable */
+ __raw_writel(htonl(ctl), &dev->uregs->crgat);
}
return result;
/*
* Tundra Tsi148 configuration
*/
-int do_tsi148(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_tsi148(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr1 = 0, addr2 = 0, size = 0, vam = 0, vdw = 0;
char cmd = 'x';
if (argc > 5)
vam = simple_strtoul(argv[5], NULL, 16);
if (argc > 6)
- vdw = simple_strtoul(argv[7], NULL, 16);
+ vdw = simple_strtoul(argv[6], NULL, 16);
switch (cmd) {
case 'c':
if (strcmp(argv[1], "crg") == 0) {
vam = addr2;
- printf("Tsi148: Configuring VME CRG Window (VME->CRG):\n");
+ printf("Tsi148: Configuring VME CRG Window "
+ "(VME->CRG):\n");
printf(" vme=%08lx vam=%02lx\n", addr1, vam);
tsi148_vme_crg_window(addr1, vam);
} else {
- printf("Tsi148: Configuring VME CR/CSR Window (VME->CR/CSR):\n");
+ printf("Tsi148: Configuring VME CR/CSR Window "
+ "(VME->CR/CSR):\n");
printf(" pci=%08lx\n", addr1);
tsi148_vme_crcsr_window(addr1);
}
}
U_BOOT_CMD(
- tsi148, 8, 1, do_tsi148,
- "tsi148 - initialize and configure Turndra Tsi148\n",
+ tsi148, 7, 1, do_tsi148,
+ "initialize and configure Turndra Tsi148\n",
"init\n"
" - initialize tsi148\n"
"tsi148 vme [vme_addr] [pci_addr] [size] [vam]\n"
projects / karo-tx-uboot.git / blobdiff