]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - cpu/arm926ejs/versatile/timer.c
imported Freescale specific U-Boot additions for i.MX28,... release L2.6.31_10.08.01
[karo-tx-uboot.git] / cpu / arm926ejs / versatile / timer.c
index 32872d2b66c2e4ed1545f65977c46b5a1a035af7..50c13350a06bb6909f90de225c637aa766eafea1 100755 (executable)
@@ -11,7 +11,7 @@
  * Alex Zuepke <azu@sysgo.de>
  *
  * (C) Copyright 2002-2004
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  *
  * (C) Copyright 2004
  * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
  */
 
 #include <common.h>
-#include <arm926ejs.h>
 
 #define TIMER_LOAD_VAL 0xffffffff
 
 /* macro to read the 32 bit timer */
-#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
+#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))
 
 static ulong timestamp;
 static ulong lastdec;
 
-/* nothing really to do with interrupts, just starts up a counter. */
+#define TIMER_ENABLE   (1 << 7)
+#define TIMER_MODE_MSK (1 << 6)
+#define TIMER_MODE_FR  (0 << 6)
+#define TIMER_MODE_PD  (1 << 6)
+
+#define TIMER_INT_EN   (1 << 5)
+#define TIMER_PRS_MSK  (3 << 2)
+#define TIMER_PRS_8S   (1 << 3)
+#define TIMER_SIZE_MSK (1 << 2)
+#define TIMER_ONE_SHT  (1 << 0)
+
 int timer_init (void)
 {
-       *(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD;      /* TimerLoad */
-       *(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD;      /* TimerValue */
-       *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
+       ulong   tmr_ctrl_val;
+
+       /* 1st disable the Timer */
+       tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8);
+       tmr_ctrl_val &= ~TIMER_ENABLE;
+       *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
+
+       /*
+        * The Timer Control Register has one Undefined/Shouldn't Use Bit
+        * So we should do read/modify/write Operation
+        */
+
+       /*
+        * Timer Mode : Free Running
+        * Interrupt : Disabled
+        * Prescale : 8 Stage, Clk/256
+        * Tmr Siz : 16 Bit Counter
+        * Tmr in Wrapping Mode
+        */
+       tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8);
+       tmr_ctrl_val &= ~(TIMER_MODE_MSK | TIMER_INT_EN | TIMER_PRS_MSK | TIMER_SIZE_MSK | TIMER_ONE_SHT );
+       tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S);
+
+       *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
 
        /* init the timestamp and lastdec value */
        reset_timer_masked();
@@ -85,10 +115,10 @@ void udelay (unsigned long usec)
 
        if(usec >= 1000){               /* if "big" number, spread normalization to seconds */
                tmo = usec / 1000;      /* start to normalize for usec to ticks per sec */
-               tmo *= CFG_HZ;          /* find number of "ticks" to wait to achieve target */
+               tmo *= CONFIG_SYS_HZ;           /* find number of "ticks" to wait to achieve target */
                tmo /= 1000;            /* finish normalize. */
        }else{                          /* else small number, don't kill it prior to HZ multiply */
-               tmo = usec * CFG_HZ;
+               tmo = usec * CONFIG_SYS_HZ;
                tmo /= (1000*1000);
        }
 
@@ -138,10 +168,10 @@ void udelay_masked (unsigned long usec)
 
        if (usec >= 1000) {             /* if "big" number, spread normalization to seconds */
                tmo = usec / 1000;      /* start to normalize for usec to ticks per sec */
-               tmo *= CFG_HZ;          /* find number of "ticks" to wait to achieve target */
+               tmo *= CONFIG_SYS_HZ;           /* find number of "ticks" to wait to achieve target */
                tmo /= 1000;            /* finish normalize. */
        } else {                        /* else small number, don't kill it prior to HZ multiply */
-               tmo = usec * CFG_HZ;
+               tmo = usec * CONFIG_SYS_HZ;
                tmo /= (1000*1000);
        }
 
@@ -170,6 +200,6 @@ ulong get_tbclk (void)
 {
        ulong tbclk;
 
-       tbclk = CFG_HZ;
+       tbclk = CONFIG_SYS_HZ;
        return tbclk;
 }