MPC5200: enable snooping of DMA transactions on XLB even if no PCI

[karo-tx-uboot.git] / cpu / mpc5xxx / pci_mpc5200.c

diff --git a/cpu/mpc5xxx/pci_mpc5200.c b/cpu/mpc5xxx/pci_mpc5200.c
index a890a6d0a73c6c5e0258ffb7e06e4a4f08629d5f..2f01d5ce996279e675a7e3398f4db5d8fac427f7 100644 (file)
--- a/cpu/mpc5xxx/pci_mpc5200.c
+++ b/cpu/mpc5xxx/pci_mpc5200.c
@@ -48,9 +48,25 @@ static int mpc5200_read_config_dword(struct pci_controller *hose,
 {
        *(volatile u32 *)MPC5XXX_PCI_CAR = (1 << 31) | dev | offset;
        eieio();
+       udelay(10);
+#if (defined CONFIG_PF5200 || defined CONFIG_CPCI5200)
+       if (dev & 0x00ff0000) {
+               u32 val;
+               val  = in_le16((volatile u16 *)(CONFIG_PCI_IO_PHYS+2));
+               udelay(10);
+               val = val << 16;
+               val |= in_le16((volatile u16 *)(CONFIG_PCI_IO_PHYS+0));
+               *value = val;
+       } else {
+               *value = in_le32((volatile u32 *)CONFIG_PCI_IO_PHYS);
+       }
+       udelay(10);
+#else
        *value = in_le32((volatile u32 *)CONFIG_PCI_IO_PHYS);
+#endif
        eieio();
        *(volatile u32 *)MPC5XXX_PCI_CAR = 0;
+       udelay(10);
        return 0;
 }
 
@@ -59,9 +75,11 @@ static int mpc5200_write_config_dword(struct pci_controller *hose,
 {
        *(volatile u32 *)MPC5XXX_PCI_CAR = (1 << 31) | dev | offset;
        eieio();
+       udelay(10);
        out_le32((volatile u32 *)CONFIG_PCI_IO_PHYS, value);
        eieio();
        *(volatile u32 *)MPC5XXX_PCI_CAR = 0;
+       udelay(10);
        return 0;
 }
 
@@ -97,44 +115,41 @@ void pci_mpc5xxx_init (struct pci_controller *hose)
 
        /* GPIO Multiplexing - enable PCI */
        *(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~(1 << 15);
-       
+
        /* Set host bridge as pci master and enable memory decoding */
        *(vu_long *)MPC5XXX_PCI_CMD |=
                PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
-       
+
        /* Set maximum latency timer */
        *(vu_long *)MPC5XXX_PCI_CFG |= (0xf800);
 
        /* Set cache line size */
        *(vu_long *)MPC5XXX_PCI_CFG = (*(vu_long *)MPC5XXX_PCI_CFG & ~0xff) |
                (CFG_CACHELINE_SIZE / 4);
-       
+
        /* Map MBAR to PCI space */
        *(vu_long *)MPC5XXX_PCI_BAR0 = CFG_MBAR;
-       *(vu_long *)MPC5XXX_PCI_TBATR1 = CFG_MBAR | 1;
-       
+       *(vu_long *)MPC5XXX_PCI_TBATR0 = CFG_MBAR | 1;
+
        /* Map RAM to PCI space */
        *(vu_long *)MPC5XXX_PCI_BAR1 = CONFIG_PCI_MEMORY_BUS | (1 << 3);
        *(vu_long *)MPC5XXX_PCI_TBATR1 = CONFIG_PCI_MEMORY_PHYS | 1;
 
-       /* Enable snooping for RAM */
-       *(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 15);
-       *(vu_long *)(MPC5XXX_XLBARB + 0x70) = CONFIG_PCI_MEMORY_PHYS | 0x1d;
-
        /* Park XLB on PCI */
        *(vu_long *)(MPC5XXX_XLBARB + 0x40) &= ~((7 << 8) | (3 << 5));
        *(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (3 << 8) | (3 << 5);
 
-       /* Enable piplining */
-       *(vu_long *)(MPC5XXX_XLBARB + 0x40) &= ~(1 << 31);
-       
        /* Disable interrupts from PCI controller */
        *(vu_long *)MPC5XXX_PCI_GSCR &= ~(7 << 12);
-       *(vu_long *)MPC5XXX_PCI_ICR &= ~(7 << 24);
-       
+       *(vu_long *)MPC5XXX_PCI_ICR  &= ~(7 << 24);
+
+       /* Set PCI retry counter to 0 = infinite retry. */
+       /* The default of 255 is too short for slow devices. */
+       *(vu_long *)MPC5XXX_PCI_ICR &= 0xFFFFFF00;
+
        /* Disable initiator windows */
        *(vu_long *)MPC5XXX_PCI_IWCR = 0;
-       
+
        /* Map PCI memory to physical space */
        *(vu_long *)MPC5XXX_PCI_IW0BTAR = CONFIG_PCI_MEM_PHYS |
                (((CONFIG_PCI_MEM_SIZE - 1) >> 8) & 0x00ff0000) |
@@ -160,7 +175,7 @@ void pci_mpc5xxx_init (struct pci_controller *hose)
                pci_hose_write_config_byte_via_dword,
                pci_hose_write_config_word_via_dword,
                mpc5200_write_config_dword);
-       
+
        udelay(1000);
 
 #ifdef CONFIG_PCI_SCAN_SHOW