rename CFG_ macros to CONFIG_SYS

[karo-tx-uboot.git] / cpu / mpc824x / drivers / epic / epic1.c

diff --git a/cpu/mpc824x/drivers/epic/epic1.c b/cpu/mpc824x/drivers/epic/epic1.c
index 362e12970d2ef03620ad298e08cbffc03080a674..ecbb42d0d62a711a508a5efae0ea3856b817b9dc 100644 (file)
--- a/cpu/mpc824x/drivers/epic/epic1.c
+++ b/cpu/mpc824x/drivers/epic/epic1.c
@@ -70,18 +70,23 @@ void epicInit
     tmp = sysEUMBBARRead(EPIC_GLOBAL_REG);
     tmp |= 0xa0000000;                  /* Set the Global Conf. register */
     sysEUMBBARWrite(EPIC_GLOBAL_REG, tmp);
+       /*
+        * Wait for EPIC to reset - CLH
+        */
+    while( (sysEUMBBARRead(EPIC_GLOBAL_REG) & 0x80000000) == 1);
     sysEUMBBARWrite(EPIC_GLOBAL_REG, 0x20000000);
     tmp = sysEUMBBARRead(EPIC_INT_CONF_REG);    /* Read interrupt conf. reg */
 
     if (IRQType == EPIC_DIRECT_IRQ)             /* direct mode */
-        sysEUMBBARWrite(EPIC_INT_CONF_REG, tmp & 0xf7ffffff);
+       sysEUMBBARWrite(EPIC_INT_CONF_REG, tmp & 0xf7ffffff);
     else                                        /* Serial mode */
-        {
-        tmp = (clkRatio << 28) | 0x08000000;    /* Set clock ratio */
-        sysEUMBBARWrite(EPIC_INT_CONF_REG, tmp);
-        }
+       {
+       tmp = (clkRatio << 28) | 0x08000000;    /* Set clock ratio */
+       sysEUMBBARWrite(EPIC_INT_CONF_REG, tmp);
+       }
 
-    while (epicIntAck() != 0xff);       /* Clear all pending interrupts */
+    while (epicIntAck() != 0xff)       /* Clear all pending interrupts */
+               epicEOI();
 }
 
 /****************************************************************************
@@ -92,18 +97,18 @@ void epicInit
  *
  *  RETURNS:  None
  */
-void epicIntEnable
-    (
-    int intVec        /* Interrupt Vector Number */
-    )
-    {
+void epicIntEnable(int intVec)
+{
     ULONG tmp;
     ULONG srAddr;
 
     srAddr = SrcVecTable[intVec].srcAddr;  /* Retrieve src Vec/Prio register */
     tmp = sysEUMBBARRead(srAddr);
-    tmp &= 0x7fffffff;             /* Clear the mask bit */
+    tmp &= ~EPIC_VEC_PRI_MASK;             /* Clear the mask bit */
+    tmp |= (EPIC_VEC_PRI_DFLT_PRI << 16);   /* Set priority to Default - CLH */
+    tmp |= intVec;                                        /* Set Vector number */
     sysEUMBBARWrite(srAddr, tmp);
+
     return;
     }
 
@@ -163,7 +168,7 @@ int epicIntSourceConfig
     tmp = sysEUMBBARRead(srAddr);
     actBit = (tmp & 40000000) >> 30;    /* retrieve activity bit - bit 30 */
     if (actBit == 1)
-        return ERROR;
+       return ERROR;
 
     tmp &= 0xff30ff00;     /* Erase previously set P,S,Prio,Vector bits */
     newVal = (Polarity << 23) | (Sense << 22) | (Prio << 16) | Vect;
@@ -215,7 +220,7 @@ int epicCurTaskPrioSet
     {
 
     if ( (prioNum < 0) || (prioNum > 0xF))
-        return ERROR;
+       return ERROR;
     sysEUMBBARWrite(EPIC_PROC_CTASK_PRI_REG, prioNum);
     return OK;
     }
@@ -306,7 +311,7 @@ ULONG sysEUMBBARRead
     {
     ULONG temp;
 
-    temp = *(ULONG *) (CFG_EUMB_ADDR + regNum);
+    temp = *(ULONG *) (CONFIG_SYS_EUMB_ADDR + regNum);
     return ( LONGSWAP(temp));
     }
 
@@ -326,7 +331,7 @@ void sysEUMBBARWrite
     )
     {
 
-    *(ULONG *) (CFG_EUMB_ADDR + regNum) = LONGSWAP(regVal);
+    *(ULONG *) (CONFIG_SYS_EUMB_ADDR + regNum) = LONGSWAP(regVal);
     return ;
     }
 
@@ -460,7 +465,6 @@ unsigned int epicTmCountGet( ULONG srcAddr, unsigned int *val )
 }
 
 
-
 /***********************************************************
  * function: epicTmInhibit
  *