#define DRIVERNAME "smc911x"
#if defined (CONFIG_SMC911X_32_BIT) && \
- defined (CONFIG_SMC911X_16_BIT)
+ defined (CONFIG_SMC911X_16_BIT) && \
+ defined(CONFIG_SMC911X_CPLD)
#error "SMC911X: Only one of CONFIG_SMC911X_32_BIT and \
CONFIG_SMC911X_16_BIT shall be set"
#endif
*(volatile u16 *)(dev->iobase + offset) = (u16)val;
*(volatile u16 *)(dev->iobase + offset + 2) = (u16)(val >> 16);
}
+#elif defined(CONFIG_SMC911X_CPLD)
+#include <asm/arch/imx_spi_cpld.h>
+static inline u32 smc911x_reg_read(struct eth_device *dev, u32 offset)
+{
+ return cpld_reg_xfer(offset, 0x0, 1) | \
+ (cpld_reg_xfer(offset + 0x2, 0x0, 1) << 16);
+}
+static void smc911x_reg_write(struct eth_device *dev,
+ u32 offset, u32 val)
+{
+ cpld_reg_xfer(offset, val, 0);
+ cpld_reg_xfer(offset + 0x2, (val >> 16), 0);
+}
#else
#error "SMC911X: undefined bus width"
#endif /* CONFIG_SMC911X_16_BIT */
#define CHIP_9216 0x116a
#define CHIP_9217 0x117a
#define CHIP_9218 0x118a
+#define CHIP_9220 0x9220
#define CHIP_9221 0x9221
struct chip_id {
{ CHIP_9216, "LAN9216" },
{ CHIP_9217, "LAN9217" },
{ CHIP_9218, "LAN9218" },
+ { CHIP_9220, "LAN9220" },
{ CHIP_9221, "LAN9221" },
{ 0, NULL },
};
unsigned long val, i;
val = smc911x_reg_read(dev, BYTE_TEST);
- if (val != 0x87654321) {
+ if (val == 0xffffffff) {
+ /* Special case -- no chip present */
+ return -1;
+ } else if (val != 0x87654321) {
printf(DRIVERNAME ": Invalid chip endian 0x%08lx\n", val);
return -1;
}
return -1;
}
- printf(DRIVERNAME ": detected %s controller\n", chip_ids[i].name);
+ dev->priv = (void *)&chip_ids[i];
return 0;
}