#include <dm/lists.h>
#include <dm/root.h>
#include <dm/device-internal.h>
+#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
+#include <asm/fsp/fsp_support.h>
+#endif
DECLARE_GLOBAL_DATA_PTR;
static int pci_uclass_post_bind(struct udevice *bus)
{
+ /*
+ * If there is no pci device listed in the device tree,
+ * don't bother scanning the device tree.
+ */
+ if (bus->of_offset == -1)
+ return 0;
+
/*
* Scan the device tree for devices. This does not probe the PCI bus,
* as this is not permitted while binding. It just finds devices
ret = pci_auto_config_devices(bus);
#endif
+#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
+ /*
+ * Per Intel FSP specification, we should call FSP notify API to
+ * inform FSP that PCI enumeration has been done so that FSP will
+ * do any necessary initialization as required by the chipset's
+ * BIOS Writer's Guide (BWG).
+ *
+ * Unfortunately we have to put this call here as with driver model,
+ * the enumeration is all done on a lazy basis as needed, so until
+ * something is touched on PCI it won't happen.
+ *
+ * Note we only call this 1) after U-Boot is relocated, and 2)
+ * root bus has finished probing.
+ */
+ if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0))
+ ret = fsp_init_phase_pci();
+#endif
+
return ret < 0 ? ret : 0;
}
if (ret != -ENOENT)
return -EINVAL;
} else {
- /* extract the bdf from fdt_pci_addr */
- pplat->devfn = addr.phys_hi & 0xffff00;
+ /* extract the devfn from fdt_pci_addr */
+ pplat->devfn = addr.phys_hi & 0xff00;
}
return 0;