Merge branch 'boot_mode' into uboot-rel

[karo-tx-uboot.git] / include / ahci.h

diff --git a/include/ahci.h b/include/ahci.h
index 12f653a58d8e898083b2c9d9a0d8f3770e92afd0..1940eea630e94769914964e5ba652c7d5c2669c4 100644 (file)
--- a/include/ahci.h
+++ b/include/ahci.h
@@ -6,24 +6,7 @@
  * Author: Jason Jin<Jason.jin@freescale.com>
  *         Zhang Wei<wei.zhang@freescale.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 #ifndef _AHCI_H_
 #define _AHCI_H_
@@ -34,6 +17,7 @@
 #define AHCI_MAX_SG            56 /* hardware max is 64K */
 #define AHCI_MAX_CMD_SLOT      32
 #define AHCI_CMD_SLOT_SZ       32
+#define AHCI_MAX_CMD_SLOT      32
 #define AHCI_RX_FIS_SZ         256
 #define AHCI_CMD_TBL_HDR       0x80
 #define AHCI_CMD_TBL_CDB       0x40
@@ -54,6 +38,7 @@
 #define HOST_IRQ_STAT          0x08 /* interrupt status */
 #define HOST_PORTS_IMPL                0x0c /* bitmap of implemented ports */
 #define HOST_VERSION           0x10 /* AHCI spec. version compliancy */
+#define HOST_CAP2              0x24 /* host capabilities, extended */
 
 /* HOST_CTL bits */
 #define HOST_RESET             (1 << 0)  /* reset controller; self-clear */
@@ -193,4 +178,6 @@ struct ahci_probe_ent {
        u32     link_port_map; /*linkup port map*/
 };
 
+int ahci_init(u32 base);
+
 #endif