#define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core */
#define CONFIG_INCA_IP 1 /* on a INCA-IP Board */
-/* allowed values: 100000000 and 150000000 */
-#define CPU_CLOCK_RATE 150000000 /* 150 MHz clock for the MIPS core */
+/* allowed values: 100000000, 133000000, and 150000000 */
+#define CPU_CLOCK_RATE 133000000 /* 133 MHz clock for the MIPS core */
#if CPU_CLOCK_RATE == 100000000
#define INFINEON_EBU_BOOTCFG 0x20C4 /* CMULT = 4 for 100 MHz */