/*
* Copyright (C) 2012 <LW@KARO-electronics.de>
*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
+ * SPDX-License-Identifier: GPL-2.0
*
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
-#ifndef __TX6_H
-#define __TX6_H
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
#include <asm/sizes.h>
+#include <asm/arch/imx-regs.h>
/*
* Ka-Ro TX6 board - SoC configuration
#ifndef CONFIG_MFG
/* LCD Logo and Splash screen support */
#define CONFIG_LCD
-#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#ifdef CONFIG_LCD
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_VIDEO_IPUV3
-#define CONFIG_IPU_CLKRATE 266000000
+#define CONFIG_IPUV3_CLK 266000000
#define CONFIG_LCD_LOGO
#define LCD_BPP LCD_COLOR24
#define CONFIG_CMD_BMP
*/
#define CONFIG_NR_DRAM_BANKS 1 /* # of SDRAM banks */
#define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
-#ifdef CONFIG_MX6Q
-#define PHYS_SDRAM_1_SIZE SZ_1G
+#ifdef CONFIG_SYS_SDRAM_BUS_WIDTH
+#define PHYS_SDRAM_1_WIDTH CONFIG_SYS_SDRAM_BUS_WIDTH
+#else
#define PHYS_SDRAM_1_WIDTH 64
+#endif
+#define PHYS_SDRAM_1_SIZE (SZ_512M * (PHYS_SDRAM_1_WIDTH / 32))
+
+#ifdef CONFIG_MX6Q
#define CONFIG_SYS_SDRAM_CLK 528
#else
-#define PHYS_SDRAM_1_SIZE SZ_512M
-#define PHYS_SDRAM_1_WIDTH 32
#define CONFIG_SYS_SDRAM_CLK 400
#endif
#define CONFIG_STACKSIZE SZ_128K
#define CONFIG_OF_LIBFDT
#ifdef CONFIG_OF_LIBFDT
#define CONFIG_FDT_FIXUP_PARTITIONS
-#define CONFIG_OF_EMBED
#define CONFIG_OF_BOARD_SETUP
#ifdef CONFIG_MX6Q
#define CONFIG_DEFAULT_DEVICE_TREE tx6q
#endif /* CONFIG_MFG */
#define CONFIG_LOADADDR 18000000
#define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
-#define CONFIG_U_BOOT_IMG_SIZE SZ_1M
#define CONFIG_IMX_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT_MSECS 3000
"nfsroot=/tftpboot/rootfs\0" \
"otg_mode=device\0" \
"touchpanel=tsc2007\0" \
- "video_mode=VGA-1:640x480MR-24@60\0"
+ "video_mode=VGA\0"
#endif /* CONFIG_ENV_IS_NOWHERE */
#endif /* CONFIG_MFG */
#define CONFIG_CMD_BOOTCE
#define CONFIG_CMD_TIME
#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MEMTEST
/*
* Serial Driver
#ifdef CONFIG_FEC_MXC
/* This is required for the FEC driver to work with cache enabled */
#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
+#define CONFIG_SYS_CACHELINE_SIZE 64
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_MTD_DEBUG
#define CONFIG_MTD_DEBUG_VERBOSE 4
#endif
-#ifndef CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_SYS_NAND_BLOCK_SIZE SZ_128K
-#endif
#define CONFIG_NAND_MXS
#define CONFIG_NAND_MXS_NO_BBM_SWAP
#define CONFIG_APBH_DMA
#define CONFIG_APBH_DMA_BURST
#define CONFIG_APBH_DMA_BURST8
-#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SYS_NAND_BLOCK_SIZE
#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_SYS_MXS_DMA_CHANNEL 4
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
xstr(CONFIG_SYS_U_BOOT_PART_SIZE) \
- "@" xstr(CONFIG_SYS_U_BOOT_OFFSET) \
+ "@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) \
"(u-boot)," \
CONFIG_SYS_ENV_PART_STR \
"4m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR "," \
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
GENERATED_GBL_DATA_SIZE)
-#ifdef CONFIG_CMD_IIM
-#define CONFIG_IMX_IIM
-#endif
-
#endif /* __CONFIG_H */