ARM: uniphier: enable SPL_OF_CONTROL

[karo-tx-uboot.git] / include / configs / uniphier.h

diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 2d235ac23c04e4ab4923833f3dd790893b480fa8..d59564bafd0cec521ba067e63ca56fdb57adea95 100644 (file)
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -9,15 +9,18 @@
 #ifndef __CONFIG_UNIPHIER_COMMON_H__
 #define __CONFIG_UNIPHIER_COMMON_H__
 
-#if defined(CONFIG_MACH_PH1_PRO4)
+#if defined(CONFIG_MACH_PH1_SLD3)
 #define CONFIG_DDR_NUM_CH0 2
-#define CONFIG_DDR_NUM_CH1 2
+#define CONFIG_DDR_NUM_CH1 1
+#define CONFIG_DDR_NUM_CH2 1
 
 /* Physical start address of SDRAM */
 #define CONFIG_SDRAM0_BASE     0x80000000
 #define CONFIG_SDRAM0_SIZE     0x20000000
-#define CONFIG_SDRAM1_BASE     0xa0000000
+#define CONFIG_SDRAM1_BASE     0xc0000000
 #define CONFIG_SDRAM1_SIZE     0x20000000
+#define CONFIG_SDRAM2_BASE     0xc0000000
+#define CONFIG_SDRAM2_SIZE     0x10000000
 #endif
 
 #if defined(CONFIG_MACH_PH1_LD4)
@@ -31,6 +34,17 @@
 #define CONFIG_SDRAM1_SIZE     0x10000000
 #endif
 
+#if defined(CONFIG_MACH_PH1_PRO4)
+#define CONFIG_DDR_NUM_CH0 2
+#define CONFIG_DDR_NUM_CH1 2
+
+/* Physical start address of SDRAM */
+#define CONFIG_SDRAM0_BASE     0x80000000
+#define CONFIG_SDRAM0_SIZE     0x20000000
+#define CONFIG_SDRAM1_BASE     0xa0000000
+#define CONFIG_SDRAM1_SIZE     0x20000000
+#endif
+
 #if defined(CONFIG_MACH_PH1_SLD8)
 #define CONFIG_DDR_NUM_CH0 1
 #define CONFIG_DDR_NUM_CH1 1
@@ -177,8 +191,13 @@
 
 #define CONFIG_NAND_DENALI_ECC_SIZE                    1024
 
+#ifdef CONFIG_MACH_PH1_SLD3
+#define CONFIG_SYS_NAND_REGS_BASE                      0xf8100000
+#define CONFIG_SYS_NAND_DATA_BASE                      0xf8000000
+#else
 #define CONFIG_SYS_NAND_REGS_BASE                      0x68100000
 #define CONFIG_SYS_NAND_DATA_BASE                      0x68000000
+#endif
 
 #define CONFIG_SYS_NAND_BASE           (CONFIG_SYS_NAND_DATA_BASE + 0x10)
 
@@ -221,7 +240,7 @@
        "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
        "tftpboot; bootm;"
 
-#define CONFIG_BOOTARGS                " user_debug=0x1f init=/sbin/init"
+#define CONFIG_BOOTARGS                " earlyprintk loglevel=8"
 
 #ifdef CONFIG_FIT
 #define CONFIG_BOOTFILE                        "fitImage"
@@ -269,7 +288,7 @@
        "netdev=eth0\0"                                         \
        "verify=n\0"                                            \
        "nandupdate=nand erase 0 0x00100000 &&"                 \
-               "tftpboot u-boot-spl.bin &&"                    \
+               "tftpboot u-boot-spl-dtb.bin &&"                \
                "nand write $loadaddr 0 0x00010000 &&"          \
                "tftpboot u-boot-dtb.img &&"                    \
                "nand write $loadaddr 0x00010000 0x000f0000\0"  \
@@ -280,10 +299,6 @@
 /* Open Firmware flat tree */
 #define CONFIG_OF_LIBFDT
 
-#define CONFIG_LIB_RAND
-
-#define CONFIG_HAVE_ARM_SECURE
-
 /* Memory Size & Mapping */
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SDRAM0_BASE
 
@@ -296,7 +311,8 @@
 #define CONFIG_SYS_SDRAM_SIZE  (CONFIG_SDRAM0_SIZE)
 #endif
 
-#if defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8)
+#if defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_LD4) || \
+       defined(CONFIG_MACH_PH1_SLD8)
 #define CONFIG_SPL_TEXT_BASE           0x00040000
 #endif
 #if defined(CONFIG_MACH_PH1_PRO4)