sniper: Pass serial number through ATAG

[karo-tx-uboot.git] / include / fsl_sec.h

diff --git a/include/fsl_sec.h b/include/fsl_sec.h
index b6e6f04a34ce52d0da088b84f19ac5bdf2ae0ebf..5e47e3a8d4f33ae7bc49618a16f58dd53824fb4a 100644 (file)
--- a/include/fsl_sec.h
+++ b/include/fsl_sec.h
@@ -32,10 +32,20 @@
 /* RNG4 TRNG test registers */
 struct rng4tst {
 #define RTMCTL_PRGM 0x00010000 /* 1 -> program mode, 0 -> run mode */
+#define RTMCTL_SAMP_MODE_VON_NEUMANN_ES_SC     0 /* use von Neumann data in
+                                                   both entropy shifter and
+                                                   statistical checker */
+#define RTMCTL_SAMP_MODE_RAW_ES_SC             1 /* use raw data in both
+                                                   entropy shifter and
+                                                   statistical checker */
+#define RTMCTL_SAMP_MODE_VON_NEUMANN_ES_RAW_SC 2 /* use von Neumann data in
+                                                   entropy shifter, raw data
+                                                   in statistical checker */
+#define RTMCTL_SAMP_MODE_INVALID               3 /* invalid combination */
        u32 rtmctl;             /* misc. control register */
        u32 rtscmisc;           /* statistical check misc. register */
        u32 rtpkrrng;           /* poker range register */
-#define RTSDCTL_ENT_DLY_MIN    1200
+#define RTSDCTL_ENT_DLY_MIN    3200
 #define RTSDCTL_ENT_DLY_MAX    12800
        union {
                u32 rtpkrmax;   /* PRGM=1: poker max. limit register */
@@ -49,6 +59,7 @@ struct rng4tst {
                u32 rttotsam;   /* PRGM=0: total samples register */
        };
        u32 rtfreqmin;          /* frequency count min. limit register */
+#define RTFRQMAX_DISABLE       (1 << 20)
        union {
                u32 rtfreqmax;  /* PRGM=1: freq. count max. limit register */
                u32 rtfreqcnt;  /* PRGM=0: freq. count register */
@@ -135,7 +146,7 @@ typedef struct ccsr_sec {
 #define CONFIG_JRSTARTR_JR0            0x00000001
 
 struct jr_regs {
-#ifdef CONFIG_SYS_FSL_SEC_LE
+#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_SOC_MX6)
        u32 irba_l;
        u32 irba_h;
 #else
@@ -148,7 +159,7 @@ struct jr_regs {
        u32 irsa;
        u32 rsvd3;
        u32 irja;
-#ifdef CONFIG_SYS_FSL_SEC_LE
+#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_SOC_MX6)
        u32 orba_l;
        u32 orba_h;
 #else
@@ -180,7 +191,7 @@ struct jr_regs {
  * related information
  */
 struct sg_entry {
-#ifdef CONFIG_SYS_FSL_SEC_LE
+#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_SOC_MX6)
        uint32_t addr_lo;       /* Memory Address - lo */
        uint16_t addr_hi;       /* Memory Address of start of buffer - hi */
        uint16_t reserved_zero;
@@ -201,7 +212,79 @@ struct sg_entry {
 #define SG_ENTRY_OFFSET_SHIFT  0
 };
 
+#ifdef CONFIG_SOC_MX6
+/* CAAM Job Ring 0 Registers */
+/* Secure Memory Partition Owner register */
+#define SMCSJR_PO              (3 << 6)
+/* JR Allocation Error */
+#define SMCSJR_AERR            (3 << 12)
+/* Secure memory partition 0 page 0 owner register */
+#define CAAM_SMPO_0            CONFIG_SYS_FSL_SEC_ADDR + 0x1FBC
+/* Secure memory command register */
+#define CAAM_SMCJR0            CONFIG_SYS_FSL_SEC_ADDR + 0x10f4
+/* Secure memory command status register */
+#define CAAM_SMCSJR0           CONFIG_SYS_FSL_SEC_ADDR + 0x10fc
+/* Secure memory access permissions register */
+#define CAAM_SMAPJR0(y)        (CONFIG_SYS_FSL_SEC_ADDR + 0x1104 + y*16)
+/* Secure memory access group 2 register */
+#define CAAM_SMAG2JR0(y)       (CONFIG_SYS_FSL_SEC_ADDR + 0x1108 + y*16)
+/* Secure memory access group 1 register */
+#define CAAM_SMAG1JR0(y)       (CONFIG_SYS_FSL_SEC_ADDR + 0x110C + y*16)
+
+/* Commands and macros for secure memory */
+#define CMD_PAGE_ALLOC         0x1
+#define CMD_PAGE_DEALLOC       0x2
+#define CMD_PART_DEALLOC       0x3
+#define CMD_INQUIRY            0x5
+#define CMD_COMPLETE           (3 << 14)
+#define PAGE_AVAILABLE         0
+#define PAGE_OWNED             (3 << 6)
+#define PAGE(x)                        (x << 16)
+#define PARTITION(x)           (x << 8)
+#define PARTITION_OWNER(x)     (0x3 << (x*2))
+
+/* Address of secure 4kbyte pages */
+#define SEC_MEM_PAGE0          CAAM_ARB_BASE_ADDR
+#define SEC_MEM_PAGE1          (CAAM_ARB_BASE_ADDR + 0x1000)
+#define SEC_MEM_PAGE2          (CAAM_ARB_BASE_ADDR + 0x2000)
+#define SEC_MEM_PAGE3          (CAAM_ARB_BASE_ADDR + 0x3000)
+
+#define JR_MID                 2               /* Matches ROM configuration */
+#define KS_G1                  (1 << JR_MID)   /* CAAM only */
+#define PERM                   0x0000B008      /* Clear on release, lock SMAP
+                                                * lock SMAG group 1 Blob */
+
+#define BLOB_SIZE(x)       (x + 32 + 16) /* Blob buffer size */
+
+/* HAB WRAPPED KEY header */
+#define WRP_HDR_SIZE           0x08
+#define HDR_TAG                        0x81
+#define HDR_PAR                        0x41
+/* HAB WRAPPED KEY Data */
+#define HAB_MOD                        0x66
+#define HAB_ALG                        0x55
+#define HAB_FLG                        0x00
+
+/* Partition and Page IDs */
+#define PARTITION_1    1
+#define PAGE_1                 1
+
+#define ERROR_IN_PAGE_ALLOC    1
+#define ECONSTRJDESC   -1
+
+#endif
+
 int sec_init(void);
+
+/* blob_dek:
+ * Encapsulates the src in a secure blob and stores it dst
+ * @src: reference to the plaintext
+ * @dst: reference to the output adrress
+ * @len: size in bytes of src
+ * @return: 0 on success, error otherwise
+ */
+int blob_dek(const u8 *src, u8 *dst, u8 len);
+
 #endif
 
 #endif /* __FSL_SEC_H */