]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - nand_spl/nand_boot.c
NAND: Add 16bit NAND support for the NDFC
[karo-tx-uboot.git] / nand_spl / nand_boot.c
index 4a968784e757798992499f99387a04d11e36cf35..4683c7c52c33e216d7c64a677ee9322250e16b23 100644 (file)
@@ -22,9 +22,6 @@
 #include <nand.h>
 #include <asm/io.h>
 
-#define CONFIG_SYS_NAND_READ_DELAY \
-       { volatile int dummy; int i; for (i=0; i<10000; i++) dummy = i; }
-
 static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
 
 #if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
@@ -36,11 +33,8 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8
        struct nand_chip *this = mtd->priv;
        int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
 
-       if (this->dev_ready)
-               while (!this->dev_ready(mtd))
-                       ;
-       else
-               CONFIG_SYS_NAND_READ_DELAY;
+       while (!this->dev_ready(mtd))
+               ;
 
        /* Begin command latch cycle */
        this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
@@ -61,11 +55,8 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8
        /*
         * Wait a while for the data to be ready
         */
-       if (this->dev_ready)
-               while (!this->dev_ready(mtd))
-                       ;
-       else
-               CONFIG_SYS_NAND_READ_DELAY;
+       while (!this->dev_ready(mtd))
+               ;
 
        return 0;
 }
@@ -77,12 +68,11 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8
 {
        struct nand_chip *this = mtd->priv;
        int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+       void (*hwctrl)(struct mtd_info *mtd, int cmd,
+                       unsigned int ctrl) = this->cmd_ctrl;
 
-       if (this->dev_ready)
-               while (!this->dev_ready(mtd))
-                       ;
-       else
-               CONFIG_SYS_NAND_READ_DELAY;
+       while (!this->dev_ready(mtd))
+               ;
 
        /* Emulate NAND_CMD_READOOB */
        if (cmd == NAND_CMD_READOOB) {
@@ -95,34 +85,31 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8
                offs >>= 1;
 
        /* Begin command latch cycle */
-       this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
+       hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
        /* Set ALE and clear CLE to start address cycle */
        /* Column address */
-       this->cmd_ctrl(mtd, offs & 0xff,
+       hwctrl(mtd, offs & 0xff,
                       NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
-       this->cmd_ctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
+       hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
        /* Row address */
-       this->cmd_ctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
-       this->cmd_ctrl(mtd, ((page_addr >> 8) & 0xff),
+       hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
+       hwctrl(mtd, ((page_addr >> 8) & 0xff),
                       NAND_CTRL_ALE); /* A[27:20] */
 #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
        /* One more address cycle for devices > 128MiB */
-       this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
+       hwctrl(mtd, (page_addr >> 16) & 0x0f,
                       NAND_CTRL_ALE); /* A[31:28] */
 #endif
        /* Latch in address */
-       this->cmd_ctrl(mtd, NAND_CMD_READSTART,
+       hwctrl(mtd, NAND_CMD_READSTART,
                       NAND_CTRL_CLE | NAND_CTRL_CHANGE);
-       this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
+       hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
 
        /*
         * Wait a while for the data to be ready
         */
-       if (this->dev_ready)
-               while (!this->dev_ready(mtd))
-                       ;
-       else
-               CONFIG_SYS_NAND_READ_DELAY;
+       while (!this->dev_ready(mtd))
+               ;
 
        return 0;
 }
@@ -135,10 +122,15 @@ static int nand_is_bad_block(struct mtd_info *mtd, int block)
        nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
 
        /*
-        * Read one byte
+        * Read one byte (or two if it's a 16 bit chip).
         */
-       if (readb(this->IO_ADDR_R) != 0xff)
-               return 1;
+       if (this->options & NAND_BUSWIDTH_16) {
+               if (readw(this->IO_ADDR_R) != 0xffff)
+                       return 1;
+       } else {
+               if (readb(this->IO_ADDR_R) != 0xff)
+                       return 1;
+       }
 
        return 0;
 }
@@ -244,6 +236,7 @@ void nand_boot(void)
        nand_info.priv = &nand_chip;
        nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void  __iomem *)CONFIG_SYS_NAND_BASE;
        nand_chip.dev_ready = NULL;     /* preset to NULL */
+       nand_chip.options = 0;
        board_nand_init(&nand_chip);
 
        if (nand_chip.select_chip)