arm: mx5: clock: add support for changing CPU clock via cmdline

[karo-tx-uboot.git] / nand_spl / nand_boot_fsl_elbc.c

diff --git a/nand_spl/nand_boot_fsl_elbc.c b/nand_spl/nand_boot_fsl_elbc.c
index 53392243d7697304d152f946de2de8afd2be9ddb..03e25f37ea7f478548083999c07a679cb280e415 100644 (file)
--- a/nand_spl/nand_boot_fsl_elbc.c
+++ b/nand_spl/nand_boot_fsl_elbc.c
@@ -7,25 +7,11 @@
  * Copyright (c) 2008 Freescale Semiconductor, Inc.
  * Author: Scott Wood <scottwood@freescale.com>
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <asm/io.h>
-#include <asm/immap_83xx.h>
 #include <asm/fsl_lbc.h>
 #include <linux/mtd/nand.h>
 
@@ -33,7 +19,7 @@
 
 static void nand_wait(void)
 {
-       lbus83xx_t *regs = (lbus83xx_t *)(CFG_IMMR + 0x5000);
+       fsl_lbc_t *regs = LBC_BASE_ADDR;
 
        for (;;) {
                uint32_t status = in_be32(&regs->ltesr);
@@ -50,13 +36,13 @@ static void nand_wait(void)
 
 static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
 {
-       lbus83xx_t *regs = (lbus83xx_t *)(CFG_IMMR + 0x5000);
-       uchar *buf = (uchar *)CFG_NAND_BASE;
-       int large = in_be32(&regs->bank[0].or) & OR_FCM_PGS;
-       int block_shift = large ? 17 : 14;
-       int block_size = 1 << block_shift;
-       int page_size = large ? 2048 : 512;
-       int bad_marker = large ? page_size + 0 : page_size + 5;
+       fsl_lbc_t *regs = LBC_BASE_ADDR;
+       uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
+       const int large = CONFIG_SYS_NAND_OR_PRELIM & OR_FCM_PGS;
+       const int block_shift = large ? 17 : 14;
+       const int block_size = 1 << block_shift;
+       const int page_size = large ? 2048 : 512;
+       const int bad_marker = large ? page_size + 0 : page_size + 5;
        int fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT) | 2;
        int pos = 0;
 
@@ -67,39 +53,42 @@ static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
 
        if (large) {
                fmr |= FMR_ECCM;
-               out_be32(&regs->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
-                                    (NAND_CMD_READSTART << FCR_CMD1_SHIFT));
-               out_be32(&regs->fir,
-                        (FIR_OP_CW0 << FIR_OP0_SHIFT) |
-                        (FIR_OP_CA  << FIR_OP1_SHIFT) |
-                        (FIR_OP_PA  << FIR_OP2_SHIFT) |
-                        (FIR_OP_CW1 << FIR_OP3_SHIFT) |
-                        (FIR_OP_RBW << FIR_OP4_SHIFT));
+               __raw_writel((NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
+                       (NAND_CMD_READSTART << FCR_CMD1_SHIFT),
+                       &regs->fcr);
+               __raw_writel(
+                       (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+                       (FIR_OP_CA  << FIR_OP1_SHIFT) |
+                       (FIR_OP_PA  << FIR_OP2_SHIFT) |
+                       (FIR_OP_CW1 << FIR_OP3_SHIFT) |
+                       (FIR_OP_RBW << FIR_OP4_SHIFT),
+                       &regs->fir);
        } else {
-               out_be32(&regs->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT);
-               out_be32(&regs->fir,
-                        (FIR_OP_CW0 << FIR_OP0_SHIFT) |
-                        (FIR_OP_CA  << FIR_OP1_SHIFT) |
-                        (FIR_OP_PA  << FIR_OP2_SHIFT) |
-                        (FIR_OP_RBW << FIR_OP3_SHIFT));
+               __raw_writel(NAND_CMD_READ0 << FCR_CMD0_SHIFT, &regs->fcr);
+               __raw_writel(
+                       (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+                       (FIR_OP_CA  << FIR_OP1_SHIFT) |
+                       (FIR_OP_PA  << FIR_OP2_SHIFT) |
+                       (FIR_OP_RBW << FIR_OP3_SHIFT),
+                       &regs->fir);
        }
 
-       out_be32(&regs->fbcr, 0);
-       clrsetbits_be32(&regs->bank[0].br, BR_DECC, BR_DECC_CHK_GEN);
+       __raw_writel(0, &regs->fbcr);
 
        while (pos < uboot_size) {
                int i = 0;
-               out_be32(&regs->fbar, offs >> block_shift);
+               __raw_writel(offs >> block_shift, &regs->fbar);
 
                do {
                        int j;
                        unsigned int page_offs = (offs & (block_size - 1)) << 1;
 
-                       out_be32(&regs->ltesr, ~0);
-                       out_be32(&regs->lteatr, 0);
-                       out_be32(&regs->fpar, page_offs);
-                       out_be32(&regs->fmr, fmr);
-                       out_be32(&regs->lsor, 0);
+                       __raw_writel(~0, &regs->ltesr);
+                       __raw_writel(0, &regs->lteatr);
+                       __raw_writel(page_offs, &regs->fpar);
+                       __raw_writel(fmr, &regs->fmr);
+                       sync();
+                       __raw_writel(0, &regs->lsor);
                        nand_wait();
 
                        page_offs %= WINDOW_SIZE;
@@ -120,7 +109,7 @@ static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
 
                        pos += page_size;
                        offs += page_size;
-               } while (offs & (block_size - 1));
+               } while ((offs & (block_size - 1)) && (pos < uboot_size));
        }
 }
 
@@ -136,13 +125,18 @@ void nand_boot(void)
        /*
         * Load U-Boot image from NAND into RAM
         */
-       nand_load(CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE,
-                 (uchar *)CFG_NAND_U_BOOT_DST);
+       nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
+                 (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
 
        /*
         * Jump to U-Boot image
         */
        puts("transfering control\n");
-       uboot = (void *)CFG_NAND_U_BOOT_START;
+       /*
+        * Clean d-cache and invalidate i-cache, to
+        * make sure that no stale data is executed.
+        */
+       flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE);
+       uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
        uboot();
 }