X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=README;h=a5c3e8dcf7f349badd7295f261ea3dcf7a51c748;hp=3d81092057bcaf0a77b6f5112d37d35eccea9613;hb=aaf5e825606a70ddc8fca8e366d8c16a6fd3cc7c;hpb=d6ed3222229974682799bd2083f2ceeac6f912b1 diff --git a/README b/README index 3d81092057..a5c3e8dcf7 100644 --- a/README +++ b/README @@ -1,24 +1,8 @@ # -# (C) Copyright 2000 - 2012 +# (C) Copyright 2000 - 2013 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA +# SPDX-License-Identifier: GPL-2.0+ # Summary: @@ -413,11 +397,22 @@ The following options need to be configured: See Freescale App Note 4493 for more information about this erratum. + CONFIG_A003399_NOR_WORKAROUND + Enables a workaround for IFC erratum A003399. It is only + requred during NOR boot. + CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY This is the value to write into CCSR offset 0x18600 according to the A004510 workaround. + CONFIG_SYS_FSL_DSP_M2_RAM_ADDR + This value denotes start offset of M2 memory + which is directly connected to the DSP core. + + CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT + This value denotes start offset of DSP CCSR space. + - Generic CPU options: CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN @@ -843,6 +838,7 @@ The following options need to be configured: CONFIG_CMD_FDOS * Dos diskette Support CONFIG_CMD_FLASH flinfo, erase, protect CONFIG_CMD_FPGA FPGA device initialization support + CONFIG_CMD_FUSE * Device fuse support CONFIG_CMD_GETTIME * Get time since boot CONFIG_CMD_GO * the 'go' command (exec code) CONFIG_CMD_GREPENV * search environment @@ -852,7 +848,7 @@ The following options need to be configured: CONFIG_CMD_IDE * IDE harddisk support CONFIG_CMD_IMI iminfo CONFIG_CMD_IMLS List all images found in NOR flash - CONFIG_CMD_IMLS_NAND List all images found in NAND flash + CONFIG_CMD_IMLS_NAND * List all images found in NAND flash CONFIG_CMD_IMMAP * IMMR dump support CONFIG_CMD_IMPORTENV * import an environment CONFIG_CMD_INI * import data from an ini file into the env @@ -860,23 +856,24 @@ The following options need to be configured: CONFIG_CMD_ITEST Integer/string test of 2 values CONFIG_CMD_JFFS2 * JFFS2 Support CONFIG_CMD_KGDB * kgdb - CONFIG_CMD_LDRINFO ldrinfo (display Blackfin loader) + CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader) CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration (169.254.*.*) CONFIG_CMD_LOADB loadb CONFIG_CMD_LOADS loads - CONFIG_CMD_MD5SUM print md5 message digest + CONFIG_CMD_MD5SUM * print md5 message digest (requires CONFIG_CMD_MEMORY and CONFIG_MD5) CONFIG_CMD_MEMINFO * Display detailed memory information CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base, loop, loopw - CONFIG_CMD_MEMTEST mtest + CONFIG_CMD_MEMTEST * mtest CONFIG_CMD_MISC Misc functions like sleep etc CONFIG_CMD_MMC * MMC memory mapped support CONFIG_CMD_MII * MII utility commands CONFIG_CMD_MTDPARTS * MTD partition support CONFIG_CMD_NAND * NAND support CONFIG_CMD_NET bootp, tftpboot, rarpboot + CONFIG_CMD_NFS NFS support CONFIG_CMD_PCA953X * PCA953x I2C gpio commands CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command CONFIG_CMD_PCI * pciinfo @@ -895,7 +892,7 @@ The following options need to be configured: CONFIG_CMD_SETGETDCR Support for DCR Register access (4xx only) CONFIG_CMD_SF * Read/write/erase SPI NOR flash - CONFIG_CMD_SHA1SUM print sha1 memory digest + CONFIG_CMD_SHA1SUM * print sha1 memory digest (requires CONFIG_CMD_MEMORY) CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x CONFIG_CMD_SOURCE "source" command Support @@ -907,6 +904,7 @@ The following options need to be configured: CONFIG_CMD_USB * USB support CONFIG_CMD_CDP * Cisco Discover Protocol support CONFIG_CMD_MFSL * Microblaze FSL support + CONFIG_CMD_XIMG Load part of Multi Image EXAMPLE: If you want all functions except of network @@ -1208,7 +1206,26 @@ The following options need to be configured: If this option is set, the driver enables cache flush. - TPM Support: - CONFIG_GENERIC_LPC_TPM + CONFIG_TPM + Support TPM devices. + + CONFIG_TPM_TIS_I2C + Support for i2c bus TPM devices. Only one device + per system is supported at this time. + + CONFIG_TPM_TIS_I2C_BUS_NUMBER + Define the the i2c bus number for the TPM device + + CONFIG_TPM_TIS_I2C_SLAVE_ADDRESS + Define the TPM's address on the i2c bus + + CONFIG_TPM_TIS_I2C_BURST_LIMITATION + Define the burst count bytes upper limit + + CONFIG_TPM_ATMEL_TWI + Support for Atmel TWI TPM device. Requires I2C support. + + CONFIG_TPM_TIS_LPC Support for generic parallel port TPM devices. Only one device per system is supported at this time. @@ -1217,6 +1234,20 @@ The following options need to be configured: to. Contemporary x86 systems usually map it at 0xfed40000. + CONFIG_CMD_TPM + Add tpm monitor functions. + Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also + provides monitor access to authorized functions. + + CONFIG_TPM + Define this to enable the TPM support library which provides + functional interfaces to some TPM commands. + Requires support for a TPM device. + + CONFIG_TPM_AUTH_SESSIONS + Define this to enable authorized functions in the TPM library. + Requires CONFIG_TPM and CONFIG_SHA1. + - USB Support: At the moment only the UHCI host controller is supported (PIP405, MIP405, MPC5200); define @@ -1244,6 +1275,9 @@ The following options need to be configured: CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the txfilltuning field in the EHCI controller on reset. + CONFIG_USB_HUB_MIN_POWER_ON_DELAY defines the minimum + interval for usb hub power-on delay.(minimum 100msec) + - USB Device: Define the below if you wish to use the USB console. Once firmware is rebuilt from a serial console issue the @@ -1359,6 +1393,12 @@ The following options need to be configured: CONFIG_DFU_NAND This enables support for exposing NAND devices via DFU. + CONFIG_SYS_DFU_DATA_BUF_SIZE + Dfu transfer uses a buffer before writing data to the + raw storage device. Make the size (in bytes) of this buffer + configurable. The size of this buffer is also configurable + through the "dfu_bufsiz" environment variable. + CONFIG_SYS_DFU_MAX_FILE_SIZE When updating files rather than the raw storage device, we use a static buffer to copy the file into and then write @@ -1412,6 +1452,11 @@ CBFS (Coreboot Filesystem) support Export function i8042_kbd_init, i8042_tstc and i8042_getc for cfb_console. Supports cursor blinking. + CONFIG_CROS_EC_KEYB + Enables a Chrome OS keyboard using the CROS_EC interface. + This uses CROS_EC to communicate with a second microcontroller + which provides key scans on request. + - Video support: CONFIG_VIDEO @@ -1604,14 +1649,6 @@ CBFS (Coreboot Filesystem) support => vertically centered image at x = dspWidth - bmpWidth - 9 - CONFIG_SPLASH_SCREEN_PREPARE - - If this option is set then the board_splash_screen_prepare() - function, which must be defined in your code, is called as part - of the splash screen display sequence. It gives the board an - opportunity to prepare the splash image data before it is - processed and sent to the frame buffer by U-Boot. - - Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP If this option is set, additionally to standard BMP @@ -1891,11 +1928,114 @@ CBFS (Coreboot Filesystem) support on those systems that support this (optional) feature, like the TQM8xxL modules. -- I2C Support: CONFIG_HARD_I2C | CONFIG_SOFT_I2C - - These enable I2C serial bus commands. Defining either of - (but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will - include the appropriate I2C driver for the selected CPU. +- I2C Support: CONFIG_SYS_I2C + + This enable the NEW i2c subsystem, and will allow you to use + i2c commands at the u-boot command line (as long as you set + CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c + based realtime clock chips or other i2c devices. See + common/cmd_i2c.c for a description of the command line + interface. + + ported i2c driver to the new framework: + - drivers/i2c/soft_i2c.c: + - activate first bus with CONFIG_SYS_I2C_SOFT define + CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE + for defining speed and slave address + - activate second bus with I2C_SOFT_DECLARATIONS2 define + CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2 + for defining speed and slave address + - activate third bus with I2C_SOFT_DECLARATIONS3 define + CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3 + for defining speed and slave address + - activate fourth bus with I2C_SOFT_DECLARATIONS4 define + CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4 + for defining speed and slave address + + - drivers/i2c/fsl_i2c.c: + - activate i2c driver with CONFIG_SYS_I2C_FSL + define CONFIG_SYS_FSL_I2C_OFFSET for setting the register + offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and + CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first + bus. + - If your board supports a second fsl i2c bus, define + CONFIG_SYS_FSL_I2C2_OFFSET for the register offset + CONFIG_SYS_FSL_I2C2_SPEED for the speed and + CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the + second bus. + + - drivers/i2c/tegra_i2c.c: + - activate this driver with CONFIG_SYS_I2C_TEGRA + - This driver adds 4 i2c buses with a fix speed from + 100000 and the slave addr 0! + + - drivers/i2c/ppc4xx_i2c.c + - activate this driver with CONFIG_SYS_I2C_PPC4XX + - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0 + - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1 + + additional defines: + + CONFIG_SYS_NUM_I2C_BUSES + Hold the number of i2c busses you want to use. If you + don't use/have i2c muxes on your i2c bus, this + is equal to CONFIG_SYS_NUM_I2C_ADAPTERS, and you can + omit this define. + + CONFIG_SYS_I2C_DIRECT_BUS + define this, if you don't use i2c muxes on your hardware. + if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can + omit this define. + + CONFIG_SYS_I2C_MAX_HOPS + define how many muxes are maximal consecutively connected + on one i2c bus. If you not use i2c muxes, omit this + define. + + CONFIG_SYS_I2C_BUSES + hold a list of busses you want to use, only used if + CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example + a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and + CONFIG_SYS_NUM_I2C_BUSES = 9: + + CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \ + {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \ + {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \ + {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \ + {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \ + {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \ + {1, {I2C_NULL_HOP}}, \ + {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \ + {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \ + } + + which defines + bus 0 on adapter 0 without a mux + bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1 + bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2 + bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3 + bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4 + bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5 + bus 6 on adapter 1 without a mux + bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1 + bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2 + + If you do not have i2c muxes on your board, omit this define. + +- Legacy I2C Support: CONFIG_HARD_I2C + + NOTE: It is intended to move drivers to CONFIG_SYS_I2C which + provides the following compelling advantages: + + - more than one i2c adapter is usable + - approved multibus support + - better i2c mux support + + ** Please consider updating your I2C driver now. ** + + These enable legacy I2C serial bus commands. Defining + CONFIG_HARD_I2C will include the appropriate I2C driver + for the selected CPU. This will allow you to use i2c commands at the u-boot command line (as long as you set CONFIG_CMD_I2C in @@ -1905,12 +2045,8 @@ CBFS (Coreboot Filesystem) support CONFIG_HARD_I2C selects a hardware I2C controller. - CONFIG_SOFT_I2C configures u-boot to use a software (aka - bit-banging) driver instead of CPM or similar hardware - support for I2C. - There are several other quantities that must also be - defined when you define CONFIG_HARD_I2C or CONFIG_SOFT_I2C. + defined when you define CONFIG_HARD_I2C. In both cases you will need to define CONFIG_SYS_I2C_SPEED to be the frequency (in Hz) at which you wish your i2c bus @@ -1932,7 +2068,7 @@ CBFS (Coreboot Filesystem) support That's all that's required for CONFIG_HARD_I2C. - If you use the software i2c interface (CONFIG_SOFT_I2C) + If you use the software i2c interface (CONFIG_SYS_I2C_SOFT) then the following macros need to be defined (examples are from include/configs/lwmon.h): @@ -2083,58 +2219,6 @@ CBFS (Coreboot Filesystem) support If not defined, then U-Boot uses predefined value for specified DTT device. - CONFIG_FSL_I2C - - Define this option if you want to use Freescale's I2C driver in - drivers/i2c/fsl_i2c.c. - - CONFIG_I2C_MUX - - Define this option if you have I2C devices reached over 1 .. n - I2C Muxes like the pca9544a. This option addes a new I2C - Command "i2c bus [muxtype:muxaddr:muxchannel]" which adds a - new I2C Bus to the existing I2C Busses. If you select the - new Bus with "i2c dev", u-bbot sends first the commandos for - the muxes to activate this new "bus". - - CONFIG_I2C_MULTI_BUS must be also defined, to use this - feature! - - Example: - Adding a new I2C Bus reached over 2 pca9544a muxes - The First mux with address 70 and channel 6 - The Second mux with address 71 and channel 4 - - => i2c bus pca9544a:70:6:pca9544a:71:4 - - Use the "i2c bus" command without parameter, to get a list - of I2C Busses with muxes: - - => i2c bus - Busses reached over muxes: - Bus ID: 2 - reached over Mux(es): - pca9544a@70 ch: 4 - Bus ID: 3 - reached over Mux(es): - pca9544a@70 ch: 6 - pca9544a@71 ch: 4 - => - - If you now switch to the new I2C Bus 3 with "i2c dev 3" - u-boot first sends the command to the mux@70 to enable - channel 6, and then the command to the mux@71 to enable - the channel 4. - - After that, you can use the "normal" i2c commands as - usual to communicate with your I2C devices behind - the 2 muxes. - - This option is actually implemented for the bitbanging - algorithm in common/soft_i2c.c and for the Hardware I2C - Bus on the MPC8260. But it should be not so difficult - to add this option to other architectures. - CONFIG_SOFT_I2C_READ_REPEATED_START defining this will force the i2c_read() function in @@ -2489,6 +2573,11 @@ CBFS (Coreboot Filesystem) support Define this option to include a destructive SPI flash test ('sf test'). + CONFIG_SPI_FLASH_BAR Ban/Extended Addr Reg + + Define this option to use the Bank addr/Extended addr + support on SPI flashes which has size > 16Mbytes. + - SystemACE Support: CONFIG_SYSTEMACE @@ -2540,6 +2629,16 @@ CBFS (Coreboot Filesystem) support Note: There is also a sha1sum command, which should perhaps be deprecated in favour of 'hash sha1'. +- Signing support: + CONFIG_RSA + + This enables the RSA algorithm used for FIT image verification + in U-Boot. See doc/uImage/signature for more information. + + The signing part is build into mkimage regardless of this + option. + + - Show boot progress: CONFIG_SHOW_BOOT_PROGRESS @@ -2764,6 +2863,11 @@ FIT uImage format: most specific compatibility entry of U-Boot's fdt's root node. The order of entries in the configuration's fdt is ignored. + CONFIG_FIT_SIGNATURE + This option enables signature verification of FIT uImages, + using a hash signed and verified using RSA. See + doc/uImage.FIT/signature.txt for more details. + - Standalone program support: CONFIG_STANDALONE_LOAD_ADDR @@ -2915,12 +3019,30 @@ FIT uImage format: Address, size and partition on the MMC to load U-Boot from when the MMC is being used in raw mode. + CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR + Sector to load kernel uImage from when MMC is being + used in raw mode (for Falcon mode) + + CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR, + CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS + Sector and number of sectors to load kernel argument + parameters from when MMC is being used in raw mode + (for falcon mode) + CONFIG_SPL_FAT_SUPPORT Support for fs/fat/libfat.o in SPL binary CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME Filename to read to load U-Boot when reading from FAT + CONFIG_SPL_FAT_LOAD_KERNEL_NAME + Filename to read to load kernel uImage when reading + from FAT (for Falcon mode) + + CONFIG_SPL_FAT_LOAD_ARGS_NAME + Filename to read to load kernel argument parameters + when reading from FAT (for Falcon mode) + CONFIG_SPL_MPC83XX_WAIT_FOR_NAND Set this for NAND SPL on PPC mpc83xx targets, so that start.S waits for the rest of the SPL to load before @@ -2984,6 +3106,14 @@ FIT uImage format: CONFIG_SPL_LIBGENERIC_SUPPORT Support for lib/libgeneric.o in SPL binary + CONFIG_SPL_ENV_SUPPORT + Support for the environment operating in SPL binary + + CONFIG_SPL_NET_SUPPORT + Support for the net/libnet.o in SPL binary. + It conflicts with SPL env from storage medium specified by + CONFIG_ENV_IS_xxx but CONFIG_ENV_IS_NOWHERE + CONFIG_SPL_PAD_TO Image offset to which the SPL should be padded before appending the SPL payload. By default, this is defined as @@ -3345,6 +3475,10 @@ Configuration Settings: offset _bss_start_ofs from CONFIG_SYS_TEXT_BASE, rather than directly. You should not need to touch this setting. +- CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only) + This is set by OMAP boards for the max time that reset should + be asserted. See doc/README.omap-reset-time for details on how + the value can be calulated on a given board. The following definitions that deal with the placement and management of environment data (variable area); in general, we support the @@ -3501,7 +3635,7 @@ to save the current settings. I2C muxes, you can define here, how to reach this EEPROM. For example: - #define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0" + #define CONFIG_I2C_ENV_EEPROM_BUS 1 EEPROM which holds the environment, is reached over a pca9547 i2c mux with address 0x70, channel 3. @@ -3606,6 +3740,57 @@ but it can not erase, write this NOR flash by SRIO or PCIE interface. You will probably want to define these to avoid a really noisy system when storing the env in UBI. +- CONFIG_ENV_IS_IN_MMC: + + Define this if you have an MMC device which you want to use for the + environment. + + - CONFIG_SYS_MMC_ENV_DEV: + + Specifies which MMC device the environment is stored in. + + - CONFIG_SYS_MMC_ENV_PART (optional): + + Specifies which MMC partition the environment is stored in. If not + set, defaults to partition 0, the user area. Common values might be + 1 (first MMC boot partition), 2 (second MMC boot partition). + + - CONFIG_ENV_OFFSET: + - CONFIG_ENV_SIZE: + + These two #defines specify the offset and size of the environment + area within the specified MMC device. + + If offset is positive (the usual case), it is treated as relative to + the start of the MMC partition. If offset is negative, it is treated + as relative to the end of the MMC partition. This can be useful if + your board may be fitted with different MMC devices, which have + different sizes for the MMC partitions, and you always want the + environment placed at the very end of the partition, to leave the + maximum possible space before it, to store other data. + + These two values are in units of bytes, but must be aligned to an + MMC sector boundary. + + - CONFIG_ENV_OFFSET_REDUND (optional): + + Specifies a second storage area, of CONFIG_ENV_SIZE size, used to + hold a redundant copy of the environment data. This provides a + valid backup copy in case the other copy is corrupted, e.g. due + to a power failure during a "saveenv" operation. + + This value may also be positive or negative; this is handled in the + same way as CONFIG_ENV_OFFSET. + + This value is also in units of bytes, but must also be aligned to + an MMC sector boundary. + + - CONFIG_ENV_SIZE_REDUND (optional): + + This value need not be set, even when CONFIG_ENV_OFFSET_REDUND is + set. If this value is set, it must be set to the same value as + CONFIG_ENV_SIZE. + - CONFIG_SYS_SPI_INIT_OFFSET Defines offset to the initial SPI buffer area in DPRAM. The @@ -3859,6 +4044,9 @@ Low Level (hardware related) configuration options: a second time. Useful for platforms that are pre-booted by coreboot or similar. +- CONFIG_PCI_INDIRECT_BRIDGE: + Enable support for indirect PCI bridges. + - CONFIG_SYS_SRIO: Chip has SRIO or not @@ -3868,6 +4056,9 @@ Low Level (hardware related) configuration options: - CONFIG_SRIO2: Board has SRIO 2 port available +- CONFIG_SRIO_PCIE_BOOT_MASTER + Board can support master function for Boot from SRIO and PCIE + - CONFIG_SYS_SRIOn_MEM_VIRT: Virtual Address of SRIO port 'n' memory region @@ -3978,6 +4169,11 @@ Low Level (hardware related) configuration options: that is executed before the actual U-Boot. E.g. when compiling a NAND SPL. +- CONFIG_SYS_MPC85XX_NO_RESETVEC + Only for 85xx systems. If this variable is specified, the section + .resetvec is not kept and the section .bootpg is placed in the + previous 4k of the .text section. + - CONFIG_ARCH_MAP_SYSMEM Generally U-Boot (and in particular the md command) uses effective address. It is therefore not necessary to regard @@ -5063,7 +5259,7 @@ On some platforms, it's possible to boot Linux zImage. This is done using the "bootz" command. The syntax of "bootz" command is the same as the syntax of "bootm" command. -Note, defining the CONFIG_SUPPORT_INITRD_RAW allows user to supply +Note, defining the CONFIG_SUPPORT_RAW_INITRD allows user to supply kernel with raw initrd images. The syntax is slightly different, the address of the initrd must be augmented by it's size, in the following format: ":".