X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=README;h=fe21bbf9824a72ace81215579f4028c5f91d1802;hp=a28ff133ee057c17af79a397e44325328f82dedf;hb=f3a70a92fe95ecdfb4a6ae2de4b00fc6cceccfec;hpb=a0573d19885236ba03d412f7788104f75f0dea64 diff --git a/README b/README index a28ff133ee..fe21bbf982 100644 --- a/README +++ b/README @@ -273,6 +273,75 @@ run some of U-Boot's tests. See board/sandbox/README.sandbox for more details. +Board Initialisation Flow: +-------------------------- + +This is the intended start-up flow for boards. This should apply for both +SPL and U-Boot proper (i.e. they both follow the same rules). At present SPL +mostly uses a separate code path, but the funtion names and roles of each +function are the same. Some boards or architectures may not conform to this. +At least most ARM boards which use CONFIG_SPL_FRAMEWORK conform to this. + +Execution starts with start.S with three functions called during init after +that. The purpose and limitations of each is described below. + +lowlevel_init(): + - purpose: essential init to permit execution to reach board_init_f() + - no global_data or BSS + - there is no stack (ARMv7 may have one but it will soon be removed) + - must not set up SDRAM or use console + - must only do the bare minimum to allow execution to continue to + board_init_f() + - this is almost never needed + - return normally from this function + +board_init_f(): + - purpose: set up the machine ready for running board_init_r(): + i.e. SDRAM and serial UART + - global_data is available + - stack is in SRAM + - BSS is not available, so you cannot use global/static variables, + only stack variables and global_data + + Non-SPL-specific notes: + - dram_init() is called to set up DRAM. If already done in SPL this + can do nothing + + SPL-specific notes: + - you can override the entire board_init_f() function with your own + version as needed. + - preloader_console_init() can be called here in extremis + - should set up SDRAM, and anything needed to make the UART work + - these is no need to clear BSS, it will be done by crt0.S + - must return normally from this function (don't call board_init_r() + directly) + +Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at +this point the stack and global_data are relocated to below +CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of +memory. + +board_init_r(): + - purpose: main execution, common code + - global_data is available + - SDRAM is available + - BSS is available, all static/global variables can be used + - execution eventually continues to main_loop() + + Non-SPL-specific notes: + - U-Boot is relocated to the top of memory and is now running from + there. + + SPL-specific notes: + - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and + CONFIG_SPL_STACK_R_ADDR points into SDRAM + - preloader_console_init() can be called here - typically this is + done by defining CONFIG_SPL_BOARD_INIT and then supplying a + spl_board_init() function containing this call + - loads U-Boot or (in falcon mode) Linux + + + Configuration Options: ---------------------- @@ -621,6 +690,26 @@ The following options need to be configured: exists, unlike the similar options in the Linux kernel. Do not set these options unless they apply! + COUNTER_FREQUENCY + Generic timer clock source frequency. + + COUNTER_FREQUENCY_REAL + Generic timer clock source frequency if the real clock is + different from COUNTER_FREQUENCY, and can only be determined + at run time. + + NOTE: The following can be machine specific errata. These + do have ability to provide rudimentary version and machine + specific checks, but expect no product checks. + CONFIG_ARM_ERRATA_798870 + +- Tegra SoC options: + CONFIG_TEGRA_SUPPORT_NON_SECURE + + Support executing U-Boot in non-secure (NS) mode. Certain + impossible actions will be skipped if the CPU is in NS mode, + such as ARM architectural timer initialization. + - Driver Model Driver model is a new framework for devices in U-Boot introduced in early 2014. U-Boot is being progressively @@ -734,7 +823,6 @@ The following options need to be configured: Enable removing of devices. - - Linux Kernel Interface: CONFIG_CLOCKS_IN_MHZ @@ -970,6 +1058,9 @@ The following options need to be configured: bytes are output before the console is initialised, the earlier bytes are discarded. + Note that when printing the buffer a copy is made on the + stack so CONFIG_PRE_CON_BUF_SZ must fit on the stack. + 'Sane' compilers will generate smaller code if CONFIG_PRE_CON_BUF_SZ is a power of 2 @@ -996,8 +1087,6 @@ The following options need to be configured: CONFIG_AUTOBOOT_PROMPT CONFIG_AUTOBOOT_DELAY_STR CONFIG_AUTOBOOT_STOP_STR - CONFIG_AUTOBOOT_DELAY_STR2 - CONFIG_AUTOBOOT_STOP_STR2 CONFIG_ZERO_BOOTDELAY_CHECK CONFIG_RESET_TO_RETRY @@ -1069,9 +1158,7 @@ The following options need to be configured: Monitor commands can be included or excluded from the build by using the #include files and #undef'ing unwanted - commands, or using - and augmenting with additional #define's - for wanted commands. + commands, or adding #define's for wanted commands. The default command configuration includes all commands except those marked below with a "*". @@ -1257,6 +1344,9 @@ The following options need to be configured: SoC, then define this variable and provide board specific code for the "hw_watchdog_reset" function. + CONFIG_AT91_HW_WDT_TIMEOUT + specify the timeout in seconds. default 2 seconds. + - U-Boot Version: CONFIG_VERSION_VARIABLE If this variable is defined, an environment variable @@ -1691,7 +1781,7 @@ The following options need to be configured: key for the Replay Protection Memory Block partition in eMMC. - USB Device Firmware Update (DFU) class support: - CONFIG_DFU_FUNCTION + CONFIG_USB_FUNCTION_DFU This enables the USB portion of the DFU USB class CONFIG_CMD_DFU @@ -1736,6 +1826,9 @@ The following options need to be configured: sending again an USB request to the device. - USB Device Android Fastboot support: + CONFIG_USB_FUNCTION_FASTBOOT + This enables the USB part of the fastboot gadget + CONFIG_CMD_FASTBOOT This enables the command "fastboot" which enables the Android fastboot mode for the platform's USB device. Fastboot is a USB @@ -1747,12 +1840,12 @@ The following options need to be configured: This enables support for booting images which use the Android image format header. - CONFIG_USB_FASTBOOT_BUF_ADDR + CONFIG_FASTBOOT_BUF_ADDR The fastboot protocol requires a large memory buffer for downloads. Define this to the starting RAM address to use for downloaded images. - CONFIG_USB_FASTBOOT_BUF_SIZE + CONFIG_FASTBOOT_BUF_SIZE The fastboot protocol requires a large memory buffer for downloads. This buffer should be as large as possible for a platform. Define this to the size available RAM for fastboot. @@ -1892,12 +1985,6 @@ CBFS (Coreboot Filesystem) support boot. See the documentation file README.video for a description of this variable. - CONFIG_VIDEO_VGA - - Enable the VGA video / BIOS for x86. The alternative if you - are using coreboot is to use the coreboot frame buffer - driver. - - Keyboard Support: CONFIG_KEYBOARD @@ -1974,6 +2061,26 @@ CBFS (Coreboot Filesystem) support the console jump but can help speed up operation when scrolling is slow. + CONFIG_LCD_ROTATION + + Sometimes, for example if the display is mounted in portrait + mode or even if it's mounted landscape but rotated by 180degree, + we need to rotate our content of the display relative to the + framebuffer, so that user can read the messages which are + printed out. + Once CONFIG_LCD_ROTATION is defined, the lcd_console will be + initialized with a given rotation from "vl_rot" out of + "vidinfo_t" which is provided by the board specific code. + The value for vl_rot is coded as following (matching to + fbcon=rotate: linux-kernel commandline): + 0 = no rotation respectively 0 degree + 1 = 90 degree rotation + 2 = 180 degree rotation + 3 = 270 degree rotation + + If CONFIG_LCD_ROTATION is not defined, the console will be + initialized with 0degree rotation. + CONFIG_LCD_BMP_RLE8 Support drawing of RLE8-compressed bitmaps on the LCD. @@ -2112,18 +2219,6 @@ CBFS (Coreboot Filesystem) support Some PHY like Intel LXT971A need extra delay after command issued before MII status register can be read -- Ethernet address: - CONFIG_ETHADDR - CONFIG_ETH1ADDR - CONFIG_ETH2ADDR - CONFIG_ETH3ADDR - CONFIG_ETH4ADDR - CONFIG_ETH5ADDR - - Define a default value for Ethernet address to use - for the respective Ethernet interface, in case this - is not determined automatically. - - IP address: CONFIG_IPADDR @@ -2207,6 +2302,17 @@ CBFS (Coreboot Filesystem) support requests. Increasing this will allow U-Boot to accept offers from a BOOTP client in networks with unusually high latency. +- BOOTP Random transaction ID: + CONFIG_BOOTP_RANDOM_ID + + The standard algorithm to generate a DHCP/BOOTP transaction ID + by using the MAC address and the current time stamp may not + quite unlikely produce duplicate transaction IDs from different + clients in the same network. This option creates a transaction + ID using the rand() function. Provided that the RNG has been + seeded well, this should guarantee unique transaction IDs + always. + - DHCP Advanced Options: You can fine tune the DHCP functionality by defining CONFIG_BOOTP_* symbols: @@ -2402,6 +2508,8 @@ CBFS (Coreboot Filesystem) support - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE If those defines are not set, default value is 100000 for speed, and 0 for slave. + - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3 + - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4 - drivers/i2c/rcar_i2c.c: - activate this driver with CONFIG_SYS_I2C_RCAR @@ -2876,8 +2984,8 @@ CBFS (Coreboot Filesystem) support completely disabled. Anybody can change or delete these parameters. - Alternatively, if you #define _both_ CONFIG_ETHADDR - _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default + Alternatively, if you define _both_ an ethaddr in the + default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default Ethernet address is installed in the environment, which can be changed exactly ONCE by the user. [The serial# is unaffected by this, i. e. it remains @@ -3051,6 +3159,19 @@ CBFS (Coreboot Filesystem) support this is instead controlled by the value of /config/load-environment. +- Parallel Flash support: + CONFIG_SYS_NO_FLASH + + Traditionally U-boot was run on systems with parallel NOR + flash. This option is used to disable support for parallel NOR + flash. This option should be defined if the board does not have + parallel flash. + + If this option is not defined one of the generic flash drivers + (e.g. CONFIG_FLASH_CFI_DRIVER or CONFIG_ST_SMI) must be + selected or the board must provide an implementation of the + flash API (see include/flash.h). + - DataFlash Support: CONFIG_HAS_DATAFLASH @@ -3082,28 +3203,12 @@ CBFS (Coreboot Filesystem) support Define this option to include a destructive SPI flash test ('sf test'). - CONFIG_SPI_FLASH_BAR Ban/Extended Addr Reg - - Define this option to use the Bank addr/Extended addr - support on SPI flashes which has size > 16Mbytes. - CONFIG_SF_DUAL_FLASH Dual flash memories Define this option to use dual flash support where two flash memories can be connected with a given cs line. Currently Xilinx Zynq qspi supports these type of connections. - CONFIG_SYS_SPI_ST_ENABLE_WP_PIN - enable the W#/Vpp signal to disable writing to the status - register on ST MICRON flashes like the N25Q128. - The status register write enable/disable bit, combined with - the W#/VPP signal provides hardware data protection for the - device as follows: When the enable/disable bit is set to 1, - and the W#/VPP signal is driven LOW, the status register - nonvolatile bits become read-only and the WRITE STATUS REGISTER - operation will not execute. The only way to exit this - hardware-protected mode is to drive W#/VPP HIGH. - - SystemACE Support: CONFIG_SYSTEMACE @@ -3149,8 +3254,18 @@ CBFS (Coreboot Filesystem) support Enable the hash verify command (hash -v). This adds to code size a little. - CONFIG_SHA1 - support SHA1 hashing - CONFIG_SHA256 - support SHA256 hashing + CONFIG_SHA1 - This option enables support of hashing using SHA1 + algorithm. The hash is calculated in software. + CONFIG_SHA256 - This option enables support of hashing using + SHA256 algorithm. The hash is calculated in software. + CONFIG_SHA_HW_ACCEL - This option enables hardware acceleration + for SHA1/SHA256 hashing. + This affects the 'hash' command and also the + hash_lookup_algo() function. + CONFIG_SHA_PROG_HW_ACCEL - This option enables + hardware-acceleration for SHA1/SHA256 progressive hashing. + Data can be streamed in a block at a time and the hashing + is performed in hardware. Note: There is also a sha1sum command, which should perhaps be deprecated in favour of 'hash sha1'. @@ -3215,55 +3330,6 @@ CBFS (Coreboot Filesystem) support example, some LED's) on your board. At the moment, the following checkpoints are implemented: -- Detailed boot stage timing - CONFIG_BOOTSTAGE - Define this option to get detailed timing of each stage - of the boot process. - - CONFIG_BOOTSTAGE_USER_COUNT - This is the number of available user bootstage records. - Each time you call bootstage_mark(BOOTSTAGE_ID_ALLOC, ...) - a new ID will be allocated from this stash. If you exceed - the limit, recording will stop. - - CONFIG_BOOTSTAGE_REPORT - Define this to print a report before boot, similar to this: - - Timer summary in microseconds: - Mark Elapsed Stage - 0 0 reset - 3,575,678 3,575,678 board_init_f start - 3,575,695 17 arch_cpu_init A9 - 3,575,777 82 arch_cpu_init done - 3,659,598 83,821 board_init_r start - 3,910,375 250,777 main_loop - 29,916,167 26,005,792 bootm_start - 30,361,327 445,160 start_kernel - - CONFIG_CMD_BOOTSTAGE - Add a 'bootstage' command which supports printing a report - and un/stashing of bootstage data. - - CONFIG_BOOTSTAGE_FDT - Stash the bootstage information in the FDT. A root 'bootstage' - node is created with each bootstage id as a child. Each child - has a 'name' property and either 'mark' containing the - mark time in microsecond, or 'accum' containing the - accumulated time for that bootstage id in microseconds. - For example: - - bootstage { - 154 { - name = "board_init_f"; - mark = <3575678>; - }; - 170 { - name = "lcd"; - accum = <33482>; - }; - }; - - Code in the Linux kernel can find this in /proc/devicetree. Legacy uImage format: @@ -3357,9 +3423,9 @@ Legacy uImage format: 65 net/eth.c Ethernet found. -80 common/cmd_net.c usage wrong - 80 common/cmd_net.c before calling NetLoop() - -81 common/cmd_net.c some error in NetLoop() occurred - 81 common/cmd_net.c NetLoop() back without error + 80 common/cmd_net.c before calling net_loop() + -81 common/cmd_net.c some error in net_loop() occurred + 81 common/cmd_net.c net_loop() back without error -82 common/cmd_net.c size == 0 (File with size 0 loaded) 82 common/cmd_net.c trying automatic boot 83 common/cmd_net.c running "source" command @@ -3444,8 +3510,10 @@ FIT uImage format: CONFIG_FIT_SIGNATURE This option enables signature verification of FIT uImages, - using a hash signed and verified using RSA. See - doc/uImage.FIT/signature.txt for more details. + using a hash signed and verified using RSA. If + CONFIG_SHA_PROG_HW_ACCEL is defined, i.e support for progressive + hashing is available using hardware, RSA library will use it. + See doc/uImage.FIT/signature.txt for more details. WARNING: When relying on signed FIT images with required signature check the legacy image format is default @@ -3498,9 +3566,6 @@ FIT uImage format: Adds the MTD partitioning infrastructure from the Linux kernel. Needed for UBI support. - CONFIG_MTD_NAND_VERIFY_WRITE - verify if the written data is correct reread. - - UBI support CONFIG_CMD_UBI @@ -3625,6 +3690,16 @@ FIT uImage format: CONFIG_SPL_STACK Adress of the start of the stack SPL will use + CONFIG_SPL_PANIC_ON_RAW_IMAGE + When defined, SPL will panic() if the image it has + loaded does not have a signature. + Defining this is useful when code which loads images + in SPL cannot guarantee that absolutely all read errors + will be caught. + An example is the LPC32XX MLC NAND driver, which will + consider that a completely unreadable NAND block is bad, + and thus should be skipped silently. + CONFIG_SPL_RELOC_STACK Adress of the start of the stack SPL will use after relocation. If unspecified, this is equal to @@ -4195,6 +4270,10 @@ Configuration Settings: list, simply add an entry for the same variable name to the ".flags" variable. + If CONFIG_REGEX is defined, the variable_name above is evaluated as a + regular expression. This allows multiple variables to define the same + flags without explicitly listing them for each variable. + - CONFIG_ENV_ACCESS_IGNORE_FORCE If defined, don't allow the -f switch to env set override variable access flags. @@ -4205,9 +4284,9 @@ Configuration Settings: to this new framework over time. Defining this will disable the arch/foo/lib/board.c file and use common/board_f.c and common/board_r.c instead. To use this option your architecture - must support it (i.e. must define __HAVE_ARCH_GENERIC_BOARD in - its config.mk file). If you find problems enabling this option on - your board please report the problem and send patches! + must support it (i.e. must select HAVE_GENERIC_BOARD in arch/Kconfig). + If you find problems enabling this option on your board please report + the problem and send patches! - CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only) This is set by OMAP boards for the max time that reset should @@ -4338,6 +4417,9 @@ to save the current settings. If defined, specified the chip address of the EEPROM device. The default address is zero. + - CONFIG_SYS_I2C_EEPROM_BUS: + If defined, specified the i2c bus of the EEPROM device. + - CONFIG_SYS_EEPROM_PAGE_WRITE_BITS: If defined, the number of bits used to address bytes in a single page in the EEPROM device. A 64 byte page, for example @@ -4913,6 +4995,12 @@ Low Level (hardware related) configuration options: - CONFIG_FSL_DDR_INTERACTIVE Enable interactive DDR debugging. See doc/README.fsl-ddr. +- CONFIG_FSL_DDR_SYNC_REFRESH + Enable sync of refresh for multiple controllers. + +- CONFIG_FSL_DDR_BIST + Enable built-in memory test for Freescale DDR controllers. + - CONFIG_SYS_83XX_DDR_USES_CS0 Only for 83xx systems. If specified, then DDR should be configured using CS0 and CS1 instead of CS2 and CS3. @@ -5099,6 +5187,33 @@ within that device. normal addressable memory via the LBC. CONFIG_SYS_LS_MC_FW_ADDR is the virtual address in NOR flash. +Freescale Layerscape Debug Server Support: +------------------------------------------- +The Freescale Layerscape Debug Server Support supports the loading of +"Debug Server firmware" and triggering SP boot-rom. +This firmware often needs to be loaded during U-Boot booting. + +- CONFIG_FSL_DEBUG_SERVER + Enable the Debug Server for Layerscape SoCs. + +- CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE + Define minimum DDR size required for debug server image + +- CONFIG_SYS_MEM_TOP_HIDE_MIN + Define minimum DDR size to be hided from top of the DDR memory + +Reproducible builds +------------------- + +In order to achieve reproducible builds, timestamps used in the U-Boot build +process have to be set to a fixed value. + +This is done using the SOURCE_DATE_EPOCH environment variable. +SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a configuration +option for U-Boot or an environment variable in U-Boot. + +SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in UTC. + Building the Software: ====================== @@ -5508,7 +5623,7 @@ loaded to, and "Flash Location" gives the image's address in NOR flash or offset in NAND flash. *Note* - these variables don't have to be defined for all boards, some -boards currenlty use other variables for these purposes, and some +boards currently use other variables for these purposes, and some boards use these variables for other purposes. Image File Name RAM Address Flash Location @@ -5584,6 +5699,10 @@ override any association in the static list. You can define CONFIG_ENV_CALLBACK_LIST_DEFAULT to a list (string) to define the ".callbacks" environment variable in the default or embedded environment. +If CONFIG_REGEX is defined, the variable_name above is evaluated as a +regular expression. This allows multiple variables to be connected to +the same callback without explicitly listing them all out. + Command Line Parsing: ===================== @@ -5658,7 +5777,8 @@ o If both the SROM and the environment contain a MAC address, and the warning is printed. o If neither SROM nor the environment contain a MAC address, an error - is raised. + is raised. If CONFIG_NET_RANDOM_ETHADDR is defined, then in this case + a random, locally-assigned MAC is used. If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses will be programmed into hardware as part of the initialization process. This