X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=board%2Fcsb272%2Fcsb272.c;h=43a1aa0521188627ba052b1525e5a5d8de39c980;hp=1ed3e1b6a4e5c6c36b3eeff4c27e28fc0fc58347;hb=c2120fbfbc4d1f6953228f86be8bdbf38bacfdab;hpb=a77034a8dfc7942ca08483138dccdebeacc36826

diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c
index 1ed3e1b6a4..43a1aa0521 100644
--- a/board/csb272/csb272.c
+++ b/board/csb272/csb272.c
@@ -2,30 +2,14 @@
  * (C) Copyright 2004
  * Tolunay Orkun, Nextio Inc., torkun@nextio.com
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+ 
  */
 
 #include <common.h>
 #include <asm/processor.h>
 #include <i2c.h>
 #include <miiphy.h>
-#include <ppc4xx_enet.h>
+#include <asm/ppc4xx-emac.h>
 
 void sdram_init(void);
 
@@ -51,7 +35,7 @@ uchar pll_fs6377_regs[16] = {
  */
 int pll_init(void)
 {
-	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+	i2c_set_bus_num(0);
 
 	return  i2c_write(CONFIG_SYS_I2C_PLL_ADDR, 0, 1,
 		(uchar *) pll_fs6377_regs, sizeof(pll_fs6377_regs));
@@ -176,11 +160,11 @@ int last_stage_init(void)
 	miiphy_reset("ppc_4xx_eth0", CONFIG_PHY_ADDR);
 
 	/* AUTO neg */
-	miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_BMCR,
-			PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
+	miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, MII_BMCR,
+			BMCR_ANENABLE | BMCR_ANRESTART);
 
 	/* LEDs     */
-	miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_FCSCR, 0x0d08);
+	miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, MII_NWAYTEST, 0x0d08);
 
 
 	return 0; /* success */