X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=board%2Fkaro%2Ftx6%2Ftx6qdl.c;h=2f98b9bfaa0cd6d101d18adfce0da5bad39ef39f;hp=27fc6fac1d81e8de580fa51643cad3a80c957e3e;hb=0ec3e0464e923142c845b23b1fc34dc9310540db;hpb=caa9aa43bc1678f6967e20f2153a11c9e7feb58f diff --git a/board/karo/tx6/tx6qdl.c b/board/karo/tx6/tx6qdl.c index 27fc6fac1d..2f98b9bfaa 100644 --- a/board/karo/tx6/tx6qdl.c +++ b/board/karo/tx6/tx6qdl.c @@ -37,10 +37,11 @@ #include #include "../common/karo.h" +#include "pmic.h" #define TX6_FEC_RST_GPIO IMX_GPIO_NR(7, 6) #define TX6_FEC_PWR_GPIO IMX_GPIO_NR(3, 20) -#define TX6_FEC_INT_GPIO IMX_GPIO_NR(2, 4) +#define TX6_FEC_INT_GPIO IMX_GPIO_NR(7, 1) #define TX6_LED_GPIO IMX_GPIO_NR(2, 20) #define TX6_LCD_PWR_GPIO IMX_GPIO_NR(2, 31) @@ -225,192 +226,6 @@ static void tx6qdl_print_cpuinfo(void) check_cpu_temperature(1); } -#define LTC3676_BUCK1 0x01 -#define LTC3676_BUCK2 0x02 -#define LTC3676_BUCK3 0x03 -#define LTC3676_BUCK4 0x04 -#define LTC3676_DVB1A 0x0A -#define LTC3676_DVB1B 0x0B -#define LTC3676_DVB2A 0x0C -#define LTC3676_DVB2B 0x0D -#define LTC3676_DVB3A 0x0E -#define LTC3676_DVB3B 0x0F -#define LTC3676_DVB4A 0x10 -#define LTC3676_DVB4B 0x11 -#define LTC3676_MSKPG 0x13 -#define LTC3676_CLIRQ 0x1f - -#define LTC3676_BUCK_DVDT_FAST (1 << 0) -#define LTC3676_BUCK_KEEP_ALIVE (1 << 1) -#define LTC3676_BUCK_CLK_RATE_LOW (1 << 2) -#define LTC3676_BUCK_PHASE_SEL (1 << 3) -#define LTC3676_BUCK_ENABLE_300 (1 << 4) -#define LTC3676_BUCK_PULSE_SKIP (0 << 5) -#define LTC3676_BUCK_BURST_MODE (1 << 5) -#define LTC3676_BUCK_CONTINUOUS (2 << 5) -#define LTC3676_BUCK_ENABLE (1 << 7) - -#define LTC3676_PGOOD_MASK (1 << 5) - -#define LTC3676_MSKPG_BUCK1 (1 << 0) -#define LTC3676_MSKPG_BUCK2 (1 << 1) -#define LTC3676_MSKPG_BUCK3 (1 << 2) -#define LTC3676_MSKPG_BUCK4 (1 << 3) -#define LTC3676_MSKPG_LDO2 (1 << 5) -#define LTC3676_MSKPG_LDO3 (1 << 6) -#define LTC3676_MSKPG_LDO4 (1 << 7) - -#define VDD_IO_VAL mV_to_regval(vout_to_vref(3300 * 10, 5)) -#define VDD_IO_VAL_LP mV_to_regval(vout_to_vref(3100 * 10, 5)) -#define VDD_IO_VAL_2 mV_to_regval(vout_to_vref(3300 * 10, 5_2)) -#define VDD_IO_VAL_2_LP mV_to_regval(vout_to_vref(3100 * 10, 5_2)) -#define VDD_SOC_VAL mV_to_regval(vout_to_vref(1425 * 10, 6)) -#define VDD_SOC_VAL_LP mV_to_regval(vout_to_vref(900 * 10, 6)) -#define VDD_DDR_VAL mV_to_regval(vout_to_vref(1500 * 10, 7)) -#define VDD_CORE_VAL mV_to_regval(vout_to_vref(1425 * 10, 8)) -#define VDD_CORE_VAL_LP mV_to_regval(vout_to_vref(900 * 10, 8)) - -/* LDO1 */ -#define R1_1 470 -#define R2_1 150 -/* LDO4 */ -#define R1_4 470 -#define R2_4 150 -/* Buck1 */ -#define R1_5 390 -#define R2_5 110 -#define R1_5_2 470 -#define R2_5_2 150 -/* Buck2 */ -#define R1_6 150 -#define R2_6 180 -/* Buck3 */ -#define R1_7 150 -#define R2_7 140 -/* Buck4 */ -#define R1_8 150 -#define R2_8 180 - -/* calculate voltages in 10mV */ -#define R1(idx) R1_##idx -#define R2(idx) R2_##idx - -#define vout_to_vref(vout, idx) ((vout) * R2(idx) / (R1(idx) + R2(idx))) -#define vref_to_vout(vref, idx) DIV_ROUND_UP((vref) * (R1(idx) + R2(idx)), R2(idx)) - -#define mV_to_regval(mV) DIV_ROUND(((((mV) < 4125) ? 4125 : (mV)) - 4125), 125) -#define regval_to_mV(v) (((v) * 125 + 4125)) - -static struct ltc3673_regs { - u8 addr; - u8 val; - u8 mask; -} ltc3676_regs[] = { - { LTC3676_MSKPG, ~LTC3676_MSKPG_BUCK1, }, - { LTC3676_DVB2B, VDD_SOC_VAL | LTC3676_PGOOD_MASK, ~0x3f, }, - { LTC3676_DVB3B, VDD_DDR_VAL, ~0x3f, }, - { LTC3676_DVB4B, VDD_CORE_VAL | LTC3676_PGOOD_MASK, ~0x3f, }, - { LTC3676_DVB2A, VDD_SOC_VAL, ~0x3f, }, - { LTC3676_DVB3A, VDD_DDR_VAL, ~0x3f, }, - { LTC3676_DVB4A, VDD_CORE_VAL, ~0x3f, }, - { LTC3676_BUCK1, LTC3676_BUCK_BURST_MODE | LTC3676_BUCK_CLK_RATE_LOW, }, - { LTC3676_BUCK2, LTC3676_BUCK_BURST_MODE, }, - { LTC3676_BUCK3, LTC3676_BUCK_BURST_MODE, }, - { LTC3676_BUCK4, LTC3676_BUCK_BURST_MODE, }, - { LTC3676_CLIRQ, 0, }, /* clear interrupt status */ -}; - -static struct ltc3673_regs ltc3676_regs_1[] = { - { LTC3676_DVB1B, VDD_IO_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, }, - { LTC3676_DVB1A, VDD_IO_VAL, ~0x3f, }, -}; - -static struct ltc3673_regs ltc3676_regs_2[] = { - { LTC3676_DVB1B, VDD_IO_VAL_2_LP | LTC3676_PGOOD_MASK, ~0x3f, }, - { LTC3676_DVB1A, VDD_IO_VAL_2, ~0x3f, }, -}; - -static int tx6_rev_2(void) -{ - struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; - struct fuse_bank5_regs *fuse = (void *)ocotp->bank[5].fuse_regs; - u32 pad_settings = readl(&fuse->pad_settings); - - debug("Fuse pad_settings @ %p = %08x\n", - &fuse->pad_settings, pad_settings); - return pad_settings & 1; -} - -static int tx6_ltc3676_setup_regs(struct ltc3673_regs *r, size_t count) -{ - int ret; - int i; - - for (i = 0; i < count; i++, r++) { -#ifdef DEBUG - unsigned char value; - - ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1); - if ((value & ~r->mask) != r->val) { - printf("Changing PMIC reg %02x from %02x to %02x\n", - r->addr, value, r->val); - } - if (ret) { - printf("%s: failed to read PMIC register %02x: %d\n", - __func__, r->addr, ret); - return ret; - } -#endif - ret = i2c_write(CONFIG_SYS_I2C_SLAVE, - r->addr, 1, &r->val, 1); - if (ret) { - printf("%s: failed to write PMIC register %02x: %d\n", - __func__, r->addr, ret); - return ret; - } - } - return 0; -} - -static int setup_pmic_voltages(void) -{ - int ret; - unsigned char value; - - ret = i2c_probe(CONFIG_SYS_I2C_SLAVE); - if (ret != 0) { - printf("Failed to initialize I2C\n"); - return ret; - } - - ret = i2c_read(CONFIG_SYS_I2C_SLAVE, 0x11, 1, &value, 1); - if (ret) { - printf("%s: i2c_read error: %d\n", __func__, ret); - return ret; - } - - ret = tx6_ltc3676_setup_regs(ltc3676_regs, ARRAY_SIZE(ltc3676_regs)); - if (ret) - return ret; - - printf("VDDCORE set to %umV\n", - DIV_ROUND(vref_to_vout(regval_to_mV(VDD_CORE_VAL), 8), 10)); - printf("VDDSOC set to %umV\n", - DIV_ROUND(vref_to_vout(regval_to_mV(VDD_SOC_VAL), 6), 10)); - - if (tx6_rev_2()) { - ret = tx6_ltc3676_setup_regs(ltc3676_regs_2, - ARRAY_SIZE(ltc3676_regs_2)); - printf("VDDIO set to %umV\n", - DIV_ROUND(vref_to_vout( - regval_to_mV(VDD_IO_VAL_2), 5_2), 10)); - } else { - ret = tx6_ltc3676_setup_regs(ltc3676_regs_1, - ARRAY_SIZE(ltc3676_regs_1)); - } - return ret; -} - int board_early_init_f(void) { gpio_request_array(tx6qdl_gpios, ARRAY_SIZE(tx6qdl_gpios)); @@ -425,15 +240,13 @@ int board_init(void) /* Address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000; -#ifdef CONFIG_OF_LIBFDT gd->bd->bi_arch_number = -1; -#else - gd->bd->bi_arch_number = 4429; -#endif + if (ctrlc()) { printf("CTRL-C detected; Skipping PMIC setup\n"); return 1; } + ret = setup_pmic_voltages(); if (ret) { printf("Failed to setup PMIC voltages\n"); @@ -541,9 +354,6 @@ int board_mmc_init(bd_t *bis) struct tx6_esdhc_cfg *cfg = &tx6qdl_esdhc_cfg[i]; int ret; - if (i >= CONFIG_SYS_FSL_ESDHC_NUM) - break; - cfg->cfg.sdhc_clk = mxc_get_clock(cfg->clkid); imx_iomux_v3_setup_multiple_pads(cfg->pads, cfg->num_pads); @@ -641,36 +451,6 @@ static const iomux_v3_cfg_t stk5_pads[] = { /* SW controlled LED on STK5 baseboard */ MX6_PAD_EIM_A18__GPIO_2_20, - /* LCD data pins */ - MX6_PAD_DISP0_DAT0__IPU1_DISP0_DAT_0, - MX6_PAD_DISP0_DAT1__IPU1_DISP0_DAT_1, - MX6_PAD_DISP0_DAT2__IPU1_DISP0_DAT_2, - MX6_PAD_DISP0_DAT3__IPU1_DISP0_DAT_3, - MX6_PAD_DISP0_DAT4__IPU1_DISP0_DAT_4, - MX6_PAD_DISP0_DAT5__IPU1_DISP0_DAT_5, - MX6_PAD_DISP0_DAT6__IPU1_DISP0_DAT_6, - MX6_PAD_DISP0_DAT7__IPU1_DISP0_DAT_7, - MX6_PAD_DISP0_DAT8__IPU1_DISP0_DAT_8, - MX6_PAD_DISP0_DAT9__IPU1_DISP0_DAT_9, - MX6_PAD_DISP0_DAT10__IPU1_DISP0_DAT_10, - MX6_PAD_DISP0_DAT11__IPU1_DISP0_DAT_11, - MX6_PAD_DISP0_DAT12__IPU1_DISP0_DAT_12, - MX6_PAD_DISP0_DAT13__IPU1_DISP0_DAT_13, - MX6_PAD_DISP0_DAT14__IPU1_DISP0_DAT_14, - MX6_PAD_DISP0_DAT15__IPU1_DISP0_DAT_15, - MX6_PAD_DISP0_DAT16__IPU1_DISP0_DAT_16, - MX6_PAD_DISP0_DAT17__IPU1_DISP0_DAT_17, - MX6_PAD_DISP0_DAT18__IPU1_DISP0_DAT_18, - MX6_PAD_DISP0_DAT19__IPU1_DISP0_DAT_19, - MX6_PAD_DISP0_DAT20__IPU1_DISP0_DAT_20, - MX6_PAD_DISP0_DAT21__IPU1_DISP0_DAT_21, - MX6_PAD_DISP0_DAT22__IPU1_DISP0_DAT_22, - MX6_PAD_DISP0_DAT23__IPU1_DISP0_DAT_23, - MX6_PAD_DI0_PIN2__IPU1_DI0_PIN2, /* HSYNC */ - MX6_PAD_DI0_PIN3__IPU1_DI0_PIN3, /* VSYNC */ - MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15, /* OE_ACD */ - MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, /* LSCLK */ - /* I2C bus on DIMM pins 40/41 */ MX6_PAD_GPIO_6__I2C3_SDA, MX6_PAD_GPIO_3__I2C3_SCL, @@ -703,12 +483,14 @@ static const struct gpio stk5_gpios[] = { }; #ifdef CONFIG_LCD +static u16 tx6_cmap[256]; vidinfo_t panel_info = { /* set to max. size supported by SoC */ .vl_col = 1920, .vl_row = 1080, .vl_bpix = LCD_COLOR24, /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */ + .cmap = tx6_cmap, }; static struct fb_videomode tx6_fb_modes[] = { @@ -831,6 +613,23 @@ static struct fb_videomode tx6_fb_modes[] = { .lower_margin = 525 - 480 - 35, .sync = FB_SYNC_CLK_LAT_FALL, }, + { + /* Emerging ET070001DM6 800 x 480 display. + * 152.4 mm x 91.44 mm display area. + */ + .name = "ET070001DM6", + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = KHZ2PICOS(33260), + .left_margin = 216 - 128, + .hsync_len = 128, + .right_margin = 1056 - 800 - 216, + .upper_margin = 35 - 2, + .vsync_len = 2, + .lower_margin = 525 - 480 - 35, + .sync = 0, + }, #else { /* HannStar HSD100PXN1 @@ -864,6 +663,12 @@ static struct fb_videomode tx6_fb_modes[] = { }; static int lcd_enabled = 1; +static int lcd_bl_polarity; + +static int lcd_backlight_polarity(void) +{ + return lcd_bl_polarity; +} void lcd_enable(void) { @@ -882,7 +687,8 @@ void lcd_enable(void) udelay(100); gpio_set_value(TX6_LCD_RST_GPIO, 1); udelay(300000); - gpio_set_value(TX6_LCD_BACKLIGHT_GPIO, is_lvds()); + gpio_set_value(TX6_LCD_BACKLIGHT_GPIO, + lcd_backlight_polarity()); } } @@ -898,7 +704,8 @@ void lcd_panel_disable(void) { if (lcd_enabled) { debug("Switching LCD off\n"); - gpio_set_value(TX6_LCD_BACKLIGHT_GPIO, !is_lvds()); + gpio_set_value(TX6_LCD_BACKLIGHT_GPIO, + !lcd_backlight_polarity()); gpio_set_value(TX6_LCD_RST_GPIO, 0); gpio_set_value(TX6_LCD_PWR_GPIO, 0); } @@ -912,11 +719,8 @@ static const iomux_v3_cfg_t stk5_lcd_pads[] = { /* LCD Backlight (PWM) */ MX6_PAD_GPIO_1__GPIO_1_1, +#ifndef CONFIG_SYS_LVDS_IF /* Display */ - MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, - MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15, - MX6_PAD_DI0_PIN2__IPU1_DI0_PIN2, - MX6_PAD_DI0_PIN3__IPU1_DI0_PIN3, MX6_PAD_DISP0_DAT0__IPU1_DISP0_DAT_0, MX6_PAD_DISP0_DAT1__IPU1_DISP0_DAT_1, MX6_PAD_DISP0_DAT2__IPU1_DISP0_DAT_2, @@ -941,6 +745,11 @@ static const iomux_v3_cfg_t stk5_lcd_pads[] = { MX6_PAD_DISP0_DAT21__IPU1_DISP0_DAT_21, MX6_PAD_DISP0_DAT22__IPU1_DISP0_DAT_22, MX6_PAD_DISP0_DAT23__IPU1_DISP0_DAT_23, + MX6_PAD_DI0_PIN2__IPU1_DI0_PIN2, /* HSYNC */ + MX6_PAD_DI0_PIN3__IPU1_DI0_PIN3, /* VSYNC */ + MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15, /* OE_ACD */ + MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, /* LSCLK */ +#endif }; static const struct gpio stk5_lcd_gpios[] = { @@ -976,6 +785,7 @@ void lcd_ctrl_init(void *lcdbase) } karo_fdt_move_fdt(); + lcd_bl_polarity = karo_fdt_get_backlight_polarity(working_fdt); if (video_mode == NULL) { debug("Disabling LCD\n"); @@ -1221,7 +1031,7 @@ static void tx6qdl_set_cpu_clock(void) printf("CPU clock set to %lu.%03lu MHz\n", cpu_clk / 1000000, cpu_clk / 1000 % 1000); } else { - printf("Failed to set CPU clock to %lu MHz\n", cpu_clk); + printf("Error: Failed to set CPU clock to %lu MHz\n", cpu_clk); } } @@ -1235,8 +1045,8 @@ static void tx6_init_mac(void) return; } - eth_setenv_enetaddr("ethaddr", mac); printf("MAC addr from fuse: %pM\n", mac); + eth_setenv_enetaddr("ethaddr", mac); } int board_late_init(void) @@ -1294,7 +1104,8 @@ int checkboard(void) printf("Board: Ka-Ro TX6%c-%d%d1%d\n", cpu_variant == MXC_CPU_MX6Q ? 'Q' : 'U', cpu_variant == MXC_CPU_MX6Q ? 1 : 8, - is_lvds(), 1 - PHYS_SDRAM_1_WIDTH / 64); + is_lvds(), 1 - PHYS_SDRAM_1_WIDTH / 64 + + 2 * (CONFIG_SYS_NAND_BLOCKS / 1024 - 1)); return 0; } @@ -1327,22 +1138,16 @@ static const char *tx6_touchpanels[] = { "eeti,egalax_ts", }; -#ifndef CONFIG_SYS_LVDS_IF -static inline void tx6_fdt_fixup_sata(void *blob) -{ - karo_fdt_enable_node(blob, "/soc/sata", 0); -} -#else -static inline void tx6_fdt_fixup_sata(void *blob) -{ -} -#endif - void ft_board_setup(void *blob, bd_t *bd) { const char *baseboard = getenv("baseboard"); int stk5_v5 = baseboard != NULL && (strcmp(baseboard, "stk5-v5") == 0); const char *video_mode = karo_get_vmode(getenv("video_mode")); + int ret; + + ret = fdt_increase_size(blob, 4096); + if (ret) + printf("Failed to increase FDT size: %s\n", fdt_strerror(ret)); if (stk5_v5) karo_fdt_enable_node(blob, "stk5led", 0); @@ -1352,9 +1157,8 @@ void ft_board_setup(void *blob, bd_t *bd) karo_fdt_fixup_touchpanel(blob, tx6_touchpanels, ARRAY_SIZE(tx6_touchpanels)); - karo_fdt_fixup_usb_otg(blob, "usbotg", "fsl,usbphy"); + karo_fdt_fixup_usb_otg(blob, "usbotg", "fsl,usbphy", "vbus-supply"); karo_fdt_fixup_flexcan(blob, stk5_v5); - tx6_fdt_fixup_sata(blob); karo_fdt_update_fb_mode(blob, video_mode); }