X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=include%2Fconfigs%2Fdlvision-10g.h;h=e6bfe58e98dfbf2755fd685c075c01dd445bc764;hp=4fc5262bc17ea86b33af686c6c60b6b8426e4c41;hb=fd77b5fb5d61013a2d329732350758dd434434b0;hpb=6cfa9eecb4409b1b4e8b4753b2ddfbe33e28bd93 diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index 4fc5262bc1..e6bfe58e98 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -2,30 +2,13 @@ * (C) Copyright 2010 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H #define CONFIG_405EP 1 /* this is a PPC405 CPU */ -#define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_DLVISION_10G 1 /* on a DLVision-10G board */ #define CONFIG_SYS_TEXT_BASE 0xFFFC0000 @@ -34,17 +17,18 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME dlvsion-10g -#define CONFIG_IDENT_STRING " dlvision-10g 0.01" +#define CONFIG_IDENT_STRING " dlvision-10g 0.06" #include "amcc-common.h" -#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R +#define CONFIG_MISC_INIT_R #define CONFIG_LAST_STAGE_INIT +#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ #undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ -#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ -#define CONFIG_AUTOBOOT_STOP_STR " " /* * Configure PLL @@ -55,6 +39,7 @@ /* new uImage format support */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ +#define CONFIG_FIT_DISABLE_SHA256 #define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */ @@ -79,8 +64,13 @@ /* * Commands additional to the ones defined in amcc-common.h */ -#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DTT +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_DIAG #undef CONFIG_CMD_EEPROM +#undef CONFIG_CMD_ELF +#undef CONFIG_CMD_I2C +#undef CONFIG_CMD_IRQ /* * SDRAM configuration (please see cpu/ppc/sdram.[ch]) @@ -111,16 +101,33 @@ /* * I2C stuff */ -#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F + +#define CONFIG_SYS_I2C_IHS +#define CONFIG_SYS_I2C_IHS_CH0 +#define CONFIG_SYS_I2C_IHS_SPEED_0 50000 +#define CONFIG_SYS_I2C_IHS_SLAVE_0 0x7F +#define CONFIG_SYS_I2C_IHS_CH1 +#define CONFIG_SYS_I2C_IHS_SPEED_1 50000 +#define CONFIG_SYS_I2C_IHS_SLAVE_1 0x7F + +#define CONFIG_SYS_SPD_BUS_NUM 2 /* Temp sensor/hwmon/dtt */ +#define CONFIG_SYS_DTT_BUS_NUM 2 #define CONFIG_DTT_LM63 1 /* National LM63 */ -#define CONFIG_DTT_SENSORS { 0x4c, 0x4e } /* Sensor addresses */ +#define CONFIG_DTT_SENSORS { 0x4c, 0x4e, 0x18 } /* Sensor addresses */ #define CONFIG_DTT_PWM_LOOKUPTABLE \ - { { 40, 10 }, { 43, 13 }, { 46, 16 }, \ - { 50, 20 }, { 53, 27 }, { 56, 34 }, { 60, 40 } } + { { 46, 10 }, { 48, 14 }, { 50, 19 }, { 52, 23 },\ + { 54, 27 }, { 56, 31 }, { 58, 36 }, { 60, 40 } } #define CONFIG_DTT_TACH_LIMIT 0xa10 +#define CONFIG_SYS_ICS8N3QV01_I2C {0, 1} +#define CONFIG_SYS_SIL1178_I2C {0, 1} + /* EBC peripherals */ #define CONFIG_SYS_FLASH_BASE 0xFC000000 @@ -136,9 +143,15 @@ #define CONFIG_SYS_FPGA_COUNT 2 +#define CONFIG_SYS_FPGA_PTR { \ + (struct ihs_fpga *)CONFIG_SYS_FPGA0_BASE, \ + (struct ihs_fpga *)CONFIG_SYS_FPGA1_BASE } + +#define CONFIG_SYS_FPGA_COMMON + #define CONFIG_SYS_LATCH0_RESET 0xffff #define CONFIG_SYS_LATCH0_BOOT 0xffff -#define CONFIG_SYS_LATCH1_RESET 0xffcf +#define CONFIG_SYS_LATCH1_RESET 0xffbf #define CONFIG_SYS_LATCH1_BOOT 0xffff #define CONFIG_SYS_FPGA_NO_RFL_HI @@ -158,7 +171,6 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write/ms */ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buff'd writes */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware flash protect */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* no warn upon unknown flash */ @@ -226,9 +238,8 @@ #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* in SDRAM */ #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of used area */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size/bytes res'd for init data*/ #define CONFIG_SYS_GBL_DATA_OFFSET \ - (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) + (CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* @@ -316,9 +327,7 @@ /* * OSD Setup */ -#define CONFIG_SYS_ICS8N3QV01 #define CONFIG_SYS_MPC92469AC -#define CONFIG_SYS_SIL1178 #define CONFIG_SYS_OSD_SCREENS CONFIG_SYS_FPGA_COUNT #endif /* __CONFIG_H */