X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=include%2Ffpga.h;h=e0d12981b283ea93f9e4ef9fcf66076e4cc5bbda;hp=a038aa189577a749f476bed4c46c7ef52d48f8d3;hb=0bfcc924552b8ec79a20b8b12557ff08742c4f0e;hpb=77ddac9480d63a80b6bb76d7ee4dcc2d1070867e

diff --git a/include/fpga.h b/include/fpga.h
index a038aa1895..e0d12981b2 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -2,27 +2,10 @@
  * (C) Copyright 2002
  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <linux/types.h>               /* for ulong typedef */
+#include <linux/types.h>	       /* for ulong typedef */
 
 #ifndef _FPGA_H_
 #define _FPGA_H_
@@ -31,51 +14,54 @@
 #define CONFIG_MAX_FPGA_DEVICES		5
 #endif
 
-/* these probably belong somewhere else */
-#ifndef FALSE
-#define FALSE	(0)
-#endif
-#ifndef TRUE
-#define TRUE 	(!FALSE)
-#endif
-
-/* CONFIG_FPGA bit assignments */
-#define CFG_FPGA_MAN(x)	(x)
-#define CFG_FPGA_DEV(x)	((x) << 8 )
-#define CFG_FPGA_IF(x)	((x) << 16 )
-
-/* FPGA Manufacturer bits in CONFIG_FPGA */
-#define CFG_FPGA_XILINX 		CFG_FPGA_MAN( 0x1 )
-#define CFG_FPGA_ALTERA			CFG_FPGA_MAN( 0x2 )
-
-
 /* fpga_xxxx function return value definitions */
-#define FPGA_SUCCESS         0
-#define FPGA_FAIL           -1
+#define FPGA_SUCCESS		0
+#define FPGA_FAIL		-1
 
 /* device numbers must be non-negative */
-#define FPGA_INVALID_DEVICE -1
+#define FPGA_INVALID_DEVICE	-1
 
 /* root data type defintions */
-typedef enum {                 /* typedef fpga_type */
-	fpga_min_type,             /* range check value */
-    fpga_xilinx,               /* Xilinx Family) */
-    fpga_altera,               /* unimplemented */
-    fpga_undefined             /* invalid range check value */
-} fpga_type;                   /* end, typedef fpga_type */
+typedef enum {			/* typedef fpga_type */
+	fpga_min_type,		/* range check value */
+	fpga_xilinx,		/* Xilinx Family) */
+	fpga_altera,		/* unimplemented */
+	fpga_lattice,		/* Lattice family */
+	fpga_undefined		/* invalid range check value */
+} fpga_type;			/* end, typedef fpga_type */
+
+typedef struct {		/* typedef fpga_desc */
+	fpga_type devtype;	/* switch value to select sub-functions */
+	void *devdesc;		/* real device descriptor */
+} fpga_desc;			/* end, typedef fpga_desc */
 
-typedef struct {               /* typedef fpga_desc */
-    fpga_type   devtype;       /* switch value to select sub-functions */
-    void *      devdesc;       /* real device descriptor */
-} fpga_desc;                   /* end, typedef fpga_desc */
+typedef struct {                /* typedef fpga_desc */
+	unsigned int blocksize;
+	char *interface;
+	char *dev_part;
+	char *filename;
+	int fstype;
+} fpga_fs_info;
 
+typedef enum {
+	BIT_FULL = 0,
+	BIT_PARTIAL,
+} bitstream_type;
 
 /* root function definitions */
-extern void fpga_init( ulong reloc_off );
-extern int fpga_add( fpga_type devtype, void *desc );
-extern int fpga_count( void );
-extern int fpga_load( int devnum, void *buf, size_t bsize );
-extern int fpga_dump( int devnum, void *buf, size_t bsize );
-extern int fpga_info( int devnum );
+void fpga_init(void);
+int fpga_add(fpga_type devtype, void *desc);
+int fpga_count(void);
+const fpga_desc *const fpga_get_desc(int devnum);
+int fpga_load(int devnum, const void *buf, size_t bsize,
+	      bitstream_type bstype);
+int fpga_fsload(int devnum, const void *buf, size_t size,
+		fpga_fs_info *fpga_fsinfo);
+int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
+		       bitstream_type bstype);
+int fpga_dump(int devnum, const void *buf, size_t bsize);
+int fpga_info(int devnum);
+const fpga_desc *const fpga_validate(int devnum, const void *buf,
+				     size_t bsize, char *fn);
 
 #endif	/* _FPGA_H_ */