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(parent: 25fb02a) | patch
ppc4xx: Flush dcache after DDR2 autocalibration with caches on
authorStefan Roese <sr@denx.de>
Fri, 16 Sep 2011 10:54:58 +0000 (12:54 +0200)
committerStefan Roese <sr@denx.de>
Mon, 19 Sep 2011 09:51:21 +0000 (11:51 +0200)
commit226502e01bc7ffa79dde28604075949f8f816cfc
treea786456a3bbf3c4cc35d211e6a7f5b82ffc72bb0tree | snapshot
parent25fb02abdf7af37b3b9f83891115ee94e9073708commit | diff
ppc4xx: Flush dcache after DDR2 autocalibration with caches on

Flush the dcache before removing the TLB with caches enabled.
Otherwise this might lead to problems later on, e.g. while booting
Linux (as seen on ICON-440SPe).

Signed-off-by: Stefan Roese <sr@denx.de>
arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c diff | blob | history
UBoot for KaRo TX COM modules