drivers: spmi: msm: check PBL status before and after register accesses
Some registers associated with the reset logic may not be written
to under certain circumstances (e.g. PON_SW_RESET_S2_CTL may not be
changed when PON_SW_RESET_S2_CTL2[SW_RESET_EN] is set).
The PON_PBL_STATUS register records errors when accessing those
registers. Check the PBL status before and after each SPMI register
access, to track invalid writes to the affected registers.