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(parent: 1c848a2) | patch
net/designware: ensure cache invalidations are aligned to ARCH_DMA_MINALIGN
authorIan Campbell <ijc@hellion.org.uk>
Thu, 8 May 2014 21:26:33 +0000 (22:26 +0100)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sun, 25 May 2014 15:23:15 +0000 (17:23 +0200)
commit964ea7c1cea6228aa414f4aee5acf25bcd87ca21
tree2a4acf997080d86479677a9a7d17cb2a4e0101datree | snapshot
parent1c848a258600490f6964597b92b69a107af141d6commit | diff
net/designware: ensure cache invalidations are aligned to ARCH_DMA_MINALIGN

This is required at least on ARM.

When sending instead of simply invalidating the entire descriptor, flush
as little as possible while still respecting ARCH_DMA_MINALIGN, as
requested by Alexey.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
drivers/net/designware.c diff | blob | history
UBoot for KaRo TX COM modules