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(parent: ab02058) | patch
imx: mx6ul select SYS_L2CACHE_OFF
authorPeng Fan <Peng.Fan@freescale.com>
Mon, 20 Jul 2015 11:28:28 +0000 (19:28 +0800)
committerLothar Waßmann <LW@KARO-electronics.de>
Wed, 9 Sep 2015 18:08:23 +0000 (20:08 +0200)
commita59196c35895927371c8b40f082fac1f8cdb7182
treec17553d659bc9d074d5303a91b51bfbae6f57743tree | snapshot
parentab02058aa07fa8350038076aa9ed86206af5d475commit | diff
imx: mx6ul select SYS_L2CACHE_OFF

i.MX6UL features an Cortex-A7 core, it does not have PL310 as other i.MX6
chips. To Cortex-A7 core, If D-Cache is enabled, L2 Cache is enabled.
There is on specific switch for on/off L2 Cache, so default select
SYS_L2CACHE_OFF.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
arch/arm/cpu/armv7/mx6/Kconfig diff | blob | history
UBoot for KaRo TX COM modules