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(parent: f3a592e) | patch
mtd: nand: mxs invalidate dcache before DMA read
authorPeng Fan <Peng.Fan@freescale.com>
Tue, 21 Jul 2015 08:15:21 +0000 (16:15 +0800)
committerLothar Waßmann <LW@KARO-electronics.de>
Thu, 10 Sep 2015 09:29:44 +0000 (11:29 +0200)
commitc11d16795a89b7db04e6aedee534bbdc69d9c6b1
tree7d274600df28ce7b27ad3ff13a6c96f8a8aee063tree | snapshot
parentf3a592e00faeb99e2324392d456a1fe84d49ae71commit | diff
mtd: nand: mxs invalidate dcache before DMA read

Follow linux dma flow:
Before DMA read, be sure to invalidate the cache over the address
range of DMA buffer to prevent cache coherency problems.
After DMA read, invalidate dcache again.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
drivers/mtd/nand/mxs_nand.c diff | blob | history
UBoot for KaRo TX COM modules