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(parent: d73f38f) | patch
drivers/spi/omap3: Bug fix of premature write transfer completion
authorVasili Galka <vvv444@gmail.com>
Sun, 9 Mar 2014 13:56:52 +0000 (15:56 +0200)
committerTom Rini <trini@ti.com>
Wed, 12 Mar 2014 20:22:12 +0000 (16:22 -0400)
commitce6889a9978822172c50c92744f0ff11138e3e37
tree2023de2263b434a7b32b4b3b45e859e50523acc8tree | snapshot
parentd73f38f7ba4d8a6309b4c35830e46935c4cd6a55commit | diff
drivers/spi/omap3: Bug fix of premature write transfer completion

The logic determining SPI "write" transfer completion was faulty. At
certain conditions (e.g. slow SPI clock freq) the transfers were
interrupted before completion. Both EOT and TXS flags of channel
status registeer shall be checked to ensure that all data was
transferred. Tested on AM3359 chip.

Signed-off-by: Vasili Galka <vasili@visionmap.com>
drivers/spi/omap3_spi.c diff | blob | history
UBoot for KaRo TX COM modules