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inline | side by side (from parent 1:
c9e58b8)
The registers in the affected address range are all read only. There
is no use in trying to clear them.
static int fec_init(struct eth_device *dev, bd_t* bd)
{
struct fec_priv *fec = dev->priv;
static int fec_init(struct eth_device *dev, bd_t* bd)
{
struct fec_priv *fec = dev->priv;
- uint32_t *mib_ptr = (uint32_t *)&fec->eth->rmon_t_drop;
- int i;
/* Initialize MAC address */
fec_set_hwaddr(dev);
/* Initialize MAC address */
fec_set_hwaddr(dev);
writel(0x00000000, &fec->eth->gaddr1);
writel(0x00000000, &fec->eth->gaddr2);
writel(0x00000000, &fec->eth->gaddr1);
writel(0x00000000, &fec->eth->gaddr2);
-
- /* clear MIB RAM */
- for (i = 0; i <= 0xfc >> 2; i++)
- writel(0, &mib_ptr[i]);
-
/* FIFO receive start register */
writel(0x520, &fec->eth->r_fstart);
/* FIFO receive start register */
writel(0x520, &fec->eth->r_fstart);