LIB = $(obj)lib$(BOARD).o
ifeq ($(CONFIG_TX6_V2),)
-COBJS := tx6qdl.o
+COBJS-y := tx6qdl.o
else
-COBJS := tx6-1020.o
+COBJS-y := tx6-1020.o
endif
+COBJS-$(CONFIG_LTC3676) += ltc3676.o
+COBJS-$(CONFIG_RN5T618) += rn5t618.o
-SOBJS := lowlevel_init.o
-ifeq ($(CONFIG_CMD_ROMUPDATE),y)
- COBJS += flash.o
-endif
+COBJS-$(CONFIG_CMD_ROMUPDATE) += flash.o
+
+SOBJS-y := lowlevel_init.o
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
--- /dev/null
+/*
+ * Copyright (C) 2014 Lothar Waßmann <LW@KARO-electronics.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <asm/io.h>
+
+#include "pmic.h"
+
+#define LTC3676_BUCK1 0x01
+#define LTC3676_BUCK2 0x02
+#define LTC3676_BUCK3 0x03
+#define LTC3676_BUCK4 0x04
+#define LTC3676_DVB1A 0x0A
+#define LTC3676_DVB1B 0x0B
+#define LTC3676_DVB2A 0x0C
+#define LTC3676_DVB2B 0x0D
+#define LTC3676_DVB3A 0x0E
+#define LTC3676_DVB3B 0x0F
+#define LTC3676_DVB4A 0x10
+#define LTC3676_DVB4B 0x11
+#define LTC3676_MSKPG 0x13
+#define LTC3676_CLIRQ 0x1f
+
+#define LTC3676_BUCK_DVDT_FAST (1 << 0)
+#define LTC3676_BUCK_KEEP_ALIVE (1 << 1)
+#define LTC3676_BUCK_CLK_RATE_LOW (1 << 2)
+#define LTC3676_BUCK_PHASE_SEL (1 << 3)
+#define LTC3676_BUCK_ENABLE_300 (1 << 4)
+#define LTC3676_BUCK_PULSE_SKIP (0 << 5)
+#define LTC3676_BUCK_BURST_MODE (1 << 5)
+#define LTC3676_BUCK_CONTINUOUS (2 << 5)
+#define LTC3676_BUCK_ENABLE (1 << 7)
+
+#define LTC3676_PGOOD_MASK (1 << 5)
+
+#define LTC3676_MSKPG_BUCK1 (1 << 0)
+#define LTC3676_MSKPG_BUCK2 (1 << 1)
+#define LTC3676_MSKPG_BUCK3 (1 << 2)
+#define LTC3676_MSKPG_BUCK4 (1 << 3)
+#define LTC3676_MSKPG_LDO2 (1 << 5)
+#define LTC3676_MSKPG_LDO3 (1 << 6)
+#define LTC3676_MSKPG_LDO4 (1 << 7)
+
+#define VDD_IO_VAL mV_to_regval(vout_to_vref(3300 * 10, 5))
+#define VDD_IO_VAL_LP mV_to_regval(vout_to_vref(3100 * 10, 5))
+#define VDD_IO_VAL_2 mV_to_regval(vout_to_vref(3300 * 10, 5_2))
+#define VDD_IO_VAL_2_LP mV_to_regval(vout_to_vref(3100 * 10, 5_2))
+#define VDD_SOC_VAL mV_to_regval(vout_to_vref(1425 * 10, 6))
+#define VDD_SOC_VAL_LP mV_to_regval(vout_to_vref(900 * 10, 6))
+#define VDD_DDR_VAL mV_to_regval(vout_to_vref(1500 * 10, 7))
+#define VDD_DDR_VAL_LP mV_to_regval(vout_to_vref(1500 * 10, 7))
+#define VDD_CORE_VAL mV_to_regval(vout_to_vref(1425 * 10, 8))
+#define VDD_CORE_VAL_LP mV_to_regval(vout_to_vref(900 * 10, 8))
+
+/* LDO1 */
+#define R1_1 470
+#define R2_1 150
+/* LDO4 */
+#define R1_4 470
+#define R2_4 150
+/* Buck1 */
+#define R1_5 390
+#define R2_5 110
+#define R1_5_2 470
+#define R2_5_2 150
+/* Buck2 (SOC) */
+#define R1_6 150
+#define R2_6 180
+/* Buck3 (DDR) */
+#define R1_7 150
+#define R2_7 140
+/* Buck4 (CORE) */
+#define R1_8 150
+#define R2_8 180
+
+/* calculate voltages in 10mV */
+#define R1(idx) R1_##idx
+#define R2(idx) R2_##idx
+
+#define vout_to_vref(vout, idx) ((vout) * R2(idx) / (R1(idx) + R2(idx)))
+#define vref_to_vout(vref, idx) DIV_ROUND_UP((vref) * (R1(idx) + R2(idx)), R2(idx))
+
+#define mV_to_regval(mV) DIV_ROUND(((((mV) < 4125) ? 4125 : (mV)) - 4125), 125)
+#define regval_to_mV(v) (((v) * 125 + 4125))
+
+static struct ltc3676_regs {
+ u8 addr;
+ u8 val;
+ u8 mask;
+} ltc3676_regs[] = {
+ { LTC3676_MSKPG, ~LTC3676_MSKPG_BUCK1, },
+ { LTC3676_DVB2B, VDD_SOC_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
+ { LTC3676_DVB3B, VDD_DDR_VAL_LP, ~0x3f, },
+ { LTC3676_DVB4B, VDD_CORE_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
+ { LTC3676_DVB2A, VDD_SOC_VAL, ~0x3f, },
+ { LTC3676_DVB3A, VDD_DDR_VAL, ~0x3f, },
+ { LTC3676_DVB4A, VDD_CORE_VAL, ~0x3f, },
+ { LTC3676_BUCK1, LTC3676_BUCK_BURST_MODE | LTC3676_BUCK_CLK_RATE_LOW, },
+ { LTC3676_BUCK2, LTC3676_BUCK_BURST_MODE, },
+ { LTC3676_BUCK3, LTC3676_BUCK_BURST_MODE, },
+ { LTC3676_BUCK4, LTC3676_BUCK_BURST_MODE, },
+ { LTC3676_CLIRQ, 0, }, /* clear interrupt status */
+};
+
+static struct ltc3676_regs ltc3676_regs_1[] = {
+ { LTC3676_DVB1B, VDD_IO_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
+ { LTC3676_DVB1A, VDD_IO_VAL, ~0x3f, },
+};
+
+static struct ltc3676_regs ltc3676_regs_2[] = {
+ { LTC3676_DVB1B, VDD_IO_VAL_2_LP | LTC3676_PGOOD_MASK, ~0x3f, },
+ { LTC3676_DVB1A, VDD_IO_VAL_2, ~0x3f, },
+};
+
+static int tx6_rev_2(void)
+{
+ struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+ struct fuse_bank5_regs *fuse = (void *)ocotp->bank[5].fuse_regs;
+ u32 pad_settings = readl(&fuse->pad_settings);
+
+ debug("Fuse pad_settings @ %p = %02x\n",
+ &fuse->pad_settings, pad_settings);
+ return pad_settings & 1;
+}
+
+static int ltc3676_setup_regs(struct ltc3676_regs *r, size_t count)
+{
+ int ret;
+ int i;
+
+ for (i = 0; i < count; i++, r++) {
+#ifdef DEBUG
+ unsigned char value;
+
+ ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
+ if ((value & ~r->mask) != r->val) {
+ printf("Changing PMIC reg %02x from %02x to %02x\n",
+ r->addr, value, r->val);
+ }
+ if (ret) {
+ printf("%s: failed to read PMIC register %02x: %d\n",
+ __func__, r->addr, ret);
+ return ret;
+ }
+#endif
+ ret = i2c_write(CONFIG_SYS_I2C_SLAVE,
+ r->addr, 1, &r->val, 1);
+ if (ret) {
+ printf("%s: failed to write PMIC register %02x: %d\n",
+ __func__, r->addr, ret);
+ return ret;
+ }
+ }
+ return 0;
+}
+
+int setup_pmic_voltages(void)
+{
+ int ret;
+ unsigned char value;
+
+ ret = i2c_probe(CONFIG_SYS_I2C_SLAVE);
+ if (ret != 0) {
+ printf("Failed to initialize I2C\n");
+ return ret;
+ }
+
+ ret = i2c_read(CONFIG_SYS_I2C_SLAVE, 0x11, 1, &value, 1);
+ if (ret) {
+ printf("%s: i2c_read error: %d\n", __func__, ret);
+ return ret;
+ }
+
+ ret = ltc3676_setup_regs(ltc3676_regs, ARRAY_SIZE(ltc3676_regs));
+ if (ret)
+ return ret;
+
+ printf("VDDCORE set to %umV\n",
+ DIV_ROUND(vref_to_vout(regval_to_mV(VDD_CORE_VAL), 8), 10));
+ printf("VDDSOC set to %umV\n",
+ DIV_ROUND(vref_to_vout(regval_to_mV(VDD_SOC_VAL), 6), 10));
+
+ if (tx6_rev_2()) {
+ ret = ltc3676_setup_regs(ltc3676_regs_2,
+ ARRAY_SIZE(ltc3676_regs_2));
+ printf("VDDIO set to %umV\n",
+ DIV_ROUND(vref_to_vout(
+ regval_to_mV(VDD_IO_VAL_2), 5_2), 10));
+ } else {
+ ret = ltc3676_setup_regs(ltc3676_regs_1,
+ ARRAY_SIZE(ltc3676_regs_1));
+ }
+ return ret;
+}
--- /dev/null
+/*
+ * Copyright (C) 2014 Lothar Waßmann <LW@KARO-electronics.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+int setup_pmic_voltages(void);
--- /dev/null
+/*
+ * Copyright (C) 2014 Lothar Waßmann <LW@KARO-electronics.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <i2c.h>
+
+#include "pmic.h"
+
+#define RN5T618_NOETIMSET 0x11
+#define RN5T618_LDORTC1_SLOT 0x2a
+#define RN5T618_DC1CTL 0x2c
+#define RN5T618_DC1CTL2 0x2d
+#define RN5T618_DC2CTL 0x2e
+#define RN5T618_DC2CTL2 0x2f
+#define RN5T618_DC3CTL 0x30
+#define RN5T618_DC3CTL2 0x31
+#define RN5T618_DC1DAC 0x36 /* CORE */
+#define RN5T618_DC2DAC 0x37 /* SOC */
+#define RN5T618_DC3DAC 0x38 /* DDR */
+#define RN5T618_DC1DAC_SLP 0x3b
+#define RN5T618_DC2DAC_SLP 0x3c
+#define RN5T618_DC3DAC_SLP 0x3d
+#define RN5T618_LDOEN1 0x44
+#define RN5T618_LDODIS 0x46
+#define RN5T618_LDOEN2 0x48
+#define RN5T618_LDO3DAC 0x4e /* IO */
+#define RN5T618_LDORTCDAC 0x56 /* VBACKUP */
+
+#define VDD_RTC_VAL mV_to_regval_rtc(3000 * 10)
+#define VDD_HIGH_VAL mV_to_regval3(3000 * 10)
+#define VDD_HIGH_VAL_LP mV_to_regval3(3000 * 10)
+#define VDD_CORE_VAL mV_to_regval(1425 * 10)
+#define VDD_CORE_VAL_LP mV_to_regval(900 * 10)
+#define VDD_SOC_VAL mV_to_regval(1425 * 10)
+#define VDD_SOC_VAL_LP mV_to_regval(900 * 10)
+#define VDD_DDR_VAL mV_to_regval(1500 * 10)
+#define VDD_DDR_VAL_LP mV_to_regval(1500 * 10)
+
+/* calculate voltages in 10mV */
+/* DCDC1-3 */
+#define mV_to_regval(mV) DIV_ROUND(((((mV) < 6000) ? 6000 : (mV)) - 6000), 125)
+#define regval_to_mV(v) (((v) * 125 + 6000))
+
+/* LDO1-2 */
+#define mV_to_regval2(mV) DIV_ROUND(((((mV) < 9000) ? 9000 : (mV)) - 9000), 250)
+#define regval2_to_mV(v) (((v) * 250 + 9000))
+
+/* LDO3 */
+#define mV_to_regval3(mV) DIV_ROUND(((((mV) < 6000) ? 6000 : (mV)) - 6000), 250)
+#define regval3_to_mV(v) (((v) * 250 + 6000))
+
+/* LDORTC */
+#define mV_to_regval_rtc(mV) DIV_ROUND(((((mV) < 17000) ? 17000 : (mV)) - 17000), 250)
+#define regval_rtc_to_mV(v) (((v) * 250 + 17000))
+
+static struct rn5t618_regs {
+ u8 addr;
+ u8 val;
+ u8 mask;
+} rn5t618_regs[] = {
+ { RN5T618_NOETIMSET, 0, },
+ { RN5T618_DC1DAC, VDD_CORE_VAL, },
+ { RN5T618_DC2DAC, VDD_SOC_VAL, },
+ { RN5T618_DC3DAC, VDD_DDR_VAL, },
+ { RN5T618_DC1DAC_SLP, VDD_CORE_VAL_LP, },
+ { RN5T618_DC2DAC_SLP, VDD_SOC_VAL_LP, },
+ { RN5T618_DC3DAC_SLP, VDD_DDR_VAL_LP, },
+ { RN5T618_LDOEN1, 0x01f, ~0x1f, },
+ { RN5T618_LDOEN2, 0x10, ~0x30, },
+ { RN5T618_LDODIS, 0x00, },
+ { RN5T618_LDO3DAC, VDD_HIGH_VAL, },
+ { RN5T618_LDORTCDAC, VDD_RTC_VAL, },
+ { RN5T618_LDORTC1_SLOT, 0x0f, ~0x3f, },
+};
+
+static int rn5t618_setup_regs(struct rn5t618_regs *r, size_t count)
+{
+ int ret;
+ int i;
+
+ for (i = 0; i < count; i++, r++) {
+ unsigned char value;
+
+ ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
+ printf("PMIC reg %02x = %02x\n",
+ r->addr, value);
+ }
+ for (i = 0; i < count; i++, r++) {
+#ifdef DEBUG
+ unsigned char value;
+
+ ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
+ if ((value & ~r->mask) != r->val) {
+ printf("Changing PMIC reg %02x from %02x to %02x\n",
+ r->addr, value, r->val);
+ }
+ if (ret) {
+ printf("%s: failed to read PMIC register %02x: %d\n",
+ __func__, r->addr, ret);
+ return ret;
+ }
+#endif
+ ret = i2c_write(CONFIG_SYS_I2C_SLAVE,
+ r->addr, 1, &r->val, 1);
+ if (ret) {
+ printf("%s: failed to write PMIC register %02x: %d\n",
+ __func__, r->addr, ret);
+ return ret;
+ }
+#ifdef DEBUG
+ ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
+ printf("PMIC reg %02x is %02x\n", r->addr, value);
+#endif
+ }
+ return 0;
+}
+
+int setup_pmic_voltages(void)
+{
+ int ret;
+ unsigned char value;
+
+ ret = i2c_probe(CONFIG_SYS_I2C_SLAVE);
+ if (ret != 0) {
+ printf("Failed to initialize I2C\n");
+ return ret;
+ }
+
+ ret = i2c_read(CONFIG_SYS_I2C_SLAVE, 0x11, 1, &value, 1);
+ if (ret) {
+ printf("%s: i2c_read error: %d\n", __func__, ret);
+ return ret;
+ }
+
+ ret = rn5t618_setup_regs(rn5t618_regs, ARRAY_SIZE(rn5t618_regs));
+ if (ret)
+ return ret;
+
+ printf("VDDCORE set to %umV\n",
+ DIV_ROUND(regval_to_mV(VDD_CORE_VAL), 10));
+ printf("VDDSOC set to %umV\n",
+ DIV_ROUND(regval_to_mV(VDD_SOC_VAL), 10));
+
+ return ret;
+}
#include <asm/arch/sys_proto.h>
#include "../common/karo.h"
+#include "pmic.h"
#define TX6_FEC_RST_GPIO IMX_GPIO_NR(7, 6)
#define TX6_FEC_PWR_GPIO IMX_GPIO_NR(3, 20)
check_cpu_temperature(1);
}
-#define RN5T618_NOETIMSET 0x11
-#define RN5T618_LDORTC1_SLOT 0x2a
-#define RN5T618_DC1CTL 0x2c
-#define RN5T618_DC1CTL2 0x2d
-#define RN5T618_DC2CTL 0x2e
-#define RN5T618_DC2CTL2 0x2f
-#define RN5T618_DC3CTL 0x30
-#define RN5T618_DC3CTL2 0x31
-#define RN5T618_DC1DAC 0x36 /* CORE */
-#define RN5T618_DC2DAC 0x37 /* SOC */
-#define RN5T618_DC3DAC 0x38 /* DDR */
-#define RN5T618_DC1DAC_SLP 0x3b
-#define RN5T618_DC2DAC_SLP 0x3c
-#define RN5T618_DC3DAC_SLP 0x3d
-#define RN5T618_LDOEN1 0x44
-#define RN5T618_LDODIS 0x46
-#define RN5T618_LDOEN2 0x48
-#define RN5T618_LDO3DAC 0x4e /* IO */
-#define RN5T618_LDORTCDAC 0x56 /* VBACKUP */
-
-#define VDD_RTC_VAL mV_to_regval_rtc(3000 * 10)
-#define VDD_HIGH_VAL mV_to_regval3(3000 * 10)
-#define VDD_HIGH_VAL_LP mV_to_regval3(3000 * 10)
-#define VDD_CORE_VAL mV_to_regval(1425 * 10)
-#define VDD_CORE_VAL_LP mV_to_regval(900 * 10)
-#define VDD_SOC_VAL mV_to_regval(1425 * 10)
-#define VDD_SOC_VAL_LP mV_to_regval(900 * 10)
-#define VDD_DDR_VAL mV_to_regval(1500 * 10)
-#define VDD_DDR_VAL_LP mV_to_regval(1500 * 10)
-
-/* calculate voltages in 10mV */
-/* DCDC1-3 */
-#define mV_to_regval(mV) DIV_ROUND(((((mV) < 6000) ? 6000 : (mV)) - 6000), 125)
-#define regval_to_mV(v) (((v) * 125 + 6000))
-
-/* LDO1-2 */
-#define mV_to_regval2(mV) DIV_ROUND(((((mV) < 9000) ? 9000 : (mV)) - 9000), 250)
-#define regval2_to_mV(v) (((v) * 250 + 9000))
-
-/* LDO3 */
-#define mV_to_regval3(mV) DIV_ROUND(((((mV) < 6000) ? 6000 : (mV)) - 6000), 250)
-#define regval3_to_mV(v) (((v) * 250 + 6000))
-
-/* LDORTC */
-#define mV_to_regval_rtc(mV) DIV_ROUND(((((mV) < 17000) ? 17000 : (mV)) - 17000), 250)
-#define regval_rtc_to_mV(v) (((v) * 250 + 17000))
-
-static struct rn5t618_regs {
- u8 addr;
- u8 val;
- u8 mask;
-} rn5t618_regs[] = {
- { RN5T618_NOETIMSET, 0, },
- { RN5T618_DC1DAC, VDD_CORE_VAL, },
- { RN5T618_DC2DAC, VDD_SOC_VAL, },
- { RN5T618_DC3DAC, VDD_DDR_VAL, },
- { RN5T618_DC1DAC_SLP, VDD_CORE_VAL_LP, },
- { RN5T618_DC2DAC_SLP, VDD_SOC_VAL_LP, },
- { RN5T618_DC3DAC_SLP, VDD_DDR_VAL_LP, },
- { RN5T618_LDOEN1, 0x01f, ~0x1f, },
- { RN5T618_LDOEN2, 0x10, ~0x30, },
- { RN5T618_LDODIS, 0x00, },
- { RN5T618_LDO3DAC, VDD_HIGH_VAL, },
- { RN5T618_LDORTCDAC, VDD_RTC_VAL, },
- { RN5T618_LDORTC1_SLOT, 0x0f, ~0x3f, },
-};
-
-static int tx6_rn5t618_setup_regs(struct rn5t618_regs *r, size_t count)
-{
- int ret;
- int i;
-
- for (i = 0; i < count; i++, r++) {
-#ifdef DEBUG
- unsigned char value;
-
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
- if ((value & ~r->mask) != r->val) {
- printf("Changing PMIC reg %02x from %02x to %02x\n",
- r->addr, value, r->val);
- }
- if (ret) {
- printf("%s: failed to read PMIC register %02x: %d\n",
- __func__, r->addr, ret);
- return ret;
- }
-#endif
- ret = i2c_write(CONFIG_SYS_I2C_SLAVE,
- r->addr, 1, &r->val, 1);
- if (ret) {
- printf("%s: failed to write PMIC register %02x: %d\n",
- __func__, r->addr, ret);
- return ret;
- }
-#ifdef DEBUG
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
- printf("PMIC reg %02x is %02x\n", r->addr, value);
-#endif
- }
- return 0;
-}
-
-static int setup_pmic_voltages(void)
-{
- int ret;
- unsigned char value;
-
- ret = i2c_probe(CONFIG_SYS_I2C_SLAVE);
- if (ret != 0) {
- printf("Failed to initialize I2C\n");
- return ret;
- }
-
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, 0x11, 1, &value, 1);
- if (ret) {
- printf("%s: i2c_read error: %d\n", __func__, ret);
- return ret;
- }
-
- ret = tx6_rn5t618_setup_regs(rn5t618_regs, ARRAY_SIZE(rn5t618_regs));
- if (ret)
- return ret;
-
- printf("VDDCORE set to %umV\n",
- DIV_ROUND(regval_to_mV(VDD_CORE_VAL), 10));
- printf("VDDSOC set to %umV\n",
- DIV_ROUND(regval_to_mV(VDD_SOC_VAL), 10));
-
- return ret;
-}
-
int board_early_init_f(void)
{
gpio_request_array(tx6qdl_gpios, ARRAY_SIZE(tx6qdl_gpios));
#include <asm/arch/sys_proto.h>
#include "../common/karo.h"
+#include "pmic.h"
#define TX6_FEC_RST_GPIO IMX_GPIO_NR(7, 6)
#define TX6_FEC_PWR_GPIO IMX_GPIO_NR(3, 20)
check_cpu_temperature(1);
}
-#define LTC3676_BUCK1 0x01
-#define LTC3676_BUCK2 0x02
-#define LTC3676_BUCK3 0x03
-#define LTC3676_BUCK4 0x04
-#define LTC3676_DVB1A 0x0A
-#define LTC3676_DVB1B 0x0B
-#define LTC3676_DVB2A 0x0C
-#define LTC3676_DVB2B 0x0D
-#define LTC3676_DVB3A 0x0E
-#define LTC3676_DVB3B 0x0F
-#define LTC3676_DVB4A 0x10
-#define LTC3676_DVB4B 0x11
-#define LTC3676_MSKPG 0x13
-#define LTC3676_CLIRQ 0x1f
-
-#define LTC3676_BUCK_DVDT_FAST (1 << 0)
-#define LTC3676_BUCK_KEEP_ALIVE (1 << 1)
-#define LTC3676_BUCK_CLK_RATE_LOW (1 << 2)
-#define LTC3676_BUCK_PHASE_SEL (1 << 3)
-#define LTC3676_BUCK_ENABLE_300 (1 << 4)
-#define LTC3676_BUCK_PULSE_SKIP (0 << 5)
-#define LTC3676_BUCK_BURST_MODE (1 << 5)
-#define LTC3676_BUCK_CONTINUOUS (2 << 5)
-#define LTC3676_BUCK_ENABLE (1 << 7)
-
-#define LTC3676_PGOOD_MASK (1 << 5)
-
-#define LTC3676_MSKPG_BUCK1 (1 << 0)
-#define LTC3676_MSKPG_BUCK2 (1 << 1)
-#define LTC3676_MSKPG_BUCK3 (1 << 2)
-#define LTC3676_MSKPG_BUCK4 (1 << 3)
-#define LTC3676_MSKPG_LDO2 (1 << 5)
-#define LTC3676_MSKPG_LDO3 (1 << 6)
-#define LTC3676_MSKPG_LDO4 (1 << 7)
-
-#define VDD_IO_VAL mV_to_regval(vout_to_vref(3300 * 10, 5))
-#define VDD_IO_VAL_LP mV_to_regval(vout_to_vref(3100 * 10, 5))
-#define VDD_IO_VAL_2 mV_to_regval(vout_to_vref(3300 * 10, 5_2))
-#define VDD_IO_VAL_2_LP mV_to_regval(vout_to_vref(3100 * 10, 5_2))
-#define VDD_SOC_VAL mV_to_regval(vout_to_vref(1425 * 10, 6))
-#define VDD_SOC_VAL_LP mV_to_regval(vout_to_vref(900 * 10, 6))
-#define VDD_DDR_VAL mV_to_regval(vout_to_vref(1500 * 10, 7))
-#define VDD_DDR_VAL_LP mV_to_regval(vout_to_vref(1500 * 10, 7))
-#define VDD_CORE_VAL mV_to_regval(vout_to_vref(1425 * 10, 8))
-#define VDD_CORE_VAL_LP mV_to_regval(vout_to_vref(900 * 10, 8))
-
-/* LDO1 */
-#define R1_1 470
-#define R2_1 150
-/* LDO4 */
-#define R1_4 470
-#define R2_4 150
-/* Buck1 */
-#define R1_5 390
-#define R2_5 110
-#define R1_5_2 470
-#define R2_5_2 150
-/* Buck2 (SOC) */
-#define R1_6 150
-#define R2_6 180
-/* Buck3 (DDR) */
-#define R1_7 150
-#define R2_7 140
-/* Buck4 (CORE) */
-#define R1_8 150
-#define R2_8 180
-
-/* calculate voltages in 10mV */
-#define R1(idx) R1_##idx
-#define R2(idx) R2_##idx
-
-#define vout_to_vref(vout, idx) ((vout) * R2(idx) / (R1(idx) + R2(idx)))
-#define vref_to_vout(vref, idx) DIV_ROUND_UP((vref) * (R1(idx) + R2(idx)), R2(idx))
-
-#define mV_to_regval(mV) DIV_ROUND(((((mV) < 4125) ? 4125 : (mV)) - 4125), 125)
-#define regval_to_mV(v) (((v) * 125 + 4125))
-
-static struct ltc3673_regs {
- u8 addr;
- u8 val;
- u8 mask;
-} ltc3676_regs[] = {
- { LTC3676_MSKPG, ~LTC3676_MSKPG_BUCK1, },
- { LTC3676_DVB2B, VDD_SOC_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
- { LTC3676_DVB3B, VDD_DDR_VAL_LP, ~0x3f, },
- { LTC3676_DVB4B, VDD_CORE_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
- { LTC3676_DVB2A, VDD_SOC_VAL, ~0x3f, },
- { LTC3676_DVB3A, VDD_DDR_VAL, ~0x3f, },
- { LTC3676_DVB4A, VDD_CORE_VAL, ~0x3f, },
- { LTC3676_BUCK1, LTC3676_BUCK_BURST_MODE | LTC3676_BUCK_CLK_RATE_LOW, },
- { LTC3676_BUCK2, LTC3676_BUCK_BURST_MODE, },
- { LTC3676_BUCK3, LTC3676_BUCK_BURST_MODE, },
- { LTC3676_BUCK4, LTC3676_BUCK_BURST_MODE, },
- { LTC3676_CLIRQ, 0, }, /* clear interrupt status */
-};
-
-static struct ltc3673_regs ltc3676_regs_1[] = {
- { LTC3676_DVB1B, VDD_IO_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
- { LTC3676_DVB1A, VDD_IO_VAL, ~0x3f, },
-};
-
-static struct ltc3673_regs ltc3676_regs_2[] = {
- { LTC3676_DVB1B, VDD_IO_VAL_2_LP | LTC3676_PGOOD_MASK, ~0x3f, },
- { LTC3676_DVB1A, VDD_IO_VAL_2, ~0x3f, },
-};
-
-static int tx6_rev_2(void)
-{
- struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
- struct fuse_bank5_regs *fuse = (void *)ocotp->bank[5].fuse_regs;
- u32 pad_settings = readl(&fuse->pad_settings);
-
- debug("Fuse pad_settings @ %p = %02x\n",
- &fuse->pad_settings, pad_settings);
- return pad_settings & 1;
-}
-
-static int tx6_ltc3676_setup_regs(struct ltc3673_regs *r, size_t count)
-{
- int ret;
- int i;
-
- for (i = 0; i < count; i++, r++) {
-#ifdef DEBUG
- unsigned char value;
-
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
- if ((value & ~r->mask) != r->val) {
- printf("Changing PMIC reg %02x from %02x to %02x\n",
- r->addr, value, r->val);
- }
- if (ret) {
- printf("%s: failed to read PMIC register %02x: %d\n",
- __func__, r->addr, ret);
- return ret;
- }
-#endif
- ret = i2c_write(CONFIG_SYS_I2C_SLAVE,
- r->addr, 1, &r->val, 1);
- if (ret) {
- printf("%s: failed to write PMIC register %02x: %d\n",
- __func__, r->addr, ret);
- return ret;
- }
- }
- return 0;
-}
-
-static int setup_pmic_voltages(void)
-{
- int ret;
- unsigned char value;
-
- ret = i2c_probe(CONFIG_SYS_I2C_SLAVE);
- if (ret != 0) {
- printf("Failed to initialize I2C\n");
- return ret;
- }
-
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, 0x11, 1, &value, 1);
- if (ret) {
- printf("%s: i2c_read error: %d\n", __func__, ret);
- return ret;
- }
-
- ret = tx6_ltc3676_setup_regs(ltc3676_regs, ARRAY_SIZE(ltc3676_regs));
- if (ret)
- return ret;
-
- printf("VDDCORE set to %umV\n",
- DIV_ROUND(vref_to_vout(regval_to_mV(VDD_CORE_VAL), 8), 10));
- printf("VDDSOC set to %umV\n",
- DIV_ROUND(vref_to_vout(regval_to_mV(VDD_SOC_VAL), 6), 10));
-
- if (tx6_rev_2()) {
- ret = tx6_ltc3676_setup_regs(ltc3676_regs_2,
- ARRAY_SIZE(ltc3676_regs_2));
- printf("VDDIO set to %umV\n",
- DIV_ROUND(vref_to_vout(
- regval_to_mV(VDD_IO_VAL_2), 5_2), 10));
- } else {
- ret = tx6_ltc3676_setup_regs(ltc3676_regs_1,
- ARRAY_SIZE(ltc3676_regs_1));
- }
- return ret;
-}
-
int board_early_init_f(void)
{
gpio_request_array(tx6qdl_gpios, ARRAY_SIZE(tx6qdl_gpios));
#define CONFIG_SYS_I2C_SPEED 400000
#ifndef CONFIG_TX6_V2
#define CONFIG_SYS_I2C_SLAVE 0x3c
+#define CONFIG_LTC3676
#else
#define CONFIG_SYS_I2C_SLAVE 0x32
+#define CONFIG_RN5T618
#endif
#endif
projects / karo-tx-uboot.git / commitdiff