net: Improve 88E151x PHY initialization

- The EEE fixup magic should also be enabled for RGMII
- Improved comments

Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Hao Zhang <hzhang@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 9437c3bbccd3bdc1695441673c289cc975445751..cff5c875dc766b72e889177c80e8faa4b192df50 100644 (file)
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -303,24 +303,33 @@ static int m88e1518_config(struct phy_device *phydev)
         * As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512
         * /88E1514 Rev A0, Errata Section 3.1
         */
         * As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512
         * /88E1514 Rev A0, Errata Section 3.1
         */

+
+       /* EEE initialization */
+       phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x00ff);
+       phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x214B);
+       phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x2144);
+       phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x0C28);
+       phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x2146);
+       phy_write(phydev, MDIO_DEVAD_NONE, 17, 0xB233);
+       phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x214D);
+       phy_write(phydev, MDIO_DEVAD_NONE, 17, 0xCC0C);
+       phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x2159);
+       phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0000);
+
+       /* SGMII-to-Copper mode initialization */

        if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
        if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {

-               phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x00ff); /* page 0xff */
-               phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x214B);
-               phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x2144);
-               phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x0C28);
-               phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x2146);
-               phy_write(phydev, MDIO_DEVAD_NONE, 17, 0xB233);
-               phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x214D);
-               phy_write(phydev, MDIO_DEVAD_NONE, 17, 0xCC0C);
-               phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x2159);
-               phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0000); /* reg page 0 */
-               phy_write(phydev, MDIO_DEVAD_NONE, 22, 18);    /* reg page 18 */
-               /* Write HWCFG_MODE = SGMII to Copper */
+               /* Select page 18 */
+               phy_write(phydev, MDIO_DEVAD_NONE, 22, 18);
+
+               /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */

                m88e1518_phy_writebits(phydev, 20, 0, 3, 1);
 
                m88e1518_phy_writebits(phydev, 20, 0, 3, 1);
 

-               /* Phy reset */
+               /* PHY reset is necessary after changing MODE[2:0] */

                m88e1518_phy_writebits(phydev, 20, 15, 1, 1);
                m88e1518_phy_writebits(phydev, 20, 15, 1, 1);

-               phy_write(phydev, MDIO_DEVAD_NONE, 22, 0);     /* reg page 18 */
+
+               /* Reset page selection */
+               phy_write(phydev, MDIO_DEVAD_NONE, 22, 0);
+

                udelay(100);
        }
 
                udelay(100);
        }