+commit 161e4ae46046282fde6a69a0f1f80965f2a1b6f4
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Jun 17 07:01:40 2010 +0200
+
+ powerpc: fix wrong comment at GOT definitions
+
+ r12 is used for accessing the GOT not r14. Fix this in the
+ comment.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 7030d56b7946c8db2e8082a9b84cd69b9540a0ca
+Author: Becky Bruce <beckyb@kernel.crashing.org>
+Date: Thu Jun 17 11:37:27 2010 -0500
+
+ MAKEALL: Add missing powerpc 36-bit targets
+
+ We were missing 8641HPCN_36BIT and MPC8536DS_36BIT.
+
+ Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
+
+commit e03b4d296b27790de3b25edd32784d20538240d8
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Sat Jun 26 00:39:28 2010 +0200
+
+ Fix compiler warnings for EVB64260, P3G4 and ZUMA
+
+ Fix following warnings:
+
+ $ ./MAKEALL EVB64260 P3G4 ZUMA
+ Configuring for EVB64260 board...
+ mpsc.c: In function 'mpsc_putchar_early':
+ mpsc.c:121: warning: dereferencing type-punned pointer will break strict-aliasing rules
+ mpsc.c:127: warning: dereferencing type-punned pointer will break strict-aliasing rules
+ ...
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 9fb3b5085787baad8a133e347ad12c5b3a022e98
+Author: Sergei Shtylyov <sshtylyov@ru.mvista.com>
+Date: Mon Jun 28 22:44:49 2010 +0400
+
+ EHCI: zero out QH transfer overlay in ehci_submit_async()
+
+ ehci_submit_async() doesn't really zero out the QH transfer overlay (as the EHCI
+ specification suggests) which leads to the controller seeing the "token" field
+ as the previous call has left it, i.e.:
+ - if a timeout occured on the previous call (Active bit left as 1), controller
+ incorrectly tries to complete a previous transaction on a newly programmed
+ endpoint;
+ - if a halt occured on the previous call (Halted bit set to 1), controller just
+ ignores the newly programmed TD(s) and the function then keeps returning error
+ ad infinitum.
+
+ This turned out to be caused by the wrong orger of the arguments to the memset()
+ call in ehci_alloc(), so the allocated TDs weren't cleared either.
+
+ While at it, stop needlessly initializing the alternate next TD pointer in the
+ QH transfer overlay...
+
+ Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
+ Acked-by: Remy Bohmer <linux@bohmer.net>
+
+commit 0d7f4abcf6bbef06504c82e03f11054468262430
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Thu Jun 17 21:17:08 2010 +0200
+
+ Fix console_buffer size conflict error.
+
+ The console_buffer size is declared in common/main.c as
+ -- char console_buffer[CONFIG_SYS_CBSIZE + 1];
+ so this extern definition is wrong.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit 38c38c344c200ee90cfd243671473c449b6f0815
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date: Tue Jun 22 12:50:46 2010 +0530
+
+ 85xx/p1_p2_rdb: Added RevD board version support
+
+ - Also modified the code to use io accessors.
+
+ Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+ Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
+ Acked-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c987f4753b0afadb38acd7e61df7ba11e8a0203f
+Author: Felix Radensky <felix@embedded-sol.com>
+Date: Mon Jun 28 01:57:39 2010 +0300
+
+ tsec: Fix eTSEC2 link problem on P2020RDB
+
+ On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII.
+ Current TBI PHY settings for SGMII mode cause link problems on
+ this platform, link never comes up.
+
+ Fix this by making TBI PHY settings configurable and add a working
+ configuration for P2020RDB.
+
+ Signed-off-by: Felix Radensky <felix@embedded-sol.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+ Acked-by: Peter Tyser <ptyser@xes-inc.com>
+ Tested-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit d3bee08332fbc9cc5b6dc22ecd34050a85d44d0a
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date: Wed Jun 23 19:32:28 2010 +0530
+
+ 85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHz
+
+ Use a slighly larger value of CLK_CTRL for DDR at 667MHz
+ which fixes random crashes while linux booting.
+
+ Applicable for both NAND and NOR boot.
+
+ Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
+ Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit cdc6363f423900645265563d705a0a5a964ae40c
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date: Wed Jun 23 19:42:07 2010 +0530
+
+ 85xx/p1_p2_rdb: not able to modify "$bootfile" environment variable
+
+ Because the variable was getting defined twice.
+
+ Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 4ccd5510e50b5675227a1fe0e5ca099d333f637d
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Jun 29 01:33:35 2010 +0200
+
+ MPC512x: workaround data corruption for unaligned local bus accesses
+
+ Commit 460c2ce3 "MPC5200: workaround data corruption for unaligned
+ local bus accesses" fixed the problem for MPC5200 only, but MPC512x is
+ affected as well, so apply the same fix here, too.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Cc: Detlev Zundel <dzu@denx.de>
+ Cc: Anatolij Gustschin <agust@denx.de>
+ Acked-by: Detlev Zundel <dzu@denx.de>
+
+commit 482126e27b3dbf0e69a6445da8b94b3551adf05d
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Jun 23 20:50:54 2010 +0200
+
+ Prepare v2010.06-rc3
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 460c2ce362e56890c2a029e2c3b1ff2796c7fc54
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Jun 21 22:29:59 2010 +0200
+
+ MPC5200: workaround data corruption for unaligned local bus accesses
+
+ The MPC5200 has a nasty problem that will cause silent data corruption
+ when performing unaligned 16 or 32 byte accesses when reading from the
+ local bus - typically this affects reading from flash. The problem can
+ be easily shown:
+
+ => md fc0c0000 10
+ fc0c0000: 323e4337 01626f6f 74636d64 3d72756e 2>C7.bootcmd=run
+ fc0c0010: 206e6574 5f6e6673 00626f6f 7464656c net_nfs.bootdel
+ fc0c0020: 61793d35 00626175 64726174 653d3131 ay=5.baudrate=11
+ fc0c0030: 35323030 00707265 626f6f74 3d656368 5200.preboot=ech
+ => md fc0c0001 10
+ fc0c0001: 65636801 00000074 0000003d 00000020 ech....t...=...
+ fc0c0011: 0000005f 00000000 00000074 00000061 ..._.......t...a
+ fc0c0021: 00000000 00000064 00000065 00000035 .......d...e...5
+ fc0c0031: 00000000 00000062 0000003d 0000006f .......b...=...o
+ => md.w fc0c0001 10
+ fc0c0001: 0000 3701 0000 6f74 0000 643d 0000 6e20 ..7...ot..d=..n
+ fc0c0011: 0000 745f 0000 7300 0000 6f74 0000 6c61 ..t_..s...ot..la
+
+ This commit implements a workaround at least for the most blatant
+ problem: using memcpy() from NOR flash. We rename the assembler
+ routine into __memcpy() and provide a wrapper, which will use a
+ byte-wise copy loop for unaligned source or target addresses when
+ reading from NOR flash, and branch to the optimized __memcpy()
+ in all other cases, thus minimizing the performance impact.
+
+ Tested on lite5200b and TQM5200S.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Cc: Detlev Zundel <dzu@denx.de>
+
+commit 47ea6edfb3004fb2d2a979e19c3f6e4e32f45e51
+Author: Minkyu Kang <mk7.kang@samsung.com>
+Date: Fri Jun 18 19:31:10 2010 +0900
+
+ ARM: remove unused VIDEOLFB ATAG
+
+ ATAG_VIDEOLFB is not used anywhere.
+ The belowing warning is occurred due to this ATAG.
+
+ [ 0.000000] Ignoring unrecognised tag 0x54410008
+
+ This patch fixed it.
+
+ Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Acked-by: Martin Krause <Martin.Krause@tqs.de>
+
+commit ceeba0030844b2e84ce4e47f4be7ad347cd1e827
+Author: Peter Horton <zero@colonel-panic.org>
+Date: Sat Jun 12 10:11:56 2010 +0900
+
+ UBI: initialise update marker
+
+ UBI: initialise update marker
+
+ The in kernel copy of a volume's update marker is not initialised from the
+ volume table. This means that volumes where an update was unfinnished will
+ not be treated as "forbidden to use". This is basically that the update
+ functionality was broken.
+
+ Signed-off-by: Peter Horton <zero@colonel-panic.org>
+ Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit b8c4eea56b5f41f9bdbb89d3d5c79b7d282d513c
+Author: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+Date: Wed Apr 14 15:32:06 2010 +0200
+
+ remove myself as a maintainer of several ARM boards
+
+ Since I haven't been actively maintaining these boards for a long while,
+ keeping myself as their maintainer makes no sense.
+
+ Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+
+commit d6b937142008463d628ef26a753f9c20c57f3617
+Author: Ilya Yanok <yanok@emcraft.com>
+Date: Mon Jun 21 18:13:21 2010 +0400
+
+ Makefile: always call date with LC_ALL=C set
+
+ Ensure that date is called only with LC_ALL=C locale set to make dates
+ locale neutral thus preventing lurking of non-ASCII characters into
+ U-Boot binary.
+
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+
+ Changed LANG= into LC_ALL= as suggested by Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 23fdf0580660edf38cb7118f05b8865f2f73c674
+Author: Albert Aribaud <[albert.aribaud@free.fr]>
+Date: Tue Jun 22 15:50:28 2010 +0530
+
+ Fix wrong orion5x MPP and GIPO writel arguments
+
+ Orion5x MPP and GPIO setting code had writel arguments
+ the wrong way around. Fixed and tested.
+
+ Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
+
+commit 95bc39e848dd3f741a064c826d1c282c48125d41
+Author: Terry Lv <r65388@freescale.com>
+Date: Thu May 6 18:30:55 2010 +0800
+
+ ARM: fix bug in macro __arch_ioremap.
+
+ Signed-off-by: Terry Lv <r65388@freescale.com>
+
+ Fix commit message and code formatting.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a71da1b6c96205549ca2e7cf991e2340181bbfcf
+Author: Vitaly Kuzmichev <vkuzmichev@mvista.com>
+Date: Tue Jun 15 22:18:11 2010 +0400
+
+ ARM: Align stack to 8 bytes
+
+ The ARM ABI requires that the stack be aligned to 8 bytes as it is noted
+ in Procedure Call Standard for the ARM Architecture:
+ http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/index.html
+
+ Unaligned SP also causes the problem with variable-length arrays
+ allocation when VLA address becomes less than stack pointer during
+ aligning of this address, so the next 'push' in the stack overwrites
+ first 4 bytes of VLA.
+
+ Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
+
+ Tested on tx25(mx25), imx27lite(mx27), qong(mx31) and trab(s3c2400)
+ Tested-by: Wolfgang Denk <wd@denx.de>
+
+commit 6de27bdc788e7c4532ee0721ae291aeb5df475dc
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Jun 20 12:32:37 2010 +0200
+
+ net/eth.c: eth_mac_skip() is only needed when CONFIG_NET_MULTI is set
+
+ Move it inside the #ifdef CONFIG_NET_MULTI to avoid
+
+ eth.c:64: warning: 'eth_mac_skip' defined but not used
+
+ messages from a number of old, non-CONFIG_NET_MULTI boards.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit e397e59e861aa818cda12a23206dde06f7e9f660
+Author: Fillod Stephane <stephane.fillod@grassvalley.com>
+Date: Fri Jun 11 19:26:43 2010 +0200
+
+ ip/defrag: fix processing of last short fragment
+
+ TFTP'ing a file of size 1747851 bytes with CONFIG_IP_DEFRAG and
+ CONFIG_TFTP_BLOCKSIZE set to 4096 fails with a timeout, because
+ the last fragment is not taken into account. This patch fixes
+ IP fragments having less than 8 bytes of payload.
+
+ Signed-off-by: Stephane Fillod <stephane.fillod@grassvalley.com>
+ Acked-by: Alessandro Rubini <rubini@gnudd.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 9c00b2f0a3fe0f779761607024f99b7690c9776c
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Jun 20 12:30:22 2010 +0200
+
+ net/eth.c: eth_mac_skip() is only needed when CONFIG_NET_MULTI is set
+
+ Move it inside the #ifdef CONFIG_NET_MULTI to avoid
+
+ eth.c:64: warning: 'eth_mac_skip' defined but not used
+
+ messages from anumber of old, non-CONFIG_NET_MULTI boards.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Cc: Ben Warren <biggerbadderben@gmail.com>
+
+commit 9312bba01a41191f20821b66b84b3ff1d2902e8a
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Jun 20 02:16:44 2010 +0200
+
+ include/compiler.h: remove redundant declaration of errno
+
+ Commit 37566090 "compiler.h: unify system ifdef cruft here" added both
+ a "#include <errno.h>" and a "extern int errno;" to include/compiler.h
+ which is causing build warnings for some systems, for example for the
+ "netstar" board:
+
+ In file included from /home/wd/git/u-boot/work/lib/crc32.c:15:
+ include/compiler.h:28: warning: function declaration isn't a prototype
+
+ The declaration of "errno" should be redundant, as <errno.h> is
+ supposed to provide a correct declaration, so drop it.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Cc: Mike Frysinger <vapier@gentoo.org>
+
+commit cd040a4953e55efe89dc3af4acf0302d5923026f
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Jun 18 15:55:15 2010 +0200
+
+ arch/arm/cpu/arm_cortexa8/omap3/cache.S: make build with older tools
+
+ The push / pop instructions used in this file are available only with
+ more recent tool chains:
+
+ cache.S: Assembler messages:
+ cache.S:133: Error: bad instruction `push {r0,r1,r2,lr}'
+ cache.S:160: Error: bad instruction `pop {r1,r2,r3,pc}'
+ cache.S:164: Error: bad instruction `push {r0,r1,r2,lr}'
+ cache.S:191: Error: bad instruction `pop {r1,r2,r3,pc}'
+
+ Change push/pop into stmfd/ldmfd instructions to support older
+ versions of binutils as well.
+
+ I verified that the modified source code generates exactly the same
+ binary code.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Cc: Sandeep Paulraj <s-paulraj@ti.com>
+ Cc: Tom Rix <tom@bumblecow.com>
+
+commit ce9c227cc71afc3b4c78dcc0a565c40d4ad943e4
+Author: Albert Aribaud <[albert.aribaud@free.fr]>
+Date: Thu Jun 17 19:38:21 2010 +0530
+
+ Add support for the LaCie ED Mini V2 board
+
+ This patch adds support for the LaCie ED Mini V2 product
+ which is based on the Marvell Orion5x SoC.
+
+ Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
+
+commit 83142c112d30ee3da23b62387909d33db064bdc4
+Author: Albert Aribaud <[albert.aribaud@free.fr]>
+Date: Thu Jun 17 19:37:01 2010 +0530
+
+ Add Orion5x support to 16550 device driver
+
+ This patch provides access to the 16550-compatible
+ serial device of the Orion5x SoC.
+
+ Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
+
+commit 0c61e6f9257ef416959b740ee3cf191bf682007d
+Author: Albert Aribaud <[albert.aribaud@free.fr]>
+Date: Thu Jun 17 19:36:07 2010 +0530
+
+ Initial support for Marvell Orion5x SoC
+
+ This patch adds support for the Marvell Orion5x SoC.
+ It has no use alone, and must be followed by a patch
+ to add Orion5x support for serial, then support for
+ the ED Mini V2, an Orion5x-based product from LaCie.
+
+ Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
+
+commit 376e7fadbad3285231e390c6534feb5af86d594b
+Author: Minkyu Kang <mk7.kang@samsung.com>
+Date: Tue Jun 8 14:40:47 2010 +0900
+
+ SAMSUNG: goni: add the GPL licence
+
+ Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Acked-by: Tom <Tom@bumblecow.com>
+
+commit c474a8ebb880e564df0c701c6a8cf73b7779b1d2
+Author: Minkyu Kang <mk7.kang@samsung.com>
+Date: Mon May 31 22:02:42 2010 +0900
+
+ s5pc1xx: Add support for Samsung Goni board
+
+ This patch adds support for the Samsung Goni board (S5PC110 SoC)
+
+ Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit ffb4b02554d9972d66502efbe97b3933620c8a31
+Author: Minkyu Kang <mk7.kang@samsung.com>
+Date: Fri May 28 12:34:29 2010 +0900
+
+ s5pc1xx: gpio: bug fix at gpio_set_pull function
+
+ When set to PULL_NONE, gpio_set_pull function is returned without write the register.
+ This patch fixed it.
+
+ Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit a9046b9e1aeeedc66ddf1d00474ad0ce8c6aa6e4
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Jun 13 17:48:15 2010 +0200
+
+ Prepare v2010-rc2
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 3a96ad851f4f9267e1199b700cb838a77334e4b2
+Author: Marek Vasut <marek.vasut@gmail.com>
+Date: Sun Apr 11 08:53:55 2010 +0200
+
+ PXA: Align stack to 8 bytes
+
+ Part of this patch is by: Mikhail Kshevetskiy.
+
+ Stack must be aligned to 8 bytes on PXA (possibly all armv5te) for LDRD/STRD
+ instructions. In case LDRD/STRD is issued on an unaligned address, the behaviour
+ is undefined.
+
+ The issue was observed when working with the NAND code, which was rendered
+ disfunctional. Also, the vsprintf() function had serious problems with printing
+ 64bit wide long longs. After aligning the stack, this wrong behaviour is no
+ longer present.
+
+ Tested on:
+ Marvell Littleton PXA310 board
+ Toradex Colibri PXA320 board
+ Aeronix Zipit Z2 PXA270 handheld
+ Voipac PXA270 board
+
+ Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
+
+commit 89b765c7f6ddfde07ba673dd4adbeb5da391a81b
+Author: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
+Date: Thu Jun 10 15:18:15 2010 +0530
+
+ TI: DaVinci: Add board specific code for da850 EVM
+
+ Provides initial support for TI OMAP-L138/DA850 SoC devices on
+ a Logic PD EVM board.
+
+ Provides:
+ Initial boot and configuration.
+ Support for i2c.
+ UART support (console).
+
+ Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
+ Acked-by: Ben Gardiner <bengardiner@nanometrics.ca>
+ Reviewed-by: Wolfgang Denk <wd@denx.de>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 158557001afe167dcb848bb14ba0f2f20aeb25a1
+Author: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
+Date: Tue Jun 8 11:01:58 2010 +0530
+
+ TI: DaVinci: Prepare for da850 support
+
+ DA850/OMAP-L138 is a new SoC from Texas Instruments
+ (http://focus.ti.com/docs/prod/folders/print/omap-l138.html).
+ This SoC is similar to DA830/OMAP-L137 in many aspects. Hence
+ rename the da830 specific files and folders to da8xx to
+ accommodate DA850/OMAP-L138.
+
+ Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
+ Acked-by: Ben Gardiner <bengardiner@nanometrics.ca>
+ Reviewed-by: Wolfgang Denk <wd@denx.de>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 9d79956029ec379e7137948ba3a7debbea61325f
+Author: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
+Date: Mon Jun 7 12:39:59 2010 +0530
+
+ da830: Move common code out of da830evm.c file
+
+ TI's DA850/OMAP-L138 platform is similar to DA830/OMAP-L137
+ in many aspects. So instead of repeating the same code in
+ multiple files, move the common code to a different file
+ and call those functions from the respective da830/da850
+ files.
+
+ Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
+ Acked-by: Nick Thompson <nick.thompson@ge.com>
+ Acked-by: Ben Gardiner <bengardiner@nanometrics.ca>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 5246d01edd8935e04cdf79a5b9a03874509a31b1
+Author: Grazvydas Ignotas <notasas@gmail.com>
+Date: Tue Jun 8 17:19:22 2010 -0400
+
+ OMAP3: pandora: enable battery backup capacitor
+
+ Pandora has a capacitor connected as backup battery, which allows
+ retaining RTC for some time while main battery is removed. Enable backup
+ battery charge function to charge that capacitor.
+
+ Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 9268236529161312c877e638a14c011fd3c883e1
+Author: Delio Brignoli <dbrignoli@audioscience.com>
+Date: Mon Jun 7 17:16:13 2010 -0400
+
+ DaVinci: Improve DaVinci SPI speed.
+
+ I have updated this patch based on the comments [1] by Wolfgang Denk and
+ removed unused variables.
+ [1][http://lists.denx.de/pipermail/u-boot/2010-May/071728.html]
+
+ Reduce the number of reads per byte transferred on the BUF register from 2 to 1 and
+ take advantage of the TX buffer in the SPI module. On LogicPD OMAP-L138 EVM,
+ SPI read throughput goes up from ~0.8Mbyte/s to ~1.3Mbyte/s. Tested with a 2Mbyte image file.
+ Remove unused variables in the spi_xfer() function.
+
+ Signed-off-by: Delio Brignoli <dbrignoli@audioscience.com>
+ Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 1a5038ca6831e31875cf67c46226f04743574032
+Author: Vaibhav Hiremath <hvaibhav@ti.com>
+Date: Mon Jun 7 15:20:53 2010 -0400
+
+ AM35x: Add support for EMIF4
+
+ This patch adds support for the EMIF4 interface
+ available in the AM35x processors.
+
+ Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
+ Signed-off-by: Sanjeev Premi <premi@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit ed01e45cfa20d60ee83a4ee0128d843730055294
+Author: Vaibhav Hiremath <hvaibhav@ti.com>
+Date: Mon Jun 7 15:20:43 2010 -0400
+
+ AM35x: Add support for AM3517EVM
+
+ This patch adds basic support for the AM3517EVM.
+ It includes:
+ - Board files (.c and .h)
+ - Default configuration file
+ - Updates for Makefile
+
+ Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
+ Signed-off-by: Sanjeev Premi <premi@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit cae377b59a179e34d27cd6b79dee24d967de839c
+Author: Vaibhav Hiremath <hvaibhav@ti.com>
+Date: Mon Jun 7 15:20:34 2010 -0400
+
+ omap3: Consolidate SDRC related operations
+
+ Consolidated SDRC related functions into one file - sdrc.c
+
+ And also replaced sdrc_init with generic memory init
+ function (mem_init), this generalization of omap memory setup
+ is necessary to support the new emif4 interface introduced in AM3517.
+
+ Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit d11212e3772c8fe43a1f487bbf58f3341118a241
+Author: Vaibhav Hiremath <hvaibhav@ti.com>
+Date: Mon Jun 7 15:20:29 2010 -0400
+
+ omap3: Calculate CS1 size only when SDRC is
+
+ initialized for CS1
+
+ From: Vaibhav Hiremath <hvaibhav@ti.com>
+
+ The patch makes sure that size for SDRC CS1 gets calculated
+ only when the CS1 SDRC is initialized.
+
+ Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 675e0eaf0f0429aac3c6fb41634fbcea2350fe49
+Author: Vaibhav Hiremath <hvaibhav@ti.com>
+Date: Mon Jun 7 15:20:19 2010 -0400
+
+ OMAP3EVM: Added NAND support
+
+ The EVMS have been shipping with NAND (instead of OneNAND) as default.
+ So, this patch sets NAND as default.
+
+ To choose OneNAND, define CMD_ONENAND instead of CMD_NAND in the
+ config file omap3_evm.h.
+
+ Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 5cc48f7e55df0d74a12d338de2117f05951fc536
+Author: Cyril Chemparathy <cyril@ti.com>
+Date: Mon Jun 7 14:13:36 2010 -0400
+
+ TI: TNETV107X EVM initial support
+
+ TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
+ bunch on on-chip integrated peripherals. This patch adds support for the
+ TNETV107X EVM board.
+
+ Signed-off-by: Cyril Chemparathy <cyril@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 3712367c4830e87b4e7af5b480e82d316bab1251
+Author: Cyril Chemparathy <cyril@ti.com>
+Date: Mon Jun 7 14:13:32 2010 -0400
+
+ ARM1176: TI: TNETV107X soc initial support
+
+ TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
+ bunch on on-chip integrated peripherals. This is an initial commit with
+ basic functionality, more commits with drivers, etc. to follow.
+
+ Signed-off-by: Cyril Chemparathy <cyril@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 678e008c3a3a27fe2d30cf423679d2d11d0fa5c2
+Author: Cyril Chemparathy <cyril@ti.com>
+Date: Mon Jun 7 14:13:27 2010 -0400
+
+ ARM1176: Coexist with other ARM1176 platforms
+
+ The current ARM1176 CPU specific code is too specific to the SMDK6400
+ architecture. The following changes were necessary prerequisites for the
+ addition of other SoCs based on ARM1176.
+
+ Existing board's (SMDK6400) configuration has been modified to keep behavior
+ unchanged despite these changes.
+
+ 1. Peripheral port remap configurability
+ The earlier code had hardcoded remap values specific to s3c64xx in start.S.
+ This change makes the peripheral port remap addresses and sizes configurable.
+
+ 2. U-Boot code relocation support
+ Most architectures allow u-boot code to run initially at a different
+ address (possibly in NOR) and then get relocated to its final resting place
+ in RAM. Added support for this capability in ARM1176 architecture.
+
+ 3. Disable TCM if necessary
+ If a ROM based bootloader happened to have initialized TCM, we disable it here
+ to keep things sane.
+
+ 4. Remove unnecessary SoC specific includes
+ ARM1176 code does not really need this SoC specific include. The presence
+ of this include prevents builds on other ARM1176 archs.
+
+ 5. Modified virt-to-phys conversion during MMU disable
+ The original MMU disable code masks out too many bits from the load address
+ when it tries to figure out the physical address of the jump target label.
+ Consequently, it ends up branching to the wrong address after disabling the
+ MMU.
+
+ Signed-off-by: Cyril Chemparathy <cyril@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 23911740486c59851df57521c49bfd81ce1865ec
+Author: Delio Brignoli <dbrignoli@audioscience.com>
+Date: Mon Jun 7 17:16:13 2010 -0400
+
+ DaVinci: Improve DaVinci SPI speed.
+
+ I have updated this patch based on the comments [1] by Wolfgang Denk and
+ removed unused variables.
+ [1][http://lists.denx.de/pipermail/u-boot/2010-May/071728.html]
+
+ Reduce the number of reads per byte transferred on the BUF register from 2 to 1 and
+ take advantage of the TX buffer in the SPI module. On LogicPD OMAP-L138 EVM,
+ SPI read throughput goes up from ~0.8Mbyte/s to ~1.3Mbyte/s. Tested with a 2Mbyte image file.
+ Remove unused variables in the spi_xfer() function.
+
+ Signed-off-by: Delio Brignoli <dbrignoli@audioscience.com>
+ Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 05ee415e316e3b1617aba06a747649f4d4053d41
+Author: Vaibhav Hiremath <hvaibhav@ti.com>
+Date: Mon Jun 7 15:20:53 2010 -0400
+
+ AM35x: Add support for EMIF4
+
+ This patch adds support for the EMIF4 interface
+ available in the AM35x processors.
+
+ Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
+ Signed-off-by: Sanjeev Premi <premi@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 3d9f0ffddaf1ece95a826785b971860ebdadf424
+Author: Vaibhav Hiremath <hvaibhav@ti.com>
+Date: Mon Jun 7 15:20:43 2010 -0400
+
+ AM35x: Add support for AM3517EVM
+
+ This patch adds basic support for the AM3517EVM.
+ It includes:
+ - Board files (.c and .h)
+ - Default configuration file
+ - Updates for Makefile
+
+ Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
+ Signed-off-by: Sanjeev Premi <premi@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 8aa5c7cdc4e534df9129485ba317a2871c4f9880
+Author: Vaibhav Hiremath <hvaibhav@ti.com>
+Date: Mon Jun 7 15:20:34 2010 -0400
+
+ omap3: Consolidate SDRC related operations
+
+ Consolidated SDRC related functions into one file - sdrc.c
+
+ And also replaced sdrc_init with generic memory init
+ function (mem_init), this generalization of omap memory setup
+ is necessary to support the new emif4 interface introduced in AM3517.
+
+ Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 16807ee411d83762804d075a3fe11f0a2b5eaf39
+Author: Vaibhav Hiremath <hvaibhav@ti.com>
+Date: Mon Jun 7 15:20:29 2010 -0400
+
+ omap3: Calculate CS1 size only when SDRC is
+
+ initialized for CS1
+
+ From: Vaibhav Hiremath <hvaibhav@ti.com>
+
+ The patch makes sure that size for SDRC CS1 gets calculated
+ only when the CS1 SDRC is initialized.
+
+ Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 7ca4766bd7f74e5f7371fb331b573ec384230c1d
+Author: Vaibhav Hiremath <hvaibhav@ti.com>
+Date: Mon Jun 7 15:20:19 2010 -0400
+
+ OMAP3EVM: Added NAND support
+
+ The EVMS have been shipping with NAND (instead of OneNAND) as default.
+ So, this patch sets NAND as default.
+
+ To choose OneNAND, define CMD_ONENAND instead of CMD_NAND in the
+ config file omap3_evm.h.
+
+ Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 04cbc19fedb55265d08cddea294c3b6d9f8b2d18
+Author: Cyril Chemparathy <cyril@ti.com>
+Date: Mon Jun 7 14:13:36 2010 -0400
+
+ TI: TNETV107X EVM initial support
+
+ TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
+ bunch on on-chip integrated peripherals. This patch adds support for the
+ TNETV107X EVM board.
+
+ Signed-off-by: Cyril Chemparathy <cyril@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit da1ec42aafcc821ce6b5d316a2d4105292960d6b
+Author: Cyril Chemparathy <cyril@ti.com>
+Date: Mon Jun 7 14:13:32 2010 -0400
+
+ ARM1176: TI: TNETV107X soc initial support
+
+ TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
+ bunch on on-chip integrated peripherals. This is an initial commit with
+ basic functionality, more commits with drivers, etc. to follow.
+
+ Signed-off-by: Cyril Chemparathy <cyril@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit b87996d24a41cfc15fea125e5c805163af4acba1
+Author: Cyril Chemparathy <cyril@ti.com>
+Date: Mon Jun 7 14:13:27 2010 -0400
+
+ ARM1176: Coexist with other ARM1176 platforms
+
+ The current ARM1176 CPU specific code is too specific to the SMDK6400
+ architecture. The following changes were necessary prerequisites for the
+ addition of other SoCs based on ARM1176.
+
+ Existing board's (SMDK6400) configuration has been modified to keep behavior
+ unchanged despite these changes.
+
+ 1. Peripheral port remap configurability
+ The earlier code had hardcoded remap values specific to s3c64xx in start.S.
+ This change makes the peripheral port remap addresses and sizes configurable.
+
+ 2. U-Boot code relocation support
+ Most architectures allow u-boot code to run initially at a different
+ address (possibly in NOR) and then get relocated to its final resting place
+ in RAM. Added support for this capability in ARM1176 architecture.
+
+ 3. Disable TCM if necessary
+ If a ROM based bootloader happened to have initialized TCM, we disable it here
+ to keep things sane.
+
+ 4. Remove unnecessary SoC specific includes
+ ARM1176 code does not really need this SoC specific include. The presence
+ of this include prevents builds on other ARM1176 archs.
+
+ 5. Modified virt-to-phys conversion during MMU disable
+ The original MMU disable code masks out too many bits from the load address
+ when it tries to figure out the physical address of the jump target label.
+ Consequently, it ends up branching to the wrong address after disabling the
+ MMU.
+
+ Signed-off-by: Cyril Chemparathy <cyril@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit b5d289fc29842095d5cd0f82cceab1b0b2e824ba
+Author: Asen Dimov <dimov@ronetix.at>
+Date: Tue Apr 20 22:49:04 2010 +0300
+
+ add new board pm9g45
+
+ Add the new board PM9G45 from Ronetix GmbH.
+ * AT91SAM9G45 MCU at 400Mhz.
+ * 128MB DDR2 SDRAM
+ * 256MB NAND
+ * 10/100 MBits Ethernet DP83848
+ * Serial number chip DS2401
+
+ The board is made as SODIMM200 module.
+ For more info www.ronatix.at or info@ronetix.at.
+
+ Signed-off-by: Asen Dimov <dimov@ronetix.at>
+
+commit f986325dd569faeaec4186f678d113505c5c4828
+Author: Ron Madrid <ron_madrid@sbcglobal.net>
+Date: Tue Jun 1 17:00:49 2010 -0700
+
+ Update SICRL_USBDR to reflect 4 different settings
+
+ This patch changed the SICRL_USBDR define to reflect the 4 different bit
+ settings for this two-bit field. The four different options are '00', '01',
+ '10', and '11'. This patch also corrects the config file for SIMPC8313 and
+ MPC8313ERDB for the appropriate fields. This change only affects the MPC8313
+ cpu.
+
+ Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 409a07c9d72b0d833c1cce264bdb4bb2628fe28e
+Author: George G. Davis <gdavis@mvista.com>
+Date: Tue May 11 10:15:36 2010 -0400
+
+ ARM1136: Fix cache_flush() error and correct cpu_init_crit() comments
+
+ The ARM1136 cache_flush() function uses the "mcr p15, 0, rn, c7, c7, 0"
+ instruction which means "Invalidate Both Caches" when in fact the intent
+ is to clean and invalidate all caches. So add an "mcr p15, 0, %0, c7,
+ c10, 0" instruction to "Clean Entire Data Cache" prior to the "Invalidate
+ Both Caches" instruction to insure that memory is consistent with any
+ dirty cache lines.
+
+ Also fix a couple of "flush v*" comments in ARM1136 cpu_init_crit() so
+ that they correctly describe the actual ARM1136 CP15 C7 Cache Operations
+ used.
+
+ Signed-off-by: George G. Davis <gdavis@mvista.com>
+
+commit 3057c6be5efda781a72ca04432e0a4ed6e670030
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Fri Apr 23 12:20:11 2010 -0500
+
+ fdt_support: add entry for sec3.1 and fix sec3.3
+
+ Add sec3.1 h/w geometry for fdt node fixups.
+
+ Also, technically, whilst SEC v3.3 h/w honours the tls_ssl_stream descriptor
+ type, it lacks the ARC4 algorithm execution unit required to be able
+ to execute anything meaningful with it. Change the node to agree with
+ the documentation that declares that the sec3.3 really doesn't have such
+ a descriptor type.
+
+ Reported-by: Haiying Wang <Haiying.Wang@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 5f4d36825a028e300b7d56a566d2cf84418b7a68
+Author: Timur Tabi <timur@freescale.com>
+Date: Thu May 20 11:16:16 2010 -0500
+
+ fsl: rename 'dma' to 'brdcfg1' in the ngPIXIS structure
+
+ The ngPIXIS is a board-specific FPGA, but the definition of the registers
+ is mostly consistent. On boards where it matter, register 9 is called
+ 'brdcfg1' instead of 'dma', so rename the variable in the ngpixis_t
+ definition.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 6e37a044076896ba88b0d6316fadd492032c5193
+Author: Timur Tabi <timur@freescale.com>
+Date: Thu May 20 12:45:39 2010 -0500
+
+ fsl/85xx: add clkdvdr and pmuxcr2 to global utilities structure definition
+
+ Add the 'clkdvdr' and 'pmuxcr2' registers to the 85xx definition of
+ struct ccsr_gur.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 39c209546ab5b11ca6410c5cc57dcbf457e50800
+Author: Tom <Tom@bumblecow.com>
+Date: Fri May 28 13:23:16 2010 -0500
+
+ ARM Update mach-types
+
+ Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
+ And built with
+
+ repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
+ commit 3defb2476166445982a90c12d33f8947e75476c4
+
+ Signed-off-by: Tom <Tom@bumblecow.com>
+
+commit 551bd947bd6f982fa38dde840576eba52346160c
+Author: Tom <Tom@bumblecow.com>
+Date: Sun May 9 16:58:11 2010 -0500
+
+ ARM Update mach-types
+
+ Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
+ And built with
+
+ repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
+ commit 257dab81413b31b8648becfe11586b3a41e5c29a
+
+ Signed-off-by: Tom <Tom@bumblecow.com>
+
+commit 1117cbf2adac59050af1751af6c6a524afa5c3ef
+Author: Thomas Chou <thomas@wytron.com.tw>
+Date: Fri May 28 10:56:50 2010 +0800
+
+ nios: remove nios-32 arch
+
+ The nios-32 arch is obsolete and broken. So it is removed.
+
+ Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
+
+commit 6803336c9f21ba428f5c1b1cf825bbbac0a762e5
+Author: Thomas Chou <thomas@wytron.com.tw>
+Date: Fri May 21 11:08:02 2010 +0800
+
+ nios2: allow STANDALONE_LOAD_ADDR overriding
+
+ This patch allows users to override default STANDALONE_LOAD_ADDR.
+ The gcclibdir path was duplicated in the standalone Makefile and
+ can be removed.
+
+ Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
+ Signed-off-by: Scott McNutt <smcnutt@psyent.com>
+
+commit 8d52ea6db484c689a75ef8a36a4e525753b8f078
+Author: Thomas Chou <thomas@wytron.com.tw>
+Date: Sat May 15 06:00:05 2010 +0800
+
+ nios2: fix div64 issue for gcc4
+
+ This patch fixes the run-time error on div64 when built with
+ gcc4, which was reported by jhwu0625 on nios forum. It merges
+ math support from libgcc of gcc4. This patch is copied from
+ nios2-linux.
+
+ It works with both gcc3 and gcc4. The old mult.c, divmod.c and
+ math.h are removed.
+
+ Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
+ Signed-off-by: Scott McNutt <smcnutt@psyent.com>
+
+commit 0df01fd3d71481b5cc7aeea6a741b9fc3be15178
+Author: Thomas Chou <thomas@wytron.com.tw>
+Date: Fri May 21 11:08:03 2010 +0800
+
+ nios2: fix r15 issue for gcc4
+
+ The "-ffixed-r15" option doesn't work well for gcc4. Since we
+ don't use gp for small data with option "-G0", we can use gp
+ as global data pointer. This allows compiler to use r15. It
+ is necessary for gcc4 to work properly.
+
+ Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
+ Signed-off-by: Scott McNutt <smcnutt@psyent.com>
+
+commit 661ba14051db6766932fcb50ba1ec7c67f230054
+Author: Thomas Chou <thomas@wytron.com.tw>
+Date: Fri Apr 30 11:34:16 2010 +0800
+
+ spi: add altera spi controller support
+
+ This patch adds the driver of altera spi controller, which is
+ used as epcs/spi flash controller. It also works with mmc_spi
+ driver.
+
+ This driver support more than one spi bus, with base list declared
+ #define CONFIG_SYS_ALTERA_SPI_LIST { BASE_0,BASE_1,... }
+
+ Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
+ Tested-by: Ian Abbott <abbotti@mev.co.uk>
+ Signed-off-by: Scott McNutt <smcnutt@psyent.com>
+
+commit 1e8e9bad2db38e93c3bc9f4b6238b3d8be99e469
+Author: Thomas Chou <thomas@wytron.com.tw>
+Date: Fri Apr 30 11:34:15 2010 +0800
+
+ nios2: add gpio support to nios2-generic board
+
+ This patch adds gpio support of Altera PIO component to the
+ nios2-generic board. Though it drives only gpio_led at the
+ moment, it supports bidirectional port to control bit-banging
+ I2C, NAND flash busy status or button switches, etc.
+
+ Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
+ Tested-by: Ian Abbott <abbotti@mev.co.uk>
+ Signed-off-by: Scott McNutt <smcnutt@psyent.com>
+
+commit 3e6b86b5552840bb4147871a753840eb3923374c
+Author: Thomas Chou <thomas@wytron.com.tw>
+Date: Fri Apr 30 11:34:14 2010 +0800
+
+ misc: add gpio based status led driver
+
+ This patch adds a status led driver followed the GPIO access
+ conventions of Linux. The led mask is used to specify the gpio pin.
+
+ Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
+ Tested-by: Ian Abbott <abbotti@mev.co.uk>
+ Signed-off-by: Scott McNutt <smcnutt@psyent.com>
+
+commit cedd341d551b6b705e97ab1953a87575b9ff9ef9
+Author: Thomas Chou <thomas@wytron.com.tw>
+Date: Fri Apr 30 11:34:13 2010 +0800
+
+ nios2: add gpio support
+
+ This patch adds driver for a trivial gpio core, which is described
+ in http://nioswiki.com/GPIO. It is used for gpio led and nand flash
+ interface in u-boot.
+
+ When CONFIG_SYS_GPIO_BASE is not defined, board may provide
+ its own driver.
+
+ Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
+ Tested-by: Ian Abbott <abbotti@mev.co.uk>
+ Signed-off-by: Scott McNutt <smcnutt@psyent.com>
+
+commit adf55679af1ed98c15a136eb81d6204ebe740b30
+Author: Wolfgang Wegner <w.wegner@astro-kom.de>
+Date: Tue Mar 30 19:19:51 2010 +0100
+
+ add CONFIG_SYS_FEC_FULL_MII for MCF5445x
+
+ This patch adds support for full MII interface on MCF5445x (in contrast
+ to RMII as used on the evaluation boards).
+
+ Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
+
+commit ae49099755affc942171a7727c1b12c51d167abf
+Author: Wolfgang Wegner <w.wegner@astro-kom.de>
+Date: Tue Mar 30 19:19:50 2010 +0100
+
+ add CONFIG_SYS_FEC_NO_SHARED_PHY for MCF5445x
+
+ This patch adds the possibility to handle seperate PHYs to MCF5445x.
+ Naming is chosen to resemble the contrary CONFIG_FEC_SHARED_PHY in the
+ linux kernel.
+
+ Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
+
+commit e9b43cae1a20af13d1baeb13038b3f34905c14b5
+Author: Wolfgang Wegner <w.wegner@astro-kom.de>
+Date: Tue Mar 30 19:20:31 2010 +0100
+
+ add missing PCS3 for MCF5445x
+
+ This patch adds the code for handling PCS3 (DSPI chip select 3) in
+ cpu_init.c and m5445x.h
+
+ Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
+
+commit d0fe1128c4451327b9cb0fac1a76efd194b078b5
+Author: Sergei Shtylyov <sshtylyov@ru.mvista.com>
+Date: Wed May 26 21:26:43 2010 +0400
+
+ USB: fix create_pipe()
+
+ create_pipe() can give wrong result if an expression is passed as the 'endpoint'
+ argument -- due to missing parentheses.
+
+ Thanks to Martin Mueller for finding the bug and providing the patch.
+
+ Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
+
+commit c941b77adc40f344215e367b3d1fc638addff870
+Author: Andrew Caldwell <Andrew.Caldwell@analog.com>
+Date: Fri May 7 15:10:07 2010 -0400
+
+ Blackfin: nand: drain the write buffer before returning
+
+ The current Blackfin nand write function fills up the write buffer but
+ returns before it has had a chance to drain. On faster systems, this
+ isn't a problem as the operation finishes before the ECC registers are
+ read, but on slower systems the ECC may be incomplete when the core tries
+ to read it.
+
+ So wait for the buffer to drain once we're done writing to it.
+
+ Signed-off-by: Andrew Caldwell <Andrew.Caldwell@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 01f03bda5b22e5aeae5f02fd537da97a41485c73
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed May 26 23:57:08 2010 +0200
+
+ Prepare v2010.06-rc1
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c4976807cbbabd281f45466ac5e47e5639bcc9cb
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed May 26 23:51:22 2010 +0200
+
+ Coding style cleanup, update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
commit c7da8c19b5f7fd58b5b4b1d247648851af56e1f0
Author: Andreas Biessmann <andreas.devel@googlemail.com>
Date: Sat May 22 13:17:21 2010 +0200
sbc8240 MPC8240
sbc405 PPC405GP
+Sudhakar Rajashekhara <sudhakar.raj@ti.com>
+
+ da850evm ARM926EJS (DA850/OMAP-L138)
+
Ricardo Ribalda <ricardo.ribalda@uam.es>
ml507 PPC440x5
rainier PPC440GRx
sequoia PPC440EPx
sycamore PPC405GPr
+ t3corp PPC460GT
taishan PPC440GX
walnut PPC405GP
yellowstone PPC440GR
# Board CPU #
#########################################################################
+Albert ARIBAUD <albert.aribaud@free.fr>
+
+ edminiv2 ARM926EJS (Orion5x SoC)
+
Rowel Atienza <rowel@diwalabs.com>
armadillo ARM720T
afeb9260 ARM926EJS (AT91SAM9260 SoC)
-Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-
- imx31_phycore_eet i.MX31
- mx31ads i.MX31
- SMDK6400 S3C6400
-
Nishanth Menon <nm@ti.com>
omap3_sdp3430 ARM CORTEX-A8 (OMAP3xx SoC)
ixdp425 xscale Kyle Harris <kharris@nexus-tech.net> / dead address
lubbock xscale Kyle Harris <kharris@nexus-tech.net> / dead address
+ imx31_phycore_eet i.MX31 Guennadi Liakhovetski <g.liakhovetski@gmx.de> / resigned
+ mx31ads i.MX31 Guennadi Liakhovetski <g.liakhovetski@gmx.de> / resigned
+ SMDK6400 S3C6400 Guennadi Liakhovetski <g.liakhovetski@gmx.de> / resigned
+
#########################################################################
# x86 Systems: #
# #
vct_xxx MIPS32 4Kc
-#########################################################################
-# Nios-32 Systems: #
-# #
-# Maintainer Name, Email Address #
-# Board CPU #
-#########################################################################
-
-Stephan Linz <linz@li-pro.net>
-
- DK1S10 Nios-32
- ADNPESC1 Nios-32
-
-Scott McNutt <smcnutt@psyent.com>
-
- DK1C20 Nios-32
-
#########################################################################
# Nios-II Systems: #
# #
sc3 \
sequoia \
sequoia_nand \
+ t3corp \
taihu \
taishan \
v5fx30teval \
MPC8536DS_NAND \
MPC8536DS_SDCARD \
MPC8536DS_SPIFLASH \
+ MPC8536DS_36BIT \
MPC8540ADS \
MPC8540EVAL \
MPC8541CDS \
LIST_86xx=" \
MPC8610HPCD \
+ MPC8641HPCN_36BIT \
MPC8641HPCN \
sbc8641d \
XPEDITE5170 \
cp946es \
cp966 \
da830evm \
+ da850evm \
edb9301 \
edb9302 \
edb9302a \
edb9312 \
edb9315 \
edb9315a \
+ edminiv2 \
guruplug \
imx27lite \
lpd7a400 \
${LIST_I486} \
"
-#########################################################################
-## NIOS Systems
-#########################################################################
-
-LIST_nios=" \
- ADNPESC1 \
- ADNPESC1_base_32 \
- ADNPESC1_DNPEVA2_base_32\
- DK1C20 \
- DK1C20_standard_32 \
- DK1S10 \
- DK1S10_standard_32 \
- DK1S10_mtx_ldk_20 \
-"
-
#########################################################################
## Nios-II Systems
#########################################################################
|coldfire \
|microblaze \
|mips|mips_el \
- |nios|nios2 \
+ |nios2 \
|ppc|powerpc|5xx|5xxx|512x|8xx|8220|824x|8260|83xx|85xx|86xx|4xx|7xx|74xx|TSEC \
|sh|sh2|sh3|sh4 \
|sparc \
VERSION = 2010
PATCHLEVEL = 06
SUBLEVEL =
-EXTRAVERSION = -rc1
+EXTRAVERSION =
ifneq "$(SUBLEVEL)" ""
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
else
-e s/sa110/arm/ \
-e s/ppc64/powerpc/ \
-e s/ppc/powerpc/ \
- -e s/macppc/powerpc/)
+ -e s/macppc/powerpc/\
+ -e s/sh.*/sh/)
HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \
sed -e 's/\(cygwin\).*/cygwin/')
@cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
$(TIMESTAMP_FILE):
- @date +'#define U_BOOT_DATE "%b %d %C%y"' > $@
- @date +'#define U_BOOT_TIME "%T"' >> $@
+ @LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"' > $@
+ @LC_ALL=C date +'#define U_BOOT_TIME "%T"' >> $@
gdbtools:
$(MAKE) -C tools/gdb all || exit 1
unexpand -a | sed -e 's/\s\s*$$//' > $@
include/license.h: tools/bin2header COPYING
- cat COPYING | gzip -9 -c | ./tools/bin2header license_gzip > include/license.h
+ cat COPYING | gzip -9 -c | ./tools/bin2header license_gzip > include/license.h
#########################################################################
unconfig:
$(obj)board/*/config.tmp $(obj)board/*/*/config.tmp \
$(obj)include/autoconf.mk $(obj)include/autoconf.mk.dep
-%: %_config
- $(MAKE)
+%_config:: unconfig
+ @$(MKCONFIG) -A $(@:_config=)
+
+##%: %_config
+## $(MAKE)
+
+#
+# Functions to generate common board directory names
+#
+lcname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\L\1/')
+ucname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\U\1/')
#========================================================================
# PowerPC
#========================================================================
-#########################################################################
-## MPC5xx Systems
-#########################################################################
-
-canmb_config: unconfig
- @$(MKCONFIG) -a canmb powerpc mpc5xxx canmb
-
-cmi_mpc5xx_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc5xx cmi
-
-PATI_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc5xx pati mpl
-
#########################################################################
## MPC5xxx Systems
#########################################################################
-aev_config: unconfig
- @$(MKCONFIG) -a aev powerpc mpc5xxx tqm5200 tqc
-
-BC3450_config: unconfig
- @$(MKCONFIG) -a BC3450 powerpc mpc5xxx bc3450
-
-cm5200_config: unconfig
- @$(MKCONFIG) -a cm5200 powerpc mpc5xxx cm5200
-
-cpci5200_config: unconfig
- @$(MKCONFIG) -a cpci5200 powerpc mpc5xxx cpci5200 esd
-
digsy_mtc_config \
digsy_mtc_LOWBOOT_config \
digsy_mtc_RAMBOOT_config: unconfig
@mkdir -p $(obj)board/digsy_mtc
@ >$(obj)include/config.h
@[ -z "$(findstring LOWBOOT_,$@)" ] || \
- { echo "TEXT_BASE = 0xFF000000" >$(obj)board/digsy_mtc/config.tmp ; \
- echo "... with LOWBOOT configuration" ; \
- }
+ echo "TEXT_BASE = 0xFF000000" >$(obj)board/digsy_mtc/config.tmp
@[ -z "$(findstring RAMBOOT_,$@)" ] || \
- { echo "TEXT_BASE = 0x00100000" >$(obj)board/digsy_mtc/config.tmp ; \
- echo "... with RAMBOOT configuration" ; \
- }
- @$(MKCONFIG) -a digsy_mtc powerpc mpc5xxx digsy_mtc
+ echo "TEXT_BASE = 0x00100000" >$(obj)board/digsy_mtc/config.tmp
+ @$(MKCONFIG) -n $@ -a digsy_mtc powerpc mpc5xxx digsy_mtc
galaxy5200_LOWBOOT_config \
galaxy5200_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
- @$(MKCONFIG) -a galaxy5200 powerpc mpc5xxx galaxy5200
-
-hmi1001_config: unconfig
- @$(MKCONFIG) hmi1001 powerpc mpc5xxx hmi1001
+ @$(MKCONFIG) -n $@ -a galaxy5200 powerpc mpc5xxx galaxy5200
Lite5200_config \
Lite5200_LOWBOOT_config \
@mkdir -p $(obj)include
@mkdir -p $(obj)board/icecube
@[ -z "$(findstring LOWBOOT_,$@)" ] || \
- { if [ "$(findstring DDR,$@)" ] ; \
+ if [ "$(findstring DDR,$@)" ] ; \
then echo "TEXT_BASE = 0xFF800000" >$(obj)board/icecube/config.tmp ; \
else echo "TEXT_BASE = 0xFF000000" >$(obj)board/icecube/config.tmp ; \
- fi ; \
- $(XECHO) "... with LOWBOOT configuration" ; \
- }
+ fi
@[ -z "$(findstring LOWBOOT08,$@)" ] || \
- { echo "TEXT_BASE = 0xFF800000" >$(obj)board/icecube/config.tmp ; \
- echo "... with 8 MB flash only" ; \
- $(XECHO) "... with LOWBOOT configuration" ; \
- }
+ echo "TEXT_BASE = 0xFF800000" >$(obj)board/icecube/config.tmp
@[ -z "$(findstring DDR,$@)" ] || \
- { echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h ; \
- $(XECHO) "... DDR memory revision" ; \
- }
- @$(MKCONFIG) -a IceCube powerpc mpc5xxx icecube
-
-jupiter_config: unconfig
- @$(MKCONFIG) jupiter powerpc mpc5xxx jupiter
-
-inka4x0_config: unconfig
- @$(MKCONFIG) inka4x0 powerpc mpc5xxx inka4x0
-
-ipek01_config: unconfig
- @$(MKCONFIG) -a ipek01 powerpc mpc5xxx ipek01
+ echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a IceCube powerpc mpc5xxx icecube
lite5200b_config \
lite5200b_PM_config \
@mkdir -p $(obj)include
@mkdir -p $(obj)board/icecube
@ echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h
- @ $(XECHO) "... DDR memory revision"
@ echo "#define CONFIG_LITE5200B" >>$(obj)include/config.h
@[ -z "$(findstring _PM_,$@)" ] || \
- { echo "#define CONFIG_LITE5200B_PM" >>$(obj)include/config.h ; \
- $(XECHO) "... with power management (low-power mode) support" ; \
- }
+ echo "#define CONFIG_LITE5200B_PM" >>$(obj)include/config.h
@[ -z "$(findstring LOWBOOT_,$@)" ] || \
- { echo "TEXT_BASE = 0xFF000000" >$(obj)board/icecube/config.tmp ; \
- $(XECHO) "... with LOWBOOT configuration" ; \
- }
- @$(MKCONFIG) -a IceCube powerpc mpc5xxx icecube
+ echo "TEXT_BASE = 0xFF000000" >$(obj)board/icecube/config.tmp
+ @$(MKCONFIG) -n $@ -a IceCube powerpc mpc5xxx icecube
mcc200_config \
mcc200_SDRAM_config \
prs200_highboot_DDR_config: unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/mcc200
- @[ -n "$(findstring highboot,$@)" ] || \
- { $(XECHO) "... with lowboot configuration" ; \
- }
@[ -z "$(findstring highboot,$@)" ] || \
- { echo "TEXT_BASE = 0xFFF00000" >$(obj)board/mcc200/config.tmp ; \
- $(XECHO) "... with highboot configuration" ; \
- }
+ echo "TEXT_BASE = 0xFFF00000" >$(obj)board/mcc200/config.tmp
@[ -n "$(findstring _SDRAM,$@)" ] || \
- { if [ -n "$(findstring mcc200,$@)" ]; \
- then \
- $(XECHO) "... with DDR" ; \
- else \
- if [ -n "$(findstring _DDR,$@)" ];\
+ if [ -n "$(findstring prs200,$@)" ]; \
+ then \
+ if [ -z "$(findstring _DDR,$@)" ];\
then \
- $(XECHO) "... with DDR" ; \
- else \
echo "#define CONFIG_MCC200_SDRAM" >>$(obj)include/config.h ;\
- $(XECHO) "... with SDRAM" ; \
fi; \
- fi; \
- }
+ fi
@[ -z "$(findstring _SDRAM,$@)" ] || \
- { echo "#define CONFIG_MCC200_SDRAM" >>$(obj)include/config.h ; \
- $(XECHO) "... with SDRAM" ; \
- }
+ echo "#define CONFIG_MCC200_SDRAM" >>$(obj)include/config.h
@[ -z "$(findstring COM12,$@)" ] || \
- { echo "#define CONFIG_CONSOLE_COM12" >>$(obj)include/config.h ; \
- $(XECHO) "... with console on COM12" ; \
- }
+ echo "#define CONFIG_CONSOLE_COM12" >>$(obj)include/config.h
@[ -z "$(findstring prs200,$@)" ] || \
- { echo "#define CONFIG_PRS200" >>$(obj)include/config.h ;\
- }
+ echo "#define CONFIG_PRS200" >>$(obj)include/config.h
@$(MKCONFIG) -n $@ -a mcc200 powerpc mpc5xxx mcc200
-mecp5200_config: unconfig
- @$(MKCONFIG) mecp5200 powerpc mpc5xxx mecp5200 esd
-
-motionpro_config: unconfig
- @$(MKCONFIG) motionpro powerpc mpc5xxx motionpro
-
-mucmc52_config: unconfig
- @$(MKCONFIG) mucmc52 powerpc mpc5xxx mucmc52
-
-munices_config: unconfig
- @$(MKCONFIG) munices powerpc mpc5xxx munices
-
MVBC_P_config: unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/mvbc_p
@ >$(obj)include/config.h
@[ -z "$(findstring MVBC_P,$@)" ] || \
- { echo "#define CONFIG_MVBC_P" >>$(obj)include/config.h; }
- @$(MKCONFIG) -n $@ -a MVBC_P powerpc mpc5xxx mvbc_p matrix_vision
+ echo "#define CONFIG_MVBC_P" >>$(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a $@ powerpc mpc5xxx mvbc_p matrix_vision
MVSMR_config: unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/matrix_vision/mvsmr
- @$(MKCONFIG) $(@:_config=) powerpc mpc5xxx mvsmr matrix_vision
-
-o2dnt_config: unconfig
- @$(MKCONFIG) o2dnt powerpc mpc5xxx o2dnt
+ @$(MKCONFIG) $@ powerpc mpc5xxx mvsmr matrix_vision
pcm030_config \
pcm030_LOWBOOT_config: unconfig
@mkdir -p $(obj)include $(obj)board/phytec/pcm030
@ >$(obj)include/config.h
@[ -z "$(findstring LOWBOOT_,$@)" ] || \
- { echo "TEXT_BASE = 0xFF000000" >$(obj)board/phytec/pcm030/config.tmp ; \
- echo "... with LOWBOOT configuration" ; \
- }
- @$(MKCONFIG) -a pcm030 powerpc mpc5xxx pcm030 phytec
-
-pf5200_config: unconfig
- @$(MKCONFIG) pf5200 powerpc mpc5xxx pf5200 esd
+ echo "TEXT_BASE = 0xFF000000" >$(obj)board/phytec/pcm030/config.tmp
+ @$(MKCONFIG) -n $@ -a pcm030 powerpc mpc5xxx pcm030 phytec
PM520_config \
PM520_DDR_config \
PM520_ROMBOOT_DDR_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring DDR,$@)" ] || \
- { echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h ; \
- $(XECHO) "... DDR memory revision" ; \
- }
+ echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h
@[ -z "$(findstring ROMBOOT,$@)" ] || \
- { echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \
- $(XECHO) "... booting from 8-bit flash" ; \
- }
- @$(MKCONFIG) -a PM520 powerpc mpc5xxx pm520
-
-smmaco4_config: unconfig
- @$(MKCONFIG) -a smmaco4 powerpc mpc5xxx tqm5200 tqc
-
-spieval_config: unconfig
- @$(MKCONFIG) -a spieval powerpc mpc5xxx tqm5200 tqc
+ echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a PM520 powerpc mpc5xxx pm520
TB5200_B_config \
TB5200_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring _B,$@)" ] || \
- { echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
- $(XECHO) "... with MPC5200B processor" ; \
- }
+ echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h
@$(MKCONFIG) -n $@ -a TB5200 powerpc mpc5xxx tqm5200 tqc
MINI5200_config \
@mkdir -p $(obj)include
@mkdir -p $(obj)board/total5200
@[ -n "$(findstring Rev,$@)" ] || \
- { echo "#define CONFIG_TOTAL5200_REV 1" >>$(obj)include/config.h ; \
- $(XECHO) "... revision 1 board" ; \
- }
+ echo "#define CONFIG_TOTAL5200_REV 1" >>$(obj)include/config.h
@[ -z "$(findstring Rev2_,$@)" ] || \
- { echo "#define CONFIG_TOTAL5200_REV 2" >>$(obj)include/config.h ; \
- $(XECHO) "... revision 2 board" ; \
- }
+ echo "#define CONFIG_TOTAL5200_REV 2" >>$(obj)include/config.h
@[ -z "$(findstring lowboot_,$@)" ] || \
- { echo "TEXT_BASE = 0xFE000000" >$(obj)board/total5200/config.tmp ; \
- $(XECHO) "... with lowboot configuration" ; \
- }
- @$(MKCONFIG) -a Total5200 powerpc mpc5xxx total5200
+ echo "TEXT_BASE = 0xFE000000" >$(obj)board/total5200/config.tmp
+ @$(MKCONFIG) -n $@ -a Total5200 powerpc mpc5xxx total5200
cam5200_config \
cam5200_niosflash_config \
@mkdir -p $(obj)include
@mkdir -p $(obj)board/tqc/tqm5200
@[ -z "$(findstring cam5200,$@)" ] || \
- { echo "#define CONFIG_CAM5200" >>$(obj)include/config.h ; \
- echo "#define CONFIG_TQM5200S" >>$(obj)include/config.h ; \
- echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
- $(XECHO) "... TQM5200S on Cam5200" ; \
+ { echo "#define CONFIG_CAM5200" >>$(obj)include/config.h ; \
+ echo "#define CONFIG_TQM5200S" >>$(obj)include/config.h ; \
+ echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
}
@[ -z "$(findstring niosflash,$@)" ] || \
- { echo "#define CONFIG_CAM5200_NIOSFLASH" >>$(obj)include/config.h ; \
- $(XECHO) "... with NIOS flash driver" ; \
- }
+ echo "#define CONFIG_CAM5200_NIOSFLASH" >>$(obj)include/config.h
@[ -z "$(findstring fo300,$@)" ] || \
- { echo "#define CONFIG_FO300" >>$(obj)include/config.h ; \
- $(XECHO) "... TQM5200 on FO300" ; \
- }
+ echo "#define CONFIG_FO300" >>$(obj)include/config.h
@[ -z "$(findstring MiniFAP,$@)" ] || \
- { echo "#define CONFIG_MINIFAP" >>$(obj)include/config.h ; \
- $(XECHO) "... TQM5200_AC on MiniFAP" ; \
- }
+ echo "#define CONFIG_MINIFAP" >>$(obj)include/config.h
@[ -z "$(findstring STK100,$@)" ] || \
- { echo "#define CONFIG_STK52XX_REV100" >>$(obj)include/config.h ; \
- $(XECHO) "... on a STK52XX.100 base board" ; \
- }
+ echo "#define CONFIG_STK52XX_REV100" >>$(obj)include/config.h
@[ -z "$(findstring TQM5200_B,$@)" ] || \
- { echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
- }
+ echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h
@[ -z "$(findstring TQM5200S,$@)" ] || \
- { echo "#define CONFIG_TQM5200S" >>$(obj)include/config.h ; \
- echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
+ { echo "#define CONFIG_TQM5200S" >>$(obj)include/config.h ; \
+ echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
}
@[ -z "$(findstring HIGHBOOT,$@)" ] || \
- { echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp ; \
- }
+ echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp
@$(MKCONFIG) -n $@ -a TQM5200 powerpc mpc5xxx tqm5200 tqc
-uc101_config: unconfig
- @$(MKCONFIG) uc101 powerpc mpc5xxx uc101
-
-v38b_config: unconfig
- @$(MKCONFIG) -a v38b powerpc mpc5xxx v38b
-
#########################################################################
## MPC512x Systems
#########################################################################
-aria_config: unconfig
- @$(MKCONFIG) -a aria powerpc mpc512x aria davedenx
-
-mecp5123_config: unconfig
- @$(MKCONFIG) -a mecp5123 powerpc mpc512x mecp5123 esd
-
mpc5121ads_config \
mpc5121ads_rev2_config \
: unconfig
@if [ "$(findstring rev2,$@)" ] ; then \
echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \
fi
- @$(MKCONFIG) -a mpc5121ads powerpc mpc512x mpc5121ads freescale
-
-pdm360ng_config: unconfig
- @$(MKCONFIG) -a pdm360ng powerpc mpc512x pdm360ng
+ @$(MKCONFIG) -n $@ -a mpc5121ads powerpc mpc512x mpc5121ads freescale
#########################################################################
## MPC8xx Systems
#########################################################################
-Adder_config \
Adder87x_config \
AdderII_config \
+AdderUSB_config \
+Adder_config \
: unconfig
@mkdir -p $(obj)include
$(if $(findstring AdderII,$@), \
- @echo "#define CONFIG_MPC852T" > $(obj)include/config.h)
- @$(MKCONFIG) -a Adder powerpc mpc8xx adder
-
-AdderUSB_config: unconfig
- @$(MKCONFIG) -a AdderUSB powerpc mpc8xx adder
+ @echo "#define CONFIG_MPC852T" > $(obj)include/config.h)
+ @$(MKCONFIG) -n $@ -a Adder powerpc mpc8xx adder
ADS860_config \
FADS823_config \
MPC86xADS_config \
MPC885ADS_config \
FADS860T_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx fads
-
-AMX860_config : unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx amx860 westel
-
-c2mon_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx c2mon
-
-CCM_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx CCM siemens
-
-cogent_mpc8xx_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx cogent
-
-ELPT860_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx elpt860 LEOX
-
-EP88x_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx ep88x
-
-ESTEEM192E_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx esteem192e
-
-ETX094_config : unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx etx094
-
-FLAGADM_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx flagadm
-
-xtract_GEN860T = $(subst _SC,,$(subst _config,,$1))
+ @$(MKCONFIG) -n $@ $@ powerpc mpc8xx fads
GEN860T_SC_config \
GEN860T_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring _SC,$@)" ] || \
- { echo "#define CONFIG_SC" >>$(obj)include/config.h ; \
- $(XECHO) "With reduced H/W feature set (SC)..." ; \
- }
- @$(MKCONFIG) -a $(call xtract_GEN860T,$@) powerpc mpc8xx gen860t
-
-GENIETV_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx genietv
-
-GTH_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx gth
-
-hermes_config : unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx hermes
-
-HMI10_config : unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx tqm8xx tqc
-
-IAD210_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx IAD210 siemens
-
-xtract_ICU862 = $(subst _100MHz,,$(subst _config,,$1))
+ echo "#define CONFIG_SC" >>$(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a GEN860T powerpc mpc8xx gen860t
ICU862_100MHz_config \
ICU862_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring _100MHz,$@)" ] || \
- { echo "#define CONFIG_100MHz" >>$(obj)include/config.h ; \
- $(XECHO) "... with 100MHz system clock" ; \
- }
- @$(MKCONFIG) -a $(call xtract_ICU862,$@) powerpc mpc8xx icu862
-
-IP860_config : unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx ip860
+ echo "#define CONFIG_100MHz" >>$(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a ICU862 powerpc mpc8xx icu862
IVML24_256_config \
IVML24_128_config \
IVML24_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring IVML24_config,$@)" ] || \
- { echo "#define CONFIG_IVML24_16M" >>$(obj)include/config.h ; \
- }
+ echo "#define CONFIG_IVML24_16M" >>$(obj)include/config.h
@[ -z "$(findstring IVML24_128_config,$@)" ] || \
- { echo "#define CONFIG_IVML24_32M" >>$(obj)include/config.h ; \
- }
+ echo "#define CONFIG_IVML24_32M" >>$(obj)include/config.h
@[ -z "$(findstring IVML24_256_config,$@)" ] || \
- { echo "#define CONFIG_IVML24_64M" >>$(obj)include/config.h ; \
- }
- @$(MKCONFIG) -a IVML24 powerpc mpc8xx ivm
+ echo "#define CONFIG_IVML24_64M" >>$(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a IVML24 powerpc mpc8xx ivm
IVMS8_256_config \
IVMS8_128_config \
IVMS8_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring IVMS8_config,$@)" ] || \
- { echo "#define CONFIG_IVMS8_16M" >>$(obj)include/config.h ; \
- }
+ echo "#define CONFIG_IVMS8_16M" >>$(obj)include/config.h
@[ -z "$(findstring IVMS8_128_config,$@)" ] || \
- { echo "#define CONFIG_IVMS8_32M" >>$(obj)include/config.h ; \
- }
+ echo "#define CONFIG_IVMS8_32M" >>$(obj)include/config.h
@[ -z "$(findstring IVMS8_256_config,$@)" ] || \
- { echo "#define CONFIG_IVMS8_64M" >>$(obj)include/config.h ; \
- }
- @$(MKCONFIG) -a IVMS8 powerpc mpc8xx ivm
-
-kmsupx4_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx km8xx keymile
-
-KUP4K_config : unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx kup4k kup
-
-KUP4X_config : unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx kup4x kup
-
-LANTEC_config : unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx lantec
-
-lwmon_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx lwmon
+ echo "#define CONFIG_IVMS8_64M" >>$(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a IVMS8 powerpc mpc8xx ivm
MBX_config \
MBX860T_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx mbx8xx
-
-mgsuvd_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx km8xx keymile
-
-MHPC_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx mhpc eltec
-
-xtract_NETVIA = $(subst _V2,,$(subst _config,,$1))
+ @$(MKCONFIG) -n $@ $@ powerpc mpc8xx mbx8xx
NETVIA_V2_config \
NETVIA_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring NETVIA_config,$@)" ] || \
- { echo "#define CONFIG_NETVIA_VERSION 1" >>$(obj)include/config.h ; \
- $(XECHO) "... Version 1" ; \
- }
+ echo "#define CONFIG_NETVIA_VERSION 1" >>$(obj)include/config.h
@[ -z "$(findstring NETVIA_V2_config,$@)" ] || \
- { echo "#define CONFIG_NETVIA_VERSION 2" >>$(obj)include/config.h ; \
- $(XECHO) "... Version 2" ; \
- }
- @$(MKCONFIG) -a $(call xtract_NETVIA,$@) powerpc mpc8xx netvia
-
-xtract_NETPHONE = $(subst _V2,,$(subst _config,,$1))
+ echo "#define CONFIG_NETVIA_VERSION 2" >>$(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a NETVIA powerpc mpc8xx netvia
NETPHONE_V2_config \
NETPHONE_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring NETPHONE_config,$@)" ] || \
- { echo "#define CONFIG_NETPHONE_VERSION 1" >>$(obj)include/config.h ; \
- }
+ echo "#define CONFIG_NETPHONE_VERSION 1" >>$(obj)include/config.h
@[ -z "$(findstring NETPHONE_V2_config,$@)" ] || \
- { echo "#define CONFIG_NETPHONE_VERSION 2" >>$(obj)include/config.h ; \
- }
- @$(MKCONFIG) -a $(call xtract_NETPHONE,$@) powerpc mpc8xx netphone
-
-xtract_NETTA = $(subst _SWAPHOOK,,$(subst _6412,,$(subst _ISDN,,$(subst _config,,$1))))
+ echo "#define CONFIG_NETPHONE_VERSION 2" >>$(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a NETPHONE powerpc mpc8xx netphone
NETTA_ISDN_6412_SWAPHOOK_config \
NETTA_ISDN_SWAPHOOK_config \
NETTA_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring ISDN_,$@)" ] || \
- { echo "#define CONFIG_NETTA_ISDN 1" >>$(obj)include/config.h ; \
- }
+ echo "#define CONFIG_NETTA_ISDN 1" >>$(obj)include/config.h
@[ -n "$(findstring ISDN_,$@)" ] || \
- { echo "#undef CONFIG_NETTA_ISDN" >>$(obj)include/config.h ; \
- }
+ echo "#undef CONFIG_NETTA_ISDN" >>$(obj)include/config.h
@[ -z "$(findstring 6412_,$@)" ] || \
- { echo "#define CONFIG_NETTA_6412 1" >>$(obj)include/config.h ; \
- }
+ echo "#define CONFIG_NETTA_6412 1" >>$(obj)include/config.h
@[ -n "$(findstring 6412_,$@)" ] || \
- { echo "#undef CONFIG_NETTA_6412" >>$(obj)include/config.h ; \
- }
+ echo "#undef CONFIG_NETTA_6412" >>$(obj)include/config.h
@[ -z "$(findstring SWAPHOOK_,$@)" ] || \
- { echo "#define CONFIG_NETTA_SWAPHOOK 1" >>$(obj)include/config.h ; \
- }
+ echo "#define CONFIG_NETTA_SWAPHOOK 1" >>$(obj)include/config.h
@[ -n "$(findstring SWAPHOOK_,$@)" ] || \
- { echo "#undef CONFIG_NETTA_SWAPHOOK" >>$(obj)include/config.h ; \
- }
- @$(MKCONFIG) -a $(call xtract_NETTA,$@) powerpc mpc8xx netta
-
-xtract_NETTA2 = $(subst _V2,,$(subst _config,,$1))
+ echo "#undef CONFIG_NETTA_SWAPHOOK" >>$(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a NETTA powerpc mpc8xx netta
NETTA2_V2_config \
NETTA2_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring NETTA2_config,$@)" ] || \
- { echo "#define CONFIG_NETTA2_VERSION 1" >>$(obj)include/config.h ; \
- }
+ echo "#define CONFIG_NETTA2_VERSION 1" >>$(obj)include/config.h
@[ -z "$(findstring NETTA2_V2_config,$@)" ] || \
- { echo "#define CONFIG_NETTA2_VERSION 2" >>$(obj)include/config.h ; \
- }
- @$(MKCONFIG) -a $(call xtract_NETTA2,$@) powerpc mpc8xx netta2
+ echo "#define CONFIG_NETTA2_VERSION 2" >>$(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a NETTA2 powerpc mpc8xx netta2
NC650_Rev1_config \
NC650_Rev2_config \
CP850_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring CP850,$@)" ] || \
- { echo "#define CONFIG_CP850 1" >>$(obj)include/config.h ; \
- echo "#define CONFIG_IDS852_REV2 1" >>$(obj)include/config.h ; \
- }
+ { echo "#define CONFIG_CP850 1" >>$(obj)include/config.h ; \
+ echo "#define CONFIG_IDS852_REV2 1" >>$(obj)include/config.h ; \
+ }
@[ -z "$(findstring Rev1,$@)" ] || \
- { echo "#define CONFIG_IDS852_REV1 1" >>$(obj)include/config.h ; \
- }
+ { echo "#define CONFIG_IDS852_REV1 1" >>$(obj)include/config.h ; \
+ }
@[ -z "$(findstring Rev2,$@)" ] || \
- { echo "#define CONFIG_IDS852_REV2 1" >>$(obj)include/config.h ; \
- }
- @$(MKCONFIG) -a NC650 powerpc mpc8xx nc650
-
-NX823_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx nx823
-
-pcu_e_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx pcu_e siemens
-
-QS850_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx qs850 snmc
-
-QS823_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx qs850 snmc
-
-QS860T_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx qs860t snmc
-
-quantum_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx quantum
-
-R360MPI_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx r360mpi
-
-RBC823_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx rbc823
-
-RPXClassic_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx RPXClassic
-
-RPXlite_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx RPXlite
+ { echo "#define CONFIG_IDS852_REV2 1" >>$(obj)include/config.h ; \
+ }
+ @$(MKCONFIG) -n $@ -a NC650 powerpc mpc8xx nc650
RPXlite_DW_64_config \
RPXlite_DW_LCD_config \
RPXlite_DW_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring _64,$@)" ] || \
- { echo "#define RPXlite_64MHz" >>$(obj)include/config.h ; \
- $(XECHO) "... with 64MHz system clock ..."; \
- }
+ echo "#define RPXlite_64MHz" >>$(obj)include/config.h
@[ -z "$(findstring _LCD,$@)" ] || \
{ echo "#define CONFIG_LCD" >>$(obj)include/config.h ; \
echo "#define CONFIG_NEC_NL6448BC20" >>$(obj)include/config.h ; \
- $(XECHO) "... with LCD display ..."; \
}
@[ -z "$(findstring _NVRAM,$@)" ] || \
- { echo "#define CONFIG_ENV_IS_IN_NVRAM" >>$(obj)include/config.h ; \
- $(XECHO) "... with ENV in NVRAM ..."; \
- }
- @$(MKCONFIG) -a RPXlite_DW powerpc mpc8xx RPXlite_dw
-
-rmu_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx rmu
-
-RRvision_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx RRvision
+ echo "#define CONFIG_ENV_IS_IN_NVRAM" >>$(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a RPXlite_DW powerpc mpc8xx RPXlite_dw
RRvision_LCD_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h
@$(MKCONFIG) -a RRvision powerpc mpc8xx RRvision
-SM850_config : unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx tqm8xx tqc
-
-spc1920_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx spc1920
-
SPD823TS_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx spd8xx
-
-stxxtc_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx stxxtc stx
-
-svm_sc8xx_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx svm_sc8xx
+ @$(MKCONFIG) $@ powerpc mpc8xx spd8xx
SXNI855T_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx sixnet
-
-# EMK MPC8xx based modules
-TOP860_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx top860 emk
+ @$(MKCONFIG) $@ powerpc mpc8xx sixnet
# Play some tricks for configuration selection
# Only 855 and 860 boards may come with FEC
# and only 823 boards may have LCD support
-xtract_8xx = $(subst _LCD,,$(subst _config,,$1))
+xtract_8xx = $(subst _LCD,,$1)
FPS850L_config \
FPS860L_config \
@[ -z "$(findstring _LCD,$@)" ] || \
{ echo "#define CONFIG_LCD" >>$(obj)include/config.h ; \
echo "#define CONFIG_NEC_NL6448BC20" >>$(obj)include/config.h ; \
- $(XECHO) "... with LCD display" ; \
}
- @$(MKCONFIG) -a $(call xtract_8xx,$@) powerpc mpc8xx tqm8xx tqc
+ @$(MKCONFIG) -n $@ -a $(call xtract_8xx,$@) powerpc mpc8xx tqm8xx tqc
TTTech_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h
@$(MKCONFIG) -a TQM823L powerpc mpc8xx tqm8xx tqc
-uc100_config : unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx uc100
-
v37_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_LCD" >$(obj)include/config.h
@echo "#define CONFIG_SHARP_LQ084V1DG21" >>$(obj)include/config.h
- @$(MKCONFIG) $(@:_config=) powerpc mpc8xx v37
+ @$(MKCONFIG) $@ powerpc mpc8xx v37
wtk_config: unconfig
@mkdir -p $(obj)include
#########################################################################
## PPC4xx Systems
#########################################################################
-xtract_4xx = $(subst _25,,$(subst _33,,$(subst _BA,,$(subst _ME,,$(subst _HI,,$(subst _config,,$1))))))
-
-acadia_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx acadia amcc
acadia_nand_config: unconfig
@mkdir -p $(obj)include $(obj)board/amcc/acadia
@mkdir -p $(obj)nand_spl/board/amcc/acadia
@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
- @$(MKCONFIG) -n $@ -a acadia powerpc ppc4xx acadia amcc
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/acadia/config.tmp
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
-
-ADCIOP_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx adciop esd
-
-alpr_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx alpr prodrive
-
-AP1000_config:unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx ap1000 amirix
-
-APC405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx apc405 esd
-
-AR405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx ar405 esd
-
-ASH405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx ash405 esd
-
-bamboo_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx bamboo amcc
+ @$(MKCONFIG) -n $@ -a acadia powerpc ppc4xx acadia amcc
bamboo_nand_config: unconfig
@mkdir -p $(obj)include $(obj)board/amcc/bamboo
@mkdir -p $(obj)nand_spl/board/amcc/bamboo
@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
- @$(MKCONFIG) -n $@ -a bamboo powerpc ppc4xx bamboo amcc
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/bamboo/config.tmp
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
-
-bubinga_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx bubinga amcc
-
-CANBT_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx canbt esd
+ @$(MKCONFIG) -n $@ -a bamboo powerpc ppc4xx bamboo amcc
# Arches, Canyonlands & Glacier use different U-Boot images
arches_config \
@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
@echo "#define CONFIG_$$(echo $(subst ,,$(@:_nand_config=)) | \
tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
- @$(MKCONFIG) -n $@ -a canyonlands powerpc ppc4xx canyonlands amcc
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/canyonlands/config.tmp
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+ @$(MKCONFIG) -n $@ -a canyonlands powerpc ppc4xx canyonlands amcc
CATcenter_config \
CATcenter_25_config \
CATcenter_33_config: unconfig
@mkdir -p $(obj)include
- @ echo "/* CATcenter uses PPChameleon Model ME */" > $(obj)include/config.h
- @ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 1" >> $(obj)include/config.h
+ @echo "/* CATcenter uses PPChameleon Model ME */" > $(obj)include/config.h
+ @echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 1" >> $(obj)include/config.h
@[ -z "$(findstring _25,$@)" ] || \
- { echo "#define CONFIG_PPCHAMELEON_CLK_25" >> $(obj)include/config.h ; \
- $(XECHO) "SysClk = 25MHz" ; \
- }
+ echo "#define CONFIG_PPCHAMELEON_CLK_25" >> $(obj)include/config.h
@[ -z "$(findstring _33,$@)" ] || \
- { echo "#define CONFIG_PPCHAMELEON_CLK_33" >> $(obj)include/config.h ; \
- $(XECHO) "SysClk = 33MHz" ; \
- }
- @$(MKCONFIG) -a $(call xtract_4xx,$@) powerpc ppc4xx PPChameleonEVB dave
-
-CMS700_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx cms700 esd
-
-CPCI2DP_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx cpci2dp esd
+ echo "#define CONFIG_PPCHAMELEON_CLK_33" >> $(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a CATcenter powerpc ppc4xx PPChameleonEVB dave
CPCI405_config \
CPCI4052_config \
CPCI405DT_config \
CPCI405AB_config: unconfig
@mkdir -p $(obj)board/esd/cpci405
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx cpci405 esd
-
-CPCIISER4_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx cpciiser4 esd
-
-CRAYL1_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx L1 cray
-
-csb272_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx csb272
-
-csb472_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx csb472
-
-DASA_SIM_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx dasa_sim esd
-
-dlvision_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx dlvision gdsys
-
-DP405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx dp405 esd
-
-DU405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx du405 esd
-
-DU440_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx du440 esd
-
-ebony_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx ebony amcc
-
-ERIC_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx eric
+ @$(MKCONFIG) -n $@ $@ powerpc ppc4xx cpci405 esd
fx12mm_flash_config: unconfig
@mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
>> $(obj)board/avnet/fx12mm/config.tmp
@$(MKCONFIG) fx12mm powerpc ppc4xx fx12mm avnet
-G2000_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx g2000
-
-gdppc440etx_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx gdppc440etx gdsys
-
-hcu4_config: unconfig
- @mkdir -p $(obj)board/netstal/common
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx hcu4 netstal
-
-hcu5_config: unconfig
- @mkdir -p $(obj)board/netstal/common
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx hcu5 netstal
-
-HH405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx hh405 esd
-
-HUB405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx hub405 esd
-
-icon_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx icon mosaixtech
-
# Compact-Center(codename intip) & DevCon-Center use different U-Boot images
intip_config \
devconcenter_config: unconfig
tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
@$(MKCONFIG) -n $@ -a intip powerpc ppc4xx intip gdsys
-JSE_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx jse
-
-KAREF_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx karef sandburst
-
-katmai_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx katmai amcc
+hcu4_config \
+hcu5_config \
+mcu25_config: unconfig
+ @mkdir -p $(obj)board/netstal/common
+ @$(MKCONFIG) $@ powerpc ppc4xx $(call lcname,$@) netstal
# Kilauea & Haleakala images are identical (recognized via PVR)
kilauea_config \
haleakala_config: unconfig
- @$(MKCONFIG) -n $@ -a kilauea powerpc ppc4xx kilauea amcc
+ @$(MKCONFIG) -n $@ kilauea powerpc ppc4xx kilauea amcc
kilauea_nand_config \
haleakala_nand_config: unconfig
@mkdir -p $(obj)include $(obj)board/amcc/kilauea
@mkdir -p $(obj)nand_spl/board/amcc/kilauea
@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
- @$(MKCONFIG) -n $@ -a kilauea powerpc ppc4xx kilauea amcc
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/kilauea/config.tmp
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
-
-korat_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx korat
-
-luan_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx luan amcc
-
-lwmon5_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx lwmon5
-
-makalu_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx makalu amcc
-
-mcu25_config: unconfig
- @mkdir -p $(obj)board/netstal/common
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx mcu25 netstal
-
-METROBOX_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx metrobox sandburst
-
-MIP405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx mip405 mpl
+ @$(MKCONFIG) -n $@ -a kilauea powerpc ppc4xx kilauea amcc
MIP405T_config: unconfig
@mkdir -p $(obj)include
@$(XECHO) "Enable subset config for MIP405T"
@$(MKCONFIG) -a MIP405 powerpc ppc4xx mip405 mpl
-ML2_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx ml2
-
ml507_flash_config: unconfig
@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
@mkdir -p $(obj)include $(obj)board/xilinx/ml507
> $(obj)board/xilinx/ml507/config.tmp
@echo "TEXT_BASE := 0x04000000" \
>> $(obj)board/xilinx/ml507/config.tmp
- @$(MKCONFIG) ml507 powerpc ppc4xx ml507 xilinx
-
-neo_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx neo gdsys
-
-ocotea_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx ocotea amcc
+ @$(MKCONFIG) $@ powerpc ppc4xx ml507 xilinx
OCRTC_config \
ORSG_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx ocrtc esd
-
-p3p440_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx p3p440 prodrive
-
-PCI405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx pci405 esd
-
-pcs440ep_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx pcs440ep
-
-PIP405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx pip405 mpl
-
-PLU405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx plu405 esd
-
-PMC405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx pmc405 esd
-
-PMC405DE_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx pmc405de esd
-
-PMC440_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx pmc440 esd
+ @$(MKCONFIG) -n $@ $@ powerpc ppc4xx ocrtc esd
PPChameleonEVB_config \
PPChameleonEVB_BA_25_config \
PPChameleonEVB_HI_33_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring EVB_BA,$@)" ] || \
- { echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 0" >>$(obj)include/config.h ; \
- $(XECHO) "... BASIC model" ; \
- }
+ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 0" >>$(obj)include/config.h
@[ -z "$(findstring EVB_ME,$@)" ] || \
- { echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 1" >>$(obj)include/config.h ; \
- $(XECHO) "... MEDIUM model" ; \
- }
+ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 1" >>$(obj)include/config.h
@[ -z "$(findstring EVB_HI,$@)" ] || \
- { echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 2" >>$(obj)include/config.h ; \
- $(XECHO) "... HIGH-END model" ; \
- }
+ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 2" >>$(obj)include/config.h
@[ -z "$(findstring _25,$@)" ] || \
- { echo "#define CONFIG_PPCHAMELEON_CLK_25" >>$(obj)include/config.h ; \
- $(XECHO) "SysClk = 25MHz" ; \
- }
+ echo "#define CONFIG_PPCHAMELEON_CLK_25" >>$(obj)include/config.h
@[ -z "$(findstring _33,$@)" ] || \
- { echo "#define CONFIG_PPCHAMELEON_CLK_33" >>$(obj)include/config.h ; \
- $(XECHO) "SysClk = 33MHz" ; \
- }
- @$(MKCONFIG) -a $(call xtract_4xx,$@) powerpc ppc4xx PPChameleonEVB dave
-
-quad100hd_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx quad100hd
-
-redwood_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx redwood amcc
-
-sbc405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx sbc405
-
-sc3_config:unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx sc3
+ echo "#define CONFIG_PPCHAMELEON_CLK_33" >>$(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a PPChameleonEVB powerpc ppc4xx PPChameleonEVB dave
sequoia_config \
rainier_config: unconfig
@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
@echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
- @$(MKCONFIG) -n $@ -a sequoia powerpc ppc4xx sequoia amcc
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+ @$(MKCONFIG) -n $@ -a sequoia powerpc ppc4xx sequoia amcc
sequoia_ramboot_config \
rainier_ramboot_config: unconfig
@echo "#define CONFIG_SYS_RAMBOOT" > $(obj)include/config.h
@echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
- @$(MKCONFIG) -n $@ -a sequoia powerpc ppc4xx sequoia amcc
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
@echo "LDSCRIPT = board/amcc/sequoia/u-boot-ram.lds" >> \
$(obj)board/amcc/sequoia/config.tmp
-
-taihu_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx taihu amcc
-
-taishan_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx taishan amcc
+ @$(MKCONFIG) -n $@ -a sequoia powerpc ppc4xx sequoia amcc
v5fx30teval_config: unconfig
@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
> $(obj)board/avnet/v5fx30teval/config.tmp
@echo "TEXT_BASE := 0x03000000" \
>> $(obj)board/avnet/v5fx30teval/config.tmp
- @$(MKCONFIG) v5fx30teval powerpc ppc4xx v5fx30teval avnet
+ @$(MKCONFIG) $@ powerpc ppc4xx v5fx30teval avnet
v5fx30teval_flash_config: unconfig
@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
>> $(obj)board/avnet/v5fx30teval/config.tmp
@$(MKCONFIG) v5fx30teval powerpc ppc4xx v5fx30teval avnet
-VOH405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx voh405 esd
-
-VOM405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx vom405 esd
-
W7OLMC_config \
W7OLMG_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx w7o
+ @$(MKCONFIG) $@ powerpc ppc4xx w7o
# Walnut & Sycamore images are identical (recognized via PVR)
walnut_config \
sycamore_config: unconfig
- @$(MKCONFIG) -n $@ -a walnut powerpc ppc4xx walnut amcc
-
-WUH405_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx wuh405 esd
+ @$(MKCONFIG) -n $@ walnut powerpc ppc4xx walnut amcc
xilinx-ppc405-generic_flash_config: unconfig
@mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
>> $(obj)board/xilinx/ppc440-generic/config.tmp
@$(MKCONFIG) xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx
-XPEDITE1000_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx xpedite1000 xes
-
yosemite_config \
yellowstone_config: unconfig
@mkdir -p $(obj)include
tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
@$(MKCONFIG) -n $@ -a yosemite powerpc ppc4xx yosemite amcc
-yucca_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx yucca amcc
-
-zeus_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc ppc4xx zeus
-
-#########################################################################
-## MPC8220 Systems
-#########################################################################
-
-Alaska8220_config \
-Yukon8220_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8220 alaska
-
-sorcery_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8220 sorcery
-
#########################################################################
## MPC824x Systems
#########################################################################
-xtract_82xx = $(subst _BIGFLASH,,$(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,,$(subst _300MHz,,$(subst _config,,$1))))))
-
-A3000_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x a3000
-barco_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x barco
-
-BMW_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x bmw
+eXalion_config: unconfig
+ @$(MKCONFIG) $(@:_config=) powerpc mpc824x eXalion
CPC45_config \
CPC45_ROMBOOT_config: unconfig
- @$(MKCONFIG) $(call xtract_82xx,$@) powerpc mpc824x cpc45
- @cd $(obj)include ; \
+ @mkdir -p $(obj)include ; \
if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
- echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
- $(XECHO) "... booting from 8-bit flash" ; \
+ echo "CONFIG_BOOT_ROM = y" >> $(obj)include/config.mk ; \
else \
- echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
- $(XECHO) "... booting from 64-bit flash" ; \
+ echo "CONFIG_BOOT_ROM = n" >> $(obj)include/config.mk ; \
fi; \
- echo "export CONFIG_BOOT_ROM" >> config.mk;
-
-CU824_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x cu824
-
-debris_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x debris etin
-
-eXalion_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x eXalion
-
-HIDDEN_DRAGON_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x hidden_dragon
-
-kvme080_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x kvme080 etin
+ echo "export CONFIG_BOOT_ROM" >> $(obj)include/config.mk;
+ @$(MKCONFIG) -n $@ CPC45 powerpc mpc824x cpc45
# HDLAN is broken ATM. Should be fixed as soon as hardware is available and as
# time permits.
esac
@$(MKCONFIG) -n $@ -a linkstation powerpc mpc824x linkstation
-MOUSSE_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x mousse
-
-MUSENKI_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x musenki
-
-MVBLUE_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x mvblue
-
-OXC_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x oxc
-
-PN62_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x pn62
-
Sandpoint8240_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x sandpoint
+ @$(MKCONFIG) $@ powerpc mpc824x sandpoint
Sandpoint8245_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x sandpoint
-
-sbc8240_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x sbc8240
-
-utx8245_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc824x utx8245
+ @$(MKCONFIG) $@ powerpc mpc824x sandpoint
#########################################################################
## MPC8260 Systems
#########################################################################
-atc_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 atc
-
cogent_mpc8260_config: unconfig
@$(MKCONFIG) $(@:_config=) powerpc mpc8260 cogent
CPU86_config \
CPU86_ROMBOOT_config: unconfig
- @$(MKCONFIG) $(call xtract_82xx,$@) powerpc mpc8260 cpu86
- @cd $(obj)include ; \
+ @mkdir -p $(obj)include ; \
if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
- echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
- $(XECHO) "... booting from 8-bit flash" ; \
+ echo "CONFIG_BOOT_ROM = y" >> $(obj)include/config.mk ; \
else \
- echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
- $(XECHO) "... booting from 64-bit flash" ; \
+ echo "CONFIG_BOOT_ROM = n" >> $(obj)include/config.mk ; \
fi; \
- echo "export CONFIG_BOOT_ROM" >> config.mk;
+ echo "export CONFIG_BOOT_ROM" >> $(obj)include/config.mk;
+ @$(MKCONFIG) -n $@ CPU86 powerpc mpc8260 cpu86
CPU87_config \
CPU87_ROMBOOT_config: unconfig
- @$(MKCONFIG) $(call xtract_82xx,$@) powerpc mpc8260 cpu87
- @cd $(obj)include ; \
+ @mkdir -p $(obj)include ; \
if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
- echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
- $(XECHO) "... booting from 8-bit flash" ; \
+ echo "CONFIG_BOOT_ROM = y" >> $(obj)include/config.mk ; \
else \
- echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
- $(XECHO) "... booting from 64-bit flash" ; \
+ echo "CONFIG_BOOT_ROM = n" >> $(obj)include/config.mk ; \
fi; \
- echo "export CONFIG_BOOT_ROM" >> config.mk;
+ echo "export CONFIG_BOOT_ROM" >> $(obj)include/config.mk;
+ @$(MKCONFIG) -n $@ CPU87 powerpc mpc8260 cpu87
ep8248_config \
ep8248E_config : unconfig
- @$(MKCONFIG) ep8248 powerpc mpc8260 ep8248
-
-ep8260_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 ep8260
-
-ep82xxm_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 ep82xxm
-
-gw8260_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 gw8260
-
-hymod_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 hymod
-
-IDS8247_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 ids8247
-
-IPHASE4539_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 iphase4539
+ @$(MKCONFIG) -n $@ ep8248 powerpc mpc8260 ep8248
ISPAN_config \
ISPAN_REVB_config: unconfig
@if [ "$(findstring _REVB_,$@)" ] ; then \
echo "#define CONFIG_SYS_REV_B" > $(obj)include/config.h ; \
fi
- @$(MKCONFIG) -a ISPAN powerpc mpc8260 ispan
-
-mgcoge_config : unconfig
- @$(MKCONFIG) mgcoge powerpc mpc8260 mgcoge keymile
+ @$(MKCONFIG) -n $@ -a ISPAN powerpc mpc8260 ispan
MPC8260ADS_config \
MPC8260ADS_lowboot_config \
$(if $(findstring VR,$@), \
@echo "#define CONFIG_8260_CLKIN 66000000" >> $(obj)include/config.h))
@[ -z "$(findstring lowboot_,$@)" ] || \
- { echo "TEXT_BASE = 0xFF800000" >$(obj)board/freescale/mpc8260ads/config.tmp ; \
- $(XECHO) "... with lowboot configuration" ; \
- }
- @$(MKCONFIG) -a MPC8260ADS powerpc mpc8260 mpc8260ads freescale
-
-MPC8266ADS_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 mpc8266ads freescale
+ echo "TEXT_BASE = 0xFF800000" >$(obj)board/freescale/mpc8260ads/config.tmp
+ @$(MKCONFIG) -n $@ -a MPC8260ADS powerpc mpc8260 mpc8260ads freescale
muas3001_dev_config \
muas3001_config : unconfig
@if [ "$(findstring dev,$@)" ] ; then \
echo "#define CONFIG_MUAS_DEV_BOARD" > $(obj)include/config.h ; \
fi
- @$(MKCONFIG) -a muas3001 powerpc mpc8260 muas3001
+ @$(MKCONFIG) -n $@ -a muas3001 powerpc mpc8260 muas3001
# PM825/PM826 default configuration: small (= 8 MB) Flash / boot from 64-bit flash
PM825_config \
>$(obj)include/config.h ; \
fi
@if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
- $(XECHO) "... booting from 8-bit flash" ; \
echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \
echo "TEXT_BASE = 0xFF800000" >$(obj)board/pm826/config.tmp ; \
if [ "$(findstring _BIGFLASH_,$@)" ] ; then \
- $(XECHO) "... with 32 MB Flash" ; \
echo "#define CONFIG_FLASH_32MB" >>$(obj)include/config.h ; \
fi; \
else \
- $(XECHO) "... booting from 64-bit flash" ; \
if [ "$(findstring _BIGFLASH_,$@)" ] ; then \
$(XECHO) "... with 32 MB Flash" ; \
echo "#define CONFIG_FLASH_32MB" >>$(obj)include/config.h ; \
echo "TEXT_BASE = 0xFF000000" >$(obj)board/pm826/config.tmp ; \
fi; \
fi
- @$(MKCONFIG) -a PM826 powerpc mpc8260 pm826
+ @$(MKCONFIG) -n $@ -a PM826 powerpc mpc8260 pm826
PM828_config \
PM828_PCI_config \
@mkdir -p $(obj)board/pm826
@if [ "$(findstring _PCI_,$@)" ] ; then \
echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
- $(XECHO) "... with PCI enabled" ; \
fi
@if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
- $(XECHO) "... booting from 8-bit flash" ; \
echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \
echo "TEXT_BASE = 0xFF800000" >$(obj)board/pm826/config.tmp ; \
fi
- @$(MKCONFIG) -a PM828 powerpc mpc8260 pm828
-
-ppmc8260_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 ppmc8260
+ @$(MKCONFIG) -n $@ -a PM828 powerpc mpc8260 pm828
Rattler8248_config \
Rattler_config: unconfig
@mkdir -p $(obj)include
$(if $(findstring 8248,$@), \
- @echo "#define CONFIG_MPC8248" > $(obj)include/config.h)
- @$(MKCONFIG) -a Rattler powerpc mpc8260 rattler
-
-RPXsuper_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 rpxsuper
-
-rsdproto_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 rsdproto
-
-sacsng_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 sacsng
-
-sbc8260_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 sbc8260
-
-SCM_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 SCM siemens
+ @echo "#define CONFIG_MPC8248" > $(obj)include/config.h)
+ @$(MKCONFIG) -n $@ -a Rattler powerpc mpc8260 rattler
TQM8255_AA_config \
TQM8260_AA_config \
echo "#define CONFIG_$${CTYPE}" >>$(obj)include/config.h ; \
fi; \
echo "#define CONFIG_$${CFREQ}MHz" >>$(obj)include/config.h ; \
- echo "... with $${CFREQ}MHz system clock" ; \
if [ "$${CACHE}" = "yes" ] ; then \
echo "#define CONFIG_L2_CACHE" >>$(obj)include/config.h ; \
- $(XECHO) "... with L2 Cache support" ; \
else \
echo "#undef CONFIG_L2_CACHE" >>$(obj)include/config.h ; \
- $(XECHO) "... without L2 Cache support" ; \
fi; \
if [ "$${BMODE}" = "60x" ] ; then \
echo "#define CONFIG_BUSMODE_60x" >>$(obj)include/config.h ; \
- $(XECHO) "... with 60x Bus Mode" ; \
else \
echo "#undef CONFIG_BUSMODE_60x" >>$(obj)include/config.h ; \
- $(XECHO) "... without 60x Bus Mode" ; \
fi
- @$(MKCONFIG) -a TQM8260 powerpc mpc8260 tqm8260 tqc
-
-TQM8272_config: unconfig
- @$(MKCONFIG) TQM8272 powerpc mpc8260 tqm8272 tqc
+ @$(MKCONFIG) -n $@ -a TQM8260 powerpc mpc8260 tqm8260 tqc
VoVPN-GW_66MHz_config \
VoVPN-GW_100MHz_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_CLKIN_$(word 2,$(subst _, ,$@))" > $(obj)include/config.h
- @$(MKCONFIG) -a VoVPN-GW powerpc mpc8260 vovpn-gw funkwerk
-
-ZPC1900_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc8260 zpc1900
+ @$(MKCONFIG) -n $@ -a VoVPN-GW powerpc mpc8260 vovpn-gw funkwerk
#########################################################################
## Coldfire
astro_mcf5373l_config \
astro_mcf5373l_RAM_config : unconfig
- @$(MKCONFIG) -t $(@:_config=) astro_mcf5373l m68k mcf532x mcf5373l astro
-
-M5208EVBE_config : unconfig
- @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5208evbe freescale
+ @$(MKCONFIG) -n $@ -t $@ astro_mcf5373l m68k mcf532x mcf5373l astro
M52277EVB_config \
M52277EVB_spansion_config \
echo "#define CONFIG_SYS_SPANSION_BOOT" >> $(obj)include/config.h ; \
echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m52277evb/config.tmp ; \
cp $(obj)board/freescale/m52277evb/u-boot.spa $(obj)board/freescale/m52277evb/u-boot.lds ; \
- $(XECHO) "... with SPANSION boot..." ; \
fi; \
if [ "$${FLASH}" = "STMICRO" ] ; then \
echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \
echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \
echo "TEXT_BASE = 0x43E00000" > $(obj)board/freescale/m52277evb/config.tmp ; \
cp $(obj)board/freescale/m52277evb/u-boot.stm $(obj)board/freescale/m52277evb/u-boot.lds ; \
- $(XECHO) "... with ST Micro boot..." ; \
fi
- @$(MKCONFIG) -a M52277EVB m68k mcf5227x m52277evb freescale
+ @$(MKCONFIG) -n $@ -a M52277EVB m68k mcf5227x m52277evb freescale
M5235EVB_config \
M5235EVB_Flash16_config \
echo "TEXT_BASE = 0xFFE00000" > $(obj)board/freescale/m5235evb/config.tmp ; \
cp $(obj)board/freescale/m5235evb/u-boot.16 $(obj)board/freescale/m5235evb/u-boot.lds ; \
fi
- @$(MKCONFIG) -a M5235EVB m68k mcf523x m5235evb freescale
-
-M5249EVB_config : unconfig
- @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5249evb freescale
-
-M5253DEMO_config : unconfig
- @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5253demo freescale
-
-M5253EVBE_config : unconfig
- @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5253evbe freescale
+ @$(MKCONFIG) -n $@ -a M5235EVB m68k mcf523x m5235evb freescale
cobra5272_config : unconfig
- @$(MKCONFIG) $(@:_config=) m68k mcf52x2 cobra5272
+ @$(MKCONFIG) $@ m68k mcf52x2 cobra5272
EB+MCF-EV123_config : unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/BuS/EB+MCF-EV123
@echo "TEXT_BASE = 0xFFE00000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk
- @$(MKCONFIG) EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS
+ @$(MKCONFIG) -n $@ EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS
EB+MCF-EV123_internal_config : unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/BuS/EB+MCF-EV123
@echo "TEXT_BASE = 0xF0000000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk
- @$(MKCONFIG) EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS
-
-EP2500_config: unconfig
- @$(MKCONFIG) $(@:_config=) m68k mcf52x2 ep2500 Mercury
-
-idmr_config : unconfig
- @$(MKCONFIG) $(@:_config=) m68k mcf52x2 idmr
-
-M5271EVB_config : unconfig
- @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5271evb freescale
-
-M5272C3_config : unconfig
- @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5272c3 freescale
-
-M5275EVB_config : unconfig
- @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5275evb freescale
-
-M5282EVB_config : unconfig
- @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5282evb freescale
-
-M53017EVB_config : unconfig
- @$(MKCONFIG) $(@:_config=) m68k mcf532x m53017evb freescale
+ @$(MKCONFIG) -n $@ EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS
M5329AFEE_config \
M5329BFEE_config : unconfig
if [ "$${NAND}" != "0" ] ; then \
echo "#define NANDFLASH_SIZE $${NAND}" > $(obj)include/config.h ; \
fi
- @$(MKCONFIG) -a M5329EVB m68k mcf532x m5329evb freescale
+ @$(MKCONFIG) -n $@ -a M5329EVB m68k mcf532x m5329evb freescale
M5373EVB_config : unconfig
@case "$@" in \
if [ "$${FLASH}" = "NOR" ] ; then \
echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54451evb/config.tmp ; \
cp $(obj)board/freescale/m54451evb/u-boot.spa $(obj)board/freescale/m54451evb/u-boot.lds ; \
- $(XECHO) "... with NOR boot..." ; \
fi; \
if [ "$${FLASH}" = "STMICRO" ] ; then \
echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \
echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \
echo "TEXT_BASE = 0x47E00000" > $(obj)board/freescale/m54451evb/config.tmp ; \
cp $(obj)board/freescale/m54451evb/u-boot.stm $(obj)board/freescale/m54451evb/u-boot.lds ; \
- $(XECHO) "... with ST Micro boot..." ; \
fi; \
echo "#define CONFIG_SYS_INPUT_CLKSRC 24000000" >> $(obj)include/config.h ;
- @$(MKCONFIG) -a M54451EVB m68k mcf5445x m54451evb freescale
+ @$(MKCONFIG) -n $@ -a M54451EVB m68k mcf5445x m54451evb freescale
M54455EVB_config \
M54455EVB_atmel_config \
echo "#define CONFIG_SYS_INTEL_BOOT" >> $(obj)include/config.h ; \
echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
cp $(obj)board/freescale/m54455evb/u-boot.int $(obj)board/freescale/m54455evb/u-boot.lds ; \
- $(XECHO) "... with INTEL boot..." ; \
fi; \
if [ "$${FLASH}" = "ATMEL" ] ; then \
echo "#define CONFIG_SYS_ATMEL_BOOT" >> $(obj)include/config.h ; \
echo "TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
cp $(obj)board/freescale/m54455evb/u-boot.atm $(obj)board/freescale/m54455evb/u-boot.lds ; \
- $(XECHO) "... with ATMEL boot..." ; \
fi; \
if [ "$${FLASH}" = "STMICRO" ] ; then \
echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \
echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \
echo "TEXT_BASE = 0x4FE00000" > $(obj)board/freescale/m54455evb/config.tmp ; \
cp $(obj)board/freescale/m54455evb/u-boot.stm $(obj)board/freescale/m54455evb/u-boot.lds ; \
- $(XECHO) "... with ST Micro boot..." ; \
fi; \
echo "#define CONFIG_SYS_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \
- $(XECHO) "... with $${FREQ}Hz input clock"
- @$(MKCONFIG) -a M54455EVB m68k mcf5445x m54455evb freescale
+ @$(MKCONFIG) -n $@ -a M54455EVB m68k mcf5445x m54455evb freescale
M5475AFE_config \
M5475BFE_config \
if [ "$${USB}" == "1" ] ; then \
echo "#define CONFIG_SYS_USBCTRL" >> $(obj)include/config.h ; \
fi
- @$(MKCONFIG) -a M5475EVB m68k mcf547x_8x m547xevb freescale
+ @$(MKCONFIG) -n $@ -a M5475EVB m68k mcf547x_8x m547xevb freescale
M5485AFE_config \
M5485BFE_config \
if [ "$${USB}" == "1" ] ; then \
echo "#define CONFIG_SYS_USBCTRL" >> $(obj)include/config.h ; \
fi
- @$(MKCONFIG) -a M5485EVB m68k mcf547x_8x m548xevb freescale
-
-TASREG_config : unconfig
- @$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
+ @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale
#########################################################################
## MPC83xx Systems
#########################################################################
-kmeter1_config: unconfig
- @$(MKCONFIG) kmeter1 powerpc mpc83xx kmeter1 keymile
-
MPC8313ERDB_33_config \
MPC8313ERDB_66_config \
MPC8313ERDB_NAND_33_config \
@mkdir -p $(obj)include
@mkdir -p $(obj)board/freescale/mpc8313erdb
@if [ "$(findstring _33_,$@)" ] ; then \
- $(XECHO) -n "...33M ..." ; \
echo "#define CONFIG_SYS_33MHZ" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _66_,$@)" ] ; then \
- $(XECHO) -n "...66M..." ; \
echo "#define CONFIG_SYS_66MHZ" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _NAND_,$@)" ] ; then \
- $(XECHO) -n "...NAND..." ; \
echo "TEXT_BASE = 0x00100000" > $(obj)board/freescale/mpc8313erdb/config.tmp ; \
echo "#define CONFIG_NAND_U_BOOT" >>$(obj)include/config.h ; \
fi ;
- @$(MKCONFIG) -a MPC8313ERDB powerpc mpc83xx mpc8313erdb freescale
@if [ "$(findstring _NAND_,$@)" ] ; then \
echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk ; \
fi ;
+ @$(MKCONFIG) -n $@ -a MPC8313ERDB powerpc mpc83xx mpc8313erdb freescale
MPC8315ERDB_NAND_config \
MPC8315ERDB_config: unconfig
- @$(MKCONFIG) -t $(@:_config=) MPC8315ERDB powerpc mpc83xx mpc8315erdb freescale
-
-MPC8323ERDB_config: unconfig
- @$(MKCONFIG) -a MPC8323ERDB powerpc mpc83xx mpc8323erdb freescale
+ @$(MKCONFIG) -n $@ -t $@ MPC8315ERDB powerpc mpc83xx mpc8315erdb freescale
MPC832XEMDS_config \
MPC832XEMDS_HOST_33_config \
MPC832XEMDS_ATM_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _HOST_,$@)" ] ; then \
- $(XECHO) -n "... PCI HOST " ; \
echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _SLAVE_,$@)" ] ; then \
- $(XECHO) "...PCI SLAVE 66M" ; \
echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
echo "#define CONFIG_PCISLAVE" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _33_,$@)" ] ; then \
- $(XECHO) -n "...33M ..." ; \
echo "#define PCI_33M" >>$(obj)include/config.h ; \
echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _66_,$@)" ] ; then \
- $(XECHO) -n "...66M..." ; \
echo "#define PCI_66M" >>$(obj)include/config.h ; \
echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _ATM_,$@)" ] ; then \
- $(XECHO) -n "...ATM..." ; \
echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
echo "#define CONFIG_PQ_MDS_PIB_ATM 1" >>$(obj)include/config.h ; \
fi ;
- @$(MKCONFIG) -a MPC832XEMDS powerpc mpc83xx mpc832xemds freescale
-
-MPC8349EMDS_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc83xx mpc8349emds freescale
+ @$(MKCONFIG) -n $@ -a MPC832XEMDS powerpc mpc83xx mpc832xemds freescale
MPC8349ITX_config \
MPC8349ITX_LOWBOOT_config \
@if [ "$(findstring LOWBOOT,$@)" ] ; then \
echo "TEXT_BASE = 0xFE000000" >$(obj)board/freescale/mpc8349itx/config.tmp ; \
fi
- @$(MKCONFIG) -a -n $(@:_config=) MPC8349ITX powerpc mpc83xx mpc8349itx freescale
+ @$(MKCONFIG) -n $@ -a MPC8349ITX powerpc mpc83xx mpc8349itx freescale
MPC8360EMDS_config \
MPC8360EMDS_HOST_33_config \
MPC8360EMDS_ATM_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _HOST_,$@)" ] ; then \
- $(XECHO) -n "... PCI HOST " ; \
echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _SLAVE_,$@)" ] ; then \
- $(XECHO) "...PCI SLAVE 66M" ; \
echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
echo "#define CONFIG_PCISLAVE" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _33_,$@)" ] ; then \
- $(XECHO) -n "...33M ..." ; \
echo "#define PCI_33M" >>$(obj)include/config.h ; \
echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _66_,$@)" ] ; then \
- $(XECHO) -n "...66M..." ; \
echo "#define PCI_66M" >>$(obj)include/config.h ; \
echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _ATM_,$@)" ] ; then \
- $(XECHO) -n "...ATM..." ; \
echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
echo "#define CONFIG_PQ_MDS_PIB_ATM 1" >>$(obj)include/config.h ; \
fi ;
- @$(MKCONFIG) -a MPC8360EMDS powerpc mpc83xx mpc8360emds freescale
+ @$(MKCONFIG) -n $@ -a MPC8360EMDS powerpc mpc83xx mpc8360emds freescale
MPC8360ERDK_33_config \
MPC8360ERDK_66_config \
MPC8360ERDK_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _33_,$@)" ] ; then \
- $(XECHO) -n "... CLKIN 33MHz " ; \
echo "#define CONFIG_CLKIN_33MHZ" >>$(obj)include/config.h ;\
fi ;
- @$(MKCONFIG) -a MPC8360ERDK powerpc mpc83xx mpc8360erdk freescale
+ @$(MKCONFIG) -n $@ -a MPC8360ERDK powerpc mpc83xx mpc8360erdk freescale
MPC837XEMDS_config \
MPC837XEMDS_HOST_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _HOST_,$@)" ] ; then \
- $(XECHO) -n "... PCI HOST " ; \
echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
fi ;
- @$(MKCONFIG) -a MPC837XEMDS powerpc mpc83xx mpc837xemds freescale
-
-MPC837XERDB_config: unconfig
- @$(MKCONFIG) -a MPC837XERDB powerpc mpc83xx mpc837xerdb freescale
-
-MVBLM7_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc83xx mvblm7 matrix_vision
+ @$(MKCONFIG) -n $@ -a MPC837XEMDS powerpc mpc83xx mpc837xemds freescale
sbc8349_config \
sbc8349_PCI_33_config \
sbc8349_PCI_66_config: unconfig
- @$(MKCONFIG) -t $(@:_config=) sbc8349 powerpc mpc83xx sbc8349
+ @$(MKCONFIG) -n $@ -t $@ sbc8349 powerpc mpc83xx sbc8349
SIMPC8313_LP_config \
SIMPC8313_SP_config: unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/sheldon/simpc8313
@if [ "$(findstring _LP_,$@)" ] ; then \
- $(XECHO) -n "...Large Page NAND..." ; \
echo "#define CONFIG_NAND_LP" >> $(obj)include/config.h ; \
fi ; \
if [ "$(findstring _SP_,$@)" ] ; then \
- $(XECHO) -n "...Small Page NAND..." ; \
echo "#define CONFIG_NAND_SP" >> $(obj)include/config.h ; \
fi ;
- @$(MKCONFIG) -a SIMPC8313 powerpc mpc83xx simpc8313 sheldon
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
-
-TQM834x_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc83xx tqm834x tqc
+ @$(MKCONFIG) -n $@ -a SIMPC8313 powerpc mpc83xx simpc8313 sheldon
caddy2_config \
vme8349_config: unconfig
- @$(MKCONFIG) -t $(@:_config=) vme8349 powerpc mpc83xx vme8349 esd
-
-edb9301_config \
-edb9302_config \
-edb9302a_config \
-edb9307_config \
-edb9307a_config \
-edb9312_config \
-edb9315_config \
-edb9315a_config: unconfig
- @$(MKCONFIG) -t $(@:_config=) edb93xx arm arm920t edb93xx NULL ep93xx
+ @$(MKCONFIG) -n $@ -t $@ vme8349 powerpc mpc83xx vme8349 esd
#########################################################################
## MPC85xx Systems
#########################################################################
-ATUM8548_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc85xx atum8548
-
MPC8536DS_NAND_config \
MPC8536DS_SDCARD_config \
MPC8536DS_SPIFLASH_config \
MPC8536DS_36BIT_config \
MPC8536DS_config: unconfig
- @$(MKCONFIG) -t $(@:_config=) MPC8536DS powerpc mpc85xx mpc8536ds freescale
-
-MPC8540ADS_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc85xx mpc8540ads freescale
+ @$(MKCONFIG) -n $@ -t $@ MPC8536DS powerpc mpc85xx mpc8536ds freescale
MPC8540EVAL_config \
MPC8540EVAL_33_config \
MPC8540EVAL_66_config \
MPC8540EVAL_33_slave_config \
-MPC8540EVAL_66_slave_config: unconfig
+MPC8540EVAL_66_slave_config: unconfig
@mkdir -p $(obj)include
- @if [ "$(findstring _33_,$@)" ] ; then \
- $(XECHO) "... 33 MHz PCI" ; \
- else \
+ @if [ -z "$(findstring _33_,$@)" ] ; then \
echo "#define CONFIG_SYSCLK_66M" >>$(obj)include/config.h ; \
- $(XECHO) "... 66 MHz PCI" ; \
fi ; \
if [ "$(findstring _slave_,$@)" ] ; then \
echo "#define CONFIG_PCI_SLAVE" >>$(obj)include/config.h ; \
- $(XECHO) " slave" ; \
- else \
- $(XECHO) " host" ; \
fi
- @$(MKCONFIG) -a MPC8540EVAL powerpc mpc85xx mpc8540eval
-
-MPC8560ADS_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc85xx mpc8560ads freescale
+ @$(MKCONFIG) -n $@ -a MPC8540EVAL powerpc mpc85xx mpc8540eval
MPC8541CDS_legacy_config \
MPC8541CDS_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _legacy_,$@)" ] ; then \
echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
- $(XECHO) "... legacy" ; \
fi
- @$(MKCONFIG) -a MPC8541CDS powerpc mpc85xx mpc8541cds freescale
-
-MPC8544DS_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc85xx mpc8544ds freescale
+ @$(MKCONFIG) -n $@ -a MPC8541CDS powerpc mpc85xx mpc8541cds freescale
MPC8548CDS_legacy_config \
MPC8548CDS_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _legacy_,$@)" ] ; then \
echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
- $(XECHO) "... legacy" ; \
fi
- @$(MKCONFIG) -a MPC8548CDS powerpc mpc85xx mpc8548cds freescale
+ @$(MKCONFIG) -n $@ -a MPC8548CDS powerpc mpc85xx mpc8548cds freescale
MPC8555CDS_legacy_config \
MPC8555CDS_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _legacy_,$@)" ] ; then \
echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
- $(XECHO) "... legacy" ; \
fi
- @$(MKCONFIG) -a MPC8555CDS powerpc mpc85xx mpc8555cds freescale
-
-MPC8568MDS_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc85xx mpc8568mds freescale
+ @$(MKCONFIG) -n $@ -a MPC8555CDS powerpc mpc85xx mpc8555cds freescale
MPC8569MDS_ATM_config \
MPC8569MDS_NAND_config \
MPC8569MDS_config: unconfig
- @$(MKCONFIG) -t $(@:_config=) MPC8569MDS powerpc mpc85xx mpc8569mds freescale
+ @$(MKCONFIG) -n $@ -t $@ MPC8569MDS powerpc mpc85xx mpc8569mds freescale
MPC8572DS_36BIT_config \
MPC8572DS_config: unconfig
- @$(MKCONFIG) -t $(@:_config=) MPC8572DS powerpc mpc85xx mpc8572ds freescale
+ @$(MKCONFIG) -n $@ -t $@ MPC8572DS powerpc mpc85xx mpc8572ds freescale
P2020DS_36BIT_config \
P2020DS_config: unconfig
- @$(MKCONFIG) -t $(@:_config=) P2020DS powerpc mpc85xx p2020ds freescale
+ @$(MKCONFIG) -n $@ -t $@ P2020DS powerpc mpc85xx p2020ds freescale
P1011RDB_config \
P1011RDB_NAND_config \
P2020RDB_NAND_config \
P2020RDB_SDCARD_config \
P2020RDB_SPIFLASH_config: unconfig
- @$(MKCONFIG) -t $(@:_config=) P1_P2_RDB powerpc mpc85xx p1_p2_rdb freescale
-
-PM854_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc85xx pm854
-
-PM856_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc85xx pm856
+ @$(MKCONFIG) -n $@ -t $@ P1_P2_RDB powerpc mpc85xx p1_p2_rdb freescale
sbc8540_config \
sbc8540_33_config \
sbc8540_66_config: unconfig
- @$(MKCONFIG) -t $(@:_config=) SBC8540 powerpc mpc85xx sbc8560
+ @$(MKCONFIG) -n $@ -t $@ SBC8540 powerpc mpc85xx sbc8560
sbc8548_config \
sbc8548_PCI_33_config \
sbc8548_PCI_66_config \
sbc8548_PCI_33_PCIE_config \
sbc8548_PCI_66_PCIE_config: unconfig
- @$(MKCONFIG) -t $(@:_config=) sbc8548 powerpc mpc85xx sbc8548
+ @$(MKCONFIG) -n $@ -t $@ sbc8548 powerpc mpc85xx sbc8548
sbc8560_config \
sbc8560_33_config \
sbc8560_66_config: unconfig
- @$(MKCONFIG) -t $(@:_config=) sbc8560 powerpc mpc85xx sbc8560
-
-socrates_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc85xx socrates
-
-stxgp3_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc85xx stxgp3 stx
+ @$(MKCONFIG) -n $@ -t $@ sbc8560 powerpc mpc85xx sbc8560
stxssa_config \
stxssa_4M_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _4M_,$@)" ] ; then \
echo "#define CONFIG_STXSSA_4M" >>$(obj)include/config.h ; \
- $(XECHO) "... with 4 MiB flash memory" ; \
fi
- @$(MKCONFIG) -a stxssa powerpc mpc85xx stxssa stx
+ @$(MKCONFIG) -n $@ -a stxssa powerpc mpc85xx stxssa stx
TQM8540_config \
TQM8541_config \
@mkdir -p $(obj)include
@BTYPE=$(@:_config=); \
CTYPE=$(subst TQM,,$(subst _AG,,$(subst _BE,,$(@:_config=)))); \
- $(XECHO) "... "$${BTYPE}" (MPC"$${CTYPE}")"; \
echo "#define CONFIG_MPC$${CTYPE}">>$(obj)include/config.h; \
echo "#define CONFIG_$${BTYPE}">>$(obj)include/config.h; \
echo "#define CONFIG_HOSTNAME tqm$${CTYPE}">>$(obj)include/config.h; \
echo "#define CONFIG_BOARDNAME \"$${BTYPE}\"">>$(obj)include/config.h;
- @$(MKCONFIG) -a TQM85xx powerpc mpc85xx tqm85xx tqc
@echo "CONFIG_$(@:_config=) = y">>$(obj)include/config.mk;
-
-XPEDITE5200_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc85xx xpedite5200 xes
-
-XPEDITE5370_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc85xx xpedite5370 xes
+ @$(MKCONFIG) -n $@ -a TQM85xx powerpc mpc85xx tqm85xx tqc
#########################################################################
## MPC86xx Systems
#########################################################################
-MPC8610HPCD_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc86xx mpc8610hpcd freescale
-
MPC8641HPCN_36BIT_config \
MPC8641HPCN_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _36BIT_,$@)" ] ; then \
echo "#define CONFIG_PHYS_64BIT" >>$(obj)include/config.h ; \
- $(XECHO) "... enabling 36-bit physical addressing." ; \
fi
- @$(MKCONFIG) -a MPC8641HPCN powerpc mpc86xx mpc8641hpcn freescale
-
-sbc8641d_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc86xx sbc8641d
-
-XPEDITE5170_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc mpc86xx xpedite5170 xes
+ @$(MKCONFIG) -n $@ -a MPC8641HPCN powerpc mpc86xx mpc8641hpcn freescale
#########################################################################
## 74xx/7xx Systems
#########################################################################
-AmigaOneG3SE_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx AmigaOneG3SE MAI
-
-BAB7xx_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx bab7xx eltec
-
-CPCI750_config: unconfig
- @$(MKCONFIG) CPCI750 powerpc 74xx_7xx cpci750 esd
-
-DB64360_config: unconfig
- @$(MKCONFIG) DB64360 powerpc 74xx_7xx db64360 Marvell
-
-DB64460_config: unconfig
- @$(MKCONFIG) DB64460 powerpc 74xx_7xx db64460 Marvell
-
-ELPPC_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx elppc eltec
-
EVB64260_config \
EVB64260_750CX_config: unconfig
- @$(MKCONFIG) EVB64260 powerpc 74xx_7xx evb64260
-
-mpc7448hpc2_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx mpc7448hpc2 freescale
-
-P3G4_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx evb64260
+ @$(MKCONFIG) -n $@ EVB64260 powerpc 74xx_7xx evb64260
p3m750_config \
p3m7448_config: unconfig
else \
echo "#define CONFIG_P3M7448" >>$(obj)include/config.h ; \
fi
- @$(MKCONFIG) -a p3mx powerpc 74xx_7xx p3mx prodrive
+ @$(MKCONFIG) -n $@ -a p3mx powerpc 74xx_7xx p3mx prodrive
PCIPPC2_config \
PCIPPC6_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx pcippc2
-
-ppmc7xx_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx ppmc7xx
-
-ZUMA_config: unconfig
- @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx evb64260
+ @$(MKCONFIG) -n $@ $@ powerpc 74xx_7xx pcippc2
#========================================================================
# ARM
#========================================================================
-#########################################################################
-## StrongARM Systems
-#########################################################################
-
-assabet_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm sa1100 assabet
-
-dnp1110_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm sa1100 dnp1110
-
-gcplus_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm sa1100 gcplus
-
-lart_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm sa1100 lart
-
-shannon_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm sa1100 shannon
-
-#########################################################################
-## ARM92xT Systems
-#########################################################################
-
-a320evb_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t a320evb faraday a320
#########################################################################
## Atmel AT91RM9200 Systems
#########################################################################
-at91rm9200dk_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
-
-at91rm9200ek_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200ek atmel at91rm9200
-
-cmc_pu2_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
-
CPUAT91_RAM_config \
CPUAT91_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
- @$(MKCONFIG) -a cpuat91 arm arm920t cpuat91 eukrea at91rm9200
-
-csb637_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t csb637 NULL at91rm9200
-
-eb_cpux9k2_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t eb_cpux9k2 BuS at91
-
-kb9202_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t kb9202 NULL at91rm9200
-
-m501sk_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t m501sk NULL at91rm9200
-
-mp2usb_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
+ @$(MKCONFIG) -n $@ -a cpuat91 arm arm920t cpuat91 eukrea at91rm9200
#########################################################################
## ARM926EJ-S Systems
#########################################################################
-afeb9260_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs afeb9260 NULL at91
-
-at91cap9adk_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs at91cap9adk atmel at91
-
at91sam9260ek_nandflash_config \
at91sam9260ek_dataflash_cs0_config \
at91sam9260ek_dataflash_cs1_config \
@mkdir -p $(obj)include
@if [ "$(findstring 9g20,$@)" ] ; then \
echo "#define CONFIG_AT91SAM9G20EK 1" >>$(obj)include/config.h ; \
- $(XECHO) "... 9G20 Variant" ; \
else \
echo "#define CONFIG_AT91SAM9260EK 1" >>$(obj)include/config.h ; \
fi;
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in NAND FLASH" ; \
elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
else \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS1 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in SPI DATAFLASH CS1" ; \
fi;
- @$(MKCONFIG) -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
+ @$(MKCONFIG) -n $@ -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
at91sam9xeek_nandflash_config \
at91sam9xeek_dataflash_cs0_config \
@mkdir -p $(obj)include
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in NAND FLASH" ; \
elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
else \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS1 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in SPI DATAFLASH CS1" ; \
fi;
- @$(MKCONFIG) -n at91sam9xeek -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
+ @$(MKCONFIG) -n $@ -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
at91sam9261ek_nandflash_config \
at91sam9261ek_dataflash_cs0_config \
@mkdir -p $(obj)include
@if [ "$(findstring 9g10,$@)" ] ; then \
echo "#define CONFIG_AT91SAM9G10EK 1" >>$(obj)include/config.h ; \
- $(XECHO) "... 9G10 Variant" ; \
else \
echo "#define CONFIG_AT91SAM9261EK 1" >>$(obj)include/config.h ; \
fi;
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in NAND FLASH" ; \
elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS3 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in SPI DATAFLASH CS3" ; \
else \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
fi;
- @$(MKCONFIG) -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91
+ @$(MKCONFIG) -n $@ -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91
at91sam9263ek_norflash_config \
at91sam9263ek_norflash_boot_config \
@mkdir -p $(obj)include
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in NAND FLASH" ; \
elif [ "$(findstring norflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NORFLASH 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in NOR FLASH" ; \
else \
echo "#define CONFIG_SYS_USE_DATAFLASH 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
fi;
@if [ "$(findstring norflash_boot,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_BOOT_NORFLASH 1" >>$(obj)include/config.h ; \
- $(XECHO) "... and boot from NOR FLASH" ; \
fi;
- @$(MKCONFIG) -a at91sam9263ek arm arm926ejs at91sam9263ek atmel at91
+ @$(MKCONFIG) -n $@ -a at91sam9263ek arm arm926ejs at91sam9263ek atmel at91
at91sam9rlek_nandflash_config \
at91sam9rlek_dataflash_config \
@mkdir -p $(obj)include
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in NAND FLASH" ; \
else \
echo "#define CONFIG_SYS_USE_DATAFLASH 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
fi;
- @$(MKCONFIG) -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91
+ @$(MKCONFIG) -n $@ -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91
CPU9G20_128M_config \
CPU9G20_config \
CPU9260_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
- @$(MKCONFIG) -a cpu9260 arm arm926ejs cpu9260 eukrea at91
-
-meesc_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs meesc esd at91
-
-pm9261_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs pm9261 ronetix at91
+ @$(MKCONFIG) -n $@ -a cpu9260 arm arm926ejs cpu9260 eukrea at91
at91sam9m10g45ek_nandflash_config \
at91sam9m10g45ek_dataflash_config \
@mkdir -p $(obj)include
@if [ "$(findstring 9m10,$@)" ] ; then \
echo "#define CONFIG_AT91SAM9M10G45EK 1" >>$(obj)include/config.h ; \
- $(XECHO) "... 9M10G45 Variant" ; \
else \
echo "#define CONFIG_AT91SAM9G45EKES 1" >>$(obj)include/config.h ; \
fi;
-
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in NAND FLASH" ; \
else \
echo "#define CONFIG_ATMEL_SPI 1" >>$(obj)include/config.h ; \
- $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
fi;
- @$(MKCONFIG) -a at91sam9m10g45ek arm arm926ejs at91sam9m10g45ek atmel at91
-
-otc570_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs otc570 esd at91
-
-pm9263_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs pm9263 ronetix at91
+ @$(MKCONFIG) -n $@ -a at91sam9m10g45ek arm arm926ejs at91sam9m10g45ek atmel at91
pm9g45_config : unconfig
@mkdir -p $(obj)include
SBC35_A9G20_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
- @$(MKCONFIG) -a sbc35_a9g20 arm arm926ejs sbc35_a9g20 calao at91
+ @$(MKCONFIG) -n $@ -a sbc35_a9g20 arm arm926ejs sbc35_a9g20 calao at91
TNY_A9G20_NANDFLASH_config \
TNY_A9G20_EEPROM_config \
TNY_A9260_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
- @$(MKCONFIG) -a tny_a9260 arm arm926ejs tny_a9260 calao at91
+ @$(MKCONFIG) -n $@ -a tny_a9260 arm arm926ejs tny_a9260 calao at91
########################################################################
## ARM Integrator boards - see doc/README-integrator for more info.
cp1026_config: unconfig
@board/armltd/integrator/split_by_variant.sh cp $@
-da830evm_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs da830evm davinci davinci
-
-davinci_dvevm_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs dvevm davinci davinci
-
-davinci_schmoogie_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
-
-davinci_sffsdr_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci
-
-davinci_sonata_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
-
-davinci_dm355evm_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs dm355evm davinci davinci
-
-davinci_dm355leopard_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs dm355leopard davinci davinci
-
-davinci_dm365evm_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs dm365evm davinci davinci
-
-davinci_dm6467evm_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci
-
-guruplug_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
-
-magnesium_config \
-imx27lite_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
-
-lpd7a400_config \
-lpd7a404_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
-
-mv88f6281gtw_ge_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
-
-mx1ads_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t mx1ads NULL imx
-
-mx1fs2_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t mx1fs2 NULL imx
-
-netstar_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm925t netstar
-
nhk8815_config \
nhk8815_onenand_config: unconfig
@mkdir -p $(obj)include
@ > $(obj)include/config.h
@if [ "$(findstring _onenand, $@)" ] ; then \
echo "#define CONFIG_BOOT_ONENAND" >> $(obj)include/config.h; \
- $(XECHO) "... configured to boot from OneNand Flash"; \
- else \
- $(XECHO) "... configured to boot from Nand Flash"; \
fi
- @$(MKCONFIG) -a nhk8815 arm arm926ejs nhk8815 st nomadik
-
-omap1510inn_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn ti
+ @$(MKCONFIG) -n $@ -a nhk8815 arm arm926ejs nhk8815 st nomadik
xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$(subst _config,,$1))))
@mkdir -p $(obj)include
@if [ "$(findstring _cs0boot_, $@)" ] ; then \
echo "#define CONFIG_CS0_BOOT" >> .$(obj)include/config.h ; \
- $(XECHO) "... configured for CS0 boot"; \
elif [ "$(findstring _cs_autoboot_, $@)" ] ; then \
echo "#define CONFIG_CS_AUTOBOOT" >> $(obj)include/config.h ; \
- $(XECHO) "... configured for CS_AUTO boot"; \
else \
echo "#define CONFIG_CS3_BOOT" >> $(obj)include/config.h ; \
- $(XECHO) "... configured for CS3 boot"; \
fi;
- @$(MKCONFIG) -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn ti omap
-
-omap5912osk_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk ti omap
-
-openrd_base_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
-
-xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
+ @$(MKCONFIG) -n $@ -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn ti omap
omap730p2_config \
omap730p2_cs0boot_config \
@mkdir -p $(obj)include
@if [ "$(findstring _cs0boot_, $@)" ] ; then \
echo "#define CONFIG_CS0_BOOT" >> $(obj)include/config.h ; \
- $(XECHO) "... configured for CS0 boot"; \
else \
echo "#define CONFIG_CS3_BOOT" >> $(obj)include/config.h ; \
- $(XECHO) "... configured for CS3 boot"; \
fi;
- @$(MKCONFIG) -a $(call xtract_omap730p2,$@) arm arm926ejs omap730p2 ti omap
-
-rd6281a_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
-
-sbc2410x_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t sbc2410x NULL s3c24x0
-
-scb9328_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t scb9328 NULL imx
-
-sheevaplug_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
-
-smdk2400_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t smdk2400 samsung s3c24x0
-
-smdk2410_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 samsung s3c24x0
+ @$(MKCONFIG) -n $@ -a omap730p2 arm arm926ejs omap730p2 ti omap
spear300_config \
spear310_config \
spear320_config : unconfig
- @$(MKCONFIG) -n $@ -t $(@:_config=) spear3xx arm arm926ejs $(@:_config=) spear spear
+ @$(MKCONFIG) -n $@ -t $@ spear3xx arm arm926ejs $(@:_config=) spear spear
spear600_config : unconfig
- @$(MKCONFIG) -n $@ -t $(@:_config=) spear6xx arm arm926ejs $(@:_config=) spear spear
-
-suen3_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs km_arm keymile kirkwood
+ @$(MKCONFIG) -n $@ -t $@ spear6xx arm arm926ejs $(@:_config=) spear spear
SX1_stdout_serial_config \
SX1_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _stdout_serial_, $@)" ] ; then \
echo "#undef CONFIG_STDOUT_USBTTY" >> $(obj)include/config.h ; \
- $(XECHO) "... configured for stdout serial"; \
else \
echo "#define CONFIG_STDOUT_USBTTY" >> $(obj)include/config.h ; \
- $(XECHO) "... configured for stdout usbtty"; \
fi;
- @$(MKCONFIG) SX1 arm arm925t sx1
+ @$(MKCONFIG) -n $@ SX1 arm arm925t sx1
# TRAB default configuration: 8 MB Flash, 32 MB RAM
-xtract_trab = $(subst _bigram,,$(subst _bigflash,,$(subst _old,,$(subst _config,,$1))))
-
trab_config \
trab_bigram_config \
trab_bigflash_config \
@[ -z "$(findstring _bigram,$@)" ] || \
{ echo "#define CONFIG_FLASH_8MB" >>$(obj)include/config.h ; \
echo "#define CONFIG_RAM_32MB" >>$(obj)include/config.h ; \
- $(XECHO) "... with 8 MB Flash, 32 MB RAM" ; \
}
@[ -z "$(findstring _bigflash,$@)" ] || \
{ echo "#define CONFIG_FLASH_16MB" >>$(obj)include/config.h ; \
echo "#define CONFIG_RAM_16MB" >>$(obj)include/config.h ; \
- $(XECHO) "... with 16 MB Flash, 16 MB RAM" ; \
echo "TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
}
@[ -z "$(findstring _old,$@)" ] || \
{ echo "#define CONFIG_FLASH_8MB" >>$(obj)include/config.h ; \
echo "#define CONFIG_RAM_16MB" >>$(obj)include/config.h ; \
- $(XECHO) "... with 8 MB Flash, 16 MB RAM" ; \
echo "TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
}
- @$(MKCONFIG) -a $(call xtract_trab,$@) arm arm920t trab NULL s3c24x0
+ @$(MKCONFIG) -n $@ -a trab arm arm920t trab - s3c24x0
tx25_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs tx25 karo mx25
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+ @$(MKCONFIG) $@ arm arm926ejs tx25 karo mx25
-VCMA9_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t vcma9 mpl s3c24x0
+edb9301_config \
+edb9302_config \
+edb9302a_config \
+edb9307_config \
+edb9307a_config \
+edb9312_config \
+edb9315_config \
+edb9315a_config: unconfig
+ @$(MKCONFIG) -n $@ -t $(@:_config=) edb93xx arm arm920t edb93xx - ep93xx
#########################################################################
# ARM supplied Versatile development boards
#########################################################################
-cm4008_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695
-
-cm41xx_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t cm41xx NULL ks8695
-
versatile_config \
versatileab_config \
versatilepb_config : unconfig
@board/armltd/versatile/split_by_variant.sh $@
-voiceblue_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm925t voiceblue
-
-#########################################################################
-## S3C44B0 Systems
-#########################################################################
-
-B2_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm s3c44b0 B2 dave
-
-#########################################################################
-## ARM720T Systems
-#########################################################################
-
-armadillo_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm720t armadillo
-
-ep7312_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm720t ep7312
-
-impa7_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm720t impa7
-
-modnet50_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm720t modnet50
-
-evb4510_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm720t evb4510 NULL s3c4510b
-
-lpc2292sodimm_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm720t lpc2292sodimm NULL lpc2292
-
-SMN42_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm720t SMN42 siemens lpc2292
-
-#########################################################################
-## ARM CORTEX Systems
-#########################################################################
-
-am3517_evm_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 am3517evm logicpd omap3
-
-devkit8000_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 devkit8000 timll omap3
-
-omap3_beagle_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 beagle ti omap3
-
-omap3_overo_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 overo NULL omap3
-
-omap3_evm_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 evm ti omap3
-
-omap3_pandora_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 pandora NULL omap3
-
-omap3_sdp3430_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 sdp3430 ti omap3
-
-omap3_zoom1_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom1 logicpd omap3
-
-omap3_zoom2_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom2 logicpd omap3
-
-s5p_goni_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 goni samsung s5pc1xx
-
-smdkc100_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 smdkc100 samsung s5pc1xx
-
#########################################################################
## XScale Systems
#########################################################################
-actux1_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm ixp actux1
-
-actux2_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm ixp actux2
-
-actux3_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm ixp actux3
-
-actux4_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm ixp actux4
-
-cerf250_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm pxa cerf250
-
-cradle_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm pxa cradle
-
-csb226_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm pxa csb226
-
-delta_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm pxa delta
-
-innokom_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm pxa innokom
-
-ixdp425_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm ixp ixdp425
-
-ixdpg425_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm ixp ixdp425
-
-lubbock_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm pxa lubbock
-
-pleb2_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm pxa pleb2
-
-logodl_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm pxa logodl
-
pdnb3_config \
scpu_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring scpu_,$@)" ] ; then \
echo "#define CONFIG_SCPU" >>$(obj)include/config.h ; \
- $(XECHO) "... on SCPU board variant" ; \
fi
- @$(MKCONFIG) -a pdnb3 arm ixp pdnb3 prodrive
-
-pxa255_idp_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm pxa pxa255_idp
+ @$(MKCONFIG) -n $@ -a pdnb3 arm ixp pdnb3 prodrive
polaris_config \
trizepsiv_config : unconfig
@if [ "$(findstring polaris,$@)" ] ; then \
echo "#define CONFIG_POLARIS 1" >>$(obj)include/config.h ; \
fi;
- @$(MKCONFIG) -a trizepsiv arm pxa trizepsiv
-
-wepep250_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm pxa wepep250
-
-xaeniax_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm pxa xaeniax
-
-xm250_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm pxa xm250
-
-xsengine_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm pxa xsengine
-
-zylonite_config :
- @$(MKCONFIG) $(@:_config=) arm pxa zylonite
+ @$(MKCONFIG) -n $@ -a trizepsiv arm pxa trizepsiv
#########################################################################
## ARM1136 Systems
apollon_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_ONENAND_U_BOOT" > $(obj)include/config.h
- @$(MKCONFIG) $(@:_config=) arm arm1136 apollon NULL omap24xx
@echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk
-
-imx31_litekit_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm1136 imx31_litekit logicpd mx31
+ @$(MKCONFIG) $@ arm arm1136 apollon - omap24xx
imx31_phycore_eet_config \
imx31_phycore_config : unconfig
@if [ -n "$(findstring _eet_,$@)" ]; then \
echo "#define CONFIG_IMX31_PHYCORE_EET" >> $(obj)include/config.h; \
fi
- @$(MKCONFIG) -a imx31_phycore arm arm1136 imx31_phycore NULL mx31
-
-mx31ads_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
+ @$(MKCONFIG) -n $@ -a imx31_phycore arm arm1136 imx31_phycore - mx31
mx31pdk_config \
mx31pdk_nand_config : unconfig
echo "#define CONFIG_SKIP_LOWLEVEL_INIT" >> $(obj)include/config.h; \
echo "#define CONFIG_SKIP_RELOCATE_UBOOT" >> $(obj)include/config.h; \
fi
- @$(MKCONFIG) -a mx31pdk arm arm1136 mx31pdk freescale mx31
-
-mx51evk_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 mx51evk freescale mx51
-
-omap2420h4_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 ti omap24xx
-
-qong_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm1136 qong davedenx mx31
+ @$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
#########################################################################
## ARM1176 Systems
@mkdir -p $(obj)include $(obj)board/samsung/smdk6400
@mkdir -p $(obj)nand_spl/board/samsung/smdk6400
@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
+ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
@if [ -z "$(findstring smdk6400_noUSB_config,$@)" ]; then \
echo "RAM_TEXT = 0x57e00000" >> $(obj)board/samsung/smdk6400/config.tmp;\
- $(MKCONFIG) $(@:_config=) arm arm1176 smdk6400 samsung s3c64xx; \
else \
echo "RAM_TEXT = 0xc7e00000" >> $(obj)board/samsung/smdk6400/config.tmp;\
- $(MKCONFIG) $(@:_noUSB_config=) arm arm1176 smdk6400 samsung s3c64xx; \
fi
+ @$(MKCONFIG) smdk6400 arm arm1176 smdk6400 samsung s3c64xx
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
-tnetv107x_evm_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm1176 tnetv107xevm ti tnetv107x
-
-#========================================================================
-# i386
-#========================================================================
-#########################################################################
-## AMD SC520 CDP
-#########################################################################
-eNET_config : unconfig
- @$(MKCONFIG) $(@:_config=) i386 i386 eNET NULL sc520
-
-sc520_cdp_config : unconfig
- @$(MKCONFIG) $(@:_config=) i386 i386 sc520_cdp NULL sc520
-
-sc520_spunk_config : unconfig
- @$(MKCONFIG) $(@:_config=) i386 i386 sc520_spunk NULL sc520
-
-sc520_spunk_rel_config : unconfig
- @$(MKCONFIG) $(@:_config=) i386 i386 sc520_spunk NULL sc520
-
#========================================================================
# MIPS
#========================================================================
## MIPS32 4Kc
#########################################################################
-xtract_incaip = $(subst _100MHz,,$(subst _133MHz,,$(subst _150MHz,,$(subst _config,,$1))))
-
incaip_100MHz_config \
incaip_133MHz_config \
incaip_150MHz_config \
incaip_config: unconfig
@mkdir -p $(obj)include
@[ -z "$(findstring _100MHz,$@)" ] || \
- { echo "#define CPU_CLOCK_RATE 100000000" >>$(obj)include/config.h ; \
- $(XECHO) "... with 100MHz system clock" ; \
- }
+ echo "#define CPU_CLOCK_RATE 100000000" >>$(obj)include/config.h
@[ -z "$(findstring _133MHz,$@)" ] || \
- { echo "#define CPU_CLOCK_RATE 133000000" >>$(obj)include/config.h ; \
- $(XECHO) "... with 133MHz system clock" ; \
- }
+ echo "#define CPU_CLOCK_RATE 133000000" >>$(obj)include/config.h
@[ -z "$(findstring _150MHz,$@)" ] || \
- { echo "#define CPU_CLOCK_RATE 150000000" >>$(obj)include/config.h ; \
- $(XECHO) "... with 150MHz system clock" ; \
- }
- @$(MKCONFIG) -a $(call xtract_incaip,$@) mips mips incaip
-
-tb0229_config: unconfig
- @$(MKCONFIG) $(@:_config=) mips mips tb0229
+ echo "#define CPU_CLOCK_RATE 150000000" >>$(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a incaip mips mips incaip
vct_premium_config \
vct_premium_small_config \
vct_platinumavc_onenand_config \
vct_platinumavc_onenand_small_config: unconfig
@mkdir -p $(obj)include
- @if [ "$(findstring _premium,$@)" ] ; then \
- echo "#define CONFIG_VCT_PREMIUM" > $(obj)include/config.h ; \
- $(XECHO) "... on Premium board variant" ; \
- fi
- @if [ "$(findstring _platinum_,$@)" ] ; then \
- echo "#define CONFIG_VCT_PLATINUM" > $(obj)include/config.h ; \
- $(XECHO) "... on Platinum board variant" ; \
- fi
- @if [ "$(findstring _platinumavc,$@)" ] ; then \
- echo "#define CONFIG_VCT_PLATINUMAVC" > $(obj)include/config.h ; \
- $(XECHO) "... on PlatinumAVC board variant" ; \
- fi
- @if [ "$(findstring _onenand,$@)" ] ; then \
- echo "#define CONFIG_VCT_ONENAND" >> $(obj)include/config.h ; \
- $(XECHO) "... on OneNAND board variant" ; \
- fi
- @if [ "$(findstring _small,$@)" ] ; then \
- echo "#define CONFIG_VCT_SMALL_IMAGE" >> $(obj)include/config.h ; \
- $(XECHO) "... stripped down image variant" ; \
- fi
- @$(MKCONFIG) -a vct mips mips vct micronas
+ @[ -z "$(findstring _premium,$@)" ] || \
+ echo "#define CONFIG_VCT_PREMIUM" > $(obj)include/config.h
+ @[ -z "$(findstring _platinum_,$@)" ] || \
+ echo "#define CONFIG_VCT_PLATINUM" > $(obj)include/config.h
+ @[ -z "$(findstring _platinumavc,$@)" ] || \
+ echo "#define CONFIG_VCT_PLATINUMAVC" > $(obj)include/config.h
+ @[ -z "$(findstring _onenand,$@)" ] || \
+ echo "#define CONFIG_VCT_ONENAND" >> $(obj)include/config.h
+ @[ -z "$(findstring _small,$@)" ] || \
+ echo "#define CONFIG_VCT_SMALL_IMAGE" >> $(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a vct mips mips vct micronas
#########################################################################
## MIPS32 AU1X00
gth2_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
- @$(MKCONFIG) -a gth2 mips mips gth2
+ @$(MKCONFIG) -a $@ mips mips gth2
pb1000_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_QEMU_MIPS 1" >$(obj)include/config.h
@$(MKCONFIG) -a qemu-mips mips mips qemu-mips
-#########################################################################
-## MIPS64 5Kc
-#########################################################################
-
-purple_config : unconfig
- @$(MKCONFIG) $(@:_config=) mips mips purple
-
#========================================================================
# Nios
#========================================================================
-#########################################################################
-## Nios32
-#########################################################################
-
-ADNPESC1_DNPEVA2_base_32_config \
-ADNPESC1_base_32_config \
-ADNPESC1_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring _DNPEVA2,$@)" ] || \
- { echo "#define CONFIG_DNPEVA2 1" >>$(obj)include/config.h ; \
- $(XECHO) "... DNP/EVA2 configuration" ; \
- }
- @[ -z "$(findstring _base_32,$@)" ] || \
- { echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
- $(XECHO) "... NIOS 'base_32' configuration" ; \
- }
- @[ -z "$(findstring ADNPESC1_config,$@)" ] || \
- { echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
- $(XECHO) "... NIOS 'base_32' configuration (DEFAULT)" ; \
- }
- @$(MKCONFIG) -a ADNPESC1 nios nios adnpesc1 ssv
-
-DK1C20_safe_32_config \
-DK1C20_standard_32_config \
-DK1C20_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring _safe_32,$@)" ] || \
- { echo "#define CONFIG_NIOS_SAFE_32 1" >>$(obj)include/config.h ; \
- $(XECHO) "... NIOS 'safe_32' configuration" ; \
- }
- @[ -z "$(findstring _standard_32,$@)" ] || \
- { echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \
- $(XECHO) "... NIOS 'standard_32' configuration" ; \
- }
- @[ -z "$(findstring DK1C20_config,$@)" ] || \
- { echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \
- $(XECHO) "... NIOS 'standard_32' configuration (DEFAULT)" ; \
- }
- @$(MKCONFIG) -a DK1C20 nios nios dk1c20 altera
-
-DK1S10_safe_32_config \
-DK1S10_standard_32_config \
-DK1S10_mtx_ldk_20_config \
-DK1S10_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring _safe_32,$@)" ] || \
- { echo "#define CONFIG_NIOS_SAFE_32 1" >>$(obj)include/config.h ; \
- $(XECHO) "... NIOS 'safe_32' configuration" ; \
- }
- @[ -z "$(findstring _standard_32,$@)" ] || \
- { echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \
- $(XECHO) "... NIOS 'standard_32' configuration" ; \
- }
- @[ -z "$(findstring _mtx_ldk_20,$@)" ] || \
- { echo "#define CONFIG_NIOS_MTX_LDK_20 1" >>$(obj)include/config.h ; \
- $(XECHO) "... NIOS 'mtx_ldk_20' configuration" ; \
- }
- @[ -z "$(findstring DK1S10_config,$@)" ] || \
- { echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \
- $(XECHO) "... NIOS 'standard_32' configuration (DEFAULT)" ; \
- }
- @$(MKCONFIG) -a DK1S10 nios nios dk1s10 altera
#########################################################################
## Nios-II
#########################################################################
-EP1C20_config : unconfig
- @$(MKCONFIG) EP1C20 nios2 nios2 ep1c20 altera
-
-EP1S10_config : unconfig
- @$(MKCONFIG) EP1S10 nios2 nios2 ep1s10 altera
-
-EP1S40_config : unconfig
- @$(MKCONFIG) EP1S40 nios2 nios2 ep1s40 altera
-
-PK1C20_config : unconfig
- @$(MKCONFIG) PK1C20 nios2 nios2 pk1c20 psyent
-
-PCI5441_config : unconfig
- @$(MKCONFIG) PCI5441 nios2 nios2 pci5441 psyent
-
# nios2 generic boards
NIOS2_GENERIC = nios2-generic
$(NIOS2_GENERIC:%=%_config) : unconfig
- @$(MKCONFIG) $(@:_config=) nios2 nios2 nios2-generic altera
-
-#========================================================================
-## Microblaze
-#========================================================================
-
-microblaze-generic_config: unconfig
- @mkdir -p $(obj)include
- @$(MKCONFIG) -a $(@:_config=) microblaze microblaze microblaze-generic xilinx
+ @$(MKCONFIG) $@ nios2 nios2 nios2-generic altera
#========================================================================
# Blackfin
#========================================================================
-# Analog Devices boards
-BFIN_BOARDS = bf518f-ezbrd bf526-ezbrd bf527-ezkit bf533-ezkit bf533-stamp \
- bf537-pnav bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit
-
-# Bluetechnix tinyboards
-BFIN_BOARDS += cm-bf527 cm-bf533 cm-bf537e cm-bf537u cm-bf548 cm-bf561 \
- tcm-bf518 tcm-bf537
-
-# Misc third party boards
-BFIN_BOARDS += bf537-minotaur bf537-srv1 bf561-acvilon blackstamp ip04
-
-# I-SYST Micromodule
-BFIN_BOARDS += ibf-dsp561
-
-$(BFIN_BOARDS:%=%_config) : unconfig
- @$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=)
-
bf527-ezkit-v2_config : unconfig
@$(MKCONFIG) -t BF527_EZKIT_REV_2_1 \
bf527-ezkit blackfin blackfin bf527-ezkit
-#========================================================================
-# AVR32
-#========================================================================
-
-atngw100_config : unconfig
- @$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
-
-atstk1002_config : unconfig
- @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
-
-atstk1003_config : unconfig
- @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
-
-atstk1004_config : unconfig
- @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
-
-atstk1006_config : unconfig
- @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
-
-favr-32-ezkit_config : unconfig
- @$(MKCONFIG) $(@:_config=) avr32 at32ap favr-32-ezkit earthlcd at32ap700x
-
-hammerhead_config : unconfig
- @$(MKCONFIG) $(@:_config=) avr32 at32ap hammerhead miromico at32ap700x
-
-mimc200_config : unconfig
- @$(MKCONFIG) $(@:_config=) avr32 at32ap mimc200 mimc at32ap700x
-
#========================================================================
# SH3 (SuperH)
#========================================================================
rsk7203_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_RSK7203 1" > $(obj)include/config.h
- @$(MKCONFIG) -a $(@:_config=) sh sh2 rsk7203 renesas
+ @$(MKCONFIG) -a $@ sh sh2 rsk7203 renesas
#########################################################################
## sh3 (Renesas SuperH)
mpr2_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MPR2 1" > $(obj)include/config.h
- @$(MKCONFIG) -a $(@:_config=) sh sh3 mpr2
+ @$(MKCONFIG) -a $@ sh sh3 mpr2
ms7720se_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MS7720SE 1" > $(obj)include/config.h
- @$(MKCONFIG) -a $(@:_config=) sh sh3 ms7720se
+ @$(MKCONFIG) -a $@ sh sh3 ms7720se
#########################################################################
## sh4 (Renesas SuperH)
MigoR_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
- @$(MKCONFIG) -a $(@:_config=) sh sh4 MigoR renesas
+ @$(MKCONFIG) -a $@ sh sh4 MigoR renesas
ms7750se_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MS7750SE 1" > $(obj)include/config.h
- @$(MKCONFIG) -a $(@:_config=) sh sh4 ms7750se
+ @$(MKCONFIG) -a $@ sh sh4 ms7750se
ms7722se_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MS7722SE 1" > $(obj)include/config.h
- @$(MKCONFIG) -a $(@:_config=) sh sh4 ms7722se
+ @$(MKCONFIG) -a $@ sh sh4 ms7722se
r2dplus_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_R2DPLUS 1" > $(obj)include/config.h
- @$(MKCONFIG) -a $(@:_config=) sh sh4 r2dplus renesas
+ @$(MKCONFIG) -a $@ sh sh4 r2dplus renesas
r7780mp_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_R7780MP 1" > $(obj)include/config.h
- @$(MKCONFIG) -a $(@:_config=) sh sh4 r7780mp renesas
+ @$(MKCONFIG) -a $@ sh sh4 r7780mp renesas
sh7763rdp_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_SH7763RDP 1" > $(obj)include/config.h
- @$(MKCONFIG) -a $(@:_config=) sh sh4 sh7763rdp renesas
+ @$(MKCONFIG) -a $@ sh sh4 sh7763rdp renesas
-xtract_sh7785lcr = $(subst _32bit,,$(subst _config,,$1))
sh7785lcr_32bit_config \
sh7785lcr_config : unconfig
@mkdir -p $(obj)include
echo "#define CONFIG_SH_32BIT 1" >> $(obj)include/config.h ; \
echo "TEXT_BASE = 0x8ff80000" > \
$(obj)board/renesas/sh7785lcr/config.tmp ; \
- $(XECHO) " ... enable 32-Bit Address Extended Mode" ; \
fi
- @$(MKCONFIG) -a $(call xtract_sh7785lcr,$@) sh sh4 sh7785lcr renesas
+ @$(MKCONFIG) -n $@ -a sh7785lcr sh sh4 sh7785lcr renesas
ap325rxa_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_AP325RXA 1" > $(obj)include/config.h
- @$(MKCONFIG) -a $(@:_config=) sh sh4 ap325rxa renesas
+ @$(MKCONFIG) -a $@ sh sh4 ap325rxa renesas
espt_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_ESPT 1" > $(obj)include/config.h
- @$(MKCONFIG) -a $(@:_config=) sh sh4 espt
+ @$(MKCONFIG) -a $@ sh sh4 espt
-#========================================================================
-# SPARC
-#========================================================================
-
-#########################################################################
-## LEON3
-#########################################################################
-
-# Gaisler GR-XC3S-1500 board
-gr_xc3s_1500_config : unconfig
- @$(MKCONFIG) $(@:_config=) sparc leon3 gr_xc3s_1500 gaisler
-
-# Gaisler GR-CPCI-AX2000 board, a General purpose FPGA-AX system
-gr_cpci_ax2000_config : unconfig
- @$(MKCONFIG) $(@:_config=) sparc leon3 gr_cpci_ax2000 gaisler
-
-# Gaisler GRLIB template design (GPL SPARC/LEON3) for Altera NIOS
-# Development board Stratix II edition, FPGA Device EP2S60.
-gr_ep2s60_config: unconfig
- @$(MKCONFIG) $(@:_config=) sparc leon3 gr_ep2s60 gaisler
-
-# Gaisler LEON3 GRSIM simulator
-grsim_config : unconfig
- @$(MKCONFIG) $(@:_config=) sparc leon3 grsim gaisler
-
-#########################################################################
-## LEON2
-#########################################################################
-
-# Gaisler LEON2 GRSIM simulator
-grsim_leon2_config : unconfig
- @$(MKCONFIG) $(@:_config=) sparc leon2 grsim_leon2 gaisler
-
-#########################################################################
#########################################################################
#########################################################################
backup:
F=`basename $(TOPDIR)` ; cd .. ; \
- gtar --force-local -zcvf `date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F
+ gtar --force-local -zcvf `LC_ALL=C date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F
#########################################################################
/cpu CPU specific files
/arm720t Files specific to ARM 720 CPUs
/arm920t Files specific to ARM 920 CPUs
- /at91rm9200 Files specific to Atmel AT91RM9200 CPU
- /imx Files specific to Freescale MC9328 i.MX CPUs
- /s3c24x0 Files specific to Samsung S3C24X0 CPUs
+ /at91rm9200 Files specific to Atmel AT91RM9200 CPU
+ /imx Files specific to Freescale MC9328 i.MX CPUs
+ /s3c24x0 Files specific to Samsung S3C24X0 CPUs
/arm925t Files specific to ARM 925 CPUs
/arm926ejs Files specific to ARM 926 CPUs
/arm1136 Files specific to ARM 1136 CPUs
/mips Files generic to MIPS architecture
/cpu CPU specific files
/lib Architecture specific library files
- /nios Files generic to Altera NIOS architecture
- /cpu CPU specific files
- /lib Architecture specific library files
/nios2 Files generic to Altera NIOS2 architecture
/cpu CPU specific files
/lib Architecture specific library files
I2C muxes, you can define here, how to reach this
EEPROM. For example:
- #define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0"
+ #define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0"
EEPROM which holds the environment, is reached over
a pca9547 i2c mux with address 0x70, channel 3.
Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS,
INTEGRITY).
* Target CPU Architecture (Provisions for Alpha, ARM, AVR32, Intel x86,
- IA64, MIPS, NIOS, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
- Currently supported: ARM, AVR32, Intel x86, MIPS, NIOS, PowerPC).
+ IA64, MIPS, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
+ Currently supported: ARM, AVR32, Intel x86, MIPS, Nios II, PowerPC).
* Compression Type (uncompressed, gzip, bzip2)
* Load Address
* Entry Point
==> U-Boot will use R8 to hold a pointer to the global data
+On Nios II, the ABI is documented here:
+ http://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf
+
+ ==> U-Boot will use gp to hold a pointer to the global data
+
+ Note: on Nios II, we give "-G0" option to gcc and don't use gp
+ to access small data sections, so gp is free.
+
NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
or current versions of GCC may "optimize" the code too much.
#undef DEBUG
/* U-Boot routines needed */
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
/*****************************************************************************
*
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
#endif /* CONFIG_PRELOADER */
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
sub sp, r0, #12 /* leave 3 words for abort-stack */
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+#
+# Based on original Kirkwood support which is
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
#
include $(TOPDIR)/config.mk
-LIB = $(obj)lib$(CPU).a
+LIB = $(obj)lib$(SOC).a
+
+COBJS-y = cpu.o
+COBJS-y += dram.o
+COBJS-y += timer.o
-START = start.o
-SOBJS = traps.o
-COBJS = cpu.o interrupts.o serial.o asmi.o spi.o
+ifndef CONFIG_SKIP_LOWLEVEL_INIT
+SOBJS := lowlevel_init.o
+endif
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
-all: $(obj).depend $(START) $(LIB)
+all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
--- /dev/null
+/*
+ * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ *
+ * Based on original Kirkwood support which is
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <netdev.h>
+#include <asm/cache.h>
+#include <u-boot/md5.h>
+#include <asm/arch/orion5x.h>
+#include <hush.h>
+
+#define BUFLEN 16
+
+void reset_cpu(unsigned long ignored)
+{
+ struct orion5x_cpu_registers *cpureg =
+ (struct orion5x_cpu_registers *)ORION5X_CPU_REG_BASE;
+
+ writel(readl(&cpureg->rstoutn_mask) | (1 << 2),
+ &cpureg->rstoutn_mask);
+ writel(readl(&cpureg->sys_soft_rst) | 1,
+ &cpureg->sys_soft_rst);
+ while (1)
+ ;
+}
+
+/*
+ * Window Size
+ * Used with the Base register to set the address window size and location.
+ * Must be programmed from LSB to MSB as sequence of ones followed by
+ * sequence of zeros. The number of ones specifies the size of the window in
+ * 64 KByte granularity (e.g., a value of 0x00FF specifies 256 = 16 MByte).
+ * NOTE: A value of 0x0 specifies 64-KByte size.
+ */
+unsigned int orion5x_winctrl_calcsize(unsigned int sizeval)
+{
+ int i;
+ unsigned int j = 0;
+ u32 val = sizeval >> 1;
+
+ for (i = 0; val > 0x10000; i++) {
+ j |= (1 << i);
+ val = val >> 1;
+ }
+ return 0x0000ffff & j;
+}
+
+/*
+ * orion5x_config_adr_windows - Configure address Windows
+ *
+ * There are 8 address windows supported by Orion5x Soc to addess different
+ * devices. Each window can be configured for size, BAR and remap addr
+ * Below configuration is standard for most of the cases
+ *
+ * If remap function not used, remap_lo must be set as base
+ *
+ * Reference Documentation:
+ * Mbus-L to Mbus Bridge Registers Configuration.
+ * (Sec 25.1 and 25.3 of Datasheet)
+ */
+int orion5x_config_adr_windows(void)
+{
+ struct orion5x_win_registers *winregs =
+ (struct orion5x_win_registers *)ORION5X_CPU_WIN_BASE;
+
+ /* Window 0: PCIE MEM address space */
+ writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_PCIE_MEM,
+ ORION5X_TARGET_PCIE, ORION5X_ATTR_PCIE_MEM,
+ ORION5X_WIN_ENABLE), &winregs[0].ctrl);
+ writel(ORION5X_DEFADR_PCIE_MEM, &winregs[0].base);
+ writel(ORION5X_DEFADR_PCIE_MEM_REMAP_LO, &winregs[0].remap_lo);
+ writel(ORION5X_DEFADR_PCIE_MEM_REMAP_HI, &winregs[0].remap_hi);
+
+ /* Window 1: PCIE IO address space */
+ writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_PCIE_IO,
+ ORION5X_TARGET_PCIE, ORION5X_ATTR_PCIE_IO,
+ ORION5X_WIN_ENABLE), &winregs[1].ctrl);
+ writel(ORION5X_DEFADR_PCIE_IO, &winregs[1].base);
+ writel(ORION5X_DEFADR_PCIE_IO_REMAP_LO, &winregs[1].remap_lo);
+ writel(ORION5X_DEFADR_PCIE_IO_REMAP_HI, &winregs[1].remap_hi);
+
+ /* Window 2: PCI MEM address space */
+ writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_PCI_MEM,
+ ORION5X_TARGET_PCI, ORION5X_ATTR_PCI_MEM,
+ ORION5X_WIN_ENABLE), &winregs[2].ctrl);
+ writel(ORION5X_DEFADR_PCI_MEM, &winregs[2].base);
+
+ /* Window 3: PCI IO address space */
+ writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_PCI_IO,
+ ORION5X_TARGET_PCI, ORION5X_ATTR_PCI_IO,
+ ORION5X_WIN_ENABLE), &winregs[3].ctrl);
+ writel(ORION5X_DEFADR_PCI_IO, &winregs[3].base);
+
+ /* Window 4: DEV_CS0 address space */
+ writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_DEV_CS0,
+ ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS0,
+ ORION5X_WIN_ENABLE), &winregs[4].ctrl);
+ writel(ORION5X_DEFADR_DEV_CS0, &winregs[4].base);
+
+ /* Window 5: DEV_CS1 address space */
+ writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_DEV_CS1,
+ ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS1,
+ ORION5X_WIN_ENABLE), &winregs[5].ctrl);
+ writel(ORION5X_DEFADR_DEV_CS1, &winregs[5].base);
+
+ /* Window 6: DEV_CS2 address space */
+ writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_DEV_CS2,
+ ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS2,
+ ORION5X_WIN_ENABLE), &winregs[6].ctrl);
+ writel(ORION5X_DEFADR_DEV_CS2, &winregs[6].base);
+
+ /* Window 7: BOOT Memory address space */
+ writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_BOOTROM,
+ ORION5X_TARGET_DEVICE, ORION5X_ATTR_BOOTROM,
+ ORION5X_WIN_ENABLE), &winregs[7].ctrl);
+ writel(ORION5X_DEFADR_BOOTROM, &winregs[7].base);
+
+ return 0;
+}
+
+/*
+ * Orion5x identification is done through PCIE space.
+ */
+
+u32 orion5x_device_id(void)
+{
+ return readl(PCIE_DEV_ID_OFF) >> 16;
+}
+
+u32 orion5x_device_rev(void)
+{
+ return readl(PCIE_DEV_REV_OFF) & 0xff;
+}
+
+#if defined(CONFIG_DISPLAY_CPUINFO)
+
+/* Display device and revision IDs.
+ * This function must cover all known device/revision
+ * combinations, not only the one for which u-boot is
+ * compiled; this way, one can identify actual HW in
+ * case of a mismatch.
+ */
+int print_cpuinfo(void)
+{
+ char dev_str[] = "0x0000";
+ char rev_str[] = "0x00";
+ char *dev_name = NULL;
+ char *rev_name = NULL;
+
+ u32 dev = orion5x_device_id();
+ u32 rev = orion5x_device_rev();
+
+ if (dev == MV88F5181_DEV_ID) {
+ dev_name = "MV88F5181";
+ if (rev == MV88F5181_REV_B1)
+ rev_name = "B1";
+ else if (rev == MV88F5181L_REV_A1) {
+ dev_name = "MV88F5181L";
+ rev_name = "A1";
+ } else if (rev == MV88F5181L_REV_A0) {
+ dev_name = "MV88F5181L";
+ rev_name = "A0";
+ }
+ } else if (dev == MV88F5182_DEV_ID) {
+ dev_name = "MV88F5182";
+ if (rev == MV88F5182_REV_A2)
+ rev_name = "A2";
+ } else if (dev == MV88F5281_DEV_ID) {
+ dev_name = "MV88F5281";
+ if (rev == MV88F5281_REV_D2)
+ rev_name = "D2";
+ else if (rev == MV88F5281_REV_D1)
+ rev_name = "D1";
+ else if (rev == MV88F5281_REV_D0)
+ rev_name = "D0";
+ } else if (dev == MV88F6183_DEV_ID) {
+ dev_name = "MV88F6183";
+ if (rev == MV88F6183_REV_B0)
+ rev_name = "B0";
+ }
+ if (dev_name == NULL) {
+ sprintf(dev_str, "0x%04x", dev);
+ dev_name = dev_str;
+ }
+ if (rev_name == NULL) {
+ sprintf(rev_str, "0x%02x", rev);
+ rev_name = rev_str;
+ }
+
+ printf("SoC: Orion5x %s-%s\n", dev_name, rev_name);
+
+ return 0;
+}
+#endif /* CONFIG_DISPLAY_CPUINFO */
+
+#ifdef CONFIG_ARCH_CPU_INIT
+int arch_cpu_init(void)
+{
+ /* Enable and invalidate L2 cache in write through mode */
+ invalidate_l2_cache();
+
+ orion5x_config_adr_windows();
+
+ return 0;
+}
+#endif /* CONFIG_ARCH_CPU_INIT */
+
+/*
+ * SOC specific misc init
+ */
+#if defined(CONFIG_ARCH_MISC_INIT)
+int arch_misc_init(void)
+{
+ u32 temp;
+
+ /*CPU streaming & write allocate */
+ temp = readfr_extra_feature_reg();
+ temp &= ~(1 << 28); /* disable wr alloc */
+ writefr_extra_feature_reg(temp);
+
+ temp = readfr_extra_feature_reg();
+ temp &= ~(1 << 29); /* streaming disabled */
+ writefr_extra_feature_reg(temp);
+
+ /* L2Cache settings */
+ temp = readfr_extra_feature_reg();
+ /* Disable L2C pre fetch - Set bit 24 */
+ temp |= (1 << 24);
+ /* enable L2C - Set bit 22 */
+ temp |= (1 << 22);
+ writefr_extra_feature_reg(temp);
+
+ icache_enable();
+ /* Change reset vector to address 0x0 */
+ temp = get_cr();
+ set_cr(temp & ~CR_V);
+
+ /* Set CPIOs and MPPs - values provided by board
+ include file */
+ writel(ORION5X_MPP0_7, ORION5X_MPP_BASE+0x00);
+ writel(ORION5X_MPP8_15, ORION5X_MPP_BASE+0x04);
+ writel(ORION5X_MPP16_23, ORION5X_MPP_BASE+0x50);
+ writel(ORION5X_GPIO_OUT_ENABLE, ORION5X_GPIO_BASE+0x04);
+
+ return 0;
+}
+#endif /* CONFIG_ARCH_MISC_INIT */
--- /dev/null
+/*
+ * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ *
+ * Based on original Kirkwood support which is
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <config.h>
+#include <asm/arch/orion5x.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * orion5x_sdram_bar - reads SDRAM Base Address Register
+ */
+u32 orion5x_sdram_bar(enum memory_bank bank)
+{
+ struct orion5x_ddr_addr_decode_registers *winregs =
+ (struct orion5x_ddr_addr_decode_registers *)
+ ORION5X_CPU_WIN_BASE;
+
+ u32 result = 0;
+ u32 enable = 0x01 & winregs[bank].size;
+
+ if ((!enable) || (bank > BANK3))
+ return 0;
+
+ result = winregs[bank].base;
+ return result;
+}
+
+int dram_init(void)
+{
+ int i;
+
+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+ gd->bd->bi_dram[i].start = orion5x_sdram_bar(i);
+ gd->bd->bi_dram[i].size = get_ram_size(
+ (volatile long *) (gd->bd->bi_dram[i].start),
+ CONFIG_MAX_RAM_BANK_SIZE);
+ }
+ return 0;
+}
--- /dev/null
+/*
+ * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ *
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <config.h>
+#include "asm/arch/orion5x.h"
+
+/*
+ * Configuration values for SDRAM access setup
+ */
+
+#define SDRAM_CONFIG 0x3148400
+#define SDRAM_MODE 0x62
+#define SDRAM_CONTROL 0x4041000
+#define SDRAM_TIME_CTRL_LOW 0x11602220
+#define SDRAM_TIME_CTRL_HI 0x40c
+#define SDRAM_OPEN_PAGE_EN 0x0
+/* DDR 1 2x 32M NANYA NT5DS16M16CS-6K ==> 64MB */
+#define SDRAM_BANK0_SIZE 0x3ff0001
+#define SDRAM_ADDR_CTRL 0x10
+
+#define SDRAM_OP_NOP 0x05
+#define SDRAM_OP_SETMODE 0x03
+
+#define SDRAM_PAD_CTRL_WR_EN 0x80000000
+#define SDRAM_PAD_CTRL_TUNE_EN 0x00010000
+#define SDRAM_PAD_CTRL_DRVN_MASK 0x0000003f
+#define SDRAM_PAD_CTRL_DRVP_MASK 0x00000fc0
+
+/*
+ * For Guideline MEM-3 - Drive Strength value
+ */
+
+#define DDR1_PAD_STRENGTH_DEFAULT 0x00001000
+#define SDRAM_PAD_CTRL_DRV_STR_MASK 0x00003000
+
+/*
+ * For Guideline MEM-4 - DQS Reference Delay Tuning
+ */
+
+#define MSAR_ARMDDRCLCK_MASK 0x000000f0
+#define MSAR_ARMDDRCLCK_H_MASK 0x00000100
+
+#define MSAR_ARMDDRCLCK_333_167 0x00000000
+#define MSAR_ARMDDRCLCK_500_167 0x00000030
+#define MSAR_ARMDDRCLCK_667_167 0x00000060
+#define MSAR_ARMDDRCLCK_400_200_1 0x000001E0
+#define MSAR_ARMDDRCLCK_400_200 0x00000010
+#define MSAR_ARMDDRCLCK_600_200 0x00000050
+#define MSAR_ARMDDRCLCK_800_200 0x00000070
+
+#define FTDLL_DDR1_166MHZ 0x0047F001
+
+#define FTDLL_DDR1_200MHZ 0x0044D001
+
+/*
+ * Low-level init happens right after start.S has switched to SVC32,
+ * flushed and disabled caches and disabled MMU. We're still running
+ * from the boot chip select, so the first thing we should do is set
+ * up RAM for us to relocate into.
+ */
+
+.globl lowlevel_init
+
+lowlevel_init:
+
+ /* Use 'r4 as the base for internal register accesses */
+ ldr r4, =ORION5X_REGS_PHY_BASE
+
+ /* move internal registers from the default 0xD0000000
+ * to their intended location, defined by SoC */
+ ldr r3, =0xD0000000
+ add r3, r3, #0x20000
+ str r4, [r3, #0x80]
+
+ /* Use R3 as the base for DRAM registers */
+ add r3, r4, #0x01000
+
+ /*DDR SDRAM Initialization Control */
+ ldr r6, =0x00000001
+ str r6, [r3, #0x480]
+
+ /* Use R3 as the base for PCI registers */
+ add r3, r4, #0x31000
+
+ /* Disable arbiter */
+ ldr r6, =0x00000030
+ str r6, [r3, #0xd00]
+
+ /* Use R3 as the base for DRAM registers */
+ add r3, r4, #0x01000
+
+ /* set all dram windows to 0 */
+ mov r6, #0
+ str r6, [r3, #0x504]
+ str r6, [r3, #0x50C]
+ str r6, [r3, #0x514]
+ str r6, [r3, #0x51C]
+
+ /* 1) Configure SDRAM */
+ ldr r6, =SDRAM_CONFIG
+ str r6, [r3, #0x400]
+
+ /* 2) Set SDRAM Control reg */
+ ldr r6, =SDRAM_CONTROL
+ str r6, [r3, #0x404]
+
+ /* 3) Write SDRAM address control register */
+ ldr r6, =SDRAM_ADDR_CTRL
+ str r6, [r3, #0x410]
+
+ /* 4) Write SDRAM bank 0 size register */
+ ldr r6, =SDRAM_BANK0_SIZE
+ str r6, [r3, #0x504]
+ /* keep other banks disabled */
+
+ /* 5) Write SDRAM open pages control register */
+ ldr r6, =SDRAM_OPEN_PAGE_EN
+ str r6, [r3, #0x414]
+
+ /* 6) Write SDRAM timing Low register */
+ ldr r6, =SDRAM_TIME_CTRL_LOW
+ str r6, [r3, #0x408]
+
+ /* 7) Write SDRAM timing High register */
+ ldr r6, =SDRAM_TIME_CTRL_HI
+ str r6, [r3, #0x40C]
+
+ /* 8) Write SDRAM mode register */
+ /* The CPU must not attempt to change the SDRAM Mode register setting */
+ /* prior to DRAM controller completion of the DRAM initialization */
+ /* sequence. To guarantee this restriction, it is recommended that */
+ /* the CPU sets the SDRAM Operation register to NOP command, performs */
+ /* read polling until the register is back in Normal operation value, */
+ /* and then sets SDRAM Mode register to its new value. */
+
+ /* 8.1 write 'nop' to SDRAM operation */
+ ldr r6, =SDRAM_OP_NOP
+ str r6, [r3, #0x418]
+
+ /* 8.2 poll SDRAM operation until back in 'normal' mode. */
+1:
+ ldr r6, [r3, #0x418]
+ cmp r6, #0
+ bne 1b
+
+ /* 8.3 Now its safe to write new value to SDRAM Mode register */
+ ldr r6, =SDRAM_MODE
+ str r6, [r3, #0x41C]
+
+ /* 8.4 Set new mode */
+ ldr r6, =SDRAM_OP_SETMODE
+ str r6, [r3, #0x418]
+
+ /* 8.5 poll SDRAM operation until back in 'normal' mode. */
+2:
+ ldr r6, [r3, #0x418]
+ cmp r6, #0
+ bne 2b
+
+ /* DDR SDRAM Address/Control Pads Calibration */
+ ldr r6, [r3, #0x4C0]
+
+ /* Set Bit [31] to make the register writable */
+ orr r6, r6, #SDRAM_PAD_CTRL_WR_EN
+ str r6, [r3, #0x4C0]
+
+ bic r6, r6, #SDRAM_PAD_CTRL_WR_EN
+ bic r6, r6, #SDRAM_PAD_CTRL_TUNE_EN
+ bic r6, r6, #SDRAM_PAD_CTRL_DRVN_MASK
+ bic r6, r6, #SDRAM_PAD_CTRL_DRVP_MASK
+
+ /* Get the final N locked value of driving strength [22:17] */
+ mov r1, r6
+ mov r1, r1, LSL #9
+ mov r1, r1, LSR #26 /* r1[5:0]<DrvN> = r3[22:17]<LockN> */
+ orr r1, r1, r1, LSL #6 /* r1[11:6]<DrvP> = r1[5:0]<DrvN> */
+
+ /* Write to both <DrvN> bits [5:0] and <DrvP> bits [11:6] */
+ orr r6, r6, r1
+ str r6, [r3, #0x4C0]
+
+ /* DDR SDRAM Data Pads Calibration */
+ ldr r6, [r3, #0x4C4]
+
+ /* Set Bit [31] to make the register writable */
+ orr r6, r6, #SDRAM_PAD_CTRL_WR_EN
+ str r6, [r3, #0x4C4]
+
+ bic r6, r6, #SDRAM_PAD_CTRL_WR_EN
+ bic r6, r6, #SDRAM_PAD_CTRL_TUNE_EN
+ bic r6, r6, #SDRAM_PAD_CTRL_DRVN_MASK
+ bic r6, r6, #SDRAM_PAD_CTRL_DRVP_MASK
+
+ /* Get the final N locked value of driving strength [22:17] */
+ mov r1, r6
+ mov r1, r1, LSL #9
+ mov r1, r1, LSR #26
+ orr r1, r1, r1, LSL #6 /* r1[5:0] = r3[22:17]<LockN> */
+
+ /* Write to both <DrvN> bits [5:0] and <DrvP> bits [11:6] */
+ orr r6, r6, r1
+
+ str r6, [r3, #0x4C4]
+
+ /* Implement Guideline (GL# MEM-3) Drive Strength Value */
+ /* Relevant for: 88F5181-A1/B0/B1 and 88F5281-A0/B0 */
+
+ ldr r1, =DDR1_PAD_STRENGTH_DEFAULT
+
+ /* Enable writes to DDR SDRAM Addr/Ctrl Pads Calibration register */
+ ldr r6, [r3, #0x4C0]
+ orr r6, r6, #SDRAM_PAD_CTRL_WR_EN
+ str r6, [r3, #0x4C0]
+
+ /* Correct strength and disable writes again */
+ bic r6, r6, #SDRAM_PAD_CTRL_WR_EN
+ bic r6, r6, #SDRAM_PAD_CTRL_DRV_STR_MASK
+ orr r6, r6, r1
+ str r6, [r3, #0x4C0]
+
+ /* Enable writes to DDR SDRAM Data Pads Calibration register */
+ ldr r6, [r3, #0x4C4]
+ orr r6, r6, #SDRAM_PAD_CTRL_WR_EN
+ str r6, [r3, #0x4C4]
+
+ /* Correct strength and disable writes again */
+ bic r6, r6, #SDRAM_PAD_CTRL_DRV_STR_MASK
+ bic r6, r6, #SDRAM_PAD_CTRL_WR_EN
+ orr r6, r6, r1
+ str r6, [r3, #0x4C4]
+
+ /* Implement Guideline (GL# MEM-4) DQS Reference Delay Tuning */
+ /* Relevant for: 88F5181-A1/B0/B1 and 88F5281-A0/B0 */
+
+ /* Get the "sample on reset" register for the DDR frequancy */
+ ldr r3, =0x10000
+ ldr r6, [r3, #0x010]
+ ldr r1, =MSAR_ARMDDRCLCK_MASK
+ and r1, r6, r1
+
+ ldr r6, =FTDLL_DDR1_166MHZ
+ cmp r1, #MSAR_ARMDDRCLCK_333_167
+ beq 3f
+ cmp r1, #MSAR_ARMDDRCLCK_500_167
+ beq 3f
+ cmp r1, #MSAR_ARMDDRCLCK_667_167
+ beq 3f
+
+ ldr r6, =FTDLL_DDR1_200MHZ
+ cmp r1, #MSAR_ARMDDRCLCK_400_200_1
+ beq 3f
+ cmp r1, #MSAR_ARMDDRCLCK_400_200
+ beq 3f
+ cmp r1, #MSAR_ARMDDRCLCK_600_200
+ beq 3f
+ cmp r1, #MSAR_ARMDDRCLCK_800_200
+ beq 3f
+
+ ldr r6, =0
+
+3:
+ /* Use R3 as the base for DRAM registers */
+ add r3, r4, #0x01000
+
+ ldr r2, [r3, #0x484]
+ orr r2, r2, r6
+ str r2, [r3, #0x484]
+
+ /* Return to U-boot via saved link register */
+ mov pc, lr
--- /dev/null
+/*
+ * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ *
+ * Based on original Kirkwood support which is
+ * Copyright (C) Marvell International Ltd. and its affiliates
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <asm/arch/orion5x.h>
+
+#define UBOOT_CNTR 0 /* counter to use for uboot timer */
+
+/* Timer reload and current value registers */
+struct orion5x_tmr_val {
+ u32 reload; /* Timer reload reg */
+ u32 val; /* Timer value reg */
+};
+
+/* Timer registers */
+struct orion5x_tmr_registers {
+ u32 ctrl; /* Timer control reg */
+ u32 pad[3];
+ struct orion5x_tmr_val tmr[2];
+ u32 wdt_reload;
+ u32 wdt_val;
+};
+
+struct orion5x_tmr_registers *orion5x_tmr_regs =
+ (struct orion5x_tmr_registers *)ORION5X_TIMER_BASE;
+
+/*
+ * ARM Timers Registers Map
+ */
+#define CNTMR_CTRL_REG (&orion5x_tmr_regs->ctrl)
+#define CNTMR_RELOAD_REG(tmrnum) (&orion5x_tmr_regs->tmr[tmrnum].reload)
+#define CNTMR_VAL_REG(tmrnum) (&orion5x_tmr_regs->tmr[tmrnum].val)
+
+/*
+ * ARM Timers Control Register
+ * CPU_TIMERS_CTRL_REG (CTCR)
+ */
+#define CTCR_ARM_TIMER_EN_OFFS(cntr) (cntr * 2)
+#define CTCR_ARM_TIMER_EN_MASK(cntr) (1 << CTCR_ARM_TIMER_EN_OFFS)
+#define CTCR_ARM_TIMER_EN(cntr) (1 << CTCR_ARM_TIMER_EN_OFFS(cntr))
+#define CTCR_ARM_TIMER_DIS(cntr) (0 << CTCR_ARM_TIMER_EN_OFFS(cntr))
+
+#define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1)
+#define CTCR_ARM_TIMER_AUTO_MASK(cntr) (1 << 1)
+#define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
+#define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr))
+
+/*
+ * ARM Timer\Watchdog Reload Register
+ * CNTMR_RELOAD_REG (TRR)
+ */
+#define TRG_ARM_TIMER_REL_OFFS 0
+#define TRG_ARM_TIMER_REL_MASK 0xffffffff
+
+/*
+ * ARM Timer\Watchdog Register
+ * CNTMR_VAL_REG (TVRG)
+ */
+#define TVR_ARM_TIMER_OFFS 0
+#define TVR_ARM_TIMER_MASK 0xffffffff
+#define TVR_ARM_TIMER_MAX 0xffffffff
+#define TIMER_LOAD_VAL 0xffffffff
+
+static inline ulong read_timer(void)
+{
+ return readl(CNTMR_VAL_REG(UBOOT_CNTR))
+ / (CONFIG_SYS_TCLK / 1000);
+}
+
+static ulong timestamp;
+static ulong lastdec;
+
+void reset_timer_masked(void)
+{
+ /* reset time */
+ lastdec = read_timer();
+ timestamp = 0;
+}
+
+ulong get_timer_masked(void)
+{
+ ulong now = read_timer();
+
+ if (lastdec >= now) {
+ /* normal mode */
+ timestamp += lastdec - now;
+ } else {
+ /* we have an overflow ... */
+ timestamp += lastdec +
+ (TIMER_LOAD_VAL / (CONFIG_SYS_TCLK / 1000)) - now;
+ }
+ lastdec = now;
+
+ return timestamp;
+}
+
+void reset_timer(void)
+{
+ reset_timer_masked();
+}
+
+ulong get_timer(ulong base)
+{
+ return get_timer_masked() - base;
+}
+
+void set_timer(ulong t)
+{
+ timestamp = t;
+}
+
+static inline ulong uboot_cntr_val(void)
+{
+ return readl(CNTMR_VAL_REG(UBOOT_CNTR));
+}
+
+void __udelay(unsigned long usec)
+{
+ uint current;
+ ulong delayticks;
+
+ current = uboot_cntr_val();
+ delayticks = (usec * (CONFIG_SYS_TCLK / 1000000));
+
+ if (current < delayticks) {
+ delayticks -= current;
+ while (uboot_cntr_val() < current)
+ ;
+ while ((TIMER_LOAD_VAL - delayticks) < uboot_cntr_val())
+ ;
+ } else {
+ while (uboot_cntr_val() > (current - delayticks))
+ ;
+ }
+}
+
+/*
+ * init the counter
+ */
+int timer_init(void)
+{
+ unsigned int cntmrctrl;
+
+ /* load value into timer */
+ writel(TIMER_LOAD_VAL, CNTMR_RELOAD_REG(UBOOT_CNTR));
+ writel(TIMER_LOAD_VAL, CNTMR_VAL_REG(UBOOT_CNTR));
+
+ /* enable timer in auto reload mode */
+ cntmrctrl = readl(CNTMR_CTRL_REG);
+ cntmrctrl |= CTCR_ARM_TIMER_EN(UBOOT_CNTR);
+ cntmrctrl |= CTCR_ARM_TIMER_AUTO_EN(UBOOT_CNTR);
+ writel(cntmrctrl, CNTMR_CTRL_REG);
+
+ /* init the timestamp and lastdec value */
+ reset_timer_masked();
+
+ return 0;
+}
#endif
#endif /* CONFIG_PRELOADER */
sub sp, r0, #12 /* leave 3 words for abort-stack */
- bic sp, r0, #7 /* 8-byte align stack for ABI compliance */
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
/*
* Dump some core clockes.
*/
-int do_mx51_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mx51_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u32 freq;
/******************************************************************************
* OMAP3 specific command to switch between NAND HW and SW ecc
*****************************************************************************/
-static int do_switch_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_switch_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
if (argc != 2)
goto usage;
l2_cache_enable:
- push {r0, r1, r2, lr}
+ stmfd r13!, {r0, r1, r2, lr}
@ ES2 onwards we can disable/enable L2 ourselves
bl get_cpu_rev
cmp r0, #CPU_3XX_ES20
mov ip, r3
str r3, [sp, #4]
l2_cache_enable_END:
- pop {r1, r2, r3, pc}
+ ldmfd r13!, {r1, r2, r3, pc}
l2_cache_disable:
- push {r0, r1, r2, lr}
+ stmfd r13!, {r0, r1, r2, lr}
@ ES2 onwards we can disable/enable L2 ourselves
bl get_cpu_rev
cmp r0, #CPU_3XX_ES20
mov ip, r3
str r3, [sp, #4]
l2_cache_disable_END:
- pop {r1, r2, r3, pc}
+ ldmfd r13!, {r1, r2, r3, pc}
sub r0, r0, #(CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 @ leave 3 words for abort-stack
- and sp, sp, #~7 @ 8 byte alinged for (ldr/str)d
+ bic sp, sp, #7 @ 8-byte alignment for ABI compliance
/* Clear BSS (if any). Is below tx (watch load addr - need space) */
clear_bss:
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif /* CONFIG_USE_IRQ */
sub sp, r0, #12 /* leave 3 words for abort-stack */
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr pc, _start_armboot
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
u32 pcer; /* 0x10 Peripheral Clock Enable Register */
u32 pcdr; /* 0x14 Peripheral Clock Disable Register */
u32 pcsr; /* 0x18 Peripheral Clock Status Register */
- u32 reserved1;
+ u32 uckr; /* 0x1C UTMI Clock Register */
u32 mor; /* 0x20 Main Oscilator Register */
u32 mcfr; /* 0x24 Main Clock Frequency Register */
u32 pllar; /* 0x28 PLL A Register */
u32 pllbr; /* 0x2C PLL B Register */
u32 mckr; /* 0x30 Master Clock Register */
- u32 reserved2[3];
+ u32 reserved1;
+ u32 usb; /* 0x38 USB Clock Register */
+ u32 reserved2;
u32 pck[4]; /* 0x40 Programmable Clock Register 0 - 3 */
u32 reserved3[4];
u32 ier; /* 0x60 Interrupt Enable Register */
#define AT91_PMC_PDIV_1 (0 << 12)
#define AT91_PMC_PDIV_2 (1 << 12)
+#ifdef CONFIG_AT91_LEGACY
+#define AT91_PMC_USB (AT91_PMC + 0x38) /* USB Clock Register */
+#endif
+#define AT91_PMC_USBS_USB_PLLA (0x0) /* USB Clock Input is PLLA */
+#define AT91_PMC_USBS_USB_UPLL (0x1) /* USB Clock Input is UPLL */
+#define AT91_PMC_USBDIV_8 (0x7 << 8) /* USB Clock divided by 8 */
+#define AT91_PMC_USBDIV_10 (0x9 << 8) /* USB Clock divided by 10 */
+
#ifdef CONFIG_AT91_LEGACY
#define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-3 Registers */
#endif
/* PHY mask - set only those phy number bits where phy is/can be connected */
-#define EMAC_MDIO_PHY_NUM 1
+#define EMAC_MDIO_PHY_NUM CONFIG_EMAC_MDIO_PHY_NUM
#define EMAC_MDIO_PHY_MASK (1 << EMAC_MDIO_PHY_NUM)
/* Ethernet Min/Max packet size */
#define DAVINCI_SYSCFG_SUSPSRC_EMAC (1 << 5)
#define DAVINCI_SYSCFG_SUSPSRC_I2C (1 << 16)
#define DAVINCI_SYSCFG_SUSPSRC_SPI0 (1 << 21)
+#define DAVINCI_SYSCFG_SUSPSRC_SPI1 (1 << 22)
#define DAVINCI_SYSCFG_SUSPSRC_UART2 (1 << 20)
#define DAVINCI_SYSCFG_SUSPSRC_TIMER0 (1 << 27)
--- /dev/null
+/*
+ * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ *
+ * Based on original Kirorion5x_ood support which is
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _ORION5X_CPU_H
+#define _ORION5X_CPU_H
+
+#include <asm/system.h>
+
+#ifndef __ASSEMBLY__
+
+#define ORION5X_CPU_WIN_CTRL_DATA(size, target, attr, en) (en | (target << 4) \
+ | (attr << 8) | (orion5x_winctrl_calcsize(size) << 16))
+
+#define ORION5XGBE_PORT_SERIAL_CONTROL1_REG(_x) \
+ ((_x ? ORION5X_EGIGA0_BASE : ORION5X_EGIGA1_BASE) + 0x44c)
+
+enum memory_bank {
+ BANK0,
+ BANK1,
+ BANK2,
+ BANK3
+};
+
+enum orion5x_cpu_winen {
+ ORION5X_WIN_DISABLE,
+ ORION5X_WIN_ENABLE
+};
+
+enum orion5x_cpu_target {
+ ORION5X_TARGET_DRAM = 0,
+ ORION5X_TARGET_DEVICE = 1,
+ ORION5X_TARGET_PCI = 3,
+ ORION5X_TARGET_PCIE = 4,
+ ORION5X_TARGET_SASRAM = 9
+};
+
+enum orion5x_cpu_attrib {
+ ORION5X_ATTR_DRAM_CS0 = 0x0e,
+ ORION5X_ATTR_DRAM_CS1 = 0x0d,
+ ORION5X_ATTR_DRAM_CS2 = 0x0b,
+ ORION5X_ATTR_DRAM_CS3 = 0x07,
+ ORION5X_ATTR_PCI_MEM = 0x59,
+ ORION5X_ATTR_PCI_IO = 0x51,
+ ORION5X_ATTR_PCIE_MEM = 0x59,
+ ORION5X_ATTR_PCIE_IO = 0x51,
+ ORION5X_ATTR_SASRAM = 0x00,
+ ORION5X_ATTR_DEV_CS0 = 0x1e,
+ ORION5X_ATTR_DEV_CS1 = 0x1d,
+ ORION5X_ATTR_DEV_CS2 = 0x1b,
+ ORION5X_ATTR_BOOTROM = 0x0f
+};
+
+/*
+ * Default Device Address MAP BAR values
+ */
+#define ORION5X_DEFADR_PCIE_MEM 0x90000000
+#define ORION5X_DEFADR_PCIE_MEM_REMAP_LO 0x90000000
+#define ORION5X_DEFADR_PCIE_MEM_REMAP_HI 0
+#define ORION5X_DEFSZ_PCIE_MEM (128*1024*1024)
+
+#define ORION5X_DEFADR_PCIE_IO 0xf0000000
+#define ORION5X_DEFADR_PCIE_IO_REMAP_LO 0x90000000
+#define ORION5X_DEFADR_PCIE_IO_REMAP_HI 0
+#define ORION5X_DEFSZ_PCIE_IO (64*1024)
+
+#define ORION5X_DEFADR_PCI_MEM 0x98000000
+#define ORION5X_DEFSZ_PCI_MEM (128*1024*1024)
+
+#define ORION5X_DEFADR_PCI_IO 0xf0100000
+#define ORION5X_DEFSZ_PCI_IO (64*1024)
+
+#define ORION5X_DEFADR_DEV_CS0 0xfa000000
+#define ORION5X_DEFSZ_DEV_CS0 (2*1024*1024)
+
+#define ORION5X_DEFADR_DEV_CS1 0xf8000000
+#define ORION5X_DEFSZ_DEV_CS1 (32*1024*1024)
+
+#define ORION5X_DEFADR_DEV_CS2 0xfa800000
+#define ORION5X_DEFSZ_DEV_CS2 (1*1024*1024)
+
+#define ORION5X_DEFADR_BOOTROM 0xFFF80000
+#define ORION5X_DEFSZ_BOOTROM (512*1024)
+
+/*
+ * PCIE registers are used for SoC device ID and revision
+ */
+#define PCIE_DEV_ID_OFF (ORION5X_REG_PCIE_BASE + 0x0000)
+#define PCIE_DEV_REV_OFF (ORION5X_REG_PCIE_BASE + 0x0008)
+
+/*
+ * The following definitions are intended for identifying
+ * the real device and revision on which u-boot is running
+ * even if it was compiled only for a specific one. Thus,
+ * these constants must not be considered chip-specific.
+ */
+
+/* Orion-1 (88F5181) and Orion-VoIP (88F5181L) */
+#define MV88F5181_DEV_ID 0x5181
+#define MV88F5181_REV_B1 3
+#define MV88F5181L_REV_A0 8
+#define MV88F5181L_REV_A1 9
+/* Orion-NAS (88F5182) */
+#define MV88F5182_DEV_ID 0x5182
+#define MV88F5182_REV_A2 2
+/* Orion-2 (88F5281) */
+#define MV88F5281_DEV_ID 0x5281
+#define MV88F5281_REV_D0 4
+#define MV88F5281_REV_D1 5
+#define MV88F5281_REV_D2 6
+/* Orion-1-90 (88F6183) */
+#define MV88F6183_DEV_ID 0x6183
+#define MV88F6183_REV_B0 3
+
+/*
+ * read feroceon core extra feature register
+ * using co-proc instruction
+ */
+static inline unsigned int readfr_extra_feature_reg(void)
+{
+ unsigned int val;
+ asm volatile ("mrc p15, 1, %0, c15, c1, 0 @ readfr exfr" : "=r"
+ (val) : : "cc");
+ return val;
+}
+
+/*
+ * write feroceon core extra feature register
+ * using co-proc instruction
+ */
+static inline void writefr_extra_feature_reg(unsigned int val)
+{
+ asm volatile ("mcr p15, 1, %0, c15, c1, 0 @ writefr exfr" : : "r"
+ (val) : "cc");
+ isb();
+}
+
+/*
+ * AHB to Mbus Bridge Registers
+ * Source: 88F5182 User Manual, Appendix A, section A.4
+ * Note: only windows 0 and 1 have remap capability.
+ */
+struct orion5x_win_registers {
+ u32 ctrl;
+ u32 base;
+ u32 remap_lo;
+ u32 remap_hi;
+};
+
+/*
+ * CPU control and status Registers
+ * Source: 88F5182 User Manual, Appendix A, section A.4
+ */
+struct orion5x_cpu_registers {
+ u32 config; /*0x20100 */
+ u32 ctrl_stat; /*0x20104 */
+ u32 rstoutn_mask; /* 0x20108 */
+ u32 sys_soft_rst; /* 0x2010C */
+ u32 ahb_mbus_cause_irq; /* 0x20110 */
+ u32 ahb_mbus_mask_irq; /* 0x20114 */
+};
+
+/*
+ * DDR SDRAM Controller Address Decode Registers
+ * Source: 88F5182 User Manual, Appendix A, section A.5.1
+ */
+struct orion5x_ddr_addr_decode_registers {
+ u32 base;
+ u32 size;
+};
+
+/*
+ * functions
+ */
+void reset_cpu(unsigned long ignored);
+u32 orion5x_device_id(void);
+u32 orion5x_device_rev(void);
+unsigned int orion5x_winctrl_calcsize(unsigned int sizeval);
+#endif /* __ASSEMBLY__ */
+#endif /* _ORION5X_CPU_H */
--- /dev/null
+/*
+ * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ *
+ * Based on original Kirkwood 88F6182 support which is
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ *
+ * Header file for Feroceon CPU core 88F5182 SOC.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _CONFIG_88F5182_H
+#define _CONFIG_88F5182_H
+
+/* SOC specific definitions */
+#define F88F5182_REGS_PHYS_BASE 0xf1000000
+#define ORION5X_REGS_PHY_BASE F88F5182_REGS_PHYS_BASE
+
+/* TCLK Core Clock defination */
+#define CONFIG_SYS_TCLK 166000000 /* 166MHz */
+
+#endif /* _CONFIG_88F5182_H */
--- /dev/null
+/*
+ * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ *
+ * Based on original Kirkwood support which is
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ *
+ * Header file for Marvell's Orion SoC with Feroceon CPU core.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _ASM_ARCH_ORION5X_H
+#define _ASM_ARCH_ORION5X_H
+
+#ifndef __ASSEMBLY__
+#include <asm/types.h>
+#include <asm/io.h>
+#endif /* __ASSEMBLY__ */
+
+#if defined(CONFIG_FEROCEON)
+#include <asm/arch/cpu.h>
+
+/* SOC specific definations */
+#define ORION5X_REGISTER(x) (ORION5X_REGS_PHY_BASE + x)
+
+/* Documented registers */
+#define ORION5X_TWSI_BASE (ORION5X_REGISTER(0x11000))
+#define ORION5X_UART0_BASE (ORION5X_REGISTER(0x12000))
+#define ORION5X_UART1_BASE (ORION5X_REGISTER(0x12100))
+#define ORION5X_MPP_BASE (ORION5X_REGISTER(0x10000))
+#define ORION5X_GPIO_BASE (ORION5X_REGISTER(0x10100))
+#define ORION5X_CPU_WIN_BASE (ORION5X_REGISTER(0x20000))
+#define ORION5X_CPU_REG_BASE (ORION5X_REGISTER(0x20100))
+#define ORION5X_TIMER_BASE (ORION5X_REGISTER(0x20300))
+#define ORION5X_REG_PCI_BASE (ORION5X_REGISTER(0x30000))
+#define ORION5X_REG_PCIE_BASE (ORION5X_REGISTER(0x40000))
+#define ORION5X_USB20_PORT0_BASE (ORION5X_REGISTER(0x50000))
+#define ORION5X_USB20_PORT1_BASE (ORION5X_REGISTER(0xA0000))
+#define ORION5X_EGIGA_BASE (ORION5X_REGISTER(0x72000))
+
+#define CONFIG_MAX_RAM_BANK_SIZE (64*1024*1024)
+
+/* include here SoC variants. 5181, 5281, 6183 should go here when
+ adding support for them, and this comment should then be updated. */
+#if defined(CONFIG_88F5182)
+#include <asm/arch/mv88f5182.h>
+#else
+#error "SOC Name not defined"
+#endif
+#endif /* CONFIG_FEROCEON */
+#endif /* _ASM_ARCH_ORION5X_H */
#define UHCHIE __REG(0x4C000068)
#define UHCHIT __REG(0x4C00006C)
-#if defined(CONFIG_CPU_MONAHANS)
-#define UP2OCR __REG(0x40600020)
-#endif
-
#define UHCHR_FSBIR (1<<0)
#define UHCHR_FHR (1<<1)
#define UHCHR_CGR (1<<2)
#define UHCHIE_HBAIE (1<<8)
#define UHCHIE_RWIE (1<<7)
+#if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
+#define UP2OCR __REG(0x40600020)
+#endif
+
+#define UP2OCR_HXOE (1<<17)
+#define UP2OCR_HXS (1<<16)
+#define UP2OCR_IDON (1<<10)
+#define UP2OCR_EXSUS (1<<9)
+#define UP2OCR_EXSP (1<<8)
+#define UP2OCR_DMSTATE (1<<7)
+#define UP2OCR_VPM (1<<6)
+#define UP2OCR_DPSTATE (1<<5)
+#define UP2OCR_DPPUE (1<<4)
+#define UP2OCR_DMPDE (1<<3)
+#define UP2OCR_DPPDE (1<<2)
+#define UP2OCR_CPVPE (1<<1)
+#define UP2OCR_CPVEN (1<<0)
+
#endif
/*
#define MDMRS __REG(0x48000040) /* MRS value to be written to SDRAM */
#define BOOT_DEF __REG(0x48000044) /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL */
+#define MDREFR_ALTREFA (1 << 31) /* Exiting Alternate Bus Master Mode Refresh Control */
+#define MDREFR_ALTREFB (1 << 30) /* Entering Alternate Bus Master Mode Refresh Control */
+#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */
#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */
#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */
* iomem_to_phys(off)
*/
#ifdef iomem_valid_addr
-#define __arch_ioremap(off,sz,nocache) \
- ({ \
- unsigned long _off = (off), _size = (sz); \
- void *_ret = (void *)0; \
- if (iomem_valid_addr(_off, _size)) \
- _ret = __ioremap(iomem_to_phys(_off),_size,0); \
- _ret; \
+#define __arch_ioremap(off,sz,nocache) \
+ ({ \
+ unsigned long _off = (off), _size = (sz); \
+ void *_ret = (void *)0; \
+ if (iomem_valid_addr(_off, _size)) \
+ _ret = __ioremap(iomem_to_phys(_off),_size,nocache); \
+ _ret; \
})
#define __arch_iounmap __iounmap
defined (CONFIG_CMDLINE_TAG) || \
defined (CONFIG_INITRD_TAG) || \
defined (CONFIG_SERIAL_TAG) || \
- defined (CONFIG_REVISION_TAG) || \
- defined (CONFIG_VFD) || \
- defined (CONFIG_LCD)
+ defined (CONFIG_REVISION_TAG)
static void setup_start_tag (bd_t *bd);
# ifdef CONFIG_SETUP_MEMORY_TAGS
# endif
static void setup_end_tag (bd_t *bd);
-# if defined (CONFIG_VFD) || defined (CONFIG_LCD)
-static void setup_videolfb_tag (gd_t *gd);
-# endif
-
static struct tag *params;
#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
{
bd_t *bd = gd->bd;
char *s;
defined (CONFIG_CMDLINE_TAG) || \
defined (CONFIG_INITRD_TAG) || \
defined (CONFIG_SERIAL_TAG) || \
- defined (CONFIG_REVISION_TAG) || \
- defined (CONFIG_LCD) || \
- defined (CONFIG_VFD)
+ defined (CONFIG_REVISION_TAG)
setup_start_tag (bd);
#ifdef CONFIG_SERIAL_TAG
setup_serial_tag (¶ms);
#ifdef CONFIG_INITRD_TAG
if (images->rd_start && images->rd_end)
setup_initrd_tag (bd, images->rd_start, images->rd_end);
-#endif
-#if defined (CONFIG_VFD) || defined (CONFIG_LCD)
- setup_videolfb_tag ((gd_t *) gd);
#endif
setup_end_tag (bd);
#endif
defined (CONFIG_CMDLINE_TAG) || \
defined (CONFIG_INITRD_TAG) || \
defined (CONFIG_SERIAL_TAG) || \
- defined (CONFIG_REVISION_TAG) || \
- defined (CONFIG_LCD) || \
- defined (CONFIG_VFD)
+ defined (CONFIG_REVISION_TAG)
static void setup_start_tag (bd_t *bd)
{
params = (struct tag *) bd->bi_boot_params;
}
#endif /* CONFIG_INITRD_TAG */
-
-#if defined (CONFIG_VFD) || defined (CONFIG_LCD)
-extern ulong calc_fbsize (void);
-static void setup_videolfb_tag (gd_t *gd)
-{
- /* An ATAG_VIDEOLFB node tells the kernel where and how large
- * the framebuffer for video was allocated (among other things).
- * Note that a _physical_ address is passed !
- *
- * We only use it to pass the address and size, the other entries
- * in the tag_videolfb are not of interest.
- */
- params->hdr.tag = ATAG_VIDEOLFB;
- params->hdr.size = tag_size (tag_videolfb);
-
- params->u.videolfb.lfb_base = (u32) gd->fb_base;
- /* Fb size is calculated according to parameters for our panel
- */
- params->u.videolfb.lfb_size = calc_fbsize();
-
- params = tag_next (params);
-}
-#endif /* CONFIG_VFD || CONFIG_LCD */
-
#ifdef CONFIG_SERIAL_TAG
void setup_serial_tag (struct tag **tmp)
{
#include <common.h>
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
puts ("resetting ...\n");
"sync 0" : : "r"(0) : "memory");
}
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
/* This will reset the CPU core, caches, MMU and all internal busses */
__builtin_mtdr(8, 1 << 13); /* set DC:DBE */
#define SYSREG_MMUCR_S_OFFSET 4
#define SR_INIT (SYSREG_BIT(GM) | SYSREG_BIT(EM) | SYSREG_BIT(M0))
-#define CPUCR_INIT (SYSREG_BIT(BI) | SYSREG_BIT(BE) \
- | SYSREG_BIT(FE) | SYSREG_BIT(RE) \
- | SYSREG_BIT(IBE) | SYSREG_BIT(IEE))
+/* due to errata (unreliable branch folding) clear FE bit explicitly */
+#define CPUCR_INIT ((SYSREG_BIT(BI) | SYSREG_BIT(BE) \
+ | SYSREG_BIT(RE) | SYSREG_BIT(IBE) \
+ | SYSREG_BIT(IEE)) & ~SYSREG_BIT(FE))
/*
* To save some space, we use the same entry point for
--- /dev/null
+#include <asm-generic/unaligned.h>
static int display_banner (void)
{
printf ("\n\n%s\n\n", version_string);
- printf ("U-Boot code: %p -> %p data: %p -> %p\n",
- _text, _etext, _data, _end);
+ printf ("U-Boot code: %08lx -> %08lx data: %08lx -> %08lx\n",
+ (unsigned long)_text, (unsigned long)_etext,
+ (unsigned long)_data, (unsigned long)_end);
return 0;
}
params->hdr.size = 0;
}
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
{
void (*theKernel)(int magic, void *tagtable);
struct tag *params, *params_start;
#define _DEFINE(sym, val) asm volatile("\n->" #sym " %0 " #val : : "i" (val))
#define DEFINE(s, m) _DEFINE(offset_##s##_##m, offsetof(s, m))
-int main(int argc, char *argv[])
+int main(int argc, char * const argv[])
#endif
}
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
bfin_reset_trampoline();
return 0;
extern ulong bfin_poweron_retx;
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
{
int (*appl) (char *cmdline);
char *cmdline;
return 1;
}
-int do_icache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_icache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int cache_status = icache_status();
"icache_dump - dump current instruction cache\n",
"[way] [subbank] [set]");
-int do_dcache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_dcache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u32 way, bank, subbank, set;
u32 status, addr;
}
-void kgdb_breakpoint(int argc, char *argv[])
+void kgdb_breakpoint(int argc, char * const argv[])
{
asm volatile ("excpt 0x1\n");
}
return 0;
}
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
printf ("resetting ...\n");
udelay(50000); /* wait 50 ms */
for (;;);
}
-unsigned long do_go_exec (ulong (*entry)(int, char *[]), int argc, char *argv[])
+unsigned long do_go_exec (ulong (*entry)(int, char *[]), int argc, char * const argv[])
{
/*
* x86 does not use a dedicated register to pass the pointer
#include <asm/zimage.h>
/*cmd_boot.c*/
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
{
void *base_ptr;
ulong os_data, os_len;
}
#if defined(CONFIG_CMD_IRQ)
-int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int irq;
enter_realmode(((u32)setup_base+SETUP_START_OFFSET)>>4, 0, ®s, ®s);
}
-int do_zboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_zboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
void *base_ptr;
void *bzImage_addr;
DECLARE_GLOBAL_DATA_PTR;
-int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM);
udelay(1000);
DECLARE_GLOBAL_DATA_PTR;
-int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
volatile ccm_t *ccm = (ccm_t *) MMAP_CCM;
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_M5208
-int do_reset(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[])
{
volatile rcm_t *rcm = (rcm_t *)(MMAP_RCM);
return 0;
}
-int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
/* Call the board specific reset actions first. */
if(board_reset) {
#endif
#ifdef CONFIG_M5272
-int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
#endif /* #ifdef CONFIG_M5272 */
#ifdef CONFIG_M5275
-int do_reset(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[])
{
volatile rcm_t *rcm = (rcm_t *)(MMAP_RCM);
return 0;
}
-int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
MCFRESET_RCR = MCFRESET_RCR_SOFTRST;
return 0;
return 0;
}
-int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
/* enable watchdog, set timeout to 0 and wait */
mbar_writeByte(MCFSIM_SYPCR, 0xc0);
return 0;
}
-int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
/* enable watchdog, set timeout to 0 and wait */
mbar_writeByte(SIM_SYPCR, 0xc0);
DECLARE_GLOBAL_DATA_PTR;
-int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM);
DECLARE_GLOBAL_DATA_PTR;
-int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM);
udelay(1000);
struct fec_info_s *info = (struct fec_info_s *)dev->priv;
if (setclear) {
+#ifdef CONFIG_SYS_FEC_NO_SHARED_PHY
+ if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
+ gpio->par_feci2c |=
+ (GPIO_PAR_FECI2C_MDC0_MDC0 |
+ GPIO_PAR_FECI2C_MDIO0_MDIO0);
+ else
+ gpio->par_feci2c |=
+ (GPIO_PAR_FECI2C_MDC1_MDC1 |
+ GPIO_PAR_FECI2C_MDIO1_MDIO1);
+#else
gpio->par_feci2c |=
(GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0);
+#endif
if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
gpio->par_fec |= GPIO_PAR_FEC_FEC0_RMII_GPIO;
gpio->par_feci2c &=
~(GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0);
- if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
+ if (info->iobase == CONFIG_SYS_FEC0_IOBASE) {
+#ifdef CONFIG_SYS_FEC_FULL_MII
+ gpio->par_fec |= GPIO_PAR_FEC_FEC0_MII;
+#else
gpio->par_fec &= GPIO_PAR_FEC_FEC0_UNMASK;
- else
+#endif
+ } else {
+#ifdef CONFIG_SYS_FEC_FULL_MII
+ gpio->par_fec |= GPIO_PAR_FEC_FEC1_MII;
+#else
gpio->par_fec &= GPIO_PAR_FEC_FEC1_UNMASK;
+#endif
+ }
}
return 0;
}
gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS2_PCS2;
gpio->par_dspi |= GPIO_PAR_DSPI_PCS2_PCS2;
break;
+ case 3:
+ gpio->par_dma &= GPIO_PAR_DMA_DACK0_UNMASK;
+ gpio->par_dma |= GPIO_PAR_DMA_DACK0_PCS3;
+ break;
case 5:
gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS5_PCS5;
gpio->par_dspi |= GPIO_PAR_DSPI_PCS5_PCS5;
case 2:
gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS2_PCS2;
break;
+ case 3:
+ gpio->par_dma &= GPIO_PAR_DMA_DACK0_UNMASK;
+ break;
case 5:
gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS5_PCS5;
break;
DECLARE_GLOBAL_DATA_PTR;
-int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
volatile gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
#define GPIO_PAR_DMA_DREQ1_GPIO (0x00)
#define GPIO_PAR_DMA_DACK0_UNMASK (0xF3)
#define GPIO_PAR_DMA_DACK0_DACK1 (0x0C)
+#define GPIO_PAR_DMA_DACK0_PCS3 (0x08)
#define GPIO_PAR_DMA_DACK0_ULPI_DIR (0x04)
#define GPIO_PAR_DMA_DACK0_GPIO (0x00)
#define GPIO_PAR_DMA_DREQ0_DREQ0 (0x01)
lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
}
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
{
ulong rd_len;
ulong initrd_start, initrd_end;
#if defined(CONFIG_CMD_IRQ)
#ifdef CONFIG_SYS_INTC_0
-int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int i;
struct irq_action *act = vecs;
return (0);
}
#else
-int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
puts ("Undefined interrupt controller\n");
}
DECLARE_GLOBAL_DATA_PTR;
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
{
/* First parameter is mapped to $r5 for kernel boot args */
void (*theKernel) (char *, ulong, ulong);
{
}
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
_machine_restart();
static void linux_params_init (ulong start, char * commandline);
static void linux_env_set (char * env_name, char * env_val);
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
{
void (*theKernel) (int, char **, char **, int *);
char *commandline = getenv ("bootargs");
DECLARE_GLOBAL_DATA_PTR;
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
{
void (*theKernel) (int, char **, char **, int *);
char *bootargs = getenv ("bootargs");
+++ /dev/null
-#
-# (C) Copyright 2003
-# Psyent Corporation <www.psyent.com>
-# Scott McNutt <smcnutt@psyent.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-CROSS_COMPILE ?= nios-elf-
-
-STANDALONE_LOAD_ADDR = 0x00800000 -L $(gcclibdir)/m32
-
-PLATFORM_CPPFLAGS += -m32 -DCONFIG_NIOS -D__NIOS__ -ffixed-g7 -gstabs
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#if defined(CONFIG_NIOS_ASMI)
-#include <command.h>
-#include <nios-io.h>
-
-#if !defined(CONFIG_SYS_NIOS_ASMIBASE)
-#error "*** CONFIG_SYS_NIOS_ASMIBASE not defined ***"
-#endif
-
-/*-----------------------------------------------------------------------*/
-#define SHORT_HELP\
- "asmi - read/write Cyclone ASMI configuration device.\n"
-
-#define LONG_HELP\
- "\n"\
- "asmi erase start [end]\n"\
- " - erase sector start or sectors start through end.\n"\
- "asmi info\n"\
- " - display ASMI device information.\n"\
- "asmi protect on | off\n"\
- " - turn device protection on or off.\n"\
- "asmi read addr offset count\n"\
- " - read count bytes from offset to addr.\n"\
- "asmi write addr offset count\n"\
- " - write count bytes to offset from addr.\n"\
- "asmi verify addr offset count\n"\
- " - verify count bytes at offset from addr."
-
-
-/*-----------------------------------------------------------------------*/
-/* Operation codes for serial configuration devices
- */
-#define ASMI_WRITE_ENA 0x06 /* Write enable */
-#define ASMI_WRITE_DIS 0x04 /* Write disable */
-#define ASMI_READ_STAT 0x05 /* Read status */
-#define ASMI_READ_BYTES 0x03 /* Read bytes */
-#define ASMI_READ_ID 0xab /* Read silicon id */
-#define ASMI_WRITE_STAT 0x01 /* Write status */
-#define ASMI_WRITE_BYTES 0x02 /* Write bytes */
-#define ASMI_ERASE_BULK 0xc7 /* Erase entire device */
-#define ASMI_ERASE_SECT 0xd8 /* Erase sector */
-
-/* Device status register bits
- */
-#define ASMI_STATUS_WIP (1<<0) /* Write in progress */
-#define ASMI_STATUS_WEL (1<<1) /* Write enable latch */
-
-static nios_asmi_t *asmi = (nios_asmi_t *)CONFIG_SYS_NIOS_ASMIBASE;
-
-/***********************************************************************
- * Device access
- ***********************************************************************/
-static void asmi_cs (int assert)
-{
- if (assert) {
- asmi->control |= NIOS_ASMI_SSO;
- } else {
- /* Let all bits shift out */
- while ((asmi->status & NIOS_ASMI_TMT) == 0)
- ;
- asmi->control &= ~NIOS_ASMI_SSO;
- }
-}
-
-static void asmi_tx (unsigned char c)
-{
- while ((asmi->status & NIOS_ASMI_TRDY) == 0)
- ;
- asmi->txdata = c;
-}
-
-static int asmi_rx (void)
-{
- while ((asmi->status & NIOS_ASMI_RRDY) == 0)
- ;
- return (asmi->rxdata);
-}
-
-static unsigned char bitrev[] = {
- 0x00, 0x08, 0x04, 0x0c, 0x02, 0x0a, 0x06, 0x0e,
- 0x01, 0x09, 0x05, 0x0d, 0x03, 0x0b, 0x07, 0x0f
-};
-
-static unsigned char asmi_bitrev( unsigned char c )
-{
- unsigned char val;
-
- val = bitrev[c>>4];
- val |= bitrev[c & 0x0f]<<4;
- return (val);
-}
-
-static void asmi_rcv (unsigned char *dst, int len)
-{
- while (len--) {
- asmi_tx (0);
- *dst++ = asmi_rx ();
- }
-}
-
-static void asmi_rrcv (unsigned char *dst, int len)
-{
- while (len--) {
- asmi_tx (0);
- *dst++ = asmi_bitrev (asmi_rx ());
- }
-}
-
-static void asmi_snd (unsigned char *src, int len)
-{
- while (len--) {
- asmi_tx (*src++);
- asmi_rx ();
- }
-}
-
-static void asmi_rsnd (unsigned char *src, int len)
-{
- while (len--) {
- asmi_tx (asmi_bitrev (*src++));
- asmi_rx ();
- }
-}
-
-static void asmi_wr_enable (void)
-{
- asmi_cs (1);
- asmi_tx (ASMI_WRITE_ENA);
- asmi_rx ();
- asmi_cs (0);
-}
-
-static unsigned char asmi_status_rd (void)
-{
- unsigned char status;
-
- asmi_cs (1);
- asmi_tx (ASMI_READ_STAT);
- asmi_rx ();
- asmi_tx (0);
- status = asmi_rx ();
- asmi_cs (0);
- return (status);
-}
-
-static void asmi_status_wr (unsigned char status)
-{
- asmi_wr_enable ();
- asmi_cs (1);
- asmi_tx (ASMI_WRITE_STAT);
- asmi_rx ();
- asmi_tx (status);
- asmi_rx ();
- asmi_cs (0);
- return;
-}
-
-/***********************************************************************
- * Device information
- ***********************************************************************/
-typedef struct asmi_devinfo_t {
- const char *name; /* Device name */
- unsigned char id; /* Device silicon id */
- unsigned char size; /* Total size log2(bytes)*/
- unsigned char num_sects; /* Number of sectors */
- unsigned char sz_sect; /* Sector size log2(bytes) */
- unsigned char sz_page; /* Page size log2(bytes) */
- unsigned char prot_mask; /* Protection mask */
-}asmi_devinfo_t;
-
-static struct asmi_devinfo_t devinfo[] = {
- { "EPCS1 ", 0x10, 17, 4, 15, 8, 0x0c },
- { "EPCS4 ", 0x12, 19, 8, 16, 8, 0x1c },
- { 0, 0, 0, 0, 0, 0 }
-};
-
-static asmi_devinfo_t *asmi_dev_find (void)
-{
- unsigned char buf[4];
- unsigned char id;
- int i;
- struct asmi_devinfo_t *dev = NULL;
-
- /* Read silicon id requires 3 "dummy bytes" before it's put
- * on the wire.
- */
- buf[0] = ASMI_READ_ID;
- buf[1] = 0;
- buf[2] = 0;
- buf[3] = 0;
-
- asmi_cs (1);
- asmi_snd (buf,4);
- asmi_rcv (buf,1);
- asmi_cs (0);
- id = buf[0];
-
- /* Find the info struct */
- i = 0;
- while (devinfo[i].name) {
- if (id == devinfo[i].id) {
- dev = &devinfo[i];
- break;
- }
- i++;
- }
-
- return (dev);
-}
-
-/***********************************************************************
- * Misc Utilities
- ***********************************************************************/
-static unsigned asmi_cfgsz (void)
-{
- unsigned sz = 0;
- unsigned char buf[128];
- unsigned char *p;
-
- /* Read in the first 128 bytes of the device */
- buf[0] = ASMI_READ_BYTES;
- buf[1] = 0;
- buf[2] = 0;
- buf[3] = 0;
-
- asmi_cs (1);
- asmi_snd (buf,4);
- asmi_rrcv (buf, sizeof(buf));
- asmi_cs (0);
-
- /* Search for the starting 0x6a which is followed by the
- * 4-byte 'register' and 4-byte bit-count.
- */
- p = buf;
- while (p < buf + sizeof(buf)-8) {
- if ( *p == 0x6a ) {
- /* Point to bit count and extract */
- p += 5;
- sz = *p++;
- sz |= *p++ << 8;
- sz |= *p++ << 16;
- sz |= *p++ << 24;
- /* Convert to byte count */
- sz += 7;
- sz >>= 3;
- } else if (*p == 0xff) {
- /* 0xff is ok ... just skip */
- p++;
- continue;
- } else {
- /* Not 0xff or 0x6a ... something's not
- * right ... report 'unknown' (sz=0).
- */
- break;
- }
- }
- return (sz);
-}
-
-static int asmi_erase (unsigned start, unsigned end)
-{
- unsigned off, sectsz;
- unsigned char buf[4];
- struct asmi_devinfo_t *dev = asmi_dev_find ();
-
- if (!dev || (start>end))
- return (-1);
-
- /* Erase the requested sectors. An address is required
- * that lies within the requested sector -- we'll just
- * use the first address in the sector.
- */
- printf ("asmi erasing sector %d ", start);
- if (start != end)
- printf ("to %d ", end);
- sectsz = (1 << dev->sz_sect);
- while (start <= end) {
- off = start * sectsz;
- start++;
-
- buf[0] = ASMI_ERASE_SECT;
- buf[1] = off >> 16;
- buf[2] = off >> 8;
- buf[3] = off;
-
- asmi_wr_enable ();
- asmi_cs (1);
- asmi_snd (buf,4);
- asmi_cs (0);
-
- printf ("."); /* Some user feedback */
-
- /* Wait for erase to complete */
- while (asmi_status_rd() & ASMI_STATUS_WIP)
- ;
- }
- printf (" done.\n");
- return (0);
-}
-
-static int asmi_read (ulong addr, ulong off, ulong cnt)
-{
- unsigned char buf[4];
-
- buf[0] = ASMI_READ_BYTES;
- buf[1] = off >> 16;
- buf[2] = off >> 8;
- buf[3] = off;
-
- asmi_cs (1);
- asmi_snd (buf,4);
- asmi_rrcv ((unsigned char *)addr, cnt);
- asmi_cs (0);
-
- return (0);
-}
-
-static
-int asmi_write (ulong addr, ulong off, ulong cnt)
-{
- ulong wrcnt;
- unsigned pgsz;
- unsigned char buf[4];
- struct asmi_devinfo_t *dev = asmi_dev_find ();
-
- if (!dev)
- return (-1);
-
- pgsz = (1<<dev->sz_page);
- while (cnt) {
- if (off % pgsz)
- wrcnt = pgsz - (off % pgsz);
- else
- wrcnt = pgsz;
- wrcnt = (wrcnt > cnt) ? cnt : wrcnt;
-
- buf[0] = ASMI_WRITE_BYTES;
- buf[1] = off >> 16;
- buf[2] = off >> 8;
- buf[3] = off;
-
- asmi_wr_enable ();
- asmi_cs (1);
- asmi_snd (buf,4);
- asmi_rsnd ((unsigned char *)addr, wrcnt);
- asmi_cs (0);
-
- /* Wait for write to complete */
- while (asmi_status_rd() & ASMI_STATUS_WIP)
- ;
-
- cnt -= wrcnt;
- off += wrcnt;
- addr += wrcnt;
- }
-
- return (0);
-}
-
-static
-int asmi_verify (ulong addr, ulong off, ulong cnt, ulong *err)
-{
- ulong rdcnt;
- unsigned char buf[256];
- unsigned char *start,*end;
- int i;
-
- start = end = (unsigned char *)addr;
- while (cnt) {
- rdcnt = (cnt>sizeof(buf)) ? sizeof(buf) : cnt;
- asmi_read ((ulong)buf, off, rdcnt);
- for (i=0; i<rdcnt; i++) {
- if (*end != buf[i]) {
- *err = end - start;
- return(-1);
- }
- end++;
- }
- cnt -= rdcnt;
- off += rdcnt;
- }
- return (0);
-}
-
-static int asmi_sect_erased (int sect, unsigned *offset,
- struct asmi_devinfo_t *dev)
-{
- unsigned char buf[128];
- unsigned off, end;
- unsigned sectsz;
- int i;
-
- sectsz = (1 << dev->sz_sect);
- off = sectsz * sect;
- end = off + sectsz;
-
- while (off < end) {
- asmi_read ((ulong)buf, off, sizeof(buf));
- for (i=0; i < sizeof(buf); i++) {
- if (buf[i] != 0xff) {
- *offset = off + i;
- return (0);
- }
- }
- off += sizeof(buf);
- }
- return (1);
-}
-
-
-/***********************************************************************
- * Commands
- ***********************************************************************/
-static
-void do_asmi_info (struct asmi_devinfo_t *dev, int argc, char *argv[])
-{
- int i;
- unsigned char stat;
- unsigned tmp;
- int erased;
-
- /* Basic device info */
- printf ("%s: %d kbytes (%d sectors x %d kbytes,"
- " %d bytes/page)\n",
- dev->name, 1 << (dev->size-10),
- dev->num_sects, 1 << (dev->sz_sect-10),
- 1 << dev->sz_page );
-
- /* Status -- for now protection is all-or-nothing */
- stat = asmi_status_rd();
- printf ("status: 0x%02x (WIP:%d, WEL:%d, PROT:%s)\n",
- stat,
- (stat & ASMI_STATUS_WIP) ? 1 : 0,
- (stat & ASMI_STATUS_WEL) ? 1 : 0,
- (stat & dev->prot_mask) ? "on" : "off" );
-
- /* Configuration */
- tmp = asmi_cfgsz ();
- if (tmp) {
- printf ("config: 0x%06x (%d) bytes\n", tmp, tmp );
- } else {
- printf ("config: unknown\n" );
- }
-
- /* Sector info */
- for (i=0; i<dev->num_sects; i++) {
- erased = asmi_sect_erased (i, &tmp, dev);
- printf (" %d: %06x ",
- i, i*(1<<dev->sz_sect) );
- if (erased)
- printf ("erased\n");
- else
- printf ("data @ 0x%06x\n", tmp);
- }
-
- return;
-}
-
-static
-void do_asmi_erase (struct asmi_devinfo_t *dev, int argc, char *argv[])
-{
- unsigned start,end;
-
- if ((argc < 3) || (argc > 4)) {
- printf ("USAGE: asmi erase sect [end]\n");
- return;
- }
- if ((asmi_status_rd() & dev->prot_mask) != 0) {
- printf ( "asmi: device protected.\n");
- return;
- }
-
- start = simple_strtoul (argv[2], NULL, 10);
- if (argc > 3)
- end = simple_strtoul (argv[3], NULL, 10);
- else
- end = start;
- if ((start >= dev->num_sects) || (start > end)) {
- printf ("asmi: invalid sector range: [%d:%d]\n",
- start, end );
- return;
- }
-
- asmi_erase (start, end);
-
- return;
-}
-
-static
-void do_asmi_protect (struct asmi_devinfo_t *dev, int argc, char *argv[])
-{
- unsigned char stat;
-
- /* For now protection is all-or-nothing to keep things
- * simple. The protection bits don't map in a linear
- * fashion ... and we would rather protect the bottom
- * of the device since it contains the config data and
- * leave the top unprotected for app use. But unfortunately
- * protection works from top-to-bottom so it does
- * really help very much from a software app point-of-view.
- */
- if (argc < 3) {
- printf ("USAGE: asmi protect on | off\n");
- return;
- }
- if (!dev)
- return;
-
- /* Protection on/off is just a matter of setting/clearing
- * all protection bits in the status register.
- */
- stat = asmi_status_rd ();
- if (strcmp ("on", argv[2]) == 0) {
- stat |= dev->prot_mask;
- } else if (strcmp ("off", argv[2]) == 0 ) {
- stat &= ~dev->prot_mask;
- } else {
- printf ("asmi: unknown protection: %s\n", argv[2]);
- return;
- }
- asmi_status_wr (stat);
- return;
-}
-
-static
-void do_asmi_read (struct asmi_devinfo_t *dev, int argc, char *argv[])
-{
- ulong addr,off,cnt;
- ulong sz;
-
- if (argc < 5) {
- printf ("USAGE: asmi read addr offset count\n");
- return;
- }
-
- sz = 1 << dev->size;
- addr = simple_strtoul (argv[2], NULL, 16);
- off = simple_strtoul (argv[3], NULL, 16);
- cnt = simple_strtoul (argv[4], NULL, 16);
- if (off > sz) {
- printf ("offset is greater than device size"
- "... aborting.\n");
- return;
- }
- if ((off + cnt) > sz) {
- printf ("request exceeds device size"
- "... truncating.\n");
- cnt = sz - off;
- }
- printf ("asmi: read %08lx <- %06lx (0x%lx bytes)\n",
- addr, off, cnt);
- asmi_read (addr, off, cnt);
-
- return;
-}
-
-static
-void do_asmi_write (struct asmi_devinfo_t *dev, int argc, char *argv[])
-{
- ulong addr,off,cnt;
- ulong sz;
- ulong err;
-
- if (argc < 5) {
- printf ("USAGE: asmi write addr offset count\n");
- return;
- }
- if ((asmi_status_rd() & dev->prot_mask) != 0) {
- printf ( "asmi: device protected.\n");
- return;
- }
-
- sz = 1 << dev->size;
- addr = simple_strtoul (argv[2], NULL, 16);
- off = simple_strtoul (argv[3], NULL, 16);
- cnt = simple_strtoul (argv[4], NULL, 16);
- if (off > sz) {
- printf ("offset is greater than device size"
- "... aborting.\n");
- return;
- }
- if ((off + cnt) > sz) {
- printf ("request exceeds device size"
- "... truncating.\n");
- cnt = sz - off;
- }
- printf ("asmi: write %08lx -> %06lx (0x%lx bytes)\n",
- addr, off, cnt);
- asmi_write (addr, off, cnt);
- if (asmi_verify (addr, off, cnt, &err) != 0)
- printf ("asmi: write error at offset %06lx\n", err);
-
- return;
-}
-
-static
-void do_asmi_verify (struct asmi_devinfo_t *dev, int argc, char *argv[])
-{
- ulong addr,off,cnt;
- ulong sz;
- ulong err;
-
- if (argc < 5) {
- printf ("USAGE: asmi verify addr offset count\n");
- return;
- }
-
- sz = 1 << dev->size;
- addr = simple_strtoul (argv[2], NULL, 16);
- off = simple_strtoul (argv[3], NULL, 16);
- cnt = simple_strtoul (argv[4], NULL, 16);
- if (off > sz) {
- printf ("offset is greater than device size"
- "... aborting.\n");
- return;
- }
- if ((off + cnt) > sz) {
- printf ("request exceeds device size"
- "... truncating.\n");
- cnt = sz - off;
- }
- printf ("asmi: verify %08lx -> %06lx (0x%lx bytes)\n",
- addr, off, cnt);
- if (asmi_verify (addr, off, cnt, &err) != 0)
- printf ("asmi: verify error at offset %06lx\n", err);
-
- return;
-}
-
-/*-----------------------------------------------------------------------*/
-int do_asmi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int len;
- struct asmi_devinfo_t *dev = asmi_dev_find ();
-
- if (argc < 2) {
- printf ("Usage:%s", LONG_HELP);
- return (0);
- }
-
- if (!dev) {
- printf ("asmi: device not found.\n");
- return (0);
- }
-
- len = strlen (argv[1]);
- if (strncmp ("info", argv[1], len) == 0) {
- do_asmi_info ( dev, argc, argv);
- } else if (strncmp ("erase", argv[1], len) == 0) {
- do_asmi_erase (dev, argc, argv);
- } else if (strncmp ("protect", argv[1], len) == 0) {
- do_asmi_protect (dev, argc, argv);
- } else if (strncmp ("read", argv[1], len) == 0) {
- do_asmi_read (dev, argc, argv);
- } else if (strncmp ("write", argv[1], len) == 0) {
- do_asmi_write (dev, argc, argv);
- } else if (strncmp ("verify", argv[1], len) == 0) {
- do_asmi_verify (dev, argc, argv);
- } else {
- printf ("asmi: unknown operation: %s\n", argv[1]);
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------*/
-
-
-U_BOOT_CMD( asmi, 5, 0, do_asmi, SHORT_HELP, LONG_HELP );
-
-#endif /* CONFIG_NIOS_ASMI */
+++ /dev/null
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-PLATFORM_RELFLAGS +=
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <nios.h>
-
-
-int checkcpu (void)
-{
- unsigned val;
- unsigned rev_major;
- unsigned rev_minor;
- short nregs, hi_limit, lo_limit;
-
- /* Get cpu version info */
- val = rdctl (CTL_CPU_ID);
- puts ("CPU: ");
- printf ("%s", (val & 0x00008000) ? "Nios-16 " : "Nios-32 ");
- rev_major = (val>>12) & 0x07;
- rev_minor = (val>>4) & 0x0ff;
- printf ("Rev. %d.%d (0x%04x)", rev_major, rev_minor,
- val & 0xffff);
- if (rev_major == 0x08)
- printf (" [OpenCore (R) Plus]");
- printf ("\n");
-
- /* Check register file */
- val = rdctl (CTL_WVALID);
- lo_limit = val & 0x01f;
- hi_limit = (val>>5) & 0x1f;
- nregs = (hi_limit + 2) * 16;
- printf ("Reg file size: %d LO_LIMIT/HI_LIMIT: %d/%d\n",
- nregs, lo_limit, hi_limit);
-
- return (0);
-}
-
-
-int do_reset (void)
-{
- /* trap 0 does the trick ... at least with the OCI debug
- * present -- haven't tested without it yet (stm).
- */
- disable_interrupts ();
- ipri (1);
- asm volatile ("trap 0\n");
-
- /* No return ;-) */
-
- return(0);
-}
-
-
-#if defined(CONFIG_WATCHDOG)
-void watchdog_reset (void)
-{
-}
-#endif /* CONFIG_WATCHDOG */
+++ /dev/null
-/*
- * (C) Copyright 2000-2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <nios.h>
-#include <nios-io.h>
-#include <asm/ptrace.h>
-#include <common.h>
-#include <command.h>
-#include <watchdog.h>
-#ifdef CONFIG_STATUS_LED
-#include <status_led.h>
-#endif
-
-/****************************************************************************/
-
-struct irq_action {
- interrupt_handler_t *handler;
- void *arg;
- int count;
-};
-
-static struct irq_action irq_vecs[64];
-
-/*************************************************************************/
-volatile ulong timestamp = 0;
-
-void reset_timer (void)
-{
- timestamp = 0;
-}
-
-ulong get_timer (ulong base)
-{
- WATCHDOG_RESET ();
- return (timestamp - base);
-}
-
-void set_timer (ulong t)
-{
- timestamp = t;
-}
-
-
-/* The board must handle this interrupt if a timer is not
- * provided.
- */
-#if defined(CONFIG_SYS_NIOS_TMRBASE)
-void timer_interrupt (struct pt_regs *regs)
-{
- /* Interrupt is cleared by writing anything to the
- * status register.
- */
- nios_timer_t *tmr = (nios_timer_t *)CONFIG_SYS_NIOS_TMRBASE;
- tmr->status = 0;
- timestamp += CONFIG_SYS_NIOS_TMRMS;
-#ifdef CONFIG_STATUS_LED
- status_led_tick(timestamp);
-#endif
-}
-#endif
-
-/*************************************************************************/
-int disable_interrupts (void)
-{
- int val = 0;
-
- /* Writing anything to CLR_IE disables interrupts */
- val = rdctl (CTL_STATUS);
- wrctl (CTL_CLR_IE, 0);
- return (val & STATUS_IE);
-}
-
-void enable_interrupts( void )
-{
- /* Writing anything SET_IE enables interrupts */
- wrctl (CTL_SET_IE, 0);
-}
-
-void external_interrupt (struct pt_regs *regs)
-{
- unsigned vec;
-
- vec = (regs->status & STATUS_IPRI) >> 9; /* ipri */
-
- irq_vecs[vec].count++;
- if (irq_vecs[vec].handler != NULL) {
- (*irq_vecs[vec].handler)(irq_vecs[vec].arg);
- } else {
- /* A sad side-effect of masking a bogus interrupt is
- * that lower priority interrupts will also be disabled.
- * This is probably not what we want ... so hang insted.
- */
- printf ("Unhandled interrupt: 0x%x\n", vec);
- disable_interrupts ();
- hang ();
- }
-}
-
-/*************************************************************************/
-int interrupt_init (void)
-{
- int vec;
-
-#if defined(CONFIG_SYS_NIOS_TMRBASE)
- nios_timer_t *tmr = (nios_timer_t *)CONFIG_SYS_NIOS_TMRBASE;
-
- tmr->control &= ~NIOS_TIMER_ITO;
- tmr->control |= NIOS_TIMER_STOP;
-#if defined(CONFIG_SYS_NIOS_TMRCNT)
- tmr->periodl = CONFIG_SYS_NIOS_TMRCNT & 0xffff;
- tmr->periodh = (CONFIG_SYS_NIOS_TMRCNT >> 16) & 0xffff;
-#endif
-#endif
-
- for (vec=0; vec<64; vec++ ) {
- irq_vecs[vec].handler = NULL;
- irq_vecs[vec].arg = NULL;
- irq_vecs[vec].count = 0;
- }
-
- /* Need timus interruptus -- start the lopri timer */
-#if defined(CONFIG_SYS_NIOS_TMRBASE)
- tmr->control |= ( NIOS_TIMER_ITO |
- NIOS_TIMER_CONT |
- NIOS_TIMER_START );
- ipri (CONFIG_SYS_NIOS_TMRIRQ + 1);
-#endif
- enable_interrupts ();
- return (0);
-}
-
-void irq_install_handler (int vec, interrupt_handler_t *handler, void *arg)
-{
- struct irq_action *irqa = irq_vecs;
- int i = vec;
- int flag;
-
- if (irqa[i].handler != NULL) {
- printf ("Interrupt vector %d: handler 0x%x "
- "replacing 0x%x\n",
- vec, (uint)handler, (uint)irqa[i].handler);
- }
-
- flag = disable_interrupts ();
- irqa[i].handler = handler;
- irqa[i].arg = arg;
- if (flag )
- enable_interrupts ();
-}
-
-/*************************************************************************/
-#if defined(CONFIG_CMD_IRQ)
-int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int vec;
-
- printf ("\nInterrupt-Information:\n");
- printf ("Nr Routine Arg Count\n");
-
- for (vec=0; vec<64; vec++) {
- if (irq_vecs[vec].handler != NULL) {
- printf ("%02d %08lx %08lx %d\n",
- vec,
- (ulong)irq_vecs[vec].handler<<1,
- (ulong)irq_vecs[vec].arg,
- irq_vecs[vec].count);
- }
- }
-
- return (0);
-}
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <watchdog.h>
-#include <nios-io.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*------------------------------------------------------------------
- * JTAG acts as the serial port
- *-----------------------------------------------------------------*/
-#if defined(CONFIG_CONSOLE_JTAG)
-
-static nios_jtag_t *jtag = (nios_jtag_t *)CONFIG_SYS_NIOS_CONSOLE;
-
-void serial_setbrg( void ){ return; }
-int serial_init( void ) { return(0);}
-
-void serial_putc (char c)
-{
- while ((jtag->txcntl & NIOS_JTAG_TRDY) != 0)
- WATCHDOG_RESET ();
- jtag->txcntl = NIOS_JTAG_TRDY | (unsigned char)c;
-}
-
-void serial_puts (const char *s)
-{
- while (*s != 0)
- serial_putc (*s++);
-}
-
-int serial_tstc (void)
-{
- return (jtag->rxcntl & NIOS_JTAG_RRDY);
-}
-
-int serial_getc (void)
-{
- int c;
- while (serial_tstc() == 0)
- WATCHDOG_RESET ();
- c = jtag->rxcntl & 0x0ff;
- jtag->rxcntl = 0;
- return (c);
-}
-
-/*------------------------------------------------------------------
- * UART the serial port
- *-----------------------------------------------------------------*/
-#else
-
-static nios_uart_t *uart = (nios_uart_t *)CONFIG_SYS_NIOS_CONSOLE;
-
-#if defined(CONFIG_SYS_NIOS_FIXEDBAUD)
-
-/* Everything's already setup for fixed-baud PTF
- * assignment
- */
-void serial_setbrg (void){ return; }
-int serial_init (void) { return (0);}
-
-#else
-
-void serial_setbrg (void)
-{
- unsigned div;
-
- div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
- uart->divisor = div;
- return;
-}
-
-int serial_init (void)
-{
- serial_setbrg ();
- return (0);
-}
-
-#endif /* CONFIG_SYS_NIOS_FIXEDBAUD */
-
-
-/*-----------------------------------------------------------------------
- * UART CONSOLE
- *---------------------------------------------------------------------*/
-void serial_putc (char c)
-{
- if (c == '\n')
- serial_putc ('\r');
- while ((uart->status & NIOS_UART_TRDY) == 0)
- WATCHDOG_RESET ();
- uart->txdata = (unsigned char)c;
-}
-
-void serial_puts (const char *s)
-{
- while (*s != 0) {
- serial_putc (*s++);
- }
-}
-
-int serial_tstc (void)
-{
- return (uart->status & NIOS_UART_RRDY);
-}
-
-int serial_getc (void)
-{
- while (serial_tstc () == 0)
- WATCHDOG_RESET ();
- return( uart->rxdata & 0x00ff );
-}
-
-#endif /* CONFIG_JTAG_CONSOLE */
+++ /dev/null
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/ctype.h>
-
-#if defined(CONFIG_NIOS_SPI)
-#include <nios-io.h>
-#include <spi.h>
-
-#if !defined(CONFIG_SYS_NIOS_SPIBASE)
-#error "*** CONFIG_SYS_NIOS_SPIBASE not defined ***"
-#endif
-
-#if !defined(CONFIG_SYS_NIOS_SPIBITS)
-#error "*** CONFIG_SYS_NIOS_SPIBITS not defined ***"
-#endif
-
-#if (CONFIG_SYS_NIOS_SPIBITS != 8) && (CONFIG_SYS_NIOS_SPIBITS != 16)
-#error "*** CONFIG_SYS_NIOS_SPIBITS should be either 8 or 16 ***"
-#endif
-
-static nios_spi_t *spi = (nios_spi_t *)CONFIG_SYS_NIOS_SPIBASE;
-
-/* Warning:
- * You cannot enable DEBUG for early system initalization, i. e. when
- * this driver is used to read environment parameters like "baudrate"
- * from EEPROM which are used to initialize the serial port which is
- * needed to print the debug messages...
- */
-#undef DEBUG
-
-#ifdef DEBUG
-
-#define DPRINT(a) printf a;
-/* -----------------------------------------------
- * Helper functions to peek into tx and rx buffers
- * ----------------------------------------------- */
-static const char * const hex_digit = "0123456789ABCDEF";
-
-static char quickhex (int i)
-{
- return hex_digit[i];
-}
-
-static void memdump (const void *pv, int num)
-{
- int i;
- const unsigned char *pc = (const unsigned char *) pv;
-
- for (i = 0; i < num; i++)
- printf ("%c%c ", quickhex (pc[i] >> 4), quickhex (pc[i] & 0x0f));
- printf ("\t");
- for (i = 0; i < num; i++)
- printf ("%c", isprint (pc[i]) ? pc[i] : '.');
- printf ("\n");
-}
-#else /* !DEBUG */
-
-#define DPRINT(a)
-#define memdump(p,n)
-
-#endif /* DEBUG */
-
-
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode)
-{
- struct spi_slave *slave;
-
- if (!spi_cs_is_valid(bus, cs))
- return NULL;
-
- slave = malloc(sizeof(struct spi_slave));
- if (!slave)
- return NULL;
-
- slave->bus = bus;
- slave->cs = cs;
-
- /* TODO: Add support for different modes and speeds */
-
- return slave;
-}
-
-void spi_free_slave(struct spi_slave *slave)
-{
- free(slave);
-}
-
-int spi_claim_bus(struct spi_slave *slave)
-{
- return 0;
-}
-
-void spi_release_bus(struct spi_slave *slave)
-{
-
-}
-
-/*
- * SPI transfer:
- *
- * See include/spi.h and http://www.altera.com/literature/ds/ds_nios_spi.pdf
- * for more informations.
- */
-int spi_xfer(struct spi_slave *slave, int bitlen, const void *dout,
- void *din, unsigned long flags)
-{
- const u8 *txd = dout;
- u8 *rxd = din;
- int j;
-
- DPRINT(("spi_xfer: slave %u:%u dout %08X din %08X bitlen %d\n",
- slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen));
-
- memdump(dout, (bitlen + 7) / 8);
-
- if (flags & SPI_XFER_BEGIN)
- spi_cs_activate(slave);
-
- if (!(flags & SPI_XFER_END) || bitlen > CONFIG_SYS_NIOS_SPIBITS) {
- /* leave chip select active */
- spi->control |= NIOS_SPI_SSO;
- }
-
- for ( j = 0; /* count each byte in */
- j < ((bitlen + 7) / 8); /* dout[] and din[] */
-
-#if (CONFIG_SYS_NIOS_SPIBITS == 8)
- j++) {
-
- while ((spi->status & NIOS_SPI_TRDY) == 0)
- ;
- spi->txdata = (unsigned)(txd[j]);
-
- while ((spi->status & NIOS_SPI_RRDY) == 0)
- ;
- rxd[j] = (unsigned char)(spi->rxdata & 0xff);
-
-#elif (CONFIG_SYS_NIOS_SPIBITS == 16)
- j++, j++) {
-
- while ((spi->status & NIOS_SPI_TRDY) == 0)
- ;
- if ((j+1) < ((bitlen + 7) / 8))
- spi->txdata = (unsigned)((txd[j] << 8) | txd[j+1]);
- else
- spi->txdata = (unsigned)(txd[j] << 8);
-
- while ((spi->status & NIOS_SPI_RRDY) == 0)
- ;
- rxd[j] = (unsigned char)((spi->rxdata >> 8) & 0xff);
- if ((j+1) < ((bitlen + 7) / 8))
- rxd[j+1] = (unsigned char)(spi->rxdata & 0xff);
-
-#else
-#error "*** unsupported value of CONFIG_SYS_NIOS_SPIBITS ***"
-#endif
-
- }
-
- if (bitlen > CONFIG_SYS_NIOS_SPIBITS && (flags & SPI_XFER_END)) {
- spi->control &= ~NIOS_SPI_SSO;
- }
-
- if (flags & SPI_XFER_END)
- spi_cs_deactivate(slave);
-
- memdump(din, (bitlen + 7) / 8);
-
- return 0;
-}
-
-#endif /* CONFIG_NIOS_SPI */
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <timestamp.h>
-#include <version.h>
-
-#if !defined(CONFIG_IDENT_STRING)
-#define CONFIG_IDENT_STRING ""
-#endif
-
-#define STATUS_INIT 0x8600 /* IE=1, IPRI=2 */
-
-/*************************************************************************
- * RESTART
- ************************************************************************/
-
- .text
- .global _start
-
-_start:
- bsr 0f
- nop
- .long _start
-
- /* GERMS -- The "standard-32" configuration GERMS monitor looks
- * for the string "Nios" at flash_base + 0xc (actually it only
- * tests for 'N', 'i'). You can leave support for this in place
- * as it's only a few words.
- */
- . = _start + 0x000c
- .string "Nios"
-
- .align 4
-0:
- /*
- * Early setup -- set cwp = HI_LIMIT, IPRI = 2, IE = 1 to
- * enable underflow exceptions. Disable cache.
- * NOTE: %o7 has return addr -- save in %g7 use later.
- */
- mov %g7, %o7
-
- pfx 2 /* WVALID */
- rdctl %g0
- lsri %g0, 1
- pfx %hi(STATUS_INIT)
- or %g0, %lo(STATUS_INIT)
- wrctl %g0 /* update status */
- nop
-
- /*
- * STACK
- */
- pfx %hi(CONFIG_SYS_INIT_SP)
- movi %sp, %lo(CONFIG_SYS_INIT_SP)
- pfx %xhi(CONFIG_SYS_INIT_SP)
- movhi %sp, %xlo(CONFIG_SYS_INIT_SP)
- mov %fp, %sp
-
- pfx %hi(4*16)
- subi %sp, %lo(4*16) /* Space for reg window mgmt */
-
- /*
- * RELOCATE -- %g7 has return addr from bsr at _start.
- */
- pfx %hi(__u_boot_cmd_end)
- movi %g5, %lo(__u_boot_cmd_end)
- pfx %xhi(__u_boot_cmd_end)
- movhi %g5, %xlo(__u_boot_cmd_end) /* %g5 <- end address */
-
- lsli %g7, 1 /* mem = retaddr << 1 */
- mov %g6, %g7
- subi %g6, 4 /* %g6 <- src addr */
- ld %g7, [%g7] /* %g7 <- dst addr */
-
- /* No need to move text sections if we're already located
- * at the proper address.
- */
- cmp %g7, %g6
- ifs cc_z
- br reloc
- nop /* delay slot */
-
-1: cmp %g7, %g5
- skps cc_nz
- br 2f
- nop /* delay slot */
-
- ld %g0, [%g6]
- addi %g6, 4 /* src++ */
- st [%g7], %g0
- addi %g7, 4 /* dst++ */
- br 1b
- nop /* delay slot */
-2:
-
- /*
- * Jump to relocation address
- */
- pfx %hi(reloc@h)
- movi %g0, %lo(reloc@h)
- pfx %xhi(reloc@h)
- movhi %g0, %xlo(reloc@h)
- jmp %g0
- nop /* delay slot */
-reloc:
-
- /*
- * CLEAR BSS
- */
- pfx %hi(__bss_end)
- movi %g5, %lo(__bss_end)
- pfx %xhi(__bss_end)
- movhi %g5, %xlo(__bss_end) /* %g5 <- end address */
- pfx %hi(__bss_start)
- movi %g7, %lo(__bss_start)
- pfx %xhi(__bss_start)
- movhi %g7, %xlo(__bss_start) /* %g7 <- end address */
-
- movi %g0, 0
-3: cmp %g7, %g5
- skps cc_nz
- br 4f
- nop /* delay slot */
-
- st [%g7], %g0
- addi %g7, 4 /* (delay slot) dst++ */
- br 3b
- nop /* delay slot */
-4:
-
- /*
- * INIT VECTOR TABLE
- */
- pfx %hi(CONFIG_SYS_VECT_BASE)
- movi %g0, %lo(CONFIG_SYS_VECT_BASE)
- pfx %xhi(CONFIG_SYS_VECT_BASE)
- movhi %g0, %xlo(CONFIG_SYS_VECT_BASE) /* dst */
- mov %l0, %g0
-
- pfx %hi(_vectors)
- movi %g1, %lo(_vectors)
- pfx %xhi(_vectors)
- movhi %g1, %xlo(_vectors) /* src */
- bgen %g2, 6 /* cnt = 64 */
-
- ldp %g3, [%l0, 3] /* bkpt vector */
- ldp %g4, [%l0, 4] /* single step vector */
-
-5: ld %g7, [%g1]
- addi %g1, 4 /* src++ */
- st [%g0], %g7
- addi %g0, 4 /* dst++ */
-
- subi %g2, 1 /* cnt-- */
- ifrnz %g2
- br 5b
- nop /* delay slot */
-
-#if defined(CONFIG_ROM_STUBS)
- /* Restore the breakpoint and single step exception
- * vectors to their original values.
- */
- stp [%l0,3], %g3 /* breakpoint */
- stp [%l0,4], %g4 /* single step */
-#endif
-
- /* For debug startup convenience ... software breakpoints
- * set prior to this point may not succeed ;-)
- */
- .global __start
-__start:
-
- /*
- * Call board_init -- never returns
- */
- pfx %hi(board_init@h)
- movi %g1, %lo(board_init@h)
- pfx %xhi(board_init@h)
- movhi %g1, %xlo(board_init@h)
- call %g1
- nop /* Delaly slot */
- /* NEVER RETURNS */
-
-/*
- * dly_clks -- Nios doesn't have a time/clk reference for simple
- * delay loops, so we do our best by counting instruction cycles.
- * A control register that counts system clock cycles would be
- * a handy feature -- hint for Altera ;-)
- */
- .globl dly_clks
- /* Each loop is 4 instructions as delay slot is always
- * executed. Each instruction is approximately 4 clocks
- * (according to some lame info from Altera). So ...
- * ... each loop is about 16 clocks.
- */
-
-dly_clks:
- lsri %o0, 4 /* cnt/16 */
-
-8: skprnz %o0
- br 9f
- subi %o0, 1 /* cnt--, Delay slot */
- br 8b
- nop
-
-9: lret
- nop /* Delay slot */
-
-
- .data
- .globl version_string
-
-version_string:
- .ascii U_BOOT_VERSION
- .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
- .ascii CONFIG_IDENT_STRING, "\0"
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-
-/*************************************************************************
- * Register window underflow
- *
- * The register window underflow exception occurs whenever the lowest
- * valid register window is in use (CWP=LO_LIMIT) and a save instruction
- * is issued. The save moves CWP below LO_LIMIT, %sp is set as normal,
- * then the exception is generated prior to executing the instruction
- * after the save.
- ************************************************************************/
- .text
- .global _cwp_lolimit
- .align 4
-
-_cwp_lolimit:
-
- /* Sixteen words are always allocated by the compiler in every
- * procedure's stack frame, always starting at %sp, for saving
- * 'in' and 'local' registers on a window overflow.
- *
- * Save the 'global' and 'in' regs on stack. They are restored
- * at cwp = HI_LIMIT. The 'local' regs aren't in-use at this point.
- */
- sts [%sp,0], %g0 /* Save 'global' regs*/
- sts [%sp,1], %g1
- sts [%sp,2], %g2
- sts [%sp,3], %g3
- sts [%sp,4], %g4
- sts [%sp,5], %g5
- sts [%sp,6], %g6
- sts [%sp,7], %g7
-
- sts [%sp,8], %i0 /* Save 'in' regs */
- sts [%sp,9], %i1
- sts [%sp,10], %i2
- sts [%sp,11], %i3
- sts [%sp,12], %i4
- sts [%sp,13], %i5
- sts [%sp,14], %i6
- sts [%sp,15], %i7
-
- /* Save current %sp and return address in a global so they are
- * available at cwp = HI_LIMIT ... where the 'global'/'in' regs
- * are restored. NOTE: %sp changes with cwp.
- */
- mov %g7, %o7
- mov %g6, %sp
-
- /* Get LO_LIMIT/HI_LIMIT to know where to start & stop. Note: in
- * the underflow exception, cwp is __NOT__ guaranteed to be zero.
- * If the OCI debug module is enabled the reset value for LO_LIMIT
- * is 2, not 1 -- so cwp can be 1 or 0.
- */
- pfx 2 /* WVALID */
- rdctl %g1
- mov %g2, %g1
- pfx 0
- and %g1, 0x1f /* g1 <- LO_LIMIT */
- lsri %g2, 5
- pfx 0
- and %g2,0x1f /* g2 <- HI_LIMIT */
-
- /* Set istatus so cwp = HI_LIMIT after tret
- */
- movi %g5, 0x1f
- lsli %g5, 4
- not %g5 /* mask to clr cwp */
- pfx 1 /* istatus */
- rdctl %g0
- and %g0, %g5 /* clear cwp field */
-
- mov %g4, %g2
- lsli %g4, 4
- or %g0, %g4 /* cwp = HI_LIMIT */
- pfx 1
- wrctl %g0 /* update istatus */
-
- /* Now move up the register file, saving as we go. When loop
- * is first entered, %g1 is at LO_LIMIT.
- */
-0:
- restore /* cwp++ */
- sts [%sp,0], %l0 /* Save "local" regs*/
- sts [%sp,1], %l1
- sts [%sp,2], %l2
- sts [%sp,3], %l3
- sts [%sp,4], %l4
- sts [%sp,5], %l5
- sts [%sp,6], %l6
- sts [%sp,7], %l7
-
- sts [%sp,8], %i0 /* Save 'in' regs */
- sts [%sp,9], %i1
- sts [%sp,10], %i2
- sts [%sp,11], %i3
- sts [%sp,12], %i4
- sts [%sp,13], %i5
- sts [%sp,14], %i6
- sts [%sp,15], %i7
-
- cmp %g1, %g2 /* cwp == HI_LIMIT ? */
- skps cc_ne /* if so, we're done */
- br 1f
- nop /* delay slot */
-
- inc %g1 /* g1 <- cwp++ */
- br 0b
- nop /* delay slot */
-
- /* At this point cwp = HI_LIMIT, so the global/in regs that were
- * in place when the underflow occurred must be restored using
- * the original stack pointer (saved in g6).
- */
-1:
- mov %o7, %g7 /* restore return addr */
- mov %sp, %g6 /* Restore original sp */
-
- lds %g0, [%sp,0] /* Restore 'global' regs*/
- lds %g1, [%sp,1]
- lds %g2, [%sp,2]
- lds %g3, [%sp,3]
- lds %g4, [%sp,4]
- lds %g5, [%sp,5]
- lds %g6, [%sp,6]
- lds %g7, [%sp,7]
-
- lds %i0, [%sp,8] /* Restore 'in' regs*/
- lds %i1, [%sp,9]
- lds %i2, [%sp,10]
- lds %i3, [%sp,11]
- lds %i4, [%sp,12]
- lds %i5, [%sp,13]
- lds %i6, [%sp,14]
- lds %i7, [%sp,15]
-
- tret %o7 /* All done */
-
-/*************************************************************************
- * Register window overflow
- *
- * The register window overflow exception occurs whenever the highest
- * valid register window is in use (cwp = HI_LIMIT) and a restore
- * instruction is issued. Control is transferred to the overflow handler
- * before the instruction following restore is executed.
- *
- * When a register window overflow exception is taken, the exception
- * handler sees cwp at HI_LIMIT.
- ************************************************************************/
- .text
- .global _cwp_hilimit
- .align 4
-
-_cwp_hilimit:
-
- /* Save 'global'/'in' regs on the stack -- will restore when cwp
- * is at LO_LIMIT. Locals don't need saving as they are going away.
- */
- sts [%sp,0], %g0 /* Save "global" regs*/
- sts [%sp,1], %g1
- sts [%sp,2], %g2
- sts [%sp,3], %g3
- sts [%sp,4], %g4
- sts [%sp,5], %g5
- sts [%sp,6], %g6
- sts [%sp,7], %g7
-
- sts [%sp,8], %i0 /* Save 'in' regs */
- sts [%sp,9], %i1
- sts [%sp,10], %i2
- sts [%sp,11], %i3
- sts [%sp,12], %i4
- sts [%sp,13], %i5
- sts [%sp,14], %i6
- sts [%sp,15], %i7
-
- /* The current %sp must be available in global to restore regs
- * saved on stack. Need return addr as well ;-)
- */
- mov %g7, %o7
- mov %g6, %sp
-
- /* Get HI_LIMIT & LO_LIMIT
- */
- pfx 2 /* WVALID */
- rdctl %g1
- mov %g2, %g1
- pfx 0
- and %g1, 0x1f /* g1 <- LO_LIMIT */
- lsri %g2, 5
- pfx 0
- and %g2,0x1f /* g2 <- HI_LIMIT */
-
- /* Set istatus so cwp = LO_LIMIT after tret
- */
- movi %g5, 0x1f
- lsli %g5, 4
- not %g5 /* mask to clr cwp */
- pfx 1 /* istatus */
- rdctl %g0
- and %g0, %g5 /* clear cwp field */
-
- mov %g4, %g1 /* g4 <- LO_LIMIT */
- lsli %g4, 4
- or %g0, %g4 /* cwp = LO_LIMIT */
- pfx 1
- wrctl %g0 /* update istatus */
-
- /* Move to cwp = LO_LIMIT-1 and restore 'in' regs.
- */
- subi %g4,(1 << 4) /* g4 <- LO_LIMIT - 1 */
- rdctl %g0
- and %g0, %g5 /* clear cwp field */
- or %g0, %g4 /* cwp = LO_LIMIT - 1 */
- wrctl %g0 /* update status */
- nop
-
- mov %sp, %g6 /* Restore sp */
- lds %i0, [%sp,8] /* Restore 'in' regs */
- lds %i1, [%sp,9]
- lds %i2, [%sp,10]
- lds %i3, [%sp,11]
- lds %i4, [%sp,12]
- lds %i5, [%sp,13]
- lds %i6, [%sp,14] /* sp in next window */
- lds %i7, [%sp,15]
-
- /* Starting at LO_LIMIT-1, move up the register file, restoring
- * along the way.
- */
-0:
- restore /* cwp++ */
- lds %l0, [%sp,0] /* Restore 'local' regs*/
- lds %l1, [%sp,1]
- lds %l2, [%sp,2]
- lds %l3, [%sp,3]
- lds %l4, [%sp,4]
- lds %l5, [%sp,5]
- lds %l6, [%sp,6]
- lds %l7, [%sp,7]
-
- lds %i0, [%sp,8] /* Restore 'in' regs */
- lds %i1, [%sp,9]
- lds %i2, [%sp,10]
- lds %i3, [%sp,11]
- lds %i4, [%sp,12]
- lds %i5, [%sp,13]
- lds %i6, [%sp,14] /* sp in next window */
- lds %i7, [%sp,15]
-
- cmp %g1, %g2 /* cwp == HI_LIMIT ? */
- skps cc_ne /* if so, we're done */
- br 1f
- nop /* delay slot */
-
- inc %g1 /* cwp++ */
- br 0b
- nop /* delay slot */
-
- /* All windows have been updated at this point, but the globals
- * still need to be restored. Go to cwp = LO_LIMIT-1 to get
- * some registers to use.
- */
-1:
- rdctl %g0
- and %g0, %g5 /* clear cwp field */
- or %g0, %g4 /* cwp = LO_LIMIT - 1 */
- wrctl %g0 /* update status */
- nop
-
- /* Now there are some registers available to use in restoring
- * the globals.
- */
- mov %sp, %g6
- mov %o7, %g7
-
- lds %g0, [%sp,0] /* Restore "global" regs*/
- lds %g1, [%sp,1]
- lds %g2, [%sp,2]
- lds %g3, [%sp,3]
- lds %g4, [%sp,4]
- lds %g5, [%sp,5]
- lds %g6, [%sp,6]
- lds %g7, [%sp,7]
-
- /* The tret moves istatus -> status. istatus was already set for
- * cwp = LO_LIMIT.
- */
-
- tret %o7 /* done */
-
-/*************************************************************************
- * Default exception handler
- *
- * The default handler passes control to external_interrupt(). So trap
- * or hardware interrupt hanlders can be installed using the familiar
- * irq_install_handler().
- *
- * Here, the stack is fixed-up and cwp is incremented prior to calling
- * external_interrupt(). This lets the underflow and overflow handlers
- * operate normally during the exception.
- ************************************************************************/
- .text
- .global _def_xhandler
- .align 4
-
-_def_xhandler:
-
- /* Allocate some stack space: 16 words at %sp to accomodate
- * a reg window underflow, 8 words to save interrupted task's
- * 'out' regs (which are now the 'in' regs), 8 words to preserve
- * the 'global' regs and 3 words to save the return address,
- * status and istatus. istatus must be saved in the event an
- * underflow occurs in a dispatched handler. status is saved so
- * a handler can access it on stack.
- */
- pfx %hi((16+16+3) * 4)
- subi %fp, %lo((16+16+3) * 4)
- mov %sp, %fp
-
- /* Save the 'global' regs and the interrupted task's 'out' regs
- * (our 'in' regs) along with the return addr, status & istatus.
- * First 16 words are for underflow exception.
- */
- rdctl %l0 /* status */
- pfx 1 /* istatus */
- rdctl %l1
-
- sts [%sp,16+0], %g0 /* Save 'global' regs*/
- sts [%sp,16+1], %g1
- sts [%sp,16+2], %g2
- sts [%sp,16+3], %g3
- sts [%sp,16+4], %g4
- sts [%sp,16+5], %g5
- sts [%sp,16+6], %g6
- sts [%sp,16+7], %g7
-
- sts [%sp,16+8], %i0 /* Save 'in' regs */
- sts [%sp,16+9], %i1
- sts [%sp,16+10], %i2
- sts [%sp,16+11], %i3
- sts [%sp,16+12], %i4
- sts [%sp,16+13], %i5
- sts [%sp,16+14], %i6
- sts [%sp,16+15], %i7
-
- sts [%sp,16+16], %l0 /* status */
- sts [%sp,16+17], %l1 /* istatus */
- sts [%sp,16+18], %o7 /* return addr */
-
- /* Move to cwp+1 ... this guarantees cwp is at or above LO_LIMIT.
- * Need to set IPRI=3 and IE=1 to enable underflow exceptions.
- * NOTE: only the 'out' regs have been saved ... can't touch
- * the 'in' or 'local' here.
- */
- restore /* cwp++ */
- rdctl %o0 /* o0 <- status */
-
- pfx %hi(0x7e00)
- movi %o1, %lo(0x7e00)
- not %o1
- and %o0, %o1 /* clear IPRI */
-
- pfx %hi(0x8600)
- movi %o1, %lo(0x8600)
- or %o0, %o1 /* IPRI=3, IE=1 */
-
- wrctl %o0 /* o0 -> status */
- nop
-
- /* It's ok to call a C routine now since cwp >= LO_LIMIT,
- * interrupt task's registers are/will be preserved, and
- * underflow exceptions can be handled.
- */
- pfx %hi(external_interrupt@h)
- movi %o1, %lo(external_interrupt@h)
- pfx %xhi(external_interrupt@h)
- movhi %o1, %xlo(external_interrupt@h)
- bgen %o0, 4+2 /* 16 * 4 */
- add %o0, %sp /* Ptr to regs */
- call %o1
- nop
-
- /* Move back to the exception register window, restore the 'out'
- * registers, then return from exception.
- */
- rdctl %o0 /* o0 <- status */
- subi %o0, 16
- wrctl %o0 /* cwp-- */
- nop
-
- mov %sp, %fp
- lds %g0, [%sp,16+0] /* Restore 'global' regs*/
- lds %g1, [%sp,16+1]
- lds %g2, [%sp,16+2]
- lds %g3, [%sp,16+3]
- lds %g4, [%sp,16+4]
- lds %g5, [%sp,16+5]
- lds %g6, [%sp,16+6]
- lds %g7, [%sp,16+7]
-
- lds %i0, [%sp,16+8] /* Restore 'in' regs*/
- lds %i1, [%sp,16+9]
- lds %i2, [%sp,16+10]
- lds %i3, [%sp,16+11]
- lds %i4, [%sp,16+12]
- lds %i5, [%sp,16+13]
- lds %i6, [%sp,16+14]
- lds %i7, [%sp,16+15]
-
- lds %l0, [%sp,16+16] /* status */
- lds %l1, [%sp,16+17] /* istatus */
- lds %o7, [%sp,16+18] /* return addr */
-
- pfx 1
- wrctl %l1 /* restore istatus */
-
- pfx %hi((16+16+3) * 4)
- addi %sp, %lo((16+16+3) * 4)
- mov %fp, %sp
-
- tret %o7 /* Done */
-
-
-/*************************************************************************
- * Timebase Timer Interrupt -- This has identical structure to above,
- * but calls timer_interrupt(). Doing it this way keeps things similar
- * to other architectures (e.g. ppc).
- ************************************************************************/
- .text
- .global _timebase_int
- .align 4
-
-_timebase_int:
-
- /* Allocate stack space.
- */
- pfx %hi((16+16+3) * 4)
- subi %fp, %lo((16+16+3) * 4)
- mov %sp, %fp
-
- /* Save the 'global' regs & 'out' regs (our 'in' regs)
- */
- rdctl %l0 /* status */
- pfx 1 /* istatus */
- rdctl %l1
-
- sts [%sp,16+0], %g0 /* Save 'global' regs*/
- sts [%sp,16+1], %g1
- sts [%sp,16+2], %g2
- sts [%sp,16+3], %g3
- sts [%sp,16+4], %g4
- sts [%sp,16+5], %g5
- sts [%sp,16+6], %g6
- sts [%sp,16+7], %g7
-
- sts [%sp,16+8], %i0 /* Save 'in' regs */
- sts [%sp,16+9], %i1
- sts [%sp,16+10], %i2
- sts [%sp,16+11], %i3
- sts [%sp,16+12], %i4
- sts [%sp,16+13], %i5
- sts [%sp,16+14], %i6
- sts [%sp,16+15], %i7
-
- sts [%sp,16+16], %l0 /* status */
- sts [%sp,16+17], %l1 /* istatus */
- sts [%sp,16+18], %o7 /* return addr */
-
- /* Move to cwp+1.
- */
- restore /* cwp++ */
- rdctl %o0 /* o0 <- status */
-
- pfx %hi(0x7e00)
- movi %o1, %lo(0x7e00)
- not %o1
- and %o0, %o1 /* clear IPRI */
-
- pfx %hi(0x8600)
- movi %o1, %lo(0x8600)
- or %o0, %o1 /* IPRI=3, IE=1 */
-
- wrctl %o0 /* o0 -> status */
- nop
-
- /* Call timer_interrupt()
- */
- pfx %hi(timer_interrupt@h)
- movi %o1, %lo(timer_interrupt@h)
- pfx %xhi(timer_interrupt@h)
- movhi %o1, %xlo(timer_interrupt@h)
- bgen %o0, 4+2 /* 16 * 4 */
- add %o0, %sp /* Ptr to regs */
- call %o1
- nop
-
- /* Move back to the exception register window, restore the 'out'
- * registers, then return from exception.
- */
- rdctl %o0 /* o0 <- status */
- subi %o0, 16
- wrctl %o0 /* cwp-- */
- nop
-
- mov %sp, %fp
- lds %g0, [%sp,16+0] /* Restore 'global' regs*/
- lds %g1, [%sp,16+1]
- lds %g2, [%sp,16+2]
- lds %g3, [%sp,16+3]
- lds %g4, [%sp,16+4]
- lds %g5, [%sp,16+5]
- lds %g6, [%sp,16+6]
- lds %g7, [%sp,16+7]
-
- lds %i0, [%sp,16+8] /* Restore 'in' regs*/
- lds %i1, [%sp,16+9]
- lds %i2, [%sp,16+10]
- lds %i3, [%sp,16+11]
- lds %i4, [%sp,16+12]
- lds %i5, [%sp,16+13]
- lds %i6, [%sp,16+14]
- lds %i7, [%sp,16+15]
-
- lds %l0, [%sp,16+16] /* status */
- lds %l1, [%sp,16+17] /* istatus */
- lds %o7, [%sp,16+18] /* return addr */
-
- pfx 1
- wrctl %l1 /* restore istatus */
-
- pfx %hi((16+16+3) * 4)
- addi %sp, %lo((16+16+3) * 4)
- mov %fp, %sp
-
- tret %o7 /* Done */
-
-/*************************************************************************
- * GDB stubs
- ************************************************************************/
- .text
- .global _brkpt_hw_int, _brkpt_sw_int
- .align 4
-
-_brkpt_hw_int:
- movi %l1, 9
- pfx 3
- wrctl %l1
- pfx 4
- wrctl %l1
-
-_brkpt_sw_int:
- movi %l1, 9
- pfx 3
- wrctl %l1
- pfx 4
- wrctl %l1
-
- tret %o7
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _ASM_NIOS_BITOPS_H_
-#define _ASM_NIOS_BITOPS_H_
-
-
-extern void set_bit(int nr, volatile void * a);
-extern void clear_bit(int nr, volatile void * a);
-extern int test_and_clear_bit(int nr, volatile void * a);
-extern void change_bit(unsigned long nr, volatile void *addr);
-extern int test_and_set_bit(int nr, volatile void * a);
-extern int test_and_change_bit(int nr, volatile void * addr);
-extern int test_bit(int nr, volatile void * a);
-extern int ffs(int i);
-#define PLATFORM_FFS
-
-#endif /* _ASM_NIOS_BITOPS_H */
+++ /dev/null
-/*
-* (C) Copyright 2003, Psyent Corporation <www.psyent.com>
-* Scott McNutt <smcnutt@psyent.com>
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
-
-#ifndef __ASM_NIOS_BYTEORDER_H
-#define __ASM_NIOS_BYTEORDER_H
-
-#include <asm/types.h>
-#include <linux/byteorder/little_endian.h>
-
-#endif
+++ /dev/null
-/*FIXME: Implement this! */
+++ /dev/null
-/*
- * Copyright 2009 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#ifndef _ASM_CONFIG_H_
-#define _ASM_CONFIG_H_
-
-/* Relocation to SDRAM works on all NIOS boards */
-#define CONFIG_RELOC_FIXUP_WORKS
-
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __ASM_NIOS_GLOBALDATA_H
-#define __ASM_NIOS_GLOBALDATA_H
-
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
- unsigned long baudrate;
- unsigned long cpu_clk; /* CPU clock in Hz! */
- unsigned long have_console; /* serial_init() was called */
- phys_size_t ram_size; /* RAM size */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid */
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
- unsigned long post_log_word; /* Record POST activities */
- unsigned long post_init_f_time; /* When post_init_f started */
-#endif
- void **jt; /* Standalone app jump table */
-} gd_t;
-
-/* flags */
-#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
-#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
-#define GD_FLG_SILENT 0x00004 /* Silent mode */
-#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
-#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
-#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
-#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
-
-#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("%g7")
-
-#endif /* __ASM_NIOS_GLOBALDATA_H */
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#ifndef __ASM_NIOS_IO_H_
-#define __ASM_NIOS_IO_H_
-
-#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v))
-#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v))
-#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v))
-
-#define __raw_readb(a) (*(volatile unsigned char *)(a))
-#define __raw_readw(a) (*(volatile unsigned short *)(a))
-#define __raw_readl(a) (*(volatile unsigned int *)(a))
-
-#define readb(addr)\
- ({unsigned char val;\
- asm volatile( " pfxio 0 \n"\
- " ld %0, [%1] \n"\
- " ext8d %0, %1 \n"\
- :"=r"(val) : "r" (addr)); val;})
-
-#define readw(addr)\
- ({unsigned short val;\
- asm volatile( " pfxio 0 \n"\
- " ld %0, [%1] \n"\
- " ext16d %0, %1 \n"\
- :"=r"(val) : "r" (addr)); val;})
-
-#define readl(addr)\
- ({unsigned long val;\
- asm volatile( " pfxio 0 \n"\
- " ld %0, [%1] \n"\
- :"=r"(val) : "r" (addr)); val;})
-
-#define writeb(addr,val)\
- asm volatile ( " fill8 %%r0, %1 \n"\
- " st8d [%0], %%r0 \n"\
- : : "r" (addr), "r" (val) : "r0")
-
-#define writew(addr,val)\
- asm volatile ( " fill16 %%r0, %1 \n"\
- " st16d [%0], %%r0 \n"\
- : : "r" (addr), "r" (val) : "r0")
-
-#define writel(addr,val)\
- asm volatile ( " st [%0], %1 \n"\
- : : "r" (addr), "r" (val))
-
-#define inb(addr) readb(addr)
-#define inw(addr) readw(addr)
-#define inl(addr) readl(addr)
-#define outb(val,addr) writeb(addr,val)
-#define outw(val,addr) writew(addr,val)
-#define outl(val,addr) writel(addr,val)
-
-static inline void insb (unsigned long port, void *dst, unsigned long count)
-{
- unsigned char *p = dst;
- while (count--) *p++ = inb (port);
-}
-static inline void insw (unsigned long port, void *dst, unsigned long count)
-{
- unsigned short *p = dst;
- while (count--) *p++ = inw (port);
-}
-static inline void insl (unsigned long port, void *dst, unsigned long count)
-{
- unsigned long *p = dst;
- while (count--) *p++ = inl (port);
-}
-
-static inline void outsb (unsigned long port, const void *src, unsigned long count)
-{
- const unsigned char *p = src;
- while (count--) outb (*p++, port);
-}
-
-static inline void outsw (unsigned long port, const void *src, unsigned long count)
-{
- const unsigned short *p = src;
- while (count--) outw (*p++, port);
-}
-static inline void outsl (unsigned long port, const void *src, unsigned long count)
-{
- const unsigned long *p = src;
- while (count--) outl (*p++, port);
-}
-
-static inline void sync(void)
-{
-}
-
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE (0)
-#define MAP_WRCOMBINE (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
- return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void * vaddr)
-{
- return (phys_addr_t)(vaddr);
-}
-
-#endif /* __ASM_NIOS_IO_H_ */
+++ /dev/null
-#ifndef __ASM_NIOS_POSIX_TYPES_H
-#define __ASM_NIOS_POSIX_TYPES_H
-
-/*
- * This file is generally used by user-level software, so you need to
- * be a little careful about namespace pollution etc. Also, we cannot
- * assume GCC is being used.
- */
-
-typedef unsigned short __kernel_dev_t;
-typedef unsigned long __kernel_ino_t;
-typedef unsigned short __kernel_mode_t;
-typedef unsigned short __kernel_nlink_t;
-typedef long __kernel_off_t;
-typedef int __kernel_pid_t;
-typedef unsigned short __kernel_ipc_pid_t;
-typedef unsigned short __kernel_uid_t;
-typedef unsigned short __kernel_gid_t;
-typedef unsigned long __kernel_size_t;
-typedef int __kernel_ssize_t;
-typedef int __kernel_ptrdiff_t;
-typedef long __kernel_time_t;
-typedef long __kernel_suseconds_t;
-typedef long __kernel_clock_t;
-typedef int __kernel_daddr_t;
-typedef char * __kernel_caddr_t;
-typedef unsigned short __kernel_uid16_t;
-typedef unsigned short __kernel_gid16_t;
-typedef unsigned int __kernel_uid32_t;
-typedef unsigned int __kernel_gid32_t;
-
-typedef unsigned short __kernel_old_uid_t;
-typedef unsigned short __kernel_old_gid_t;
-
-#ifdef __GNUC__
-typedef long long __kernel_loff_t;
-#endif
-
-typedef struct {
-#if defined(__KERNEL__) || defined(__USE_ALL)
- int val[2];
-#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
- int __val[2];
-#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
-} __kernel_fsid_t;
-
-#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
-
-#undef __FD_SET
-#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
-
-#undef __FD_CLR
-#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
-
-#undef __FD_ISSET
-#define __FD_ISSET(d, set) ((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
-
-#undef __FD_ZERO
-#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
-
-#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
-
-#endif
+++ /dev/null
-/* FIXME: Implement this! */
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _NIOS_PSR_H
-#define _NIOS_PSR_H
-
-
-#endif /* _NIOS_PSR_H */
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _NIOS_PTRACE_H
-#define _NIOS_PTRACE_H
-
-struct pt_regs {
- unsigned global[8];
- unsigned in[8];
- unsigned status;
- unsigned istatus;
- unsigned retaddr;
-};
-
-
-#endif /* _NIOS_PTRACE_H */
+++ /dev/null
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * asm-nios/status_led.h
- *
- * NIOS PIO based status led support functions
- */
-
-#ifndef __ASM_STATUS_LED_H__
-#define __ASM_STATUS_LED_H__
-
-#include <nios-io.h>
-
-/* led_id_t is unsigned int mask */
-typedef unsigned int led_id_t;
-
-#ifdef STATUS_LED_WRONLY /* emulate read access */
-static led_id_t __led_portval = 0;
-#endif
-
-static inline void __led_init (led_id_t mask, int state)
-{
- nios_pio_t *piop = (nios_pio_t*)STATUS_LED_BASE;
-
-#ifdef STATUS_LED_WRONLY /* emulate read access */
-
-#if (STATUS_LED_ACTIVE == 0)
- if (state == STATUS_LED_ON)
- __led_portval &= ~mask;
- else
- __led_portval |= mask;
-#else
- if (state == STATUS_LED_ON)
- __led_portval |= mask;
- else
- __led_portval &= ~mask;
-#endif
-
- piop->data = __led_portval;
-
-#else /* !STATUS_LED_WRONLY */
-
-#if (STATUS_LED_ACTIVE == 0)
- if (state == STATUS_LED_ON)
- piop->data &= ~mask;
- else
- piop->data |= mask;
-#else
- if (state == STATUS_LED_ON)
- piop->data |= mask;
- else
- piop->data &= ~mask;
-#endif
-
- piop->direction |= mask;
-
-#endif /* STATUS_LED_WRONLY */
-}
-
-static inline void __led_toggle (led_id_t mask)
-{
- nios_pio_t *piop = (nios_pio_t*)STATUS_LED_BASE;
-
-#ifdef STATUS_LED_WRONLY /* emulate read access */
-
- __led_portval ^= mask;
- piop->data = __led_portval;
-
-#else /* !STATUS_LED_WRONLY */
-
- piop->data ^= mask;
-
-#endif /* STATUS_LED_WRONLY */
-}
-
-static inline void __led_set (led_id_t mask, int state)
-{
- nios_pio_t *piop = (nios_pio_t*)STATUS_LED_BASE;
-
-#ifdef STATUS_LED_WRONLY /* emulate read access */
-
-#if (STATUS_LED_ACTIVE == 0)
- if (state == STATUS_LED_ON)
- __led_portval &= ~mask;
- else
- __led_portval |= mask;
-#else
- if (state == STATUS_LED_ON)
- __led_portval |= mask;
- else
- __led_portval &= ~mask;
-#endif
-
- piop->data = __led_portval;
-
-#else /* !STATUS_LED_WRONLY */
-
-#if (STATUS_LED_ACTIVE == 0)
- if (state == STATUS_LED_ON)
- piop->data &= ~mask;
- else
- piop->data |= mask;
-#else
- if (state == STATUS_LED_ON)
- piop->data |= mask;
- else
- piop->data &= ~mask;
-#endif
-
-#endif /* STATUS_LED_WRONLY */
-}
-
-#endif /* __ASM_STATUS_LED_H__ */
+++ /dev/null
-#ifndef __ASM_NIOS_STRING_H
-#define __ASM_NIOS_STRING_H
-
-#undef __HAVE_ARCH_STRRCHR
-extern char * strrchr(const char * s, int c);
-
-#undef __HAVE_ARCH_STRCHR
-extern char * strchr(const char * s, int c);
-
-#undef __HAVE_ARCH_MEMCPY
-extern void * memcpy(void *, const void *, __kernel_size_t);
-
-#undef __HAVE_ARCH_MEMMOVE
-extern void * memmove(void *, const void *, __kernel_size_t);
-
-#undef __HAVE_ARCH_MEMCHR
-extern void * memchr(const void *, int, __kernel_size_t);
-
-#undef __HAVE_ARCH_MEMSET
-extern void * memset(void *, int, __kernel_size_t);
-
-#undef __HAVE_ARCH_MEMZERO
-extern void memzero(void *ptr, __kernel_size_t n);
-
-#endif
+++ /dev/null
-#ifndef _ASM_NIOS_SYSTEM_H_
-#define _ASM_NIOS_SYSTEM_H_
-
-#endif /* _ASM_NIOS_SYSTEM_H */
+++ /dev/null
-#ifndef _NIOS_TYPES_H
-#define _NIOS_TYPES_H
-
-/*
- * This file is never included by application software unless
- * explicitly requested (e.g., via linux/types.h) in which case the
- * application is Linux specific so (user-) name space pollution is
- * not a major issue. However, for interoperability, libraries still
- * need to be careful to avoid a name clashes.
- */
-
-typedef unsigned short umode_t;
-
-/*
- * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
- * header files exported to user space
- */
-
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
-
-#if defined(__GNUC__)
-__extension__ typedef __signed__ long long __s64;
-__extension__ typedef unsigned long long __u64;
-#endif
-
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-#ifdef __KERNEL__
-
-typedef signed char s8;
-typedef unsigned char u8;
-
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
-typedef signed long long s64;
-typedef unsigned long long u64;
-
-#define BITS_PER_LONG 32
-
-/* Dma addresses are 32-bits wide. */
-
-typedef u32 dma_addr_t;
-
-typedef unsigned long phys_addr_t;
-typedef unsigned long phys_size_t;
-#endif /* __KERNEL__ */
-
-#endif /* _NIOS_TYPES_H */
+++ /dev/null
-/*
- * (C) Copyright 2003
- * Psyent Corporation
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- ********************************************************************
- * NOTE: This header file defines an interface to U-Boot. Including
- * this (unmodified) header file in another file is considered normal
- * use of U-Boot, and does *not* fall under the heading of "derived
- * work".
- ********************************************************************
- */
-
-#ifndef _U_BOOT_H_
-#define _U_BOOT_H_
-
-typedef struct bd_info {
- unsigned long bi_memstart; /* start of DRAM memory */
- phys_size_t bi_memsize; /* size of DRAM memory in bytes */
- unsigned long bi_flashstart; /* start of FLASH memory */
- unsigned long bi_flashsize; /* size of FLASH memory */
- unsigned long bi_flashoffset; /* reserved area for startup monitor */
- unsigned long bi_sramstart; /* start of SRAM memory */
- unsigned long bi_sramsize; /* size of SRAM memory */
- unsigned long bi_ip_addr; /* IP Address */
- unsigned long bi_baudrate; /* Console Baudrate */
-} bd_t;
-
-
-#endif /* _U_BOOT_H_ */
+++ /dev/null
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(ARCH).a
-
-SOBJS-y +=
-
-COBJS-y += board.o
-COBJS-y += bootm.o
-COBJS-y += cache.o
-COBJS-y += divmod.o
-COBJS-y += mult.o
-COBJS-y += time.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * (C) Copyright 2000-2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <stdio_dev.h>
-#include <watchdog.h>
-#include <malloc.h>
-#include <net.h>
-#ifdef CONFIG_STATUS_LED
-#include <status_led.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * All attempts to come up with a "common" initialization sequence
- * that works for all boards and architectures failed: some of the
- * requirements are just _too_ different. To get rid of the resulting
- * mess of board dependend #ifdef'ed code we now make the whole
- * initialization sequence configurable to the user.
- *
- * The requirements for any new initalization function is simple: it
- * receives a pointer to the "global data" structure as it's only
- * argument, and returns an integer return code, where 0 means
- * "continue" and != 0 means "fatal error, hang the system".
- */
-
-
-typedef int (init_fnc_t) (void);
-
-
-/************************************************************************
- * Initialization sequence *
- ***********************************************************************/
-
-init_fnc_t *init_sequence[] = {
-
-#if defined(CONFIG_BOARD_EARLY_INIT_F)
- board_early_init_f, /* Call board-specific init code early.*/
-#endif
-
- env_init,
- serial_init,
- console_init_f,
- display_options,
- checkcpu,
- checkboard,
- NULL, /* Terminate this list */
-};
-
-
-/***********************************************************************/
-void board_init (void)
-{
- bd_t *bd;
- init_fnc_t **init_fnc_ptr;
- char *s, *e;
- int i;
-
- /* Pointer is writable since we allocated a register for it.
- * Nios treats CONFIG_SYS_GBL_DATA_OFFSET as an address.
- */
- gd = (gd_t *)CONFIG_SYS_GBL_DATA_OFFSET;
- /* compiler optimization barrier needed for GCC >= 3.4 */
- __asm__ __volatile__("": : :"memory");
-
- memset( gd, 0, CONFIG_SYS_GBL_DATA_SIZE );
-
- gd->bd = (bd_t *)(gd+1); /* At end of global data */
- gd->baudrate = CONFIG_BAUDRATE;
- gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
-
- bd = gd->bd;
- bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
- bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
- bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
-#if defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE)
- bd->bi_sramstart= CONFIG_SYS_SRAM_BASE;
- bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;
-#endif
- bd->bi_baudrate = CONFIG_BAUDRATE;
-
- for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
- WATCHDOG_RESET ();
- if ((*init_fnc_ptr) () != 0) {
- hang ();
- }
- }
-
- WATCHDOG_RESET ();
-
- /* The Malloc area is immediately below the monitor copy in RAM */
- mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
-
- WATCHDOG_RESET ();
- bd->bi_flashsize = flash_init();
-
- WATCHDOG_RESET ();
- env_relocate();
-
- bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
-
- WATCHDOG_RESET ();
- stdio_init();
- jumptable_init();
- console_init_r();
- /*
- */
-
- WATCHDOG_RESET ();
- interrupt_init ();
-
-#ifdef CONFIG_STATUS_LED
- status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
-#endif
-
- /* main_loop */
- for (;;) {
- WATCHDOG_RESET ();
- main_loop ();
- }
-}
-
-
-/***********************************************************************/
-
-void hang (void)
-{
-#ifdef CONFIG_STATUS_LED
- status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF);
- status_led_set(STATUS_LED_RED, STATUS_LED_BLINKING);
-#endif
- puts("### ERROR ### Please reset board ###\n");
- for (;;);
-}
-
-unsigned long do_go_exec (ulong (*entry)(int, char *[]), int argc, char *argv[])
-{
- /*
- * x86 does not use a dedicated register to pass the pointer
- * to the global_data
- */
- argv[-1] = (char *)gd;
- return entry (argc, argv);
-}
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-
-/* FIXME: Once we find a stable version of uC-linux for nios
- * we can get this working. ;-)
- *
- */
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
-{
- return 1;
-}
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-
-void flush_cache (ulong addr, ulong size)
-{
- /* Nios cache is write-thru -- nothing to do here.
- */
- return;
-}
+++ /dev/null
-/*
- * This file is part of GNU CC.
- *
- * GNU CC is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published
- * by the Free Software Foundation; either version 2, or (at your
- * option) any later version.
- *
- * GNU CC is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public
- * License along with GNU CC; see the file COPYING. If not, write
- * to the Free Software Foundation, 59 Temple Place - Suite 330,
- * Boston, MA 02111-1307, USA.
- */
-
-
-#include "math.h"
-
-USItype udivmodsi4 (USItype num, USItype den, word_type modwanted)
-{
- USItype bit = 1;
- USItype res = 0;
-
- while (den < num && bit && !(den & (1L << 31))) {
- den <<= 1;
- bit <<= 1;
- }
- while (bit) {
- if (num >= den) {
- num -= den;
- res |= bit;
- }
- bit >>= 1;
- den >>= 1;
- }
- if (modwanted)
- return num;
- return res;
-}
-
-
-SItype __divsi3 (SItype a, SItype b)
-{
- word_type neg = 0;
- SItype res;
-
- if (a < 0) {
- a = -a;
- neg = !neg;
- }
-
- if (b < 0) {
- b = -b;
- neg = !neg;
- }
-
- res = udivmodsi4 (a, b, 0);
-
- if (neg)
- res = -res;
-
- return res;
-}
-
-
-SItype __modsi3 (SItype a, SItype b)
-{
- word_type neg = 0;
- SItype res;
-
- if (a < 0) {
- a = -a;
- neg = 1;
- }
-
- if (b < 0)
- b = -b;
-
- res = udivmodsi4 (a, b, 1);
-
- if (neg)
- res = -res;
-
- return res;
-}
-
-
-SItype __udivsi3 (SItype a, SItype b)
-{
- return udivmodsi4 (a, b, 0);
-}
-
-
-SItype __umodsi3 (SItype a, SItype b)
-{
- return udivmodsi4 (a, b, 1);
-}
+++ /dev/null
-#define BITS_PER_UNIT 8
-
-typedef int HItype __attribute__ ((mode (HI)));
-typedef unsigned int UHItype __attribute__ ((mode (HI)));
-
-typedef int SItype __attribute__ ((mode (SI)));
-typedef unsigned int USItype __attribute__ ((mode (SI)));
-
-typedef int word_type __attribute__ ((mode (__word__)));
-
-struct SIstruct {HItype low, high;};
-
-typedef union {
- struct SIstruct s;
- SItype ll;
-} SIunion;
+++ /dev/null
-/*
- * This file is part of GNU CC.
- *
- * GNU CC is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published
- * by the Free Software Foundation; either version 2, or (at your
- * option) any later version.
- *
- * GNU CC is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public
- * License along with GNU CC; see the file COPYING. If not, write
- * to the Free Software Foundation, 59 Temple Place - Suite 330,
- * Boston, MA 02111-1307, USA.
- */
-
-
-#include <common.h>
-
-#if !defined(CONFIG_SYS_NIOS_MULT_HW) && !defined(CONFIG_SYS_NIOS_MULT_MSTEP)
-
-#include "math.h"
-
-USItype __mulsi3 (USItype a, USItype b)
-{
- USItype c = 0;
-
- while (a != 0) {
- if (a & 1)
- c += b;
- a >>= 1;
- b <<= 1;
- }
-
- return c;
-}
-
-
-UHItype __mulhi3 (UHItype a, UHItype b)
-{
- UHItype c = 0;
-
- while (a != 0) {
- if (a & 1)
- c += b;
- a >>= 1;
- b <<= 1;
- }
-
- return c;
-}
-
-#endif /*!defined(CONFIG_SYS_NIOS_MULT_HW) && !defined(CONFIG_SYS_NIOS_MULT_MSTEP) */
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <watchdog.h>
-
-
-extern void dly_clks( unsigned long ticks );
-
-void __udelay(unsigned long usec)
-{
- /* The Nios core doesn't have a timebase, so we do our
- * best for now and call a low-level loop that counts
- * cpu clocks.
- */
- unsigned long cnt = (CONFIG_SYS_CLK_FREQ/1000000) * usec;
- dly_clks (cnt);
-}
CROSS_COMPILE ?= nios2-elf-
-STANDALONE_LOAD_ADDR = 0x02000000 -L $(gcclibdir)
+STANDALONE_LOAD_ADDR ?= 0x02000000
PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__
-PLATFORM_CPPFLAGS += -ffixed-r15 -G0
+PLATFORM_CPPFLAGS += -G0
LDSCRIPT ?= $(SRCTREE)/$(CPUDIR)/u-boot.lds
* Commands
***********************************************************************/
static
-void do_epcs_info (struct epcs_devinfo_t *dev, int argc, char *argv[])
+void do_epcs_info (struct epcs_devinfo_t *dev, int argc, char * const argv[])
{
int i;
unsigned char stat;
}
static
-void do_epcs_erase (struct epcs_devinfo_t *dev, int argc, char *argv[])
+void do_epcs_erase (struct epcs_devinfo_t *dev, int argc, char * const argv[])
{
unsigned start,end;
}
static
-void do_epcs_protect (struct epcs_devinfo_t *dev, int argc, char *argv[])
+void do_epcs_protect (struct epcs_devinfo_t *dev, int argc, char * const argv[])
{
unsigned char stat;
}
static
-void do_epcs_read (struct epcs_devinfo_t *dev, int argc, char *argv[])
+void do_epcs_read (struct epcs_devinfo_t *dev, int argc, char * const argv[])
{
ulong addr,off,cnt;
ulong sz;
}
static
-void do_epcs_write (struct epcs_devinfo_t *dev, int argc, char *argv[])
+void do_epcs_write (struct epcs_devinfo_t *dev, int argc, char * const argv[])
{
ulong addr,off,cnt;
ulong sz;
}
static
-void do_epcs_verify (struct epcs_devinfo_t *dev, int argc, char *argv[])
+void do_epcs_verify (struct epcs_devinfo_t *dev, int argc, char * const argv[])
{
ulong addr,off,cnt;
ulong sz;
}
/*-----------------------------------------------------------------------*/
-int do_epcs (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_epcs (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int len;
struct epcs_devinfo_t *dev = epcs_dev_find ();
/*************************************************************************/
#if defined(CONFIG_CMD_IRQ)
-int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i;
struct irq_action *act = vecs;
bne r5, r6, 4b
5:
- /* GLOBAL POINTER -- the global pointer is used to reference
- * "small data" (see -G switch). The linker script must
- * provide the gp address.
- */
- movhi gp, %hi(_gp)
- ori gp, gp, %lo(_gp)
-
/* JUMP TO RELOC ADDR */
movhi r4, %hi(_reloc)
ori r4, r4, %lo(_reloc)
}
-int do_sysid (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_sysid (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
display_sysid ();
return (0);
#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
-#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r15")
+#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("gp")
#endif /* __ASM_NIOS2_GLOBALDATA_H_ */
--- /dev/null
+/*
+ * nios2 gpio driver
+ *
+ * This gpio core is described in http://nioswiki.com/GPIO
+ * bit[0] data
+ * bit[1] output enable
+ *
+ * when CONFIG_SYS_GPIO_BASE is not defined, board may provide
+ * its own driver.
+ *
+ * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _ASM_NIOS2_GPIO_H_
+#define _ASM_NIOS2_GPIO_H_
+
+#ifdef CONFIG_SYS_GPIO_BASE
+#include <asm/io.h>
+
+static inline int gpio_direction_input(unsigned gpio)
+{
+ writel(1, CONFIG_SYS_GPIO_BASE + (gpio << 2));
+ return 0;
+}
+
+static inline int gpio_direction_output(unsigned gpio, int value)
+{
+ writel(value ? 3 : 2, CONFIG_SYS_GPIO_BASE + (gpio << 2));
+ return 0;
+}
+
+static inline int gpio_get_value(unsigned gpio)
+{
+ return readl(CONFIG_SYS_GPIO_BASE + (gpio << 2));
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+ writel(value ? 3 : 2, CONFIG_SYS_GPIO_BASE + (gpio << 2));
+}
+#else
+extern int gpio_direction_input(unsigned gpio);
+extern int gpio_direction_output(unsigned gpio, int value);
+extern int gpio_get_value(unsigned gpio);
+extern void gpio_set_value(unsigned gpio, int value);
+#endif /* CONFIG_SYS_GPIO_BASE */
+
+#endif /* _ASM_NIOS2_GPIO_H_ */
COBJS-y += board.o
COBJS-y += bootm.o
-COBJS-y += divmod.o
-COBJS-y += mult.o
+COBJS-y += libgcc.o
COBJS-y += time.o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
#define NIOS_MAGIC 0x534f494e /* enable command line and initrd passing */
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
{
void (*kernel)(int, int, int, char *) = (void *)images->ep;
char *commandline = getenv("bootargs");
+++ /dev/null
-/*
- * This file is part of GNU CC.
- *
- * GNU CC is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published
- * by the Free Software Foundation; either version 2, or (at your
- * option) any later version.
- *
- * GNU CC is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public
- * License along with GNU CC; see the file COPYING. If not, write
- * to the Free Software Foundation, 59 Temple Place - Suite 330,
- * Boston, MA 02111-1307, USA.
- */
-
-
-#include "math.h"
-
-USItype udivmodsi4 (USItype num, USItype den, word_type modwanted)
-{
- USItype bit = 1;
- USItype res = 0;
-
- while (den < num && bit && !(den & (1L << 31))) {
- den <<= 1;
- bit <<= 1;
- }
- while (bit) {
- if (num >= den) {
- num -= den;
- res |= bit;
- }
- bit >>= 1;
- den >>= 1;
- }
- if (modwanted)
- return num;
- return res;
-}
-
-
-SItype __divsi3 (SItype a, SItype b)
-{
- word_type neg = 0;
- SItype res;
-
- if (a < 0) {
- a = -a;
- neg = !neg;
- }
-
- if (b < 0) {
- b = -b;
- neg = !neg;
- }
-
- res = udivmodsi4 (a, b, 0);
-
- if (neg)
- res = -res;
-
- return res;
-}
-
-
-SItype __modsi3 (SItype a, SItype b)
-{
- word_type neg = 0;
- SItype res;
-
- if (a < 0) {
- a = -a;
- neg = 1;
- }
-
- if (b < 0)
- b = -b;
-
- res = udivmodsi4 (a, b, 1);
-
- if (neg)
- res = -res;
-
- return res;
-}
-
-
-SItype __udivsi3 (SItype a, SItype b)
-{
- return udivmodsi4 (a, b, 0);
-}
-
-
-SItype __umodsi3 (SItype a, SItype b)
-{
- return udivmodsi4 (a, b, 1);
-}
--- /dev/null
+/*
+ * This file is part of GNU CC.
+ *
+ * GNU CC is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published
+ * by the Free Software Foundation; either version 2, or (at your
+ * option) any later version.
+ *
+ * GNU CC is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with GNU CC; see the file COPYING. If not, write
+ * to the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+typedef unsigned int UWtype;
+typedef unsigned int UHWtype;
+typedef unsigned long long UDWtype;
+#define W_TYPE_SIZE 32
+
+typedef unsigned char UQItype;
+typedef long SItype;
+typedef unsigned long USItype;
+typedef long long DItype;
+typedef unsigned long long DSItype;
+
+#include "longlong.h"
+
+
+typedef int word_type;
+typedef long Wtype;
+typedef long long DWtype;
+
+struct DWstruct { Wtype low, high;};
+
+typedef union
+{
+ struct DWstruct s;
+ DWtype ll;
+} DWunion;
+
+#define BITS_PER_UNIT 8
+
+UDWtype
+__udivmoddi4 (UDWtype n, UDWtype d, UDWtype *rp);
+
+const UQItype __clz_tab[256] =
+{
+ 0,1,2,2,3,3,3,3,4,4,4,4,4,4,4,4,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,
+ 6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
+ 7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
+ 7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
+ 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
+ 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
+ 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
+ 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8
+};
+
+
+DWtype
+__ashldi3 (DWtype u, word_type b)
+{
+ if (b == 0)
+ return u;
+
+ const DWunion uu = {.ll = u};
+ const word_type bm = (sizeof (Wtype) * BITS_PER_UNIT) - b;
+ DWunion w;
+
+ if (bm <= 0)
+ {
+ w.s.low = 0;
+ w.s.high = (UWtype) uu.s.low << -bm;
+ }
+ else
+ {
+ const UWtype carries = (UWtype) uu.s.low >> bm;
+
+ w.s.low = (UWtype) uu.s.low << b;
+ w.s.high = ((UWtype) uu.s.high << b) | carries;
+ }
+
+ return w.ll;
+}
+
+DWtype
+__ashrdi3 (DWtype u, word_type b)
+{
+ if (b == 0)
+ return u;
+
+ const DWunion uu = {.ll = u};
+ const word_type bm = (sizeof (Wtype) * BITS_PER_UNIT) - b;
+ DWunion w;
+
+ if (bm <= 0)
+ {
+ /* w.s.high = 1..1 or 0..0 */
+ w.s.high = uu.s.high >> (sizeof (Wtype) * BITS_PER_UNIT - 1);
+ w.s.low = uu.s.high >> -bm;
+ }
+ else
+ {
+ const UWtype carries = (UWtype) uu.s.high << bm;
+
+ w.s.high = uu.s.high >> b;
+ w.s.low = ((UWtype) uu.s.low >> b) | carries;
+ }
+
+ return w.ll;
+}
+
+DWtype
+__lshrdi3 (DWtype u, word_type b)
+{
+ if (b == 0)
+ return u;
+
+ const DWunion uu = {.ll = u};
+ const word_type bm = (sizeof (Wtype) * BITS_PER_UNIT) - b;
+ DWunion w;
+
+ if (bm <= 0)
+ {
+ w.s.high = 0;
+ w.s.low = (UWtype) uu.s.high >> -bm;
+ }
+ else
+ {
+ const UWtype carries = (UWtype) uu.s.high << bm;
+
+ w.s.high = (UWtype) uu.s.high >> b;
+ w.s.low = ((UWtype) uu.s.low >> b) | carries;
+ }
+
+ return w.ll;
+}
+
+word_type
+__cmpdi2 (DWtype a, DWtype b)
+{
+ const DWunion au = {.ll = a};
+ const DWunion bu = {.ll = b};
+
+ if (au.s.high < bu.s.high)
+ return 0;
+ else if (au.s.high > bu.s.high)
+ return 2;
+ if ((UWtype) au.s.low < (UWtype) bu.s.low)
+ return 0;
+ else if ((UWtype) au.s.low > (UWtype) bu.s.low)
+ return 2;
+ return 1;
+}
+
+UDWtype
+__udivmoddi4 (UDWtype n, UDWtype d, UDWtype *rp)
+{
+ const DWunion nn = {.ll = n};
+ const DWunion dd = {.ll = d};
+ DWunion rr;
+ UWtype d0, d1, n0, n1, n2;
+ UWtype q0, q1;
+ UWtype b, bm;
+
+ d0 = dd.s.low;
+ d1 = dd.s.high;
+ n0 = nn.s.low;
+ n1 = nn.s.high;
+
+#if !UDIV_NEEDS_NORMALIZATION
+ if (d1 == 0)
+ {
+ if (d0 > n1)
+ {
+ /* 0q = nn / 0D */
+
+ udiv_qrnnd (q0, n0, n1, n0, d0);
+ q1 = 0;
+
+ /* Remainder in n0. */
+ }
+ else
+ {
+ /* qq = NN / 0d */
+
+ if (d0 == 0)
+ d0 = 1 / d0; /* Divide intentionally by zero. */
+
+ udiv_qrnnd (q1, n1, 0, n1, d0);
+ udiv_qrnnd (q0, n0, n1, n0, d0);
+
+ /* Remainder in n0. */
+ }
+
+ if (rp != 0)
+ {
+ rr.s.low = n0;
+ rr.s.high = 0;
+ *rp = rr.ll;
+ }
+ }
+
+#else /* UDIV_NEEDS_NORMALIZATION */
+
+ if (d1 == 0)
+ {
+ if (d0 > n1)
+ {
+ /* 0q = nn / 0D */
+
+ count_leading_zeros (bm, d0);
+
+ if (bm != 0)
+ {
+ /* Normalize, i.e. make the most significant bit of the
+ denominator set. */
+
+ d0 = d0 << bm;
+ n1 = (n1 << bm) | (n0 >> (W_TYPE_SIZE - bm));
+ n0 = n0 << bm;
+ }
+
+ udiv_qrnnd (q0, n0, n1, n0, d0);
+ q1 = 0;
+
+ /* Remainder in n0 >> bm. */
+ }
+ else
+ {
+ /* qq = NN / 0d */
+
+ if (d0 == 0)
+ d0 = 1 / d0; /* Divide intentionally by zero. */
+
+ count_leading_zeros (bm, d0);
+
+ if (bm == 0)
+ {
+ /* From (n1 >= d0) /\ (the most significant bit of d0 is set),
+ conclude (the most significant bit of n1 is set) /\ (the
+ leading quotient digit q1 = 1).
+
+ This special case is necessary, not an optimization.
+ (Shifts counts of W_TYPE_SIZE are undefined.) */
+
+ n1 -= d0;
+ q1 = 1;
+ }
+ else
+ {
+ /* Normalize. */
+
+ b = W_TYPE_SIZE - bm;
+
+ d0 = d0 << bm;
+ n2 = n1 >> b;
+ n1 = (n1 << bm) | (n0 >> b);
+ n0 = n0 << bm;
+
+ udiv_qrnnd (q1, n1, n2, n1, d0);
+ }
+
+ /* n1 != d0... */
+
+ udiv_qrnnd (q0, n0, n1, n0, d0);
+
+ /* Remainder in n0 >> bm. */
+ }
+
+ if (rp != 0)
+ {
+ rr.s.low = n0 >> bm;
+ rr.s.high = 0;
+ *rp = rr.ll;
+ }
+ }
+#endif /* UDIV_NEEDS_NORMALIZATION */
+
+ else
+ {
+ if (d1 > n1)
+ {
+ /* 00 = nn / DD */
+
+ q0 = 0;
+ q1 = 0;
+
+ /* Remainder in n1n0. */
+ if (rp != 0)
+ {
+ rr.s.low = n0;
+ rr.s.high = n1;
+ *rp = rr.ll;
+ }
+ }
+ else
+ {
+ /* 0q = NN / dd */
+
+ count_leading_zeros (bm, d1);
+ if (bm == 0)
+ {
+ /* From (n1 >= d1) /\ (the most significant bit of d1 is set),
+ conclude (the most significant bit of n1 is set) /\ (the
+ quotient digit q0 = 0 or 1).
+
+ This special case is necessary, not an optimization. */
+
+ /* The condition on the next line takes advantage of that
+ n1 >= d1 (true due to program flow). */
+ if (n1 > d1 || n0 >= d0)
+ {
+ q0 = 1;
+ sub_ddmmss (n1, n0, n1, n0, d1, d0);
+ }
+ else
+ q0 = 0;
+
+ q1 = 0;
+
+ if (rp != 0)
+ {
+ rr.s.low = n0;
+ rr.s.high = n1;
+ *rp = rr.ll;
+ }
+ }
+ else
+ {
+ UWtype m1, m0;
+ /* Normalize. */
+
+ b = W_TYPE_SIZE - bm;
+
+ d1 = (d1 << bm) | (d0 >> b);
+ d0 = d0 << bm;
+ n2 = n1 >> b;
+ n1 = (n1 << bm) | (n0 >> b);
+ n0 = n0 << bm;
+
+ udiv_qrnnd (q0, n1, n2, n1, d1);
+ umul_ppmm (m1, m0, q0, d0);
+
+ if (m1 > n1 || (m1 == n1 && m0 > n0))
+ {
+ q0--;
+ sub_ddmmss (m1, m0, m1, m0, d1, d0);
+ }
+
+ q1 = 0;
+
+ /* Remainder in (n1n0 - m1m0) >> bm. */
+ if (rp != 0)
+ {
+ sub_ddmmss (n1, n0, n1, n0, m1, m0);
+ rr.s.low = (n1 << b) | (n0 >> bm);
+ rr.s.high = n1 >> bm;
+ *rp = rr.ll;
+ }
+ }
+ }
+ }
+
+ const DWunion ww = {{.low = q0, .high = q1}};
+ return ww.ll;
+}
+
+DWtype
+__divdi3 (DWtype u, DWtype v)
+{
+ word_type c = 0;
+ DWunion uu = {.ll = u};
+ DWunion vv = {.ll = v};
+ DWtype w;
+
+ if (uu.s.high < 0)
+ c = ~c,
+ uu.ll = -uu.ll;
+ if (vv.s.high < 0)
+ c = ~c,
+ vv.ll = -vv.ll;
+
+ w = __udivmoddi4 (uu.ll, vv.ll, (UDWtype *) 0);
+ if (c)
+ w = -w;
+
+ return w;
+}
+
+DWtype
+__negdi2 (DWtype u)
+{
+ const DWunion uu = {.ll = u};
+ const DWunion w = { {.low = -uu.s.low,
+ .high = -uu.s.high - ((UWtype) -uu.s.low > 0) } };
+
+ return w.ll;
+}
+
+
+DWtype
+__muldi3 (DWtype u, DWtype v)
+{
+ const DWunion uu = {.ll = u};
+ const DWunion vv = {.ll = v};
+ DWunion w = {.ll = __umulsidi3 (uu.s.low, vv.s.low)};
+
+ w.s.high += ((UWtype) uu.s.low * (UWtype) vv.s.high
+ + (UWtype) uu.s.high * (UWtype) vv.s.low);
+
+ return w.ll;
+}
+
+DWtype
+__moddi3 (DWtype u, DWtype v)
+{
+ word_type c = 0;
+ DWunion uu = {.ll = u};
+ DWunion vv = {.ll = v};
+ DWtype w;
+
+ if (uu.s.high < 0)
+ c = ~c,
+ uu.ll = -uu.ll;
+ if (vv.s.high < 0)
+ vv.ll = -vv.ll;
+
+ (void) __udivmoddi4 (uu.ll, vv.ll, (UDWtype*)&w);
+ if (c)
+ w = -w;
+
+ return w;
+}
+
+word_type
+__ucmpdi2 (DWtype a, DWtype b)
+{
+ const DWunion au = {.ll = a};
+ const DWunion bu = {.ll = b};
+
+ if ((UWtype) au.s.high < (UWtype) bu.s.high)
+ return 0;
+ else if ((UWtype) au.s.high > (UWtype) bu.s.high)
+ return 2;
+ if ((UWtype) au.s.low < (UWtype) bu.s.low)
+ return 0;
+ else if ((UWtype) au.s.low > (UWtype) bu.s.low)
+ return 2;
+ return 1;
+}
+
+
+UDWtype
+__udivdi3 (UDWtype n, UDWtype d)
+{
+ return __udivmoddi4 (n, d, (UDWtype *) 0);
+}
+
+UDWtype
+__umoddi3 (UDWtype u, UDWtype v)
+{
+ UDWtype w;
+ (void) __udivmoddi4 (u, v, &w);
+
+ return w;
+}
+
+static USItype
+udivmodsi4(USItype num, USItype den, word_type modwanted)
+{
+ USItype bit = 1;
+ USItype res = 0;
+
+ while (den < num && bit && !(den & (1L<<31)))
+ {
+ den <<=1;
+ bit <<=1;
+ }
+ while (bit)
+ {
+ if (num >= den)
+ {
+ num -= den;
+ res |= bit;
+ }
+ bit >>=1;
+ den >>=1;
+ }
+ if (modwanted) return num;
+ return res;
+}
+
+SItype
+__divsi3 (SItype a, SItype b)
+{
+ word_type neg = 0;
+ SItype res;
+
+ if (a < 0)
+ {
+ a = -a;
+ neg = !neg;
+ }
+
+ if (b < 0)
+ {
+ b = -b;
+ neg = !neg;
+ }
+
+ res = udivmodsi4 (a, b, 0);
+
+ if (neg)
+ res = -res;
+
+ return res;
+}
+
+
+SItype
+__udivsi3 (SItype a, SItype b)
+{
+ return udivmodsi4 (a, b, 0);
+}
+
+
+SItype
+__modsi3 (SItype a, SItype b)
+{
+ word_type neg = 0;
+ SItype res;
+
+ if (a < 0)
+ {
+ a = -a;
+ neg = 1;
+ }
+
+ if (b < 0)
+ b = -b;
+
+ res = udivmodsi4 (a, b, 1);
+
+ if (neg)
+ res = -res;
+
+ return res;
+}
+
+SItype
+__mulsi3 (SItype a, SItype b)
+{
+ SItype res = 0;
+ USItype cnt = a;
+
+ while (cnt)
+ {
+ if (cnt & 1)
+ {
+ res += b;
+ }
+ b <<= 1;
+ cnt >>= 1;
+ }
+
+ return res;
+}
+
+SItype
+__umodsi3 (SItype a, SItype b)
+
+{
+ return udivmodsi4 (a, b, 1);
+}
+
+int
+__gcc_bcmp (const unsigned char *s1, const unsigned char *s2, unsigned long size)
+{
+ while (size > 0)
+ {
+ const unsigned char c1 = *s1++, c2 = *s2++;
+ if (c1 != c2)
+ return c1 - c2;
+ size--;
+ }
+ return 0;
+}
--- /dev/null
+/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
+ Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2004,
+ 2005 Free Software Foundation, Inc.
+
+ This definition file is free software; you can redistribute it
+ and/or modify it under the terms of the GNU General Public
+ License as published by the Free Software Foundation; either
+ version 2, or (at your option) any later version.
+
+ This definition file is distributed in the hope that it will be
+ useful, but WITHOUT ANY WARRANTY; without even the implied
+ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ See the GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ Boston, MA 02110-1301, USA. */
+
+/* You have to define the following before including this file:
+
+ UWtype -- An unsigned type, default type for operations (typically a "word")
+ UHWtype -- An unsigned type, at least half the size of UWtype.
+ UDWtype -- An unsigned type, at least twice as large a UWtype
+ W_TYPE_SIZE -- size in bits of UWtype
+
+ UQItype -- Unsigned 8 bit type.
+ SItype, USItype -- Signed and unsigned 32 bit types.
+ DItype, UDItype -- Signed and unsigned 64 bit types.
+
+ On a 32 bit machine UWtype should typically be USItype;
+ on a 64 bit machine, UWtype should typically be UDItype. */
+
+#define __BITS4 (W_TYPE_SIZE / 4)
+#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
+#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
+#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
+
+#ifndef W_TYPE_SIZE
+#define W_TYPE_SIZE 32
+#define UWtype USItype
+#define UHWtype USItype
+#define UDWtype UDItype
+#endif
+
+extern const UQItype __clz_tab[256];
+
+/* Define auxiliary asm macros.
+
+ 1) umul_ppmm(high_prod, low_prod, multiplier, multiplicand) multiplies two
+ UWtype integers MULTIPLIER and MULTIPLICAND, and generates a two UWtype
+ word product in HIGH_PROD and LOW_PROD.
+
+ 2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
+ UDWtype product. This is just a variant of umul_ppmm.
+
+ 3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
+ denominator) divides a UDWtype, composed by the UWtype integers
+ HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
+ in QUOTIENT and the remainder in REMAINDER. HIGH_NUMERATOR must be less
+ than DENOMINATOR for correct operation. If, in addition, the most
+ significant bit of DENOMINATOR must be 1, then the pre-processor symbol
+ UDIV_NEEDS_NORMALIZATION is defined to 1.
+
+ 4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
+ denominator). Like udiv_qrnnd but the numbers are signed. The quotient
+ is rounded towards 0.
+
+ 5) count_leading_zeros(count, x) counts the number of zero-bits from the
+ msb to the first nonzero bit in the UWtype X. This is the number of
+ steps X needs to be shifted left to set the msb. Undefined for X == 0,
+ unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
+
+ 6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
+ from the least significant end.
+
+ 7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
+ high_addend_2, low_addend_2) adds two UWtype integers, composed by
+ HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
+ respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow
+ (i.e. carry out) is not stored anywhere, and is lost.
+
+ 8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
+ high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
+ composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
+ LOW_SUBTRAHEND_2 respectively. The result is placed in HIGH_DIFFERENCE
+ and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere,
+ and is lost.
+
+ If any of these macros are left undefined for a particular CPU,
+ C macros are used. */
+
+/* The CPUs come in alphabetical order below.
+
+ Please add support for more CPUs here, or improve the current support
+ for the CPUs below!
+ (E.g. WE32100, IBM360.) */
+
+/* Snipped per CPU support */
+
+/* If this machine has no inline assembler, use C macros. */
+
+#if !defined (add_ssaaaa)
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+ do { \
+ UWtype __x; \
+ __x = (al) + (bl); \
+ (sh) = (ah) + (bh) + (__x < (al)); \
+ (sl) = __x; \
+ } while (0)
+#endif
+
+#if !defined (sub_ddmmss)
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+ do { \
+ UWtype __x; \
+ __x = (al) - (bl); \
+ (sh) = (ah) - (bh) - (__x > (al)); \
+ (sl) = __x; \
+ } while (0)
+#endif
+
+/* If we lack umul_ppmm but have smul_ppmm, define umul_ppmm in terms of
+ smul_ppmm. */
+#if !defined (umul_ppmm) && defined (smul_ppmm)
+#define umul_ppmm(w1, w0, u, v) \
+ do { \
+ UWtype __w1; \
+ UWtype __xm0 = (u), __xm1 = (v); \
+ smul_ppmm (__w1, w0, __xm0, __xm1); \
+ (w1) = __w1 + (-(__xm0 >> (W_TYPE_SIZE - 1)) & __xm1) \
+ + (-(__xm1 >> (W_TYPE_SIZE - 1)) & __xm0); \
+ } while (0)
+#endif
+
+/* If we still don't have umul_ppmm, define it using plain C. */
+#if !defined (umul_ppmm)
+#define umul_ppmm(w1, w0, u, v) \
+ do { \
+ UWtype __x0, __x1, __x2, __x3; \
+ UHWtype __ul, __vl, __uh, __vh; \
+ \
+ __ul = __ll_lowpart (u); \
+ __uh = __ll_highpart (u); \
+ __vl = __ll_lowpart (v); \
+ __vh = __ll_highpart (v); \
+ \
+ __x0 = (UWtype) __ul * __vl; \
+ __x1 = (UWtype) __ul * __vh; \
+ __x2 = (UWtype) __uh * __vl; \
+ __x3 = (UWtype) __uh * __vh; \
+ \
+ __x1 += __ll_highpart (__x0);/* this can't give carry */ \
+ __x1 += __x2; /* but this indeed can */ \
+ if (__x1 < __x2) /* did we get it? */ \
+ __x3 += __ll_B; /* yes, add it in the proper pos. */ \
+ \
+ (w1) = __x3 + __ll_highpart (__x1); \
+ (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \
+ } while (0)
+#endif
+
+#if !defined (__umulsidi3)
+#define __umulsidi3(u, v) \
+ ({DWunion __w; \
+ umul_ppmm (__w.s.high, __w.s.low, u, v); \
+ __w.ll; })
+#endif
+
+/* Define this unconditionally, so it can be used for debugging. */
+#define __udiv_qrnnd_c(q, r, n1, n0, d) \
+ do { \
+ UWtype __d1, __d0, __q1, __q0; \
+ UWtype __r1, __r0, __m; \
+ __d1 = __ll_highpart (d); \
+ __d0 = __ll_lowpart (d); \
+ \
+ __r1 = (n1) % __d1; \
+ __q1 = (n1) / __d1; \
+ __m = (UWtype) __q1 * __d0; \
+ __r1 = __r1 * __ll_B | __ll_highpart (n0); \
+ if (__r1 < __m) \
+ { \
+ __q1--, __r1 += (d); \
+ if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
+ if (__r1 < __m) \
+ __q1--, __r1 += (d); \
+ } \
+ __r1 -= __m; \
+ \
+ __r0 = __r1 % __d1; \
+ __q0 = __r1 / __d1; \
+ __m = (UWtype) __q0 * __d0; \
+ __r0 = __r0 * __ll_B | __ll_lowpart (n0); \
+ if (__r0 < __m) \
+ { \
+ __q0--, __r0 += (d); \
+ if (__r0 >= (d)) \
+ if (__r0 < __m) \
+ __q0--, __r0 += (d); \
+ } \
+ __r0 -= __m; \
+ \
+ (q) = (UWtype) __q1 * __ll_B | __q0; \
+ (r) = __r0; \
+ } while (0)
+
+/* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
+ __udiv_w_sdiv (defined in libgcc or elsewhere). */
+#if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
+#define udiv_qrnnd(q, r, nh, nl, d) \
+ do { \
+ USItype __r; \
+ (q) = __udiv_w_sdiv (&__r, nh, nl, d); \
+ (r) = __r; \
+ } while (0)
+#endif
+
+/* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c. */
+#if !defined (udiv_qrnnd)
+#define UDIV_NEEDS_NORMALIZATION 1
+#define udiv_qrnnd __udiv_qrnnd_c
+#endif
+
+#if !defined (count_leading_zeros)
+#define count_leading_zeros(count, x) \
+ do { \
+ UWtype __xr = (x); \
+ UWtype __a; \
+ \
+ if (W_TYPE_SIZE <= 32) \
+ { \
+ __a = __xr < ((UWtype)1<<2*__BITS4) \
+ ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4) \
+ : (__xr < ((UWtype)1<<3*__BITS4) ? 2*__BITS4 : 3*__BITS4); \
+ } \
+ else \
+ { \
+ for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8) \
+ if (((__xr >> __a) & 0xff) != 0) \
+ break; \
+ } \
+ \
+ (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a); \
+ } while (0)
+#define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
+#endif
+
+#if !defined (count_trailing_zeros)
+/* Define count_trailing_zeros using count_leading_zeros. The latter might be
+ defined in asm, but if it is not, the C version above is good enough. */
+#define count_trailing_zeros(count, x) \
+ do { \
+ UWtype __ctz_x = (x); \
+ UWtype __ctz_c; \
+ count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x); \
+ (count) = W_TYPE_SIZE - 1 - __ctz_c; \
+ } while (0)
+#endif
+
+#ifndef UDIV_NEEDS_NORMALIZATION
+#define UDIV_NEEDS_NORMALIZATION 0
+#endif
+++ /dev/null
-#define BITS_PER_UNIT 8
-
-typedef int HItype __attribute__ ((mode (HI)));
-typedef unsigned int UHItype __attribute__ ((mode (HI)));
-
-typedef int SItype __attribute__ ((mode (SI)));
-typedef unsigned int USItype __attribute__ ((mode (SI)));
-
-typedef int word_type __attribute__ ((mode (__word__)));
-
-struct SIstruct {HItype low, high;};
-
-typedef union {
- struct SIstruct s;
- SItype ll;
-} SIunion;
+++ /dev/null
-/*
- * This file is part of GNU CC.
- *
- * GNU CC is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published
- * by the Free Software Foundation; either version 2, or (at your
- * option) any later version.
- *
- * GNU CC is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public
- * License along with GNU CC; see the file COPYING. If not, write
- * to the Free Software Foundation, 59 Temple Place - Suite 330,
- * Boston, MA 02111-1307, USA.
- */
-
-
-#include <common.h>
-
-#if !defined(CONFIG_SYS_NIOS_MULT_HW) && !defined(CONFIG_SYS_NIOS_MULT_MSTEP)
-
-#include "math.h"
-
-USItype __mulsi3 (USItype a, USItype b)
-{
- USItype c = 0;
-
- while (a != 0) {
- if (a & 1)
- c += b;
- a >>= 1;
- b <<= 1;
- }
-
- return c;
-}
-
-
-UHItype __mulhi3 (UHItype a, UHItype b)
-{
- UHItype c = 0;
-
- while (a != 0) {
- if (a & 1)
- c += b;
- a >>= 1;
- b <<= 1;
- }
-
- return c;
-}
-
-#endif /*!defined(CONFIG_SYS_NIOS_MULT_HW) && !defined(CONFIG_SYS_NIOS_MULT_MSTEP) */
#include <fdt_support.h>
#endif
-#ifdef CONFIG_AMIGAONEG3SE
-#include "../board/MAI/AmigaOneG3SE/via686.h"
-#include "../board/MAI/AmigaOneG3SE/memio.h"
-#endif
-
DECLARE_GLOBAL_DATA_PTR;
cpu_t
!defined(CONFIG_PPMC7XX)
/* no generic way to do board reset. simply call soft_reset. */
void
-do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr;
/* flush and disable I/D cache */
/*
* For the 7400 the TB clock runs at 1/4 the cpu bus speed.
*/
-#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SYS_CONFIG_BUS_CLK)
+#ifndef CONFIG_SYS_BUS_CLK
+#define CONFIG_SYS_BUS_CLK gd->bus_clk
+#endif
+
unsigned long get_tbclk(void)
{
- return (gd->bus_clk / 4);
+ return CONFIG_SYS_BUS_CLK / 4;
}
-#else /* ! CONFIG_AMIGAONEG3SE and !CONFIG_SYS_CONFIG_BUS_CLK*/
-unsigned long get_tbclk (void)
-{
- return CONFIG_SYS_BUS_HZ / 4;
-}
-#endif /* CONFIG_AMIGAONEG3SE or CONFIG_SYS_CONFIG_BUS_CLK*/
/* ------------------------------------------------------------------------- */
+
#if defined(CONFIG_WATCHDOG)
#if !defined(CONFIG_PCIPPC2) && !defined(CONFIG_BAB7xx)
void
int interrupt_init_cpu (unsigned *decrementer_count)
{
-#if defined(DEBUG) && !defined(CONFIG_AMIGAONEG3SE)
- printf("interrupt_init: GT main cause reg: %08x:%08x\n",
+ debug("interrupt_init: GT main cause reg: %08x:%08x\n",
GTREGREAD(LOW_INTERRUPT_CAUSE_REGISTER),
GTREGREAD(HIGH_INTERRUPT_CAUSE_REGISTER));
- printf("interrupt_init: ethernet cause regs: %08x %08x %08x\n",
+ debug("interrupt_init: ethernet cause regs: %08x %08x %08x\n",
GTREGREAD(ETHERNET0_INTERRUPT_CAUSE_REGISTER),
GTREGREAD(ETHERNET1_INTERRUPT_CAUSE_REGISTER),
GTREGREAD(ETHERNET2_INTERRUPT_CAUSE_REGISTER));
- printf("interrupt_init: ethernet mask regs: %08x %08x %08x\n",
+ debug("interrupt_init: ethernet mask regs: %08x %08x %08x\n",
GTREGREAD(ETHERNET0_INTERRUPT_MASK_REGISTER),
GTREGREAD(ETHERNET1_INTERRUPT_MASK_REGISTER),
GTREGREAD(ETHERNET2_INTERRUPT_MASK_REGISTER));
- puts("interrupt_init: setting decrementer_count\n");
-#endif
+ debug("interrupt_init: setting decrementer_count\n");
+
*decrementer_count = get_tbclk() / CONFIG_SYS_HZ;
return (0);
/****************************************************************************/
void
-do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[])
{
puts("IRQ related functions are unimplemented currently.\n");
}
#include <74xx_7xx.h>
#include <asm/processor.h>
-#ifdef CONFIG_AMIGAONEG3SE
-#include "../board/MAI/AmigaOneG3SE/via686.h"
-#endif
-
DECLARE_GLOBAL_DATA_PTR;
extern unsigned long get_board_bus_clk (void);
bne 5b
6:
mr r3, r10 /* Destination Address */
-#if defined(CONFIG_AMIGAONEG3SE) || \
- defined(CONFIG_DB64360) || \
- defined(CONFIG_DB64460) || \
+#if defined(CONFIG_DB64360) || \
+ defined(CONFIG_DB64460) || \
defined(CONFIG_CPCI750) || \
defined(CONFIG_PPMC7XX) || \
defined(CONFIG_P3Mx)
#include <kgdb.h>
#include <asm/processor.h>
-#ifdef CONFIG_AMIGAONEG3SE
-DECLARE_GLOBAL_DATA_PTR;
-#endif
-
/* Returns 0 if exception not found and fixup otherwise. */
extern unsigned long search_exception_table(unsigned long);
/* THIS NEEDS CHANGING to use the board info structure.
*/
-#ifdef CONFIG_AMIGAONEG3SE
-#define END_OF_MEM (gd->bd->bi_memstart + gd->bd->bi_memsize)
-#else
#define END_OF_MEM 0x02000000
-#endif
/*
* Trap & Exception support
int
-do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong msr;
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
}
int mpc5121diu_init_show_bmp(cmd_tbl_t *cmdtp,
- int flag, int argc, char *argv[])
+ int flag, int argc, char * const argv[])
{
unsigned int addr;
return (void *)pGD;
}
-/**
- * Set the LUT
- *
- * @index: color number
- * @r: red
- * @b: blue
- * @g: green
- */
-void video_set_lut
- (unsigned int index, unsigned char r, unsigned char g, unsigned char b)
-{
- return;
-}
-
#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */
return 0;
}
-int do_ads5121_fuse(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ads5121_fuse(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int frow, n, v, bank;
return gd->csb_clk;
}
-int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
char buf[32];
/*
* Reset board
*/
-int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
#if defined(CONFIG_PATI)
volatile ulong *addr = (ulong *) CONFIG_SYS_RESET_ADDRESS;
* irqinfo - print information about IRQs
*
*/
-int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int vec;
/* ------------------------------------------------------------------------- */
int
-do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong msr;
/* Interrupts and MMU off */
/****************************************************************************/
#if defined(CONFIG_CMD_IRQ)
-void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
int irq, re_enable;
u32 intr_ctrl;
/* ------------------------------------------------------------------------- */
-int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
volatile gptmr8220_t *gptmr = (volatile gptmr8220_t *) MMAP_GPTMR;
ulong msr;
/****************************************************************************/
void
-do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
puts ("IRQ related functions are unimplemented currently.\n");
}
/*------------------------------------------------------------------- */
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong msr, addr;
extern CPU_DEBUG_CTX bug_ctx;
void bedbug603e_init __P((void));
-void bedbug603e_do_break __P((cmd_tbl_t*,int,int,char*[]));
+void bedbug603e_do_break __P((cmd_tbl_t*,int,int,char*const[]));
void bedbug603e_break_isr __P((struct pt_regs*));
int bedbug603e_find_empty __P((void));
int bedbug603e_set __P((int,unsigned long));
* ====================================================================== */
void bedbug603e_do_break (cmd_tbl_t *cmdtp, int flag, int argc,
- char *argv[])
+ char * const argv[])
{
long addr; /* Address to break at */
int which_bp; /* Breakpoint number */
#if !defined(CONFIG_HAVE_OWN_RESET)
int
-do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong msr, addr;
*
*/
void
-do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
int irq, re_enable;
int
-do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong msr;
#ifndef MPC83xx_RESET
ddr->capture_attributes & ECC_CAPT_ATTR_VLD);
}
-int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile ddr83xx_t *ddr = &immap->ddr;
*/
void
-do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[])
{
}
return gd->csb_clk;
}
-int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
char buf[32];
/* ------------------------------------------------------------------------- */
-int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[])
{
/* Everything after the first generation of PQ3 parts has RSTCR */
#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
#if defined(CONFIG_CMD_IRQ)
/* irqinfo - print information about PCI devices,not implemented. */
-int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
return 0;
}
BOOT_ENTRY_R6_LOWER,
};
-int cpu_release(int nr, int argc, char *argv[])
+int cpu_release(int nr, int argc, char * const argv[])
{
u32 i, val, *table = (u32 *)get_spin_virt_addr() + nr * NUM_BOOT_ENTRY;
u64 boot_addr;
void
-do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
/*
* irqinfo - print information about PCI devices,not implemented.
*/
-int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
return 0;
}
return 0;
}
-int cpu_release(int nr, int argc, char *argv[])
+int cpu_release(int nr, int argc, char * const argv[])
{
/* dummy function so common/cmd_mp.c will build
* should be implemented in the future */
extern CPU_DEBUG_CTX bug_ctx;
void bedbug860_init __P((void));
-void bedbug860_do_break __P((cmd_tbl_t*,int,int,char*[]));
+void bedbug860_do_break __P((cmd_tbl_t*,int,int,char*const[]));
void bedbug860_break_isr __P((struct pt_regs*));
int bedbug860_find_empty __P((void));
int bedbug860_set __P((int,unsigned long));
* ====================================================================== */
void bedbug860_do_break (cmd_tbl_t *cmdtp, int flag, int argc,
- char *argv[])
+ char * const argv[])
{
long addr = 0; /* Address to break at */
int which_bp; /* Breakpoint number */
#ifndef CONFIG_LWMON
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong msr, addr;
* and thus too short to reset the external hardware. So we use the
* watchdog to reset the board.
*/
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
/* prevent triggering the watchdog */
disable_interrupts ();
"SDRAM_" #mnemonic, SDRAM_##mnemonic, data); \
} while (0)
+#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
+static void update_rdcc(void)
+{
+ u32 val;
+
+ /*
+ * Complete RDSS configuration as mentioned on page 7 of the AMCC
+ * PowerPC440SP/SPe DDR2 application note:
+ * "DDR1/DDR2 Initialization Sequence and Dynamic Tuning"
+ *
+ * Or item #10 "10. Complete RDSS configuration" in chapter
+ * "22.2.9 SDRAM Initialization" of AMCC PPC460EX/EXr/GT users
+ * manual.
+ */
+ mfsdram(SDRAM_RTSR, val);
+ if ((val & SDRAM_RTSR_TRK1SM_MASK) == SDRAM_RTSR_TRK1SM_ATPLS1) {
+ mfsdram(SDRAM_RDCC, val);
+ if ((val & SDRAM_RDCC_RDSS_MASK) != SDRAM_RDCC_RDSS_T4) {
+ val += 0x40000000;
+ mtsdram(SDRAM_RDCC, val);
+ }
+ }
+}
+#endif
+
#if defined(CONFIG_440)
/*
* This DDR2 setup code can dynamically setup the TLB entries for the DDR2
static void DQS_calibration_process(void);
#endif
#endif
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
static unsigned char spd_read(uchar chip, uint addr)
{
#else
program_DQS_calibration(dimm_populated, iic0_dimm_addr, num_dimm_banks);
#endif
+ /*
+ * Now complete RDSS configuration as mentioned on page 7 of the AMCC
+ * PowerPC440SP/SPe DDR2 application note:
+ * "DDR1/DDR2 Initialization Sequence and Dynamic Tuning"
+ */
+ update_rdcc();
#ifdef CONFIG_DDR_ECC
/*------------------------------------------------------------------
blank_string(strlen(str));
#endif /* CONFIG_DDR_RQDC_FIXED */
- /*
- * Now complete RDSS configuration as mentioned on page 7 of the AMCC
- * PowerPC440SP/SPe DDR2 application note:
- * "DDR1/DDR2 Initialization Sequence and Dynamic Tuning"
- */
- mfsdram(SDRAM_RTSR, val);
- if ((val & SDRAM_RTSR_TRK1SM_MASK) == SDRAM_RTSR_TRK1SM_ATPLS1) {
- mfsdram(SDRAM_RDCC, val);
- if ((val & SDRAM_RDCC_RDSS_MASK) != SDRAM_RDCC_RDSS_T4) {
- val += 0x40000000;
- mtsdram(SDRAM_RDCC, val);
- }
- }
-
mfsdram(SDRAM_DLCR, val);
debug("%s[%d] DLCR: 0x%08lX\n", __FUNCTION__, __LINE__, val);
mfsdram(SDRAM_RQDC, val);
#endif /* !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) */
#endif /* CONFIG_PPC4xx_DDR_AUTOCALIBRATION */
+ /*
+ * Now complete RDSS configuration as mentioned on page 7 of the AMCC
+ * PowerPC440SP/SPe DDR2 application note:
+ * "DDR1/DDR2 Initialization Sequence and Dynamic Tuning"
+ */
+ update_rdcc();
+
#if defined(CONFIG_DDR_ECC)
do_program_ecc(0);
#endif /* defined(CONFIG_DDR_ECC) */
u32 flags;
};
-struct sdram_timing {
- u32 wrdtr;
- u32 clktr;
-};
-
struct sdram_timing_clks {
u32 wrdtr;
u32 clktr;
spd_ddr_init_hang(void) __attribute__((weak, alias("__spd_ddr_init_hang")));
#endif /* defined(CONFIG_SPD_EEPROM) */
-ulong __ddr_scan_option(ulong default_val)
+struct sdram_timing *__ddr_scan_option(struct sdram_timing *default_val)
{
return default_val;
}
-ulong ddr_scan_option(ulong) __attribute__((weak, alias("__ddr_scan_option")));
+struct sdram_timing *ddr_scan_option(struct sdram_timing *)
+ __attribute__((weak, alias("__ddr_scan_option")));
u32 __ddr_rdss_opt(u32 default_val)
{
* known working {SDRAM_WRDTR.[WDTR], SDRAM_CLKTR.[CKTR]} value
* pairs via a board defined ddr_scan_option() function.
*/
-struct sdram_timing full_scan_options[] = {
+static struct sdram_timing full_scan_options[] = {
{0, 0}, {0, 1}, {0, 2}, {0, 3},
{1, 0}, {1, 1}, {1, 2}, {1, 3},
{2, 0}, {2, 1}, {2, 2}, {2, 3},
memset(&tcal, 0, sizeof(tcal));
- ddr_scan_option((ulong)full_scan_options);
-
- scan_list =
- (struct sdram_timing *)ddr_scan_option((ulong)full_scan_options);
+ scan_list = ddr_scan_option(full_scan_options);
mfsdram(SDRAM_MCOPT1, val);
if ((val & SDRAM_MCOPT1_MCHK_CHK_REP) == SDRAM_MCOPT1_MCHK_CHK_REP)
*-----------------------------------------------------------------------------*/
#if defined(CONFIG_440)
+#if defined(CONFIG_SYS_PCI_MASTER_INIT) || defined(CONFIG_SYS_PCI_TARGET_INIT)
static struct pci_controller ppc440_hose = {0};
+#endif
/*
* This routine is called to determine if a pci scan should be
__attribute__((weak, alias("__pci_master_init")));
#endif /* CONFIG_SYS_PCI_MASTER_INIT */
+#if defined(CONFIG_SYS_PCI_MASTER_INIT) || defined(CONFIG_SYS_PCI_TARGET_INIT)
int pci_440_init (struct pci_controller *hose)
{
int reg_num = 0;
}
return hose->last_busno;
}
+#endif
void pci_init_board(void)
{
- int busno;
+ int busno = 0;
+ /*
+ * Only init PCI when either master or target functionality
+ * is selected.
+ */
+#if defined(CONFIG_SYS_PCI_MASTER_INIT) || defined(CONFIG_SYS_PCI_TARGET_INIT)
busno = pci_440_init (&ppc440_hose);
+#endif
#if (defined(CONFIG_440SPE) || \
defined(CONFIG_460EX) || defined(CONFIG_460GT)) && \
!defined(CONFIG_PCI_DISABLE_PCIE)
extern CPU_DEBUG_CTX bug_ctx;
void bedbug405_init __P ((void));
-void bedbug405_do_break __P ((cmd_tbl_t *, int, int, char *[]));
+void bedbug405_do_break __P ((cmd_tbl_t *, int, int, char * const []));
void bedbug405_break_isr __P ((struct pt_regs *));
int bedbug405_find_empty __P ((void));
int bedbug405_set __P ((int, unsigned long));
* set routine which will assign a breakpoint number.
* ====================================================================== */
-void bedbug405_do_break (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+void bedbug405_do_break (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
long addr = 0; /* Address to break at */
int which_bp; /* Breakpoint number */
}
-static int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i;
int ret;
/* ------------------------------------------------------------------------- */
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
#if defined(CONFIG_BOARD_RESET)
board_reset();
#define CONFIG_SYS_PLL_RECONFIG 0
#endif
+#if defined(CONFIG_440EPX) || \
+ defined(CONFIG_460EX) || defined(CONFIG_460GT)
+static void reset_with_rli(void)
+{
+ u32 reg;
+
+ /*
+ * Set reload inhibit so configuration will persist across
+ * processor resets
+ */
+ mfcpr(CPR0_ICFG, reg);
+ reg |= CPR0_ICFG_RLI_MASK;
+ mtcpr(CPR0_ICFG, reg);
+
+ /* Reset processor if configuration changed */
+ __asm__ __volatile__ ("sync; isync");
+ mtspr(SPRN_DBCR0, 0x20000000);
+}
+#endif
+
void reconfigure_pll(u32 new_cpu_freq)
{
#if defined(CONFIG_440EPX)
}
}
- if (reset_needed) {
+ /* Now reset the CPU if needed */
+ if (reset_needed)
+ reset_with_rli();
+#endif
+
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+ u32 reg;
+
+ /*
+ * See "9.2.1.1 Booting with Option E" in the 460EX/GT
+ * users manual
+ */
+ mfcpr(CPR0_PLLC, reg);
+ if ((reg & (CPR0_PLLC_RST | CPR0_PLLC_ENG)) == CPR0_PLLC_RST) {
/*
- * Set reload inhibit so configuration will persist across
- * processor resets
+ * Set engage bit
*/
- mfcpr(CPR0_ICFG, reg);
- reg &= ~CPR0_ICFG_RLI_MASK;
- reg |= 1 << 31;
- mtcpr(CPR0_ICFG, reg);
+ reg = (reg & ~CPR0_PLLC_RST) | CPR0_PLLC_ENG;
+ mtcpr(CPR0_PLLC, reg);
- /* Reset processor if configuration changed */
- __asm__ __volatile__ ("sync; isync");
- mtspr(SPRN_DBCR0, 0x20000000);
+ /* Now reset the CPU */
+ reset_with_rli();
}
#endif
}
}
#if defined(CONFIG_CMD_IRQ)
-int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int vec;
(0x00000000)
#endif /* !defined(CONFIG_SYS_DCACHE_SACR_VALUE) */
+#if !defined(CONFIG_SYS_TLB_FOR_BOOT_FLASH)
+#define CONFIG_SYS_TLB_FOR_BOOT_FLASH 0 /* use TLB 0 as default */
+#endif
+
#define function_prolog(func_name) .text; \
.align 2; \
.globl func_name; \
isync
#endif /* CONFIG_SYS_INIT_RAM_DCACHE */
-#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
- defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
- defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
- defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
- defined(CONFIG_460SX)
/*
* On some 440er platforms the cache is enabled in the first TLB (Boot-CS)
* to speed up the boot process. Now this cache needs to be disabled.
*/
- iccci 0,0 /* Invalidate inst cache */
- dccci 0,0 /* Invalidate data cache, now no longer our stack */
- sync
- isync
-
+#if defined(CONFIG_440)
/* Clear all potential pending exceptions */
mfspr r1,SPRN_MCSR
mtspr SPRN_MCSR,r1
-#ifdef CONFIG_SYS_TLB_FOR_BOOT_FLASH
addi r1,r0,CONFIG_SYS_TLB_FOR_BOOT_FLASH /* Use defined TLB */
-#else
- addi r1,r0,0x0000 /* Default TLB entry is #0 */
-#endif /* CONFIG_SYS_TLB_FOR_BOOT_FLASH */
tlbre r0,r1,0x0002 /* Read contents */
ori r0,r0,0x0c00 /* Or in the inhibit, write through bit */
tlbwe r0,r1,0x0002 /* Save it out */
sync
isync
-#endif /* defined(CONFIG_440EP) || ... || defined(CONFIG_460GT) */
+#endif /* defined(CONFIG_440) */
mr r1, r3 /* Set new stack pointer */
mr r9, r4 /* Save copy of Init Data pointer */
mr r10, r5 /* Save copy of Destination Address */
#define MPC85xx_PMUXCR_SD_DATA 0x80000000
#define MPC85xx_PMUXCR_SDHC_CD 0x40000000
#define MPC85xx_PMUXCR_SDHC_WP 0x20000000
- u8 res6[12];
+ u32 pmuxcr2; /* Alt. function signal multiplex control 2 */
+ u8 res6[8];
u32 devdisr; /* Device disable control */
#define MPC85xx_DEVDISR_PCI1 0x80000000
#define MPC85xx_DEVDISR_PCI2 0x40000000
#if defined(CONFIG_MPC8568)||defined(CONFIG_MPC8569)
u8 res10b[76];
par_io_t qe_par_io[7];
- u8 res10c[3136];
+ u8 res10c[1600];
#else
- u8 res10b[3404];
+ u8 res10b[1868];
#endif
+ u32 clkdvdr; /* Clock Divide register */
+ u8 res10d[1532];
u32 clkocr; /* Clock out select */
u8 res11[12];
u32 ddrdllcr; /* DDR DLL control */
#define SDRAM_RXBAS_SDSZ_2048 SDRAM_RXBAS_SDSZ_2048MB
#define SDRAM_RXBAS_SDSZ_4096 SDRAM_RXBAS_SDSZ_4096MB
#define SDRAM_RXBAS_SDSZ_8192 SDRAM_RXBAS_SDSZ_8192MB
+#endif /* CONFIG_405EX */
+
+/* The mode definitions are the same for all PPC4xx variants */
#define SDRAM_RXBAS_SDAM_MODE0 PPC_REG_VAL(23, 0x0)
#define SDRAM_RXBAS_SDAM_MODE1 PPC_REG_VAL(23, 0x1)
#define SDRAM_RXBAS_SDAM_MODE2 PPC_REG_VAL(23, 0x2)
#define SDRAM_RXBAS_SDAM_MODE9 PPC_REG_VAL(23, 0x9)
#define SDRAM_RXBAS_SDBE_DISABLE PPC_REG_VAL(31, 0x0)
#define SDRAM_RXBAS_SDBE_ENABLE PPC_REG_VAL(31, 0x1)
-#endif /* CONFIG_405EX */
/*
* Memory controller registers
#endif /* CONFIG_SDRAM_PPC4xx_DENALI_DDR2 */
#ifndef __ASSEMBLY__
+struct sdram_timing {
+ u32 wrdtr;
+ u32 clktr;
+};
+
/*
* Prototypes
*/
COBJS-$(CONFIG_CMD_KGDB) += kgdb.o
COBJS-y += time.o
+# Workaround for local bus unaligned access problems
+# on MPC512x and MPC5200
+ifdef CONFIG_MPC512X
+$(obj)ppcstring.o: AFLAGS += -Dmemcpy=__memcpy
+COBJS-y += memcpy_mpc5200.o
+endif
+ifdef CONFIG_MPC5200
+$(obj)ppcstring.o: AFLAGS += -Dmemcpy=__memcpy
+COBJS-y += memcpy_mpc5200.o
+endif
+
+COBJS += $(sort $(COBJS-y))
+
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
#define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
#endif /* defined(CONFIG_MPC5xxx) */
+#if defined(CONFIG_MPC512X)
+#define CONFIG_SYS_BOOTCOUNT_ADDR (&((immap_t *)CONFIG_SYS_IMMR)->clk.bcr)
+#define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
+#endif /* defined(CONFIG_MPC512X) */
+
#if defined(CONFIG_8xx)
#define CONFIG_SYS_BOOTCOUNT_ADDR (((immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_dpmem + \
CPM_BOOTCOUNT_ADDR)
DECLARE_GLOBAL_DATA_PTR;
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
extern ulong get_effective_memsize(void);
static ulong get_sp (void);
static void set_clocks_in_mhz (bd_t *kbd);
}
__attribute__((noinline))
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
{
int ret;
the debugger. */
void
-kgdb_breakpoint(int argc, char *argv[])
+kgdb_breakpoint(int argc, char * const argv[])
{
asm(" .globl breakinst\n\
breakinst: .long 0x7d821008\n\
--- /dev/null
+/*
+ * (C) Copyright 2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * This is a workaround for issues on the MPC5200, where unaligned
+ * 32-bit-accesses to the local bus will deliver corrupted data. This
+ * happens for example when trying to use memcpy() from an odd NOR
+ * flash address; the behaviour can be also seen when using "md" on an
+ * odd NOR flash address (but there it is not a bug in U-Boot, which
+ * only shows the behaviour of this processor).
+ *
+ * For memcpy(), we test if either the source or the target address
+ * are not 32 bit aligned, and - if so - if the source address is in
+ * NOR flash: in this case we perform a byte-wise (slow) then; for
+ * aligned operations of non-flash areas we use the optimized (fast)
+ * real __memcpy(). This way we minimize the performance impact of
+ * this workaround.
+ *
+ */
+
+#include <common.h>
+#include <flash.h>
+#include <linux/types.h>
+
+void *memcpy(void *trg, const void *src, size_t len)
+{
+ extern void* __memcpy(void *, const void *, size_t);
+ char *s = (char *)src;
+ char *t = (char *)trg;
+ void *dest = (void *)src;
+
+ /*
+ * Check is source address is in flash:
+ * If not, we use the fast assembler code
+ */
+ if (((((unsigned long)s & 3) == 0) /* source aligned */
+ && /* AND */
+ (((unsigned long)t & 3) == 0)) /* target aligned, */
+ || /* or */
+ (addr2info((ulong)s) == NULL)) { /* source not in flash */
+ return __memcpy(trg, src, len);
+ }
+
+ /*
+ * Copying from flash, perform byte by byte copy.
+ */
+ while (len-- > 0)
+ *t++ = *s++;
+
+ return dest;
+}
return 0;
}
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
disable_interrupts();
reset_cpu(0);
/*
- * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhoro@renesas.com>
- * Copyright (C) 2008 Renesas Solutions Corp.
+ * Copyright (C) 2008,2010 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ * Copyright (C) 2008,2010 Renesas Solutions Corp.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
#include <common.h>
#include <asm/processor.h>
+#include <asm/system.h>
int watchdog_init(void)
{
void reset_cpu(unsigned long ignored)
{
+ /* Address error with SR.BL=1 first. */
+ trigger_address_error();
+
while (1)
;
}
return 0;
}
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
disable_interrupts();
reset_cpu(0);
/*
+ * (C) Copyright 2010
+ * Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ *
* (C) Copyright 2007
* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
*
#include <common.h>
#include <asm/processor.h>
+#include <asm/system.h>
int watchdog_init(void)
{
void reset_cpu(unsigned long ignored)
{
+ /* Address error with SR.BL=1 first. */
+ trigger_address_error();
+
while (1)
;
}
return 0;
}
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
disable_interrupts();
reset_cpu (0);
#include <common.h>
#include <asm/processor.h>
+#include <asm/system.h>
#include <asm/io.h>
#define WDT_BASE WTCNT
void reset_cpu(unsigned long ignored)
{
+ /* Address error with SR.BL=1 first. */
+ trigger_address_error();
+
while (1)
;
}
* from linux kernel code.
*/
-#include <linux/irqflags.h>
+#include <asm/irqflags.h>
#include <asm/types.h>
/*
#define arch_align_stack(x) (x)
+static inline void trigger_address_error(void)
+{
+ __asm__ __volatile__ (
+ "ldc %0, sr\n\t"
+ "mov.l @%1, %0"
+ :
+ : "r" (0x10000000), "r" (0x80000001)
+ );
+}
+
#endif
}
#endif
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
{
/* Linux kernel load address */
void (*kernel) (void) = (void (*)(void))images->ep;
* (C) Copyright 2009
* Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
- * (C) Copyright 2007-2008
+ * (C) Copyright 2007-2010
* Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
* (C) Copyright 2003
#define TMU_MAX_COUNTER (~0UL)
static ulong timer_freq;
+static unsigned long last_tcnt;
+static unsigned long long overflow_ticks;
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tmu_timer_stop(0);
tmu_timer_start(0);
+ last_tcnt = 0;
+ overflow_ticks = 0;
+
return 0;
}
unsigned long long get_ticks (void)
{
- return 0 - readl(TCNT0);
+ unsigned long tcnt = 0 - readl(TCNT0);
+ unsigned long ticks;
+
+ if (last_tcnt > tcnt) { /* overflow */
+ overflow_ticks++;
+ ticks = (0xffffffff - last_tcnt) + tcnt;
+ } else {
+ ticks = tcnt;
+ }
+ last_tcnt = tcnt;
+
+ return (overflow_ticks << 32) | tcnt;
}
void __udelay (unsigned long usec)
_reset_reloc();
}
-int do_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
cpu_reset();
/****************************************************************************/
#if defined(CONFIG_CMD_IRQ)
-void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
int irq;
unsigned int pil = get_pil();
_reset_reloc();
}
-int do_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
cpu_reset();
/****************************************************************************/
#if defined(CONFIG_CMD_IRQ)
-void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
int irq;
unsigned int pil = get_pil();
/* Arguments sent to the kernel from the boot prompt. */
struct linux_arguments_v0 {
- char *argv[8];
+ char * const argv[8];
char args[100];
char boot_dev[2];
int boot_dev_ctrl;
extern void timer_interrupt_init(void);
extern void malloc_bin_reloc(void);
-extern int do_ambapp_print(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]);
+extern int do_ambapp_print(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]);
extern int prom_init(void);
#if defined(CONFIG__CMD_DOC)
}
/* boot the linux kernel */
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t * images)
+int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t * images)
{
char *bootargs;
ulong initrd_start, initrd_end;
/*---------------------------------------------------------------------------*/
#ifdef CONFIG_VIDEO
-int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int rcode = 0;
ulong side;
/*---------------------------------------------------------------------------*/
-int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int rcode = 0;
ulong side;
#
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+#
+# Based on original Kirkwood support which is
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
-COBJS := $(BOARD).o flash.o misc.o
-SOBJS := vectors.o
+COBJS := edminiv2.o
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
clean:
- rm -f $(SOBJS) $(OBJS)
+ rm -f $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
+ rm -f $(LIB) core *.bak .depend
#########################################################################
#
-# (C) Copyright 2003
-# Psyent Corporation
-# Scott McNutt <smcnutt@psyent.com>
+# Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
#
-TEXT_BASE = 0x018c0000
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
+TEXT_BASE = 0x00100000
--- /dev/null
+/*
+ * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ *
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <miiphy.h>
+#include <asm/arch/orion5x.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * The ED Mini V2 is equipped with a Macronix MXLV400CB FLASH
+ * which CFI does not properly detect, hence the LEGACY config.
+ */
+#if defined(CONFIG_FLASH_CFI_LEGACY)
+#include <flash.h>
+ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
+{
+ int sectsz[] = CONFIG_SYS_FLASH_SECTSZ;
+ int sect;
+
+ if (base != CONFIG_SYS_FLASH_BASE)
+ return 0;
+
+ info->size = 0;
+ info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
+ /* set each sector's start address and size based */
+ for (sect = 0; sect < CONFIG_SYS_MAX_FLASH_SECT; sect++) {
+ info->start[sect] = base+info->size;
+ info->size += sectsz[sect];
+ }
+ /* This flash must be accessed in 8-bits mode, no buffer. */
+ info->flash_id = 0x01000000;
+ info->portwidth = FLASH_CFI_8BIT;
+ info->chipwidth = FLASH_CFI_BY8;
+ info->buffer_size = 0;
+ /* timings are derived from the Macronix datasheet. */
+ info->erase_blk_tout = 1000;
+ info->write_tout = 10;
+ info->buffer_write_tout = 300;
+ /* Commands and addresses are for AMD mode 8-bit access. */
+ info->vendor = CFI_CMDSET_AMD_LEGACY;
+ info->cmd_reset = 0xF0;
+ info->interface = FLASH_CFI_X8;
+ info->legacy_unlock = 0;
+ info->ext_addr = 0;
+ info->addr_unlock1 = 0x00000aaa;
+ info->addr_unlock2 = 0x00000555;
+ /* Manufacturer Macronix, device MX29LV400CB, CFI 1.3. */
+ info->manufacturer_id = 0x22;
+ info->device_id = 0xBA;
+ info->device_id2 = 0;
+ info->cfi_version = 0x3133;
+ info->cfi_offset = 0x0000;
+ info->name = "MX29LV400CB";
+
+ return 1;
+}
+#endif /* CONFIG_SYS_FLASH_CFI */
+
+int board_init(void)
+{
+ /* arch number of board */
+ gd->bd->bi_arch_number = MACH_TYPE_EDMINI_V2;
+
+ /* boot parameter start at 256th byte of RAM base */
+ gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
+
+ return 0;
+}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Hyperion Entertainment, ThomasF@hyperion-entertainment.com
- * (C) Copyright 2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <pci.h>
-#include <netdev.h>
-#include "articiaS.h"
-#include "memio.h"
-#include "via686.h"
-
-__asm__(" .globl send_kb \n "
- "send_kb: \n "
- " lis r9, 0xfe00 \n "
- " \n "
- " li r4, 0x10 # retries \n "
- " mtctr r4 \n "
- " \n "
- "idle: \n "
- " lbz r4, 0x64(r9) \n "
- " andi. r4, r4, 0x02 \n "
- " bne idle \n "
-
- "ready: \n "
- " stb r3, 0x60(r9) \n "
- " \n "
- "check: \n "
- " lbz r4, 0x64(r9) \n "
- " andi. r4, r4, 0x01 \n "
- " beq check \n "
- " \n "
- " lbz r4, 0x60(r9) \n "
- " cmpwi r4, 0xfa \n "
- " beq done \n "
-
- " bdnz idle \n "
-
- " li r3, 0 \n "
- " blr \n "
-
- "done: \n "
- " li r3, 1 \n "
- " blr \n "
-
- ".globl test_kb \n "
- "test_kb: \n "
- " mflr r10 \n "
- " li r3, 0xed \n "
- " bl send_kb \n "
- " li r3, 0x01 \n "
- " bl send_kb \n "
- " mtlr r10 \n "
- " blr \n "
-);
-
-
-int checkboard (void)
-{
- printf ("Board: AmigaOneG3SE\n");
- return 0;
-}
-
-phys_size_t initdram (int board_type)
-{
- return articiaS_ram_init ();
-}
-
-
-void after_reloc (ulong dest_addr, gd_t *gd)
-{
- board_init_r (gd, dest_addr);
-}
-
-
-int misc_init_r (void)
-{
- extern pci_dev_t video_dev;
- extern void drv_video_init (void);
-
- if (video_dev != ~0)
- drv_video_init ();
-
- return (0);
-}
-
-
-void pci_init_board (void)
-{
-#ifndef CONFIG_RAMBOOT
- articiaS_pci_init ();
-#endif
-}
-
-int board_eth_init(bd_t *bis)
-{
-#if defined(CONFIG_3COM)
- eth_3com_initialize(bis);
-#endif
- return 0;
-}
+++ /dev/null
-#
-# (C) Copyright 2002-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../menu)
-$(shell mkdir -p $(obj)../bios_emulator)
-endif
-
-LIB = $(obj)lib$(BOARD).a
-
-COBJS = $(BOARD).o articiaS.o flash.o serial.o smbus.o articiaS_pci.o \
- via686.o i8259.o ../bios_emulator/x86interface.o \
- ../bios_emulator/bios.o ../bios_emulator/glue.o \
- interrupts.o ps2kbd.o video.o usb_uhci.o enet.o \
- ../menu/cmd_menu.o cmd_boota.o nvram.o
-
-SOBJS = board_asm_init.o memio.o
-
-EMUDIR = ../bios_emulator/scitech/src/x86emu/
-EMUOBJ = $(EMUDIR)decode.o $(EMUDIR)ops2.o $(EMUDIR)fpu.o $(EMUDIR)prim_ops.o \
- $(EMUDIR)ops.o $(EMUDIR)sys.o
-EMUSRC = $(EMUOBJ:.o=.c)
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-EMUOBJ := $(addprefix $(obj),$(EMUOBJ))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(EMUSRC)
- make $(obj)libx86emu.a -C ../bios_emulator/scitech/src/x86emu -f makefile.uboot CROSS_COMPILE=$(CROSS_COMPILE)
- -rm $(LIB)
- $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) $(EMUOBJ)
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Hyperion Entertainment, ThomasF@hyperion-entertainment.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include "memio.h"
-#include "articiaS.h"
-#include "smbus.h"
-#include "via686.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#undef DEBUG
-
-struct dimm_bank {
- uint8 used; /* Bank is populated */
- uint32 rows; /* Number of row addresses */
- uint32 columns; /* Number of column addresses */
- uint8 registered; /* SIMM is registered */
- uint8 ecc; /* SIMM has ecc */
- uint8 burst_len; /* Supported burst lengths */
- uint32 cas_lat; /* Supported CAS latencies */
- uint32 cas_used; /* CAS to use (not set by user) */
- uint32 trcd; /* RAS to CAS latency */
- uint32 trp; /* Precharge latency */
- uint32 tclk_hi; /* SDRAM cycle time (highest CAS latency) */
- uint32 tclk_2hi; /* SDRAM second highest CAS latency */
- uint32 size; /* Size of bank in bytes */
- uint8 auto_refresh; /* Module supports auto refresh */
- uint32 refresh_time; /* Refresh time (in ns) */
-};
-
-
-/*
-** Based in part on the evb64260 code
-*/
-
-/*
- * translate ns.ns/10 coding of SPD timing values
- * into 10 ps unit values
- */
-static inline unsigned short NS10to10PS (unsigned char spd_byte)
-{
- unsigned short ns, ns10;
-
- /* isolate upper nibble */
- ns = (spd_byte >> 4) & 0x0F;
- /* isolate lower nibble */
- ns10 = (spd_byte & 0x0F);
-
- return (ns * 100 + ns10 * 10);
-}
-
-/*
- * translate ns coding of SPD timing values
- * into 10 ps unit values
- */
-static inline unsigned short NSto10PS (unsigned char spd_byte)
-{
- return (spd_byte * 100);
-}
-
-
-long detect_sdram (uint8 * rom, int dimmNum, struct dimm_bank *banks)
-{
- int dimm_address = (dimmNum == 0) ? SM_DIMM0_ADDR : SM_DIMM1_ADDR;
- uint32 busclock = gd->bus_clk;
- uint32 memclock = busclock;
- uint32 tmemclock = 1000000000 / (memclock / 100);
- uint32 datawidth;
-
- if (sm_get_data (rom, dimm_address) == 0) {
- /* Nothing in slot, make both banks empty */
- debug ("Slot %d: vacant\n", dimmNum);
- banks[0].used = 0;
- banks[1].used = 0;
- return 0;
- }
-
- if (rom[2] != 0x04) {
- debug ("Slot %d: No SDRAM\n", dimmNum);
- banks[0].used = 0;
- banks[1].used = 0;
- return 0;
- }
-
- /* Determine number of banks/rows */
- if (rom[5] == 1) {
- banks[0].used = 1;
- banks[1].used = 0;
- } else {
- banks[0].used = 1;
- banks[1].used = 1;
- }
-
- /* Determine number of row addresses */
- if (rom[3] & 0xf0) {
- /* Different banks sizes */
- banks[0].rows = rom[3] & 0x0f;
- banks[1].rows = (rom[3] & 0xf0) >> 4;
- } else {
- /* Equal sized banks */
- banks[0].rows = rom[3] & 0x0f;
- banks[1].rows = banks[0].rows;
- }
-
- /* Determine number of column addresses */
- if (rom[4] & 0xf0) {
- /* Different bank sizes */
- banks[0].columns = rom[4] & 0x0f;
- banks[1].columns = (rom[4] & 0xf0) >> 4;
- } else {
- banks[0].columns = rom[4] & 0x0f;
- banks[1].columns = banks[0].columns;
- }
-
- /* Check Jedec revision, and modify row/column accordingly */
- if (rom[62] > 0x10) {
- if (banks[0].rows <= 3)
- banks[0].rows += 15;
- if (banks[1].rows <= 3)
- banks[1].rows += 15;
- if (banks[0].columns <= 3)
- banks[0].columns += 15;
- if (banks[0].columns <= 3)
- banks[0].columns += 15;
- }
-
- /* Check registered/unregisterd */
- if (rom[21] & 0x12) {
- banks[0].registered = 1;
- banks[1].registered = 1;
- } else {
- banks[0].registered = 0;
- banks[1].registered = 0;
- }
-
-#ifdef CONFIG_ECC
- /* Check parity/ECC */
- banks[0].ecc = (rom[11] == 0x02);
- banks[1].ecc = (rom[11] == 0x02);
-#endif
-
- /* Find burst lengths supported */
- banks[0].burst_len = rom[16] & 0x8f;
- banks[1].burst_len = rom[16] & 0x8f;
-
- /* Find possible cas latencies */
- banks[0].cas_lat = rom[18] & 0x7F;
- banks[1].cas_lat = rom[18] & 0x7F;
-
- /* RAS/CAS latency */
- banks[0].trcd = (NSto10PS (rom[29]) + (tmemclock - 1)) / tmemclock;
- banks[1].trcd = (NSto10PS (rom[29]) + (tmemclock - 1)) / tmemclock;
-
- /* Precharge latency */
- banks[0].trp = (NSto10PS (rom[27]) + (tmemclock - 1)) / tmemclock;
- banks[1].trp = (NSto10PS (rom[27]) + (tmemclock - 1)) / tmemclock;
-
- /* highest CAS latency */
- banks[0].tclk_hi = NS10to10PS (rom[9]);
- banks[1].tclk_hi = NS10to10PS (rom[9]);
-
- /* second highest CAS latency */
- banks[0].tclk_2hi = NS10to10PS (rom[23]);
- banks[1].tclk_2hi = NS10to10PS (rom[23]);
-
- /* bank sizes */
- datawidth = rom[13] & 0x7f;
- banks[0].size =
- (1L << (banks[0].rows + banks[0].columns)) *
- /* FIXME datawidth */ 8 * rom[17];
- if (rom[13] & 0x80)
- banks[1].size = 2 * banks[0].size;
- else
- banks[1].size = (1L << (banks[1].rows + banks[1].columns)) *
- /* FIXME datawidth */ 8 * rom[17];
-
- /* Refresh */
- if (rom[12] & 0x80) {
- banks[0].auto_refresh = 1;
- banks[1].auto_refresh = 1;
- } else {
- banks[0].auto_refresh = 0;
- banks[1].auto_refresh = 0;
- }
-
- switch (rom[12] & 0x7f) {
- case 0:
- banks[0].refresh_time = (1562500 + (tmemclock - 1)) / tmemclock;
- banks[1].refresh_time = (1562500 + (tmemclock - 1)) / tmemclock;
- break;
- case 1:
- banks[0].refresh_time = (390600 + (tmemclock - 1)) / tmemclock;
- banks[1].refresh_time = (390600 + (tmemclock - 1)) / tmemclock;
- break;
- case 2:
- banks[0].refresh_time = (781200 + (tmemclock - 1)) / tmemclock;
- banks[1].refresh_time = (781200 + (tmemclock - 1)) / tmemclock;
- break;
- case 3:
- banks[0].refresh_time = (3125000 + (tmemclock - 1)) / tmemclock;
- banks[1].refresh_time = (3125000 + (tmemclock - 1)) / tmemclock;
- break;
- case 4:
- banks[0].refresh_time = (6250000 + (tmemclock - 1)) / tmemclock;
- banks[1].refresh_time = (6250000 + (tmemclock - 1)) / tmemclock;
- break;
- case 5:
- banks[0].refresh_time = (12500000 + (tmemclock - 1)) / tmemclock;
- banks[1].refresh_time = (12500000 + (tmemclock - 1)) / tmemclock;
- break;
- default:
- banks[0].refresh_time = 0x100; /* Default of Articia S */
- banks[1].refresh_time = 0x100;
- break;
- }
-
-#ifdef DEBUG
- printf ("\nInformation for SIMM bank %ld:\n", dimmNum);
- printf ("Number of banks: %ld\n", banks[0].used + banks[1].used);
- printf ("Number of row addresses: %ld\n", banks[0].rows);
- printf ("Number of coumns addresses: %ld\n", banks[0].columns);
- printf ("SIMM is %sregistered\n",
- banks[0].registered == 0 ? "not " : "");
-#ifdef CONFIG_ECC
- printf ("SIMM %s ECC\n",
- banks[0].ecc == 1 ? "supports" : "doesn't support");
-#endif
- printf ("Supported burst lenghts: %s %s %s %s %s\n",
- banks[0].burst_len & 0x08 ? "8" : " ",
- banks[0].burst_len & 0x04 ? "4" : " ",
- banks[0].burst_len & 0x02 ? "2" : " ",
- banks[0].burst_len & 0x01 ? "1" : " ",
- banks[0].burst_len & 0x80 ? "PAGE" : " ");
- printf ("Supported CAS latencies: %s %s %s\n",
- banks[0].cas_lat & 0x04 ? "CAS 3" : " ",
- banks[0].cas_lat & 0x02 ? "CAS 2" : " ",
- banks[0].cas_lat & 0x01 ? "CAS 1" : " ");
- printf ("RAS to CAS latency: %ld\n", banks[0].trcd);
- printf ("Precharge latency: %ld\n", banks[0].trp);
- printf ("SDRAM highest CAS latency: %ld\n", banks[0].tclk_hi);
- printf ("SDRAM 2nd highest CAS latency: %ld\n", banks[0].tclk_2hi);
- printf ("SDRAM data width: %ld\n", datawidth);
- printf ("Auto Refresh %ssupported\n",
- banks[0].auto_refresh ? "" : "not ");
- printf ("Refresh time: %ld clocks\n", banks[0].refresh_time);
- if (banks[0].used)
- printf ("Bank 0 size: %ld MB\n", banks[0].size / 1024 / 1024);
- if (banks[1].used)
- printf ("Bank 1 size: %ld MB\n", banks[1].size / 1024 / 1024);
-
- printf ("\n");
-#endif
-
- sm_term ();
- return 1;
-}
-
-void select_cas (struct dimm_bank *banks, uint8 fast)
-{
- if (!banks[0].used) {
- banks[0].cas_used = 0;
- banks[0].cas_used = 0;
- return;
- }
-
- if (fast) {
- /* Search for fast CAS */
- uint32 i;
- uint32 c = 0x01;
-
- for (i = 1; i < 5; i++) {
- if (banks[0].cas_lat & c) {
- banks[0].cas_used = i;
- banks[1].cas_used = i;
- debug ("Using CAS %d (fast)\n", i);
- return;
- }
- c <<= 1;
- }
-
- /* Default to CAS 3 */
- banks[0].cas_used = 3;
- banks[1].cas_used = 3;
- debug ("Using CAS 3 (fast)\n");
-
- return;
- } else {
- /* Search for slow cas */
- uint32 i;
- uint32 c = 0x08;
-
- for (i = 4; i > 1; i--) {
- if (banks[0].cas_lat & c) {
- banks[0].cas_used = i;
- banks[1].cas_used = i;
- debug ("Using CAS %d (slow)\n", i);
- return;
- }
- c >>= 1;
- }
-
- /* Default to CAS 3 */
- banks[0].cas_used = 3;
- banks[1].cas_used = 3;
- debug ("Using CAS 3 (slow)\n");
-
- return;
- }
-
- banks[0].cas_used = 3;
- banks[1].cas_used = 3;
- debug ("Using CAS 3\n");
-
- return;
-}
-
-uint32 get_reg_setting (uint32 banks, uint32 rows, uint32 columns, uint32 size)
-{
- uint32 i;
-
- struct RowColumnSize {
- uint32 banks;
- uint32 rows;
- uint32 columns;
- uint32 size;
- uint32 register_value;
- };
-
- struct RowColumnSize rcs_map[] = {
- /* Sbk Radr Cadr MB Value */
- {1, 11, 8, 8, 0x00840f00},
- {1, 11, 9, 16, 0x00925f00},
- {1, 11, 10, 32, 0x00a64f00},
- {2, 12, 8, 32, 0x00c55f00},
- {2, 12, 9, 64, 0x00d66f00},
- {2, 12, 10, 128, 0x00e77f00},
- {2, 12, 11, 256, 0x00ff8f00},
- {2, 13, 11, 512, 0x00ff9f00},
- {0, 0, 0, 0, 0x00000000}
- };
-
-
- i = 0;
-
- while (rcs_map[i].banks != 0) {
- if (rows == rcs_map[i].rows
- && columns == rcs_map[i].columns
- && (size / 1024 / 1024) == rcs_map[i].size)
- return rcs_map[i].register_value;
-
- i++;
- }
-
- return 0;
-}
-
-uint32 burst_to_len (uint32 support)
-{
- if (support & 0x80)
- return 0x7;
- else if (support & 0x8)
- return 0x3;
- else if (support & 0x4)
- return 0x2;
- else if (support & 0x2)
- return 0x1;
- else if (support & 0x1)
- return 0x0;
-
- return 0;
-}
-
-long articiaS_ram_init (void)
-{
- register uint32 i;
- register uint32 value1;
- register uint32 value2;
- uint8 rom[128];
- uint32 burst_len;
- uint32 burst_support;
- uint32 total_ram = 0;
-
- struct dimm_bank banks[4]; /* FIXME: Move to initram */
- uint32 busclock = gd->bus_clk;
- uint32 memclock = busclock;
- uint32 reg32;
- uint32 refresh_clocks;
- uint8 auto_refresh;
-
- memset (banks, 0, sizeof (struct dimm_bank) * 4);
-
- detect_sdram (rom, 0, &banks[0]);
- detect_sdram (rom, 1, &banks[2]);
-
- for (i = 0; i < 4; i++) {
- total_ram = total_ram + (banks[i].used * banks[i].size);
- }
-
- pci_write_cfg_long (0, 0, GLOBALINFO0, 0x117430c0);
- pci_write_cfg_long (0, 0, HBUSACR0, 0x1f0100b0);
- pci_write_cfg_long (0, 0, SRAM_CR, 0x00f12000); /* Note: Might also try 0x00f10000 (original: 0x00f12000) */
- pci_write_cfg_byte (0, 0, DRAM_RAS_CTL0, 0x3f);
- pci_write_cfg_byte (0, 0, DRAM_RAS_CTL1, 0x00); /* was: 0x04); */
- pci_write_cfg_word (0, 0, DRAM_ECC0, 0x2020); /* was: 0x2400); No ECC yet */
-
- /* FIXME: Move this stuff to seperate function, like setup_dimm_bank */
- if (banks[0].used) {
- value1 = get_reg_setting (banks[0].used + banks[1].used,
- banks[0].rows, banks[0].columns,
- banks[0].size);
- } else {
- value1 = 0;
- }
-
- if (banks[1].used) {
- value2 = get_reg_setting (banks[0].used + banks[1].used,
- banks[1].rows, banks[1].columns,
- banks[1].size);
- } else {
- value2 = 0;
- }
-
- pci_write_cfg_long (0, 0, DIMM0_B0_SCR0, value1);
- pci_write_cfg_long (0, 0, DIMM0_B1_SCR0, value2);
-
- debug ("DIMM0_B0_SCR0 = 0x%08x\n", value1);
- debug ("DIMM0_B1_SCR0 = 0x%08x\n", value2);
-
- if (banks[2].used) {
- value1 = get_reg_setting (banks[2].used + banks[3].used,
- banks[2].rows, banks[2].columns,
- banks[2].size);
- } else {
- value1 = 0;
- }
-
- if (banks[3].used) {
- value2 = get_reg_setting (banks[2].used + banks[3].used,
- banks[3].rows, banks[3].columns,
- banks[3].size);
- } else {
- value2 = 0;
- }
-
- pci_write_cfg_long (0, 0, DIMM1_B2_SCR0, value1);
- pci_write_cfg_long (0, 0, DIMM1_B3_SCR0, value2);
-
- debug ("DIMM0_B2_SCR0 = 0x%08x\n", value1);
- debug ("DIMM0_B3_SCR0 = 0x%08x\n", value2);
-
- pci_write_cfg_long (0, 0, DIMM2_B4_SCR0, 0);
- pci_write_cfg_long (0, 0, DIMM2_B5_SCR0, 0);
- pci_write_cfg_long (0, 0, DIMM3_B6_SCR0, 0);
- pci_write_cfg_long (0, 0, DIMM3_B7_SCR0, 0);
-
- /* Determine timing */
- select_cas (&banks[0], 0);
- select_cas (&banks[2], 0);
-
- /* FIXME: What about write recovery */
- /* Auto refresh Precharge */
-#if 0
- reg32 = (0x3 << 13) | (0x7 << 10) | ((banks[0].trp - 2) << 8) |
- /* Write recovery CAS Latency */
- (0x1 << 6) | (banks[0].cas_used << 4) |
- /* RAS/CAS latency */
- ((banks[0].trcd - 1) << 0);
-
- reg32 |= ((0x3 << 13) | (0x7 << 10) | ((banks[2].trp - 2) << 8) |
- (0x1 << 6) | (banks[2].cas_used << 4) |
- ((banks[2].trcd - 1) << 0)) << 16;
-#else
- if (100000000 == gd->bus_clk)
- reg32 = 0x71737173;
- else
- reg32 = 0x69736973;
-#endif
- pci_write_cfg_long (0, 0, DIMM0_TCR0, reg32);
- debug ("DIMM0_TCR0 = 0x%08x\n", reg32);
-
- /* Write default in DIMM2/3 (not used on A1) */
- pci_write_cfg_long (0, 0, DIMM2_TCR0, 0x7d737d73);
-
-
- /* Determine buffered/unbuffered mode for each SIMM. Uses first bank as reference (second, if present, uses the same) */
- reg32 = pci_read_cfg_long (0, 0, DRAM_GCR0);
- reg32 &= 0xFF00FFFF;
-
-#if 0
- if (banks[0].used && banks[0].registered)
- reg32 |= 0x1 << 16;
-
- if (banks[2].used && banks[2].registered)
- reg32 |= 0x1 << 18;
-#else
- if (banks[0].registered || banks[2].registered)
- reg32 |= 0x55 << 16;
-#endif
- pci_write_cfg_long (0, 0, DRAM_GCR0, reg32);
- debug ("DRAM_GCR0 = 0x%08x\n", reg32);
-
- /* Determine refresh */
- refresh_clocks = 0xffffffff;
- auto_refresh = 1;
-
- for (i = 0; i < 4; i++) {
- if (banks[i].used) {
- if (banks[i].auto_refresh == 0)
- auto_refresh = 0;
- if (banks[i].refresh_time < refresh_clocks)
- refresh_clocks = banks[i].refresh_time;
- }
- }
-
-
-#if 1
- /* It seems this is suggested by the ArticiaS data book */
- if (100000000 == gd->bus_clk)
- refresh_clocks = 1561;
- else
- refresh_clocks = 2083;
-#endif
-
-
- debug ("Refresh set to %ld clocks, auto refresh %s\n",
- refresh_clocks, auto_refresh ? "on" : "off");
-
- pci_write_cfg_long (0, 0, DRAM_REFRESH0,
- (1 << 16) | (1 << 15) | (auto_refresh << 12) |
- (refresh_clocks));
- debug ("DRAM_REFRESH0 = 0x%08x\n",
- (1 << 16) | (1 << 15) | (auto_refresh << 12) |
- (refresh_clocks));
-
-/* pci_write_cfg_long(0, 0, DRAM_REFRESH0, 0x00019400); */
-
- /* Set mode registers */
- /* FIXME: For now, set same burst len for all modules. Dunno if that's necessary */
- /* Find a common burst len */
- burst_support = 0xff;
-
- if (banks[0].used)
- burst_support = banks[0].burst_len;
- if (banks[1].used)
- burst_support = banks[1].burst_len;
- if (banks[2].used)
- burst_support = banks[2].burst_len;
- if (banks[3].used)
- burst_support = banks[3].burst_len;
-
- /*
- ** Mode register:
- ** Bits Use
- ** 0-2 Burst len
- ** 3 Burst type (0 = sequential, 1 = interleave)
- ** 4-6 CAS latency
- ** 7-8 Operation mode (0 = default, all others invalid)
- ** 9 Write burst
- ** 10-11 Reserved
- **
- ** Mode register burst table:
- ** A2 A1 A0 lenght
- ** 0 0 0 1
- ** 0 0 1 2
- ** 0 1 0 4
- ** 0 1 1 8
- ** 1 0 0 invalid
- ** 1 0 1 invalid
- ** 1 1 0 invalid
- ** 1 1 1 page (only valid for non-interleaved)
- */
-
- burst_len = burst_to_len (burst_support);
- burst_len = 2; /* FIXME */
-
- if (banks[0].used) {
- pci_write_cfg_word (0, 0, DRAM_PCR0,
- 0x8000 | burst_len | (banks[0].cas_used << 4));
- debug ("Mode bank 0: 0x%08x\n",
- 0x8000 | burst_len | (banks[0].cas_used << 4));
- } else {
- /* Seems to be needed to disable the bank */
- pci_write_cfg_word (0, 0, DRAM_PCR0, 0x0000 | 0x032);
- }
-
- if (banks[1].used) {
- pci_write_cfg_word (0, 0, DRAM_PCR0,
- 0x9000 | burst_len | (banks[1].cas_used << 4));
- debug ("Mode bank 1: 0x%08x\n",
- 0x8000 | burst_len | (banks[1].cas_used << 4));
- } else {
- /* Seems to be needed to disable the bank */
- pci_write_cfg_word (0, 0, DRAM_PCR0, 0x1000 | 0x032);
- }
-
-
- if (banks[2].used) {
- pci_write_cfg_word (0, 0, DRAM_PCR0,
- 0xa000 | burst_len | (banks[2].cas_used << 4));
- debug ("Mode bank 2: 0x%08x\n",
- 0x8000 | burst_len | (banks[2].cas_used << 4));
- } else {
- /* Seems to be needed to disable the bank */
- pci_write_cfg_word (0, 0, DRAM_PCR0, 0x2000 | 0x032);
- }
-
-
- if (banks[3].used) {
- pci_write_cfg_word (0, 0, DRAM_PCR0,
- 0xb000 | burst_len | (banks[3].cas_used << 4));
- debug ("Mode bank 3: 0x%08x\n",
- 0x8000 | burst_len | (banks[3].cas_used << 4));
- } else {
- /* Seems to be needed to disable the bank */
- pci_write_cfg_word (0, 0, DRAM_PCR0, 0x3000 | 0x032);
- }
-
-
- pci_write_cfg_word (0, 0, 0xba, 0x00);
-
- return total_ram;
-}
-
-extern int drv_isa_kbd_init (void);
-
-int last_stage_init (void)
-{
- drv_isa_kbd_init ();
- return 0;
-}
-
-int overwrite_console (void)
-{
- return (0);
-}
-
-#define in_8 read_byte
-#define out_8 write_byte
-
-static __inline__ unsigned long get_msr (void)
-{
- unsigned long msr;
-
- asm volatile ("mfmsr %0":"=r" (msr):);
-
- return msr;
-}
-
-static __inline__ void set_msr (unsigned long msr)
-{
- asm volatile ("mtmsr %0"::"r" (msr));
-}
-
-int board_early_init_f (void)
-{
- unsigned char c_value = 0;
- unsigned long msr;
-
- /* Basic init of PS/2 keyboard (needed for some reason)... */
- /* Ripped from John's code */
- while ((in_8 ((unsigned char *) 0xfe000064) & 0x02) != 0);
- out_8 ((unsigned char *) 0xfe000064, 0xaa);
- while ((in_8 ((unsigned char *) 0xfe000064) & 0x01) == 0);
- c_value = in_8 ((unsigned char *) 0xfe000060);
- while ((in_8 ((unsigned char *) 0xfe000064) & 0x02) != 0);
- out_8 ((unsigned char *) 0xfe000064, 0xab);
- while ((in_8 ((unsigned char *) 0xfe000064) & 0x01) == 0);
- c_value = in_8 ((unsigned char *) 0xfe000060);
- while ((in_8 ((unsigned char *) 0xfe000064) & 0x02) != 0);
- out_8 ((unsigned char *) 0xfe000064, 0xae);
-/* while ((in_8((unsigned char *)0xfe000064) & 0x01) == 0); */
-/* c_value = in_8((unsigned char *)0xfe000060); */
-
- /* Enable FPU */
- msr = get_msr ();
- set_msr (msr | MSR_FP);
-
- via_calibrate_bus_freq ();
-
- return 0;
-}
+++ /dev/null
-#ifndef ARTICIAS_H
-#define ARTICIAS_H
-
-#include "short_types.h"
-#include <common.h>
-
-#define REG_GROUP 0xF0
-
-/* ArticiaS registers */
-#define GLOBALINFO0 0x50
-#define GLOBALINFO1 0x51
-#define GLOBALINFO2 0x52
-#define GLOBALINFO3 0x53
-#define GLOBALCTL0 0x54
-#define GLOBALCTL1 0x55
-#define NVRAMCTL 0x56
-#define PCI1ACR0 0x58
-#define PCI1ACR1 0x59
-#define PCI1ACR2 0x5a
-#define PCI1ACR3 0x5b
-#define HBUSACR0 0x5c
-#define HBUSACR1 0x5d
-#define HBUSACR2 0x5e
-#define HBUSACR3 0x5f
-#define HOSTINT0 0x68
-#define HOSTINT1 0x69
-#define HOSTINT2 0x6a
-#define HOSTINT3 0x6b
-#define HOSTRBCR 0x70
-#define XDBCR 0x74
-
-#define LBSBCR2 0xd2
-
-
-/* Memory controller */
-
-#define DIMM0_B0_SCR0 0x90
-#define DIMM0_B1_SCR0 0x94
-#define DIMM1_B2_SCR0 0x98
-#define DIMM1_B3_SCR0 0x9c
-#define DIMM2_B4_SCR0 0xa0
-#define DIMM2_B5_SCR0 0xa4
-#define DIMM3_B6_SCR0 0xa8
-#define DIMM3_B7_SCR0 0xac
-
-#define DIMM0_TCR0 0xb0
-#define DIMM1_TCR0 0xb2
-#define DIMM2_TCR0 0xb4
-#define DIMM3_TCR0 0xb6
-
-#define DRAM_REFRESH0 0xb8
-#define DRAM_GCR0 0xc0
-#define DRAM_PCR0 0xc6
-#define DRAM_ECC0 0xc4
-#define SRAM_CR 0xc8
-#define DRAM_RAS_CTL0 0xcc
-#define DRAM_RAS_CTL1 0xcd
-
-/* Bits for REG_GROUP */
-#define REG_GROUP_MULTI (1<<1)
-#define REG_GROUP_SPECIAL (1<<3)
-#define REG_GROUP_DIAG (0x1<<4)
-#define REG_GROUP_POWER (0x2<<4)
-
-
-#define GLOBALINFO0_BO (1<<7)
-
-
-#define GLOBALINFO2_B1ARBITER (1<<6)
-
-
-#define HBUSACR0_CPUAPC (1<<0)
-#define HBUSACR0_NUMREQ_2 (0<<1)
-#define HBUSACR0_NUMREQ_3 (1<<1)
-#define HBUSACR0_NUMREQ_4 (2<<1)
-#define HBUSACR0_NUMREQ_MASK (7<<1)
-#define HBUSACR0_RAW (1<<6)
-#define HBUSACR0_WAIT (1<<7)
-#define HBUSACR0_RESERVED (0x30)
-
-
-#define HBUSACR2_BURST (1<<0)
-#define HBUSACR2_LAT (1<<1)
-
-
-#define HBUSACR3_LMWC_SM (1<<0)
-#define HBUSACR3_LMWC_PCI1 (1<<1)
-#define HBUSACR3_LMWC_PCI0 (1<<2)
-#define HBUSACR3_PMWC_PCI1 (1<<3)
-#define HBUSACR3_PMWC_PCI0 (1<<4)
-#define HBUSACR3_FKH (1<<5)
-#define HBUSACR3_92H_EN (1<<6)
-#define HBUSACR3_60H_64H_EN (1<<7)
-
-
-#define HOSTRBCR_PREFETCH (1<<4)
-
-
-#define XDBCR_HWTOXD (1<<0)
-#define XDBCR_KBTOXD (1<<1)
-#define XDBCR_RTCTOXD (1<<2)
-#define XDBCR_SCALE_1_1 (0x0<<3)
-#define XDBCR_SCALE_2_2 (0x1<<3)
-#define XDBCR_SCALE_3_2 (0x2<<3)
-#define XDBCR_SCALE_4_4 (0x3<<3)
-#define XDBCR_SCALE_5_8 (0x4<<3)
-#define XDBCR_SCALE_6_8 (0x5<<3)
-#define XDBCR_SCALE_8_8 (0x6<<3)
-#define XDBCR_SCALE_0_16 (0x7<<3)
-#define XDBCR_XDPROM (1<<7)
-
-
-#define LBSBCR2_1_RWAC (1<<2)
-
-
-/* PCI controller */
-#define ARTICIAS_PCI_CFGADDR 0xfec00cf8
-#define ARTICIAS_PCI_CFGDATA 0xfee00cfc
-
-#define ARTICIAS_PCI_BUS 0x80000000
-#define ARTICIAS_PCI_MAXSIZE 0x7cffffff
-#define ARTICIAS_PCI_PHYS 0x80000000
-
-#define ARTICIAS_SYS_BUS 0x00000000
-#define ARTICIAS_SYS_MAXSIZE 0x7fffffff
-#define ARTICIAS_SYS_PHYS 0x00000000
-
-#define ARTICIAS_PCIIO_BUS 0x00800000
-#define ARTICIAS_PCIIO_MAXSIZE 0x003fffff
-#define ARTICIAS_PCIIO_PHYS 0xfe800000
-
-#define ARTICIAS_ISAIO_BUS 0x00002000
-#define ARTICIAS_ISAIO_MAXSIZE 0x0000d000
-#define ARTICIAS_ISAIO_PHYS 0xfe002000
-
-
-/* Prototypes */
-long articiaS_ram_init(void);
-void articiaS_pci_init(void);
-
-
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Hyperion Entertainment, Hans-JoergF@hyperion-entertainment.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include "memio.h"
-#include "articiaS.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#undef ARTICIA_PCI_DEBUG
-
-#ifdef ARTICIA_PCI_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-struct pci_controller articiaS_hose;
-
-long irq_alloc(long wanted);
-
-static pci_dev_t pci_hose_find_class(struct pci_controller *hose, int bus, short find_class, int index);
-static int articiaS_init_vga(void);
-static void pci_cfgfunc_dummy(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table);
-unsigned char pci_irq_alloc(void);
-
-extern void via_cfgfunc_via686(struct pci_controller * host, pci_dev_t dev, struct pci_config_table *table);
-extern void via_cfgfunc_ide_init(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table);
-extern void via_init_irq_routing(uint8 []);
-extern void via_init_afterscan(void);
-
-#define cfgfunc_via686 1
-#define cfgfunc_dummy 2
-#define cfgfunc_ide_init 3
-
-static struct pci_config_table config_table[] =
-{
- {
- 0x1106, PCI_ANY_ID, PCI_CLASS_BRIDGE_ISA, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- (void *)cfgfunc_via686, {0, 0, 0}
- },
- {
- 0x1106, PCI_ANY_ID, PCI_ANY_ID, 0,7,4,
- (void *)cfgfunc_dummy, {0,0,0}
- },
- {
- 0x1106, 0x3068, PCI_ANY_ID, 0, 7, PCI_ANY_ID,
- (void *)cfgfunc_dummy, {0,0,0}
- },
- {
- 0x1106, PCI_ANY_ID, PCI_ANY_ID, 0,7,1,
- (void *)cfgfunc_ide_init, {0,0,0}
- },
- {
- 0,
- }
-};
-
-
-void pci_cfgfunc_dummy(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table)
-{
-
-
-}
-
-unsigned long irq_penalties[16] =
-{
- 1000, /* 0:timer */
- 1000, /* 1:keyboard */
- 1000, /* 2:cascade */
- 50, /* 3:serial (COM2) */
- 50, /* 4:serial (COM1) */
- 4, /* 5:USB2 */
- 100, /* 6:floppy */
- 3, /* 7:parallel */
- 50, /* 8:AC97/MC97 */
- 0, /* 9: */
- 3, /* 10:: */
- 0, /* 11: */
- 3, /* 12: USB1 */
- 0, /* 13: */
- 100, /* 14: ide0 */
- 100, /* 15: ide1 */
-};
-
-
-/*
- * The following defines a hard-coded interrupt mapping for the
- * know devices on the board.
- * If a device isn't found here, assumed to be a device that's
- * plugged into a PCI or AGP slot
- * NOTE: This table is machine dependant.
- */
-
-struct pci_irq_fixup_table
-{
- uint8 bus; /* Bus number */
- uint8 device; /* Device number */
- uint8 func; /* Function number */
- uint8 interrupt; /* Interrupt to use (0xff to disable) */
-};
-
-struct pci_irq_fixup_table fixuptab [] =
-{
- { 0, 0, 0, 0xff}, /* Articia S host bridge */
- { 0, 1, 0, 0xff}, /* Articia S AGP bridge */
-/* { 0, 6, 0, 0x05}, /###* 3COM ethernet */
- { 0, 7, 0, 0xff}, /* VIA southbridge */
- { 0, 7, 1, 0x0e}, /* IDE controller in legacy mode */
-/* { 0, 7, 2, 0x05}, /###* First USB controller */
-/* { 0, 7, 3, 0x0c}, /###* Second USB controller (shares interrupt with ethernet) */
- { 0, 7, 4, 0xff}, /* ACPI Power Management */
-/* { 0, 7, 5, 0x08}, /###* AC97 */
-/* { 0, 7, 6, 0x08}, /###* MC97 */
- { 0xff, 0xff, 0xff, 0xff}
-};
-
-
-/*
- * This table maps IRQ's to PCI interrupts
- */
-
-uint8 pci_intmap[4] = {0, 0, 0, 0};
-
-/*
- * Map PCI slots to interrupt routings
- * This table lists the device number assigned to a card inserted
- * into the slot, along with a permutation for the slot's IRQ routing.
- * NOTE: This table is machine dependant.
- */
-
-struct pci_slot_irq_routing
-{
- uint8 bus;
- uint8 device;
-
- uint8 ints[4];
-};
-
-struct pci_slot_irq_routing amigaone_pci_routing[] =
-{
- {0, 8, {0, 1, 2, 3}}, /* Slot 1 (left of riser slot) */
- {0, 9, {1, 2, 3, 0}}, /* Slot 2 (middle slot) */
- {0, 10, {2, 3, 0, 1}}, /* Slot 3 (leftmost slot) */
- {1, 0, {1, 0, 2, 3}}, /* AGP slot (only IRQA and IRQB) */
- {1, 1, {1, 2, 3, 0}}, /* PCI slot on AGP bus */
- {0, 6, {3, 3, 3, 3}}, /* On board ethernet */
- {0, 7, {0, 1, 2, 3}}, /* Southbridge */
- {0xff, 0, {0, 0, 0, 0}}
-};
-
-void articiaS_pci_irq_init(void)
-{
- char *s;
-
- s = getenv("pci_irqa");
- if (s)
- pci_intmap[0] = simple_strtoul (s, NULL, 10);
- else
- pci_intmap[0] = pci_irq_alloc();
-
- s = getenv("pci_irqb");
- if (s)
- pci_intmap[1] = simple_strtoul (s, NULL, 10);
- else
- pci_intmap[1] = pci_irq_alloc();
-
- s = getenv("pci_irqc");
- if (s)
- pci_intmap[2] = simple_strtoul (s, NULL, 10);
- else
- pci_intmap[2] = pci_irq_alloc();
-
- s = getenv("pci_irqd");
- if (s)
- pci_intmap[3] = simple_strtoul (s, NULL, 10);
- else
- pci_intmap[3] = pci_irq_alloc();
-}
-
-
-unsigned char pci_irq_alloc(void)
-{
- int i;
- int interrupt = 10;
- unsigned long min_penalty = 1000;
-
- /* Search for the minimal penalty, favoring interrupts at the end */
- for (i = 0; i < 16; i++)
- {
- if (irq_penalties[i] <= min_penalty)
- {
- interrupt = i;
- min_penalty = irq_penalties[i];
- }
- }
-
- PRINTF("pci_irq_alloc: Minimal penalty is %ld for %d\n", min_penalty, interrupt);
-
- irq_penalties[interrupt]++;
-
- return interrupt;
-}
-
-
-void articiaS_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
-{
- int8 bus, device, func, pin, line;
- int i;
-
- bus = PCI_BUS(dev);
- device = PCI_DEV(dev);
- func = PCI_FUNC(dev);
-
- PRINTF("Fixup irq of %d:%d.%d\n", bus, device, func);
-
- /* Search for the device in the table */
- for (i = 0; fixuptab[i].bus != 0xff; i++)
- {
- if (bus == fixuptab[i].bus && device == fixuptab[i].device && func == fixuptab[i].func)
- {
- /* If the device needs an interrupt, write it */
- if (fixuptab[i].interrupt != 0xff)
- {
- PRINTF("Assigning IRQ %d (fixed)\n", fixuptab[i].interrupt);
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, fixuptab[i].interrupt);
- }
- else
- {
- /* Otherwise, see if it wants an interrupt, and disable it if needed */
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
- if (pin)
- {
- PRINTF("Disabling IRQ\n");
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 0xff);
- }
- }
-
- return;
- }
- }
-
- /* If we get here, we have another PCI device in a slot... find the appropriate IRQ */
-
- /* Find matching pin */
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
- pin--;
-
- /* Search for it's map */
- for (i = 0; amigaone_pci_routing[i].bus != 0xff; i++)
- {
- if (bus == amigaone_pci_routing[i].bus && device == amigaone_pci_routing[i].device)
- {
- line = pci_intmap[amigaone_pci_routing[i].ints[pin]];
- PRINTF("Assigning IRQ %d (pin %d)\n", line, pin);
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, line);
- return;
- }
- }
-
- PRINTF("Unkonwn PCI device found\n");
-}
-
-void articiaS_pci_init (void)
-{
- int i;
- char *s;
-
- PRINTF("atriciaS_pci_init\n");
-
- /* Why aren't these relocated?? */
- for (i=0; config_table[i].config_device; i++)
- {
- switch((int)config_table[i].config_device)
- {
- case cfgfunc_via686: config_table[i].config_device = via_cfgfunc_via686; break;
- case cfgfunc_dummy: config_table[i].config_device = pci_cfgfunc_dummy; break;
- case cfgfunc_ide_init: config_table[i].config_device = via_cfgfunc_ide_init; break;
- default: PRINTF("Error: Unknown constant\n");
- }
- }
-
- articiaS_hose.first_busno = 0;
- articiaS_hose.last_busno = 0xff;
- articiaS_hose.config_table = config_table;
- articiaS_hose.fixup_irq = articiaS_pci_fixup_irq;
-
- articiaS_pci_irq_init();
-
- /* System memory */
- pci_set_region(articiaS_hose.regions + 0,
- ARTICIAS_SYS_BUS,
- ARTICIAS_SYS_PHYS,
- ARTICIAS_SYS_MAXSIZE,
- PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-
- /* PCI memory space */
- pci_set_region(articiaS_hose.regions + 1,
- ARTICIAS_PCI_BUS,
- ARTICIAS_PCI_PHYS,
- ARTICIAS_PCI_MAXSIZE,
- PCI_REGION_MEM);
-
- /* PCI io space */
- pci_set_region(articiaS_hose.regions + 2,
- ARTICIAS_PCIIO_BUS,
- ARTICIAS_PCIIO_PHYS,
- ARTICIAS_PCIIO_MAXSIZE,
- PCI_REGION_IO);
-
- /* PCI/ISA io space */
- pci_set_region(articiaS_hose.regions + 3,
- ARTICIAS_ISAIO_BUS,
- ARTICIAS_ISAIO_PHYS,
- ARTICIAS_ISAIO_MAXSIZE,
- PCI_REGION_IO);
-
-
- articiaS_hose.region_count = 4;
-
- pci_setup_indirect(&articiaS_hose, ARTICIAS_PCI_CFGADDR, ARTICIAS_PCI_CFGDATA);
- PRINTF("Registering articia hose...\n");
- pci_register_hose(&articiaS_hose);
- PRINTF("Enabling AGP...\n");
- pci_write_config_byte(PCI_BDF(0,0,0), 0x58, 0x01);
- PRINTF("Scanning bus...\n");
- articiaS_hose.last_busno = pci_hose_scan(&articiaS_hose);
-
- via_init_irq_routing(pci_intmap);
-
- PRINTF("After-Scan results:\n");
- PRINTF("Bus range: %d - %d\n", articiaS_hose.first_busno , articiaS_hose.last_busno);
-
- via_init_afterscan();
-
- pci_write_config_byte(PCI_BDF(0,1,0), PCI_INTERRUPT_LINE, 0xFF);
-
- s = getenv("as_irq");
- if (s)
- {
- pci_write_config_byte(PCI_BDF(0,0,0), PCI_INTERRUPT_LINE, simple_strtoul (s, NULL, 10));
- }
-
- s = getenv("x86_run_bios");
- if (!s || (s && strcmp(s, "on")==0))
- {
- if (articiaS_init_vga() == -1)
- {
- /* If the VGA didn't init and we have stdout set to VGA, reset to serial */
-/* s = getenv("stdout"); */
-/* if (s && strcmp(s, "vga") == 0) */
-/* { */
-/* setenv("stdout", "serial"); */
-/* } */
- }
- }
- pci_write_config_byte(PCI_BDF(0,1,0), PCI_INTERRUPT_LINE, 0xFF);
-
-}
-
-pci_dev_t pci_hose_find_class(struct pci_controller *hose, int bus, short find_class, int index)
-{
- unsigned int sub_bus, found_multi=0;
- unsigned short vendor, class;
- unsigned char header_type;
- pci_dev_t dev;
- u8 c1, c2;
-
- sub_bus = bus;
-
- for (dev = PCI_BDF(bus,0,0);
- dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
- dev += PCI_BDF(0,0,1))
- {
- if ( dev == PCI_BDF(hose->first_busno,0,0) )
- continue;
-
- if (PCI_FUNC(dev) && !found_multi)
- continue;
-
- pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
-
- pci_hose_read_config_word(hose, dev, PCI_VENDOR_ID, &vendor);
-
- if (vendor != 0xffff && vendor != 0x0000)
- {
-
- if (!PCI_FUNC(dev))
- found_multi = header_type & 0x80;
- pci_hose_read_config_byte(hose, dev, 0x0B, &c1);
- pci_hose_read_config_byte(hose, dev, 0x0A, &c2);
- class = c1<<8 | c2;
- /*printf("At %02x:%02x:%02x: class %x\n", */
- /* PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), class); */
- if (class == find_class)
- {
- if (index == 0)
- return dev;
- else index--;
- }
- }
- }
-
- return ~0;
-}
-
-
-/*
- * For a given bus number, find the bridge on this hose that provides this
- * bus number. The function scans for bridges and peeks config space offset
- * 0x19 (PCI_SECONDARY_BUS).
- */
-pci_dev_t pci_find_bridge_for_bus(struct pci_controller *hose, int busnr)
-{
- pci_dev_t dev;
- int bus;
- unsigned int found_multi=0;
- unsigned char header_type;
- unsigned short vendor;
- unsigned char secondary_bus;
-
- if (hose == NULL) hose = &articiaS_hose;
-
- if (busnr < hose->first_busno || busnr > hose->last_busno) return PCI_ANY_ID; /* Not in range */
-
- /*
- * The bridge must be on a lower bus number
- */
- for (bus = hose->first_busno; bus < busnr; bus++)
- {
- for (dev = PCI_BDF(bus,0,0);
- dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
- dev += PCI_BDF(0,0,1))
- {
- if ( dev == PCI_BDF(hose->first_busno,0,0) )
- continue;
-
- if (PCI_FUNC(dev) && !found_multi)
- continue;
-
- pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
-
- pci_hose_read_config_word(hose, dev, PCI_VENDOR_ID, &vendor);
-
- if (vendor != 0xffff && vendor != 0x0000)
- {
-
- if (!PCI_FUNC(dev))
- found_multi = header_type & 0x80;
- if (header_type == 1) /* Bridge device header */
- {
- pci_hose_read_config_byte(hose, dev, PCI_SECONDARY_BUS, &secondary_bus);
- if ((int)secondary_bus == busnr) return dev;
- }
-
- }
- }
- }
- return PCI_ANY_ID;
-}
-
-static short classes[] =
-{
- PCI_CLASS_DISPLAY_VGA,
- PCI_CLASS_DISPLAY_XGA,
- PCI_CLASS_DISPLAY_3D,
- PCI_CLASS_DISPLAY_OTHER,
- ~0
-};
-
-extern int execute_bios(pci_dev_t gr_dev, void *);
-
-pci_dev_t video_dev;
-
-int articiaS_init_vga (void)
-{
- extern void shutdown_bios(void);
- pci_dev_t dev = ~0;
- int busnr = 0;
- int classnr = 0;
-
- video_dev = PCI_ANY_ID;
-
- printf("VGA: ");
-
- PRINTF("Trying to initialize x86 VGA Card(s)\n");
-
- while (dev == ~0)
- {
- PRINTF("Searching for class 0x%x on bus %d\n", classes[classnr], busnr);
- /* Find the first of this class on this bus */
- dev = pci_hose_find_class(&articiaS_hose, busnr, classes[classnr], 0);
- if (dev != ~0)
- {
- PRINTF("Found VGA Card at %02x:%02x:%02x\n", PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
- break;
- }
- busnr++;
- if (busnr > articiaS_hose.last_busno)
- {
- busnr = 0;
- classnr ++;
- if (classes[classnr] == ~0)
- {
- printf("NOT PRESENT\n");
- return -1;
- }
- }
- }
-
- /*
- * If we get here we have found the first graphics card.
- * If the bus number is not 0, then it is probably behind a bridge, and the
- * bridge needs to be told to forward VGA access.
- */
-
- if (PCI_BUS(dev) != 0)
- {
- pci_dev_t bridge;
- PRINTF("Behind bridge, looking for bridge\n");
- bridge = pci_find_bridge_for_bus(&articiaS_hose, PCI_BUS(dev));
- if (dev != PCI_ANY_ID)
- {
- unsigned char agp_control_0;
- PRINTF("Got the bridge at %02x:%02x:%02x\n",
- PCI_BUS(bridge), PCI_DEV(bridge), PCI_FUNC(bridge));
- pci_hose_read_config_byte(&articiaS_hose, bridge, 0x3E, &agp_control_0);
- agp_control_0 |= 0x18;
- pci_hose_write_config_byte(&articiaS_hose, bridge, 0x3E, agp_control_0);
- PRINTF("Configured for VGA forwarding\n");
- }
- }
-
- /*
- * Now try to run the bios
- */
- PRINTF("Trying to run bios now\n");
- if (execute_bios(dev, gd->relocaddr))
- {
- printf("OK\n");
- video_dev = dev;
- }
- else
- {
- printf("ERROR\n");
- }
-
- PRINTF("Done scanning.\n");
-
- shutdown_bios();
-
- if (dev == PCI_ANY_ID) return -1;
- else return 0;
-
-}
+++ /dev/null
-#include "macros.h"
-
-
-#define GLOBALINFO0 0x50
-#define GLOBALINFO0_BO (1<<7)
-#define GLOBALINFO2_B1ARBITER (1<<6)
-#define HBUSACR0 0x5c
-#define HBUSACR2_BURST (1<<0)
-#define HBUSACR2_LAT (1<<1)
-
-#define RECEIVER_HOLDING 0
-#define TRANSMITTER_HOLDING 0
-#define INTERRUPT_ENABLE 1
-#define INTERRUPT_STATUS 2
-#define FIFO_CONTROL 2
-#define LINE_CONTROL 3
-#define MODEM_CONTROL 4
-#define LINE_STATUS 5
-#define MODEM_STATUS 6
-#define SCRATCH_PAD 7
-
-#define DIVISOR_LATCH_LSB 0
-#define DIVISOR_LATCH_MSB 1
-#define PRESCALER_DIVISION 5
-
-#define UART(x) (0x3f8+(x))
-
-#define GLOBALINFO0 0x50
-#define GLOBALINFO0_BO (1<<7)
-#define GLOBALINFO2_B1ARBITER (1<<6)
-#define HBUSACR0 0x5c
-#define HBUSACR2_BURST (1<<0)
-#define HBUSACR2_LAT (1<<1)
-
-#define SUPERIO_1 ((7 << 3) | (0))
-#define SUPERIO_2 ((7 << 3) | (1))
-
- .globl board_asm_init
-
-board_asm_init:
- mflr r29
- /* Set 'Must-set' register */
- li r3, 0
- li r4, 0
- li r5, 0x5e
- bl pci_read_cfg_byte
- ori r3, r3, (1<<1)
- xori r6, r3, (1<<1)
- li r3, 0
- bl pci_write_cfg_byte
-
- li r3, 0
- li r5, 0x52
- bl pci_read_cfg_byte
- ori r6, r3, (1<<6)
- li r3, 0
- bl pci_write_cfg_byte
-
- li r3, 0
- li r4, 0x08
- li r5, 0xd2
- bl pci_read_cfg_byte
- ori r6, r3, (1<<2)
- li r3, 0
- bl pci_write_cfg_byte
-
-
- /* Do PCI reset */
-/* li r3, 0
- li r4, 0x38
- li r5, 0x47
- bl pci_read_cfg_byte
- ori r6, r3, 0x01
- li r3, 0
- li r4, 0x38
- li r5, 0x47
- bl pci_write_cfg_byte*/
-
-
- /* Enable NVRAM for environment */
- li r3, 0
- li r4, 0
- li r5, 0x56
- li r6, 0x0B
- bl pci_write_cfg_byte
-
-
- /* Init Super-I/O chips */
-
- siowb 0x40, 0x08
- siowb 0x41, 0x01
- siowb 0x45, 0x80
- siowb 0x46, 0x60
- siowb 0x47, 0x20
- siowb 0x48, 0x01
- siowb 0x4a, 0xc4
- siowb 0x50, 0x0e
- siowb 0x51, 0x76
- siowb 0x52, 0x34
- siowb 0x54, 0x00
- siowb 0x55, 0x90
- siowb 0x56, 0x99
- siowb 0x57, 0x90
- siowb 0x85, 0x01
-
- /* Enable configuration mode for SuperIO */
- li r3, 0
- li r4, (7<<3)
- li r5, 0x85
- bl pci_read_cfg_byte
- ori r6, r3, 0x02
- mr r31, r6
- li r3,0
- bl pci_write_cfg_byte
-
- /* COM1 as 3f8 */
- outb 0x3f0, 0xe7
- outb 0x3f1, 0xfe
-
- /* COM2 as 2f8 */
- outb 0x3f0, 0xe8
- outb 0x3f1, 0xeb
-
- /* Enable */
- outb 0x3f0, 0xe2
- inb r3, 0x3f1
- ori r3, r3, 0x0c
- outb 0x3f0, 0xe2
- outbr 0x3f1, r3
-
- /* Disable configuration mode */
- li r3, 0
- li r4, (7<<3)
- li r5, 0x85
- mr r6, r31
- bl pci_write_cfg_byte
-
- /* Set line control */
- outb UART(LINE_CONTROL), 0x83
- outb UART(DIVISOR_LATCH_LSB), 0x0c
- outb UART(DIVISOR_LATCH_MSB), 0x00
- outb UART(LINE_CONTROL), 0x3
-
- mtlr r29
- blr
-
-
- .globl new_reset
- .globl new_reset_end
-new_reset:
- li r0, 0x100
- oris r0, r0, 0xFFF0
- mtlr r0
- blr
-
-new_reset_end:
+++ /dev/null
-#include <common.h>
-#include <command.h>
-#include "../disk/part_amiga.h"
-#include <asm/cache.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#undef BOOTA_DEBUG
-
-#ifdef BOOTA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-struct block_header {
- u32 id;
- u32 summed_longs;
- s32 chk_sum;
-};
-
-extern block_dev_desc_t *ide_get_dev (int dev);
-extern struct bootcode_block *get_bootcode (block_dev_desc_t * dev_desc);
-extern int sum_block (struct block_header *header);
-
-struct bootcode_block bblk;
-
-int do_boota (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- unsigned char *load_address = (unsigned char *) CONFIG_SYS_LOAD_ADDR;
- unsigned char *base_address;
- unsigned long offset;
-
- unsigned long part_number = 0;
- block_dev_desc_t *boot_disk;
- char *s;
- struct bootcode_block *boot_code;
-
- /* Get parameters */
-
- switch (argc) {
- case 2:
- load_address = (unsigned char *) simple_strtol (argv[1], NULL, 16);
- part_number = 0;
- break;
- case 3:
- load_address = (unsigned char *) simple_strtol (argv[1], NULL, 16);
- part_number = simple_strtol (argv[2], NULL, 16);
- break;
- }
-
- base_address = load_address;
-
- PRINTF ("Loading boot code from disk %d to %p\n", part_number,
- load_address);
-
- /* Find the appropriate disk device */
- boot_disk = ide_get_dev (part_number);
- if (!boot_disk) {
- PRINTF ("Unknown disk %d\n", part_number);
- return 1;
- }
-
- /* Find the bootcode block */
- boot_code = get_bootcode (boot_disk);
- if (!boot_code) {
- PRINTF ("Not a bootable disk %d\n", part_number);
- return 1;
- }
-
- /* Only use the offset from the first block */
- offset = boot_code->load_data[0];
- memcpy (load_address, &boot_code->load_data[1], 122 * 4);
- load_address += 122 * 4;
-
- /* Setup for the loop */
- bblk.next = boot_code->next;
- boot_code = &bblk;
-
- /* Scan the chain, and copy the loader succesively into the destination area */
- while (0xffffffff != boot_code->next) {
- PRINTF ("Loading block %d\n", boot_code->next);
-
- /* Load block */
- if (1 !=
- boot_disk->block_read (boot_disk->dev, boot_code->next, 1,
- (ulong *) & bblk)) {
- PRINTF ("Read error\n");
- return 1;
- }
-
- /* check sum */
- if (sum_block ((struct block_header *) (ulong *) & bblk) != 0) {
- PRINTF ("Checksum error\n");
- return 1;
- }
-
- /* Ok, concatenate it to the already loaded code */
- memcpy (load_address, boot_code->load_data, 123 * 4);
- load_address += 123 * 4;
- }
-
- printf ("Bootcode loaded to %p (size %d)\n", base_address,
- load_address - base_address);
- printf ("Entry point at %p\n", base_address + offset);
-
- flush_cache (base_address, load_address - base_address);
-
-
- s = getenv ("autostart");
- if (s && strcmp (s, "yes") == 0) {
- void (*boot) (bd_t *, char *, block_dev_desc_t *);
- char *args;
-
- boot = (void (*)(bd_t *, char *, block_dev_desc_t *)) (base_address + offset);
- boot (gd->bd, getenv ("amiga_bootargs"), boot_disk);
- }
-
-
- return 0;
-}
-#if defined(CONFIG_AMIGAONEG3SE) && defined(CONFIG_CMD_BSP)
-U_BOOT_CMD(
- boota, 3, 1, do_boota,
- "boot an Amiga kernel",
- "address disk"
-);
-#endif /* _CMD_BOOTA_H */
+++ /dev/null
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# AmigaOneG3SE boards
-#
-
-X86EMU = -I../bios_emulator/scitech/include -I../bios_emulator/scitech/src/x86emu
-
-TEXT_BASE = 0xfff00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -Wa,-mregnames -DEASTEREGG $(X86EMU) -Dprintk=printf #-DDEBUG
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Adam Kowalczyk, ACK Software Controls Inc. akowalczyk@cogeco.ca
- *
- * Some portions taken from 3c59x.c Written 1996-1999 by Donald Becker.
- *
- * Outline of the program based on eepro100.c which is
- *
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <net.h>
-#include <netdev.h>
-#include <asm/io.h>
-#include <pci.h>
-
-#include "articiaS.h"
-#include "memio.h"
-
-/* 3Com Ethernet PCI definitions*/
-
-/* #define PCI_VENDOR_ID_3COM 0x10B7 */
-#define PCI_DEVICE_ID_3COM_3C905C 0x9200
-
-/* 3Com Commands, top 5 bits are command and bottom 11 bits are parameters */
-
-#define TotalReset (0<<11)
-#define SelectWindow (1<<11)
-#define StartCoax (2<<11)
-#define RxDisable (3<<11)
-#define RxEnable (4<<11)
-#define RxReset (5<<11)
-#define UpStall (6<<11)
-#define UpUnstall (6<<11)+1
-#define DownStall (6<<11)+2
-#define DownUnstall (6<<11)+3
-#define RxDiscard (8<<11)
-#define TxEnable (9<<11)
-#define TxDisable (10<<11)
-#define TxReset (11<<11)
-#define FakeIntr (12<<11)
-#define AckIntr (13<<11)
-#define SetIntrEnb (14<<11)
-#define SetStatusEnb (15<<11)
-#define SetRxFilter (16<<11)
-#define SetRxThreshold (17<<11)
-#define SetTxThreshold (18<<11)
-#define SetTxStart (19<<11)
-#define StartDMAUp (20<<11)
-#define StartDMADown (20<<11)+1
-#define StatsEnable (21<<11)
-#define StatsDisable (22<<11)
-#define StopCoax (23<<11)
-#define SetFilterBit (25<<11)
-
-/* The SetRxFilter command accepts the following classes */
-
-#define RxStation 1
-#define RxMulticast 2
-#define RxBroadcast 4
-#define RxProm 8
-
-/* 3Com status word defnitions */
-
-#define IntLatch 0x0001
-#define HostError 0x0002
-#define TxComplete 0x0004
-#define TxAvailable 0x0008
-#define RxComplete 0x0010
-#define RxEarly 0x0020
-#define IntReq 0x0040
-#define StatsFull 0x0080
-#define DMADone (1<<8)
-#define DownComplete (1<<9)
-#define UpComplete (1<<10)
-#define DMAInProgress (1<<11) /* DMA controller is still busy.*/
-#define CmdInProgress (1<<12) /* EL3_CMD is still busy.*/
-
-/* Polling Registers */
-
-#define DnPoll 0x2d
-#define UpPoll 0x3d
-
-/* Register window 0 offets */
-
-#define Wn0EepromCmd 10 /* Window 0: EEPROM command register. */
-#define Wn0EepromData 12 /* Window 0: EEPROM results register. */
-#define IntrStatus 0x0E /* Valid in all windows. */
-
-/* Register window 0 EEPROM bits */
-
-#define EEPROM_Read 0x80
-#define EEPROM_WRITE 0x40
-#define EEPROM_ERASE 0xC0
-#define EEPROM_EWENB 0x30 /* Enable erasing/writing for 10 msec. */
-#define EEPROM_EWDIS 0x00 /* Disable EWENB before 10 msec timeout. */
-
-/* EEPROM locations. */
-
-#define PhysAddr01 0
-#define PhysAddr23 1
-#define PhysAddr45 2
-#define ModelID 3
-#define EtherLink3ID 7
-#define IFXcvrIO 8
-#define IRQLine 9
-#define NodeAddr01 10
-#define NodeAddr23 11
-#define NodeAddr45 12
-#define DriverTune 13
-#define Checksum 15
-
-/* Register window 1 offsets, the window used in normal operation */
-
-#define TX_FIFO 0x10
-#define RX_FIFOa 0x10
-#define RxErrors 0x14
-#define RxStatus 0x18
-#define Timer 0x1A
-#define TxStatus 0x1B
-#define TxFree 0x1C /* Remaining free bytes in Tx buffer. */
-
-/* Register Window 2 */
-
-#define Wn2_ResetOptions 12
-
-/* Register Window 3: MAC/config bits */
-
-#define Wn3_Config 0 /* Internal Configuration */
-#define Wn3_MAC_Ctrl 6
-#define Wn3_Options 8
-
-#define BFEXT(value, offset, bitcount) \
- ((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
-
-#define BFINS(lhs, rhs, offset, bitcount) \
- (((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
- (((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
-
-#define RAM_SIZE(v) BFEXT(v, 0, 3)
-#define RAM_WIDTH(v) BFEXT(v, 3, 1)
-#define RAM_SPEED(v) BFEXT(v, 4, 2)
-#define ROM_SIZE(v) BFEXT(v, 6, 2)
-#define RAM_SPLIT(v) BFEXT(v, 16, 2)
-#define XCVR(v) BFEXT(v, 20, 4)
-#define AUTOSELECT(v) BFEXT(v, 24, 1)
-
-/* Register Window 4: Xcvr/media bits */
-
-#define Wn4_FIFODiag 4
-#define Wn4_NetDiag 6
-#define Wn4_PhysicalMgmt 8
-#define Wn4_Media 10
-
-#define Media_SQE 0x0008 /* Enable SQE error counting for AUI. */
-#define Media_10TP 0x00C0 /* Enable link beat and jabber for 10baseT. */
-#define Media_Lnk 0x0080 /* Enable just link beat for 100TX/100FX. */
-#define Media_LnkBeat 0x0800
-
-/* Register Window 7: Bus Master control */
-
-#define Wn7_MasterAddr 0
-#define Wn7_MasterLen 6
-#define Wn7_MasterStatus 12
-
-/* Boomerang bus master control registers. */
-
-#define PktStatus 0x20
-#define DownListPtr 0x24
-#define FragAddr 0x28
-#define FragLen 0x2c
-#define TxFreeThreshold 0x2f
-#define UpPktStatus 0x30
-#define UpListPtr 0x38
-
-/* The Rx and Tx descriptor lists. */
-
-#define LAST_FRAG 0x80000000 /* Last Addr/Len pair in descriptor. */
-#define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
-
-struct rx_desc_3com {
- u32 next; /* Last entry points to 0 */
- u32 status; /* FSH -> Frame Start Header */
- u32 addr; /* Up to 63 addr/len pairs possible */
- u32 length; /* Set LAST_FRAG to indicate last pair */
-};
-
-/* Values for the Rx status entry. */
-
-#define RxDComplete 0x00008000
-#define RxDError 0x4000
-#define IPChksumErr (1<<25)
-#define TCPChksumErr (1<<26)
-#define UDPChksumErr (1<<27)
-#define IPChksumValid (1<<29)
-#define TCPChksumValid (1<<30)
-#define UDPChksumValid (1<<31)
-
-struct tx_desc_3com {
- u32 next; /* Last entry points to 0 */
- u32 status; /* bits 0:12 length, others see below */
- u32 addr;
- u32 length;
-};
-
-/* Values for the Tx status entry. */
-
-#define CRCDisable 0x2000
-#define TxDComplete 0x8000
-#define AddIPChksum 0x02000000
-#define AddTCPChksum 0x04000000
-#define AddUDPChksum 0x08000000
-#define TxIntrUploaded 0x80000000 /* IRQ when in FIFO, but maybe not sent. */
-
-/* XCVR Types */
-
-#define XCVR_10baseT 0
-#define XCVR_AUI 1
-#define XCVR_10baseTOnly 2
-#define XCVR_10base2 3
-#define XCVR_100baseTx 4
-#define XCVR_100baseFx 5
-#define XCVR_MII 6
-#define XCVR_NWAY 8
-#define XCVR_ExtMII 9
-#define XCVR_Default 10 /* I don't think this is correct -> should have been 0x10 if Auto Negotiate */
-
-struct descriptor { /* A generic descriptor. */
- u32 next; /* Last entry points to 0 */
- u32 status; /* FSH -> Frame Start Header */
- u32 addr; /* Up to 63 addr/len pairs possible */
- u32 length; /* Set LAST_FRAG to indicate last pair */
-};
-
-/* Misc. definitions */
-
-#define NUM_RX_DESC PKTBUFSRX * 10
-#define NUM_TX_DESC 1 /* Number of TX descriptors */
-
-#define TOUT_LOOP 1000000
-
-#define ETH_ALEN 6
-
-#define EL3WINDOW(dev, win_num) ETH_OUTW(dev, SelectWindow + (win_num), EL3_CMD)
-#define EL3_CMD 0x0e
-#define EL3_STATUS 0x0e
-
-
-#undef ETH_DEBUG
-
-#ifdef ETH_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-
-static struct rx_desc_3com *rx_ring; /* RX descriptor ring */
-static struct tx_desc_3com *tx_ring; /* TX descriptor ring */
-static u8 rx_buffer[NUM_RX_DESC][PKTSIZE_ALIGN];/* storage for the incoming messages */
-static int rx_next = 0; /* RX descriptor ring pointer */
-static int tx_next = 0; /* TX descriptor ring pointer */
-static int tx_threshold;
-
-static void init_rx_ring(struct eth_device* dev);
-static void purge_tx_ring(struct eth_device* dev);
-
-static void read_hw_addr(struct eth_device* dev, bd_t * bis);
-
-static int eth_3com_init(struct eth_device* dev, bd_t *bis);
-static int eth_3com_send(struct eth_device* dev, volatile void *packet, int length);
-static int eth_3com_recv(struct eth_device* dev);
-static void eth_3com_halt(struct eth_device* dev);
-
-#define io_to_phys(a) pci_io_to_phys((pci_dev_t)dev->priv, a)
-#define phys_to_io(a) pci_phys_to_io((pci_dev_t)dev->priv, a)
-#define mem_to_phys(a) pci_mem_to_phys((pci_dev_t)dev->priv, a)
-#define phys_to_mem(a) pci_phys_to_mem((pci_dev_t)dev->priv, a)
-
-static inline int ETH_INL(struct eth_device* dev, u_long addr)
-{
- __asm__ volatile ("eieio");
- return le32_to_cpu(*(volatile u32 *)io_to_phys(addr + dev->iobase));
-}
-
-static inline int ETH_INW(struct eth_device* dev, u_long addr)
-{
- __asm__ volatile ("eieio");
- return le16_to_cpu(*(volatile u16 *)io_to_phys(addr + dev->iobase));
-}
-
-static inline int ETH_INB(struct eth_device* dev, u_long addr)
-{
- __asm__ volatile ("eieio");
- return *(volatile u8 *)io_to_phys(addr + dev->iobase);
-}
-
-static inline void ETH_OUTB(struct eth_device* dev, int command, u_long addr)
-{
- *(volatile u8 *)io_to_phys(addr + dev->iobase) = command;
- __asm__ volatile ("eieio");
-}
-
-static inline void ETH_OUTW(struct eth_device* dev, int command, u_long addr)
-{
- *(volatile u16 *)io_to_phys(addr + dev->iobase) = cpu_to_le16(command);
- __asm__ volatile ("eieio");
-}
-
-static inline void ETH_OUTL(struct eth_device* dev, int command, u_long addr)
-{
- *(volatile u32 *)io_to_phys(addr + dev->iobase) = cpu_to_le32(command);
- __asm__ volatile ("eieio");
-}
-
-static inline int ETH_STATUS(struct eth_device* dev)
-{
- __asm__ volatile ("eieio");
- return le16_to_cpu(*(volatile u16 *)io_to_phys(EL3_STATUS + dev->iobase));
-}
-
-static inline void ETH_CMD(struct eth_device* dev, int command)
-{
- *(volatile u16 *)io_to_phys(EL3_CMD + dev->iobase) = cpu_to_le16(command);
- __asm__ volatile ("eieio");
-}
-
-/* Command register is always in the same spot in all the register windows */
-/* This function issues a command and waits for it so complete by checking the CmdInProgress bit */
-
-static int issue_and_wait(struct eth_device* dev, int command)
-{
-
- int i, status;
-
- ETH_CMD(dev, command);
- for (i = 0; i < 2000; i++) {
- status = ETH_STATUS(dev);
- /*printf ("Issue: status 0x%4x.\n", status); */
- if (!(status & CmdInProgress))
- return 1;
- }
-
- /* OK, that didn't work. Do it the slow way. One second */
- for (i = 0; i < 100000; i++) {
- status = ETH_STATUS(dev);
- /*printf ("Issue: status 0x%4x.\n", status); */
- return 1;
- udelay(10);
- }
- PRINTF("Ethernet command: 0x%4x did not complete! Status: 0x%4x\n", command, ETH_STATUS(dev) );
- return 0;
-}
-
-/* Determine network media type and set up 3com accordingly */
-/* I think I'm going to start with something known first like 10baseT */
-
-static int auto_negotiate (struct eth_device *dev)
-{
- int i;
-
- EL3WINDOW (dev, 1);
-
- /* Wait for Auto negotiation to complete */
- for (i = 0; i <= 1000; i++) {
- if (ETH_INW (dev, 2) & 0x04)
- break;
- udelay (100);
-
- if (i == 1000) {
- PRINTF ("Error: Auto negotiation failed\n");
- return 0;
- }
- }
-
-
- return 1;
-}
-
-void eth_interrupt (struct eth_device *dev)
-{
- u16 status = ETH_STATUS (dev);
-
- printf ("eth0: status = 0x%04x\n", status);
-
- if (!(status & IntLatch))
- return;
-
- if (status & (1 << 6)) {
- ETH_CMD (dev, AckIntr | (1 << 6));
- printf ("Acknowledged Interrupt command\n");
- }
-
- if (status & DownComplete) {
- ETH_CMD (dev, AckIntr | DownComplete);
- printf ("Acknowledged DownComplete\n");
- }
-
- if (status & UpComplete) {
- ETH_CMD (dev, AckIntr | UpComplete);
- printf ("Acknowledged UpComplete\n");
- }
-
- ETH_CMD (dev, AckIntr | IntLatch);
- printf ("Acknowledged IntLatch\n");
-}
-
-int eth_3com_initialize (bd_t * bis)
-{
- u32 eth_iobase = 0, status;
- int card_number = 0, ret;
- struct eth_device *dev;
- pci_dev_t devno;
- char *s;
-
- s = getenv ("3com_base");
-
- /* Find ethernet controller on the PCI bus */
-
- if ((devno =
- pci_find_device (PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C,
- 0)) < 0) {
- PRINTF ("Error: Cannot find the ethernet device on the PCI bus\n");
- goto Done;
- }
-
- if (s) {
- unsigned long base = atoi (s);
-
- pci_write_config_dword (devno, PCI_BASE_ADDRESS_0,
- base | 0x01);
- }
-
- ret = pci_read_config_dword (devno, PCI_BASE_ADDRESS_0, ð_iobase);
- eth_iobase &= ~0xf;
-
- PRINTF ("eth: 3Com Found at Address: 0x%x\n", eth_iobase);
-
- pci_write_config_dword (devno, PCI_COMMAND,
- PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER);
-
- /* Check if I/O accesses and Bus Mastering are enabled */
-
- ret = pci_read_config_dword (devno, PCI_COMMAND, &status);
-
- if (!(status & PCI_COMMAND_IO)) {
- printf ("Error: Cannot enable IO access.\n");
- goto Done;
- }
-
- if (!(status & PCI_COMMAND_MEMORY)) {
- printf ("Error: Cannot enable MEMORY access.\n");
- goto Done;
- }
-
- if (!(status & PCI_COMMAND_MASTER)) {
- printf ("Error: Cannot enable Bus Mastering.\n");
- goto Done;
- }
-
- dev = (struct eth_device *) malloc (sizeof (*dev)); /*struct eth_device)); */
-
- sprintf (dev->name, "3Com 3c920c#%d", card_number);
- dev->iobase = eth_iobase;
- dev->priv = (void *) devno;
- dev->init = eth_3com_init;
- dev->halt = eth_3com_halt;
- dev->send = eth_3com_send;
- dev->recv = eth_3com_recv;
-
- eth_register (dev);
-
-/* { */
-/* char interrupt; */
-/* devno = pci_find_device(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C, 0); */
-/* pci_read_config_byte(devno, PCI_INTERRUPT_LINE, &interrupt); */
-
-/* printf("Installing eth0 interrupt handler to %d\n", interrupt); */
-/* irq_install_handler(interrupt, eth_interrupt, dev); */
-/* } */
-
- card_number++;
-
- /* Set the latency timer for value */
- s = getenv ("3com_latency");
- if (s) {
- ret = pci_write_config_byte (devno, PCI_LATENCY_TIMER,
- (unsigned char) atoi (s));
- } else
- ret = pci_write_config_byte (devno, PCI_LATENCY_TIMER, 0x0a);
-
- read_hw_addr (dev, bis); /* get the MAC address from Window 2 */
-
- /* Reset the ethernet controller */
-
- PRINTF ("Issuing reset command....\n");
- if (!issue_and_wait (dev, TotalReset)) {
- printf ("Error: Cannot reset ethernet controller.\n");
- goto Done;
- } else
- PRINTF ("Ethernet controller reset.\n");
-
- /* allocate memory for rx and tx rings */
-
- if (!(rx_ring = memalign (sizeof (struct rx_desc_3com) * NUM_RX_DESC, 16))) {
- PRINTF ("Cannot allocate memory for RX_RING.....\n");
- goto Done;
- }
-
- if (!(tx_ring = memalign (sizeof (struct tx_desc_3com) * NUM_TX_DESC, 16))) {
- PRINTF ("Cannot allocate memory for TX_RING.....\n");
- goto Done;
- }
-
-Done:
- return status;
-}
-
-
-static int eth_3com_init (struct eth_device *dev, bd_t * bis)
-{
- int i, status = 0;
- int tx_cur, loop;
- u16 status_enable, intr_enable;
- struct descriptor *ias_cmd;
-
- /* Determine what type of network the machine is connected to */
- /* presently drops the connect to 10Mbps */
-
- if (!auto_negotiate (dev)) {
- printf ("Error: Cannot determine network media.\n");
- goto Done;
- }
-
- issue_and_wait (dev, TxReset);
- issue_and_wait (dev, RxReset | 0x04);
-
- /* Switch to register set 7 for normal use. */
- EL3WINDOW (dev, 7);
-
- /* Initialize Rx and Tx rings */
-
- init_rx_ring (dev);
- purge_tx_ring (dev);
-
- ETH_CMD (dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
-
- issue_and_wait (dev, SetTxStart | 0x07ff);
-
- /* Below sets which indication bits to be seen. */
-
- status_enable =
- SetStatusEnb | HostError | DownComplete | UpComplete | (1 <<
- 6);
- ETH_CMD (dev, status_enable);
-
- /* Below sets no bits are to cause an interrupt since this is just polling */
-
- intr_enable = SetIntrEnb;
-/* intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6); */
- ETH_CMD (dev, intr_enable);
- ETH_OUTB (dev, 127, UpPoll);
-
- /* Ack all pending events, and set active indicator mask */
-
- ETH_CMD (dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
- ETH_CMD (dev, intr_enable);
-
- /* Tell the adapter where the RX ring is located */
-
- issue_and_wait (dev, UpStall); /* Stall and set the UplistPtr */
- ETH_OUTL (dev, (u32) & rx_ring[rx_next], UpListPtr);
- ETH_CMD (dev, RxEnable); /* Enable the receiver. */
- issue_and_wait (dev, UpUnstall);
-
- /* Send the Individual Address Setup frame */
-
- tx_cur = tx_next;
- tx_next = ((tx_next + 1) % NUM_TX_DESC);
-
- ias_cmd = (struct descriptor *) &tx_ring[tx_cur];
- ias_cmd->status = cpu_to_le32 (1 << 31); /* set DnIndicate bit. */
- ias_cmd->next = 0;
- ias_cmd->addr = cpu_to_le32 ((u32) dev->enetaddr);
- ias_cmd->length = cpu_to_le32 (6 | LAST_FRAG);
-
- /* Tell the adapter where the TX ring is located */
-
- ETH_CMD (dev, TxEnable); /* Enable transmitter. */
- issue_and_wait (dev, DownStall); /* Stall and set the DownListPtr. */
- ETH_OUTL (dev, (u32) & tx_ring[tx_cur], DownListPtr);
- issue_and_wait (dev, DownUnstall);
- for (i = 0; !(ETH_STATUS (dev) & DownComplete); i++) {
- if (i >= TOUT_LOOP) {
- PRINTF ("TX Ring status (Init): 0x%4x\n",
- le32_to_cpu (tx_ring[tx_cur].status));
- PRINTF ("ETH_STATUS: 0x%x\n", ETH_STATUS (dev));
- goto Done;
- }
- }
- if (ETH_STATUS (dev) & DownComplete) { /* If DownLoad Complete ACK the bit */
- ETH_CMD (dev, AckIntr | DownComplete); /* acknowledge the indication bit */
- issue_and_wait (dev, DownStall); /* stall and clear DownListPtr */
- ETH_OUTL (dev, 0, DownListPtr);
- issue_and_wait (dev, DownUnstall);
- }
- status = 1;
-Done:
- return status;
-}
-
-int eth_3com_send (struct eth_device *dev, volatile void *packet, int length)
-{
- int i, status = 0;
- int tx_cur;
-
- if (length <= 0) {
- PRINTF ("eth: bad packet size: %d\n", length);
- goto Done;
- }
-
- tx_cur = tx_next;
- tx_next = (tx_next + 1) % NUM_TX_DESC;
-
- tx_ring[tx_cur].status = cpu_to_le32 (1 << 31); /* set DnIndicate bit */
- tx_ring[tx_cur].next = 0;
- tx_ring[tx_cur].addr = cpu_to_le32 (((u32) packet));
- tx_ring[tx_cur].length = cpu_to_le32 (length | LAST_FRAG);
-
- /* Send the packet */
-
- issue_and_wait (dev, DownStall); /* stall and set the DownListPtr */
- ETH_OUTL (dev, (u32) & tx_ring[tx_cur], DownListPtr);
- issue_and_wait (dev, DownUnstall);
-
- for (i = 0; !(ETH_STATUS (dev) & DownComplete); i++) {
- if (i >= TOUT_LOOP) {
- PRINTF ("TX Ring status (send): 0x%4x\n",
- le32_to_cpu (tx_ring[tx_cur].status));
- goto Done;
- }
- }
- if (ETH_STATUS (dev) & DownComplete) { /* If DownLoad Complete ACK the bit */
- ETH_CMD (dev, AckIntr | DownComplete); /* acknowledge the indication bit */
- issue_and_wait (dev, DownStall); /* stall and clear DownListPtr */
- ETH_OUTL (dev, 0, DownListPtr);
- issue_and_wait (dev, DownUnstall);
- }
- status = 1;
-Done:
- return status;
-}
-
-void PrintPacket (uchar * packet, int length)
-{
- int loop;
- uchar *ptr;
-
- printf ("Printing packet of length %x.\n\n", length);
- ptr = packet;
- for (loop = 1; loop <= length; loop++) {
- printf ("%2x ", *ptr++);
- if ((loop % 40) == 0)
- printf ("\n");
- }
-}
-
-int eth_3com_recv (struct eth_device *dev)
-{
- u16 stat = 0;
- u32 status;
- int rx_prev, length = 0;
-
- while (!(ETH_STATUS (dev) & UpComplete)) /* wait on receipt of packet */
- ;
-
- status = le32_to_cpu (rx_ring[rx_next].status); /* packet status */
-
- while (status & (1 << 15)) {
- /* A packet has been received */
-
- if (status & (1 << 15)) {
- /* A valid frame received */
-
- length = le32_to_cpu (rx_ring[rx_next].status) & 0x1fff; /* length is in bits 0 - 12 */
-
- /* Pass the packet up to the protocol layers */
-
- NetReceive ((uchar *)
- le32_to_cpu (rx_ring[rx_next].addr),
- length);
- rx_ring[rx_next].status = 0; /* clear the status word */
- ETH_CMD (dev, AckIntr | UpComplete);
- issue_and_wait (dev, UpUnstall);
- } else if (stat & HostError) {
- /* There was an error */
-
- printf ("Rx error status: 0x%4x\n", stat);
- init_rx_ring (dev);
- goto Done;
- }
-
- rx_prev = rx_next;
- rx_next = (rx_next + 1) % NUM_RX_DESC;
- stat = ETH_STATUS (dev); /* register status */
- status = le32_to_cpu (rx_ring[rx_next].status); /* packet status */
- }
-Done:
- return length;
-}
-
-void eth_3com_halt (struct eth_device *dev)
-{
- if (!(dev->iobase)) {
- goto Done;
- }
-
- issue_and_wait (dev, DownStall); /* shut down transmit and receive */
- issue_and_wait (dev, UpStall);
- issue_and_wait (dev, RxDisable);
- issue_and_wait (dev, TxDisable);
-
-/* free(tx_ring); /###* release memory allocated to the DPD and UPD rings */
-/* free(rx_ring); */
-
-Done:
- return;
-}
-
-static void init_rx_ring (struct eth_device *dev)
-{
- int i;
-
- PRINTF ("Initializing rx_ring. rx_buffer = %p\n", rx_buffer);
- issue_and_wait (dev, UpStall);
-
- for (i = 0; i < NUM_RX_DESC; i++) {
- rx_ring[i].next =
- cpu_to_le32 (((u32) &
- rx_ring[(i + 1) % NUM_RX_DESC]));
- rx_ring[i].status = 0;
- rx_ring[i].addr = cpu_to_le32 (((u32) & rx_buffer[i][0]));
- rx_ring[i].length = cpu_to_le32 (PKTSIZE_ALIGN | LAST_FRAG);
- }
- rx_next = 0;
-}
-
-static void purge_tx_ring (struct eth_device *dev)
-{
- int i;
-
- PRINTF ("Purging tx_ring.\n");
-
- tx_next = 0;
-
- for (i = 0; i < NUM_TX_DESC; i++) {
- tx_ring[i].next = 0;
- tx_ring[i].status = 0;
- tx_ring[i].addr = 0;
- tx_ring[i].length = 0;
- }
-}
-
-static void read_hw_addr (struct eth_device *dev, bd_t * bis)
-{
- u8 hw_addr[ETH_ALEN];
- unsigned int eeprom[0x40];
- unsigned int checksum = 0;
- int i, j, timer;
-
- /* First, try the env ... if that works, we're all done! */
- if (eth_getenv_enetaddr("ethaddr", hw_addr))
- goto Done;
-
- /* Read the station address from the EEPROM. */
-
- EL3WINDOW (dev, 0);
- for (i = 0; i < 0x40; i++) {
- ETH_OUTW (dev, EEPROM_Read + i, Wn0EepromCmd);
- /* Pause for at least 162 us. for the read to take place. */
- for (timer = 10; timer >= 0; timer--) {
- udelay (162);
- if ((ETH_INW (dev, Wn0EepromCmd) & 0x8000) == 0)
- break;
- }
- eeprom[i] = ETH_INW (dev, Wn0EepromData);
- }
-
- /* Checksum calculation. I'm not sure about this part and there seems to be a bug on the 3com side of things */
-
- for (i = 0; i < 0x21; i++)
- checksum ^= eeprom[i];
- checksum = (checksum ^ (checksum >> 8)) & 0xff;
-
- if (checksum != 0xbb)
- printf (" *** INVALID EEPROM CHECKSUM %4.4x *** \n",
- checksum);
-
- for (i = 0, j = 0; i < 3; i++) {
- hw_addr[j++] = (u8) ((eeprom[i + 10] >> 8) & 0xff);
- hw_addr[j++] = (u8) (eeprom[i + 10] & 0xff);
- }
-
- /* MAC Address is in window 2, write value from EEPROM to window 2 */
-
- EL3WINDOW (dev, 2);
- for (i = 0; i < 6; i++)
- ETH_OUTB (dev, hw_addr[i], i);
-
- for (j = 0; j < ETH_ALEN; j += 2) {
- hw_addr[j] = (u8) (ETH_INW (dev, j) & 0xff);
- hw_addr[j + 1] = (u8) ((ETH_INW (dev, j) >> 8) & 0xff);
- }
-
- /* Save the result in the environment */
- eth_setenv_enetaddr("ethaddr", hw_addr);
-
-Done:
- memcpy(dev->enetaddr, hw_addr, 6);
- return;
-}
+++ /dev/null
-#include <common.h>
-#include <flash.h>
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-
-unsigned long flash_init(void)
-{
- int i;
-
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
- {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = 0;
- flash_info[i].size = 0;
- }
-
-
- return 1;
-}
-
-int flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- return 1;
-}
-
-void flash_print_info(flash_info_t *info)
-{
- printf("No flashrom installed\n");
-}
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- return 0;
-}
+++ /dev/null
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <flash.h>
-#include <asm/io.h>
-#include "memio.h"
-
-/*---------------------------------------------------------------------*/
-#undef DEBUG_FLASH
-
-#ifdef DEBUG_FLASH
-#define DEBUGF(fmt,args...) printf(fmt ,##args)
-#else
-#define DEBUGF(fmt,args...)
-#endif
-/*---------------------------------------------------------------------*/
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-static ulong flash_get_size (ulong addr, flash_info_t *info);
-static int flash_get_offsets (ulong base, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_reset (ulong addr);
-
-int flash_xd_nest;
-
-static void flash_to_xd(void)
-{
- unsigned char x;
-
- flash_xd_nest ++;
-
- if (flash_xd_nest == 1)
- {
- DEBUGF("Flash on XD\n");
- x = pci_read_cfg_byte(0, 0, 0x74);
- pci_write_cfg_byte(0, 0, 0x74, x|1);
- }
-}
-
-static void flash_to_mem(void)
-{
- unsigned char x;
-
- flash_xd_nest --;
-
- if (flash_xd_nest == 0)
- {
- DEBUGF("Flash on memory bus\n");
- x = pci_read_cfg_byte(0, 0, 0x74);
- pci_write_cfg_byte(0, 0, 0x74, x&0xFE);
- }
-}
-
-unsigned long flash_init_old(void)
-{
- int i;
-
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
- {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = 0;
- flash_info[i].size = 0;
- }
-
-
- return 1;
-}
-
-unsigned long flash_init (void)
-{
- unsigned int i;
- unsigned long flash_size = 0;
-
- flash_xd_nest = 0;
-
- flash_to_xd();
-
- /* Init: no FLASHes known */
- for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = 0;
- flash_info[i].size = 0;
- }
-
- DEBUGF("\n## Get flash size @ 0x%08x\n", CONFIG_SYS_FLASH_BASE);
-
- flash_size = flash_get_size (CONFIG_SYS_FLASH_BASE, flash_info);
-
- DEBUGF("## Flash bank size: %08lx\n", flash_size);
-
- if (flash_size) {
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE && \
- CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_MAX_SIZE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_SYS_MONITOR_BASE,
- CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#ifdef CONFIG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
- &flash_info[0]);
-#endif
-
- } else {
- puts ("Warning: the BOOT Flash is not initialised !");
- }
-
- flash_to_mem();
-
- return flash_size;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (ulong addr, flash_info_t *info)
-{
- short i;
- uchar value;
- uchar *x = (uchar *)addr;
-
- flash_to_xd();
-
- /* Write auto select command: read Manufacturer ID */
- x[0x0555] = 0xAA;
- __asm__ volatile ("sync\n eieio");
- x[0x02AA] = 0x55;
- __asm__ volatile ("sync\n eieio");
- x[0x0555] = 0x90;
- __asm__ volatile ("sync\n eieio");
-
- value = x[0];
- __asm__ volatile ("sync\n eieio");
-
- DEBUGF("Manuf. ID @ 0x%08lx: 0x%08x\n", (ulong)addr, value);
-
- switch (value | (value << 16)) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
-
- case STM_MANUFACT:
- info->flash_id = FLASH_MAN_STM;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- flash_reset (addr);
- return 0;
- }
-
- value = x[1];
- __asm__ volatile ("sync\n eieio");
-
- DEBUGF("Device ID @ 0x%08lx: 0x%08x\n", addr+1, value);
-
- switch (value) {
- case AMD_ID_F040B:
- DEBUGF("Am29F040B\n");
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case AMD_ID_LV040B:
- DEBUGF("Am29LV040B\n");
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case AMD_ID_LV400T:
- DEBUGF("Am29LV400T\n");
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- DEBUGF("Am29LV400B\n");
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- DEBUGF("Am29LV800T\n");
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- DEBUGF("Am29LV400B\n");
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- DEBUGF("Am29LV160T\n");
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- DEBUGF("Am29LV160B\n");
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV320T:
- DEBUGF("Am29LV320T\n");
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
-#if 0
- /* Has the same ID as AMD_ID_LV320T, to be fixed */
- case AMD_ID_LV320B:
- DEBUGF("Am29LV320B\n");
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
-
- case AMD_ID_LV033C:
- DEBUGF("Am29LV033C\n");
- info->flash_id += FLASH_AM033C;
- info->sector_count = 64;
- info->size = 0x01000000;
- break; /* => 16Mb */
-
- case STM_ID_F040B:
- DEBUGF("M29F040B\n");
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- flash_reset (addr);
- flash_to_mem();
- return (0); /* => no or unknown flash */
-
- }
-
- if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
- info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- }
-
- if (! flash_get_offsets (addr, info)) {
- flash_reset (addr);
- flash_to_mem();
- return 0;
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- value = in8(info->start[i] + 2);
- iobarrier_rw();
- info->protect[i] = (value & 1) != 0;
- }
-
- /*
- * Reset bank to read mode
- */
- flash_reset (addr);
-
- flash_to_mem();
-
- return (info->size);
-}
-
-static int flash_get_offsets (ulong base, flash_info_t *info)
-{
- unsigned int i;
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- /* set sector offsets for uniform sector type */
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + i * info->size /
- info->sector_count;
- }
- break;
- default:
- return 0;
- }
-
- return 1;
-}
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile ulong addr = info->start[0];
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- flash_to_xd();
-
- if (s_first < 0 || s_first > s_last) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- flash_to_mem();
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- flash_to_mem();
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- out8(addr + 0x555, 0xAA);
- iobarrier_rw();
- out8(addr + 0x2AA, 0x55);
- iobarrier_rw();
- out8(addr + 0x555, 0x80);
- iobarrier_rw();
- out8(addr + 0x555, 0xAA);
- iobarrier_rw();
- out8(addr + 0x2AA, 0x55);
- iobarrier_rw();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = info->start[sect];
- out8(addr, 0x30);
- iobarrier_rw();
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = info->start[l_sect];
-
- DEBUGF ("Start erase timeout: %d\n", CONFIG_SYS_FLASH_ERASE_TOUT);
-
- while ((in8(addr) & 0x80) != 0x80) {
- if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- flash_reset (info->start[0]);
- flash_to_mem();
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- iobarrier_rw();
- }
-
-DONE:
- /* reset to read mode */
- flash_reset (info->start[0]);
- flash_to_mem();
-
- printf (" done\n");
- return 0;
-}
-
-/*
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- flash_to_xd();
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- flash_to_mem();
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- flash_to_mem();
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- flash_to_mem();
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
-
- flash_to_mem();
- return (write_word(info, wp, data));
-}
-
-/*
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile ulong addr = info->start[0];
- ulong start;
- int i;
-
- flash_to_xd();
-
- /* Check if Flash is (sufficiently) erased */
- if ((in32(dest) & data) != data) {
- flash_to_mem();
- return (2);
- }
-
- /* write each byte out */
- for (i = 0; i < 4; i++) {
- char *data_ch = (char *)&data;
- int flag = disable_interrupts();
-
- out8(addr + 0x555, 0xAA);
- iobarrier_rw();
- out8(addr + 0x2AA, 0x55);
- iobarrier_rw();
- out8(addr + 0x555, 0xA0);
- iobarrier_rw();
- out8(dest+i, data_ch[i]);
- iobarrier_rw();
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((in8(dest+i) & 0x80) != (data_ch[i] & 0x80)) {
- if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- flash_reset (addr);
- flash_to_mem();
- return (1);
- }
- iobarrier_rw();
- }
- }
-
- flash_reset (addr);
- flash_to_mem();
- return (0);
-}
-
-/*
- * Reset bank to read mode
- */
-static void flash_reset (ulong addr)
-{
- flash_to_xd();
- out8(addr, 0xF0); /* reset bank */
- iobarrier_rw();
- flash_to_mem();
-}
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- case FLASH_MAN_STM: printf ("SGS THOMSON "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040: printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n");
- break;
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size % 0x100000 == 0) {
- printf (" Size: %ld MB in %d Sectors\n",
- info->size / 0x100000, info->sector_count);
- } else if (info->size % 0x400 == 0) {
- printf (" Size: %ld KB in %d Sectors\n",
- info->size / 0x400, info->sector_count);
- } else {
- printf (" Size: %ld B in %d Sectors\n",
- info->size, info->sector_count);
- }
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * John W. Linville, linville@tuxdriver.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "i8259.h"
-
-#undef IRQ_DEBUG
-
-#ifdef IRQ_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-static inline unsigned char read_byte(volatile unsigned char* from)
-{
- int x;
- asm volatile ("lbz %0,%1\n eieio" : "=r" (x) : "m" (*from));
- return (unsigned char)x;
-}
-
-static inline void write_byte(volatile unsigned char *to, int x)
-{
- asm volatile ("stb %1,%0\n eieio" : "=m" (*to) : "r" (x));
-}
-
-static inline unsigned long read_long_little(volatile unsigned long *from)
-{
- unsigned long x;
- asm volatile ("lwbrx %0,0,%1\n eieio\n sync" : "=r" (x) : "r" (from), "m"(*from));
- return (unsigned long)x;
-}
-
-#ifdef out8
-#undef out8
-#endif
-
-#ifdef in8
-#undef in8
-#endif
-
-#define out8(addr, byte) write_byte(0xFE000000 | addr, byte)
-#define in8(addr) read_byte(0xFE000000 | addr)
-
-/*
- * This contains the irq mask for both 8259A irq controllers,
- */
-static char cached_imr[2] = {0xff, 0xff};
-
-#define cached_imr1 (cached_imr[0])
-#define cached_imr2 (cached_imr[1])
-
-void i8259_init(void)
-{
- char dummy;
- PRINTF("Initializing Interrupt controller\n");
- /* init master interrupt controller */
- out8(0x20, 0x11); /* 0x19); /###* Start init sequence */
- out8(0x21, 0x00); /* Vector base */
- out8(0x21, 0x04); /* edge tiggered, Cascade (slave) on IRQ2 */
- out8(0x21, 0x11); /* was: 0x01); /###* Select 8086 mode */
-
- /* init slave interrupt controller */
- out8(0xA0, 0x11); /* 0x19); /###* Start init sequence */
- out8(0xA1, 0x08); /* Vector base */
- out8(0xA1, 0x02); /* edge triggered, Cascade (slave) on IRQ2 */
- out8(0xA1, 0x11); /* was: 0x01); /###* Select 8086 mode */
-
- /* always read ISR */
- out8(0x20, 0x0B);
- dummy = in8(ISR_1);
- out8(0xA0, 0x0B);
- dummy = in8(ISR_2);
-
-/* out8(0x43, 0x30); */
-/* out8(0x40, 0); */
-/* out8(0x40, 0); */
-/* out8(0x43, 0x70); */
-/* out8(0x41, 0); */
-/* out8(0x41, 0); */
-/* out8(0x43, 0xb0); */
-/* out8(0x42, 0); */
-/* out8(0x42, 0); */
-
- /* Mask all interrupts */
- out8(IMR_2, cached_imr2);
- out8(IMR_1, cached_imr1);
-
- i8259_unmask_irq(2);
-#if 0
- {
- int i;
- for (i=0; i<16; i++)
- {
- i8259_unmask_irq(i);
- }
- }
-#endif
-}
-
-static volatile char *pci_intack = (void *)0xFEF00000;
-
-int i8259_irq(void)
-{
- int irq;
-
- irq = read_long_little(pci_intack) & 0xff;
- if (irq==7) {
- /*
- * This may be a spurious interrupt.
- *
- * Read the interrupt status register (ISR). If the most
- * significant bit is not set then there is no valid
- * interrupt.
- */
- if(~in8(0x20)&0x80) {
- irq = -1;
- }
- }
-
- return irq;
-}
-int i8259_get_irq(struct pt_regs *regs)
-{
- unsigned char irq;
-
- /*
- * Perform an interrupt acknowledge cycle on controller 1
- */
- out8(OCW3_1, 0x0C); /* prepare for poll */
- irq = in8(IPL_1) & 7;
- if (irq == 2) {
- /*
- * Interrupt is cascaded so perform interrupt
- * acknowledge on controller 2
- */
- out8(OCW3_2, 0x0C); /* prepare for poll */
- irq = (in8(IPL_2) & 7) + 8;
- if (irq == 15) {
- /*
- * This may be a spurious interrupt
- *
- * Read the interrupt status register. If the most
- * significant bit is not set then there is no valid
- * interrupt
- */
- out8(OCW3_2, 0x0b);
- if (~(in8(ISR_2) & 0x80)) {
- return -1;
- }
- }
- } else if (irq == 7) {
- /*
- * This may be a spurious interrupt
- *
- * Read the interrupt status register. If the most
- * significant bit is not set then there is no valid
- * interrupt
- */
- out8(OCW3_1, 0x0b);
- if (~(in8(ISR_1) & 0x80)) {
- return -1;
- }
- }
- return irq;
-}
-
-/*
- * Careful! The 8259A is a fragile beast, it pretty
- * much _has_ to be done exactly like this (mask it
- * first, _then_ send the EOI, and the order of EOI
- * to the two 8259s is important!
- */
-void i8259_mask_and_ack(int irq)
-{
- if (irq > 7) {
- cached_imr2 |= (1 << (irq - 8));
- in8(IMR_2); /* DUMMY */
- out8(IMR_2, cached_imr2);
- out8(OCW2_2, 0x20); /* Non-specific EOI */
- out8(OCW2_1, 0x20); /* Non-specific EOI to cascade */
- } else {
- cached_imr1 |= (1 << irq);
- in8(IMR_1); /* DUMMY */
- out8(IMR_1, cached_imr1);
- out8(OCW2_1, 0x20); /* Non-specific EOI */
- }
-}
-
-void i8259_mask_irq(int irq)
-{
- if (irq & 8) {
- cached_imr2 |= (1 << (irq & 7));
- out8(IMR_2, cached_imr2);
- } else {
- cached_imr1 |= (1 << irq);
- out8(IMR_1, cached_imr1);
- }
-}
-
-void i8259_unmask_irq(int irq)
-{
- if (irq & 8) {
- cached_imr2 &= ~(1 << (irq & 7));
- out8(IMR_2, cached_imr2);
- } else {
- cached_imr1 &= ~(1 << irq);
- out8(IMR_1, cached_imr1);
- }
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * John W. Linville, linville@tuxdriver.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define ICW1_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW1
-#define ICW1_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW1
-#define ICW2_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW2
-#define ICW2_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW2
-#define ICW3_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW3
-#define ICW3_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW3
-#define ICW4_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW4
-#define ICW4_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW4
-#define OCW1_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW1
-#define OCW1_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW1
-#define OCW2_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW2
-#define OCW2_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW2
-#define OCW3_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW3
-#define OCW3_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW3
-
-#define IMR_1 OCW1_1
-#define IMR_2 OCW1_2
-
-#define ISR_1 ICW1_1
-#define ISR_2 ICW1_2
-
-#define IPL_1 ICW1_1
-#define IPL_2 ICW1_2
-
-extern void i8259_init(void);
-
-extern int i8259_get_irq(struct pt_regs *regs);
-
-extern void i8259_mask_and_ack(int irq);
-
-extern void i8259_mask_irq(int irq);
-
-extern void i8259_unmask_irq(int irq);
+++ /dev/null
-/*
- * (C) Copyright 2002
- * John W. Linville <linville@tuxdriver.com>
- *
- * Copied and modified from original code by Josh Huber. Original
- * copyright notice preserved below.
- *
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * interrupts.c - just enough support for the decrementer/timer
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include "i8259.h"
-
-#undef DEBUG
-#ifdef DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-#define NR_IRQS 16
-
-void irq_alloc_init(void);
-long irq_alloc(long wanted);
-
-/****************************************************************************/
-
-unsigned decrementer_count; /* count value for 1e6/HZ microseconds */
-
-struct irq_action {
- interrupt_handler_t *handler;
- void *arg;
- ulong count;
-};
-
-static struct irq_action irq_handlers[NR_IRQS];
-
-/****************************************************************************/
-
-static __inline__ unsigned long
-get_msr(void)
-{
- unsigned long msr;
-
- asm volatile("mfmsr %0" : "=r" (msr) :);
- return msr;
-}
-
-static __inline__ void
-set_msr(unsigned long msr)
-{
- asm volatile("mtmsr %0" : : "r" (msr));
-}
-
-static __inline__ unsigned long
-get_dec(void)
-{
- unsigned long val;
-
- asm volatile("mfdec %0" : "=r" (val) :);
- return val;
-}
-
-
-static __inline__ void
-set_dec(unsigned long val)
-{
- asm volatile("mtdec %0" : : "r" (val));
-}
-
-
-void
-enable_interrupts(void)
-{
- set_msr (get_msr() | MSR_EE);
-}
-
-/* returns flag if MSR_EE was set before */
-int
-disable_interrupts(void)
-{
- ulong msr;
-
- msr = get_msr();
- set_msr (msr & ~MSR_EE);
- return ((msr & MSR_EE) != 0);
-}
-
-/****************************************************************************/
-
-int interrupt_init (void)
-{
- extern void new_reset(void);
- extern void new_reset_end(void);
-#ifdef DEBUG
- puts("interrupt_init: setting decrementer_count\n");
-#endif
- decrementer_count = get_tbclk() / CONFIG_SYS_HZ;
-
-#ifdef DEBUG
- puts("interrupt_init: setting actual decremter\n");
-#endif
- set_dec (get_tbclk() / CONFIG_SYS_HZ);
-
-#ifdef DEBUG
- puts("interrupt_init: clearing external interrupt table\n");
-#endif
- /* clear external interrupt table here */
- memset(irq_handlers, 0, sizeof(irq_handlers));
-
-#ifdef DEBUG
- puts("interrupt_init: initializing interrupt controller\n");
-#endif
- i8259_init();
-
-#ifdef DEBUG
- puts("Copying reset trampoline\n");
-#endif
- /* WARNING: Assmues that the first megabyte is CACHEINHIBIT! */
- memcpy((void *)0x100, new_reset, new_reset_end - new_reset);
-
-#ifdef DEBUG
- PRINTF("interrupt_init: enabling interrupts (msr = %08x)\n",
- get_msr());
-#endif
- set_msr (get_msr() | MSR_EE);
-
-#ifdef DEBUG
- PRINTF("interrupt_init: done. (msr = %08x)\n", get_msr());
-#endif
-
-}
-
-/****************************************************************************/
-
-/*
- * Handle external interrupts
- */
-void
-external_interrupt(struct pt_regs *regs)
-{
- extern int i8259_irq(void);
-
- int irq, unmask = 1;
-
- irq = i8259_irq(); /*i8259_get_irq(regs); */
-/* printf("irq = %d, handler at %p ack=%d\n", irq, irq_handlers[irq].handler, *(volatile unsigned char *)0xFEF00000); */
- i8259_mask_and_ack(irq);
-
- if (irq_handlers[irq].handler != NULL)
- (*irq_handlers[irq].handler)(irq_handlers[irq].arg);
- else {
- PRINTF ("\nBogus External Interrupt IRQ %d\n", irq);
- /*
- * turn off the bogus interrupt, otherwise it
- * might repeat forever
- */
- unmask = 0;
- }
-
- if (unmask) i8259_unmask_irq(irq);
-}
-
-volatile ulong timestamp = 0;
-
-/*
- * timer_interrupt - gets called when the decrementer overflows,
- * with interrupts disabled.
- * Trivial implementation - no need to be really accurate.
- */
-void
-timer_interrupt(struct pt_regs *regs)
-{
- set_dec(decrementer_count);
- timestamp++;
-}
-
-/****************************************************************************/
-
-void
-reset_timer(void)
-{
- timestamp = 0;
-}
-
-ulong
-get_timer(ulong base)
-{
- return (timestamp - base);
-}
-
-void
-set_timer(ulong t)
-{
- timestamp = t;
-}
-
-/****************************************************************************/
-
-/*
- * Install and free a interrupt handler.
- */
-
-void
-irq_install_handler(int irq, interrupt_handler_t *handler, void *arg)
-{
- if (irq < 0 || irq >= NR_IRQS) {
- PRINTF("irq_install_handler: bad irq number %d\n", irq);
- return;
- }
-
- if (irq_handlers[irq].handler != NULL)
- PRINTF("irq_install_handler: 0x%08lx replacing 0x%08lx\n",
- (ulong)handler, (ulong)irq_handlers[irq].handler);
-
- irq_handlers[irq].handler = handler;
- irq_handlers[irq].arg = arg;
-
- i8259_unmask_irq(irq);
-}
-
-void
-irq_free_handler(int irq)
-{
- if (irq < 0 || irq >= NR_IRQS) {
- PRINTF("irq_free_handler: bad irq number %d\n", irq);
- return;
- }
-
- i8259_mask_irq(irq);
-
- irq_handlers[irq].handler = NULL;
- irq_handlers[irq].arg = NULL;
-}
-
-/****************************************************************************/
-
-void
-do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
-{
- puts("IRQ related functions are unimplemented currently.\n");
-}
+++ /dev/null
-
-#ifndef _MACROS_H
-#define _MACROS_H
-
- /*
- ** Load a long integer into a register
- */
- .macro liw reg, value
- lis \reg, \value@h
- ori \reg, \reg, \value@l
- .endm
-
-
- /*
- ** Generate config_addr request
- ** This macro expects the values in registers:
- ** r3 - bus
- ** r4 - devfn
- ** r5 - offset
- */
- .macro config_addr
- rlwinm r9, r5, 24, 0, 6
- rlwinm r8, r4, 16, 0, 31
- rlwinm r7, r3, 8, 0, 31
- or r9, r8, r9
- or r9, r7, r9
- ori r9, r9, 0x80
- liw r10, 0xfec00cf8
- stw r9, 0(r10)
- eieio
- sync
- .endm
-
-
- /*
- ** Generate config_data address
- */
- .macro config_data mask
- andi. r9, r5, \mask
- addi r9, r9, 0xcfc
- oris r9, r9, 0xfee0
- .endm
-
-
- /*
- ** Write a byte value to an output port
- */
- .macro outb port, value
- lis r2, 0xfe00
- li r0, \value
- stb r0, \port(r2)
- .endm
-
-
- /*
- ** Write a register byte value to an output port
- */
- .macro outbr port, value
- lis r2, 0xfe00
- stb \value, \port(r2)
- .endm
-
-
- /*
- ** Read a byte value from a port into a specified register
- */
- .macro inb reg, port
- lis r2, 0xfe00
- lbz \reg, \port(r2)
- .endm
-
-
- /*
- ** Write a byte to the SuperIO config area
- */
- .macro siowb offset, value
- li r3, 0
- li r4, (7<<3)
- li r5, \offset
- li r6, \value
- bl pci_write_cfg_byte
- .endm
-
-#endif
+++ /dev/null
-#include "macros.h"
-
-
- .globl pci_read_cfg_byte
-
-pci_read_cfg_byte:
- config_addr
- config_data 3
- eieio
- sync
- lbz r3, 0(r9)
- blr
-
-
- .globl pci_write_cfg_byte
-
-pci_write_cfg_byte:
- config_addr
- config_data 3
- stb r6, 0(r9)
- eieio
- sync
- blr
-
-
- .globl pci_read_cfg_word
-
-pci_read_cfg_word:
- config_addr
- config_data 2
- lhbrx r3, 0, r9
- eieio
- sync
- blr
-
-
- .globl pci_write_cfg_word
-
-pci_write_cfg_word:
- config_addr
- config_data 2
- sthbrx r6, 0, r9
- eieio
- sync
- blr
-
-
- .globl pci_read_cfg_long
-
-pci_read_cfg_long:
- config_addr
- config_data 0
- lwbrx r3, 0, r9
- eieio
- sync
- blr
-
-
- .globl pci_write_cfg_long
-
-pci_write_cfg_long:
- config_addr
- config_data 0
- stwbrx r6, 0, r9
- eieio
- sync
- blr
+++ /dev/null
-/*
- * Memory mapped IO
- *
- * (C) Copyright 2002
- * Hyperion Entertainment, ThomasF@hyperion-entertainment.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- * You may also use this under a BSD license.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- */
-
-#ifndef _MEMIO_H
-#define _MEMIO_H
-
-#include "short_types.h"
-
-#define IOBASE 0xFE000000
-
-#define in_byte(from) read_byte( (uint8 *)(IOBASE | (from)))
-#define in_word(from) read_word_little((uint16 *)(IOBASE | (from)))
-#define in_long(from) read_long_little((uint32 *)(IOBASE | (from)))
-#define out_byte(to, val) write_byte((uint8 *)(IOBASE | (to)), val)
-#define out_word(to, val) write_word_little((uint16 *)(IOBASE | (to)), val)
-#define out_long(to, val) write_long_little((uint32 *)(IOBASE | (to)), val)
-
-
-static inline uint8 read_byte(volatile uint8 *from)
-{
- int x;
- asm volatile ("lbz %0,%1\n eieio\n sync" : "=r" (x) : "m" (*from));
- return (uint8)x;
-}
-
-
-static inline void write_byte(volatile uint8 *to, uint8 x)
-{
- asm volatile ("stb %1,%0\n eieio\n sync" : "=m" (*to) : "r" (x));
-}
-
-static inline uint16 read_word_little(volatile uint16 *from)
-{
- int x;
- asm volatile ("lhbrx %0,0,%1\n eieio\n sync" : "=r" (x) : "r" (from), "m" (*from));
- return (uint16)x;
-}
-
-static inline uint16 read_word_big(volatile uint16 *from)
-{
- int x;
- asm volatile ("lhz %0,%1\n eieio\n sync" : "=r" (x) : "m" (*from));
- return (uint16)x;
-}
-
-static inline void write_word_little(volatile uint16 *to, int x)
-{
- asm volatile ("sthbrx %1,0,%2\n eieio\n sync" : "=m" (*to) : "r" (x), "r" (to));
-}
-
-static inline void write_word_big(volatile uint16 *to, int x)
-{
- asm volatile ("sth %1,%0\n eieio\n sync" : "=m" (*to) : "r" (x));
-}
-
-static inline uint32 read_long_little(volatile uint32 *from)
-{
- unsigned long x;
- asm volatile ("lwbrx %0,0,%1\n eieio\n sync" : "=r" (x) : "r" (from), "m"(*from));
- return (uint32)x;
-}
-
-static inline uint32 read_long_big(volatile uint32 *from)
-{
- unsigned long x;
- asm volatile ("lwz %0,%1\n eieio\n sync" : "=r" (x) : "m" (*from));
- return (uint32)x;
-}
-
-static inline void write_long_little(volatile uint32 *to, uint32 x)
-{
- asm volatile ("stwbrx %1,0,%2\n eieio\n sync" : "=m" (*to) : "r" (x), "r" (to));
-}
-
-static inline void write_long_big(volatile uint32 *to, uint32 x)
-{
- asm volatile ("stw %1,%0\n eieio\n sync" : "=m" (*to) : "r" (x));
-}
-
-#define CONFIG_ADDR(bus, devfn, offset) \
- write_long_big((uint32 *)0xFEC00CF8, \
- ((offset & 0xFC)<<24) | (devfn << 16) \
- | (bus<<8) | 0x80);
-#define CONFIG_DATA(offset,mask) ((void *)(0xFEE00CFC+(offset & mask)))
-
-
-uint8 pci_read_cfg_byte(int32 bus, int32 devfn, int32 offset);
-void pci_write_cfg_byte(int32 bus, int32 devfn, int32 offset, uint8 x);
-uint16 pci_read_cfg_word(int32 bus, int32 devfn, int32 offset);
-void pci_write_cfg_word(int32 bus, int32 devfn, int32 offset, uint16 x);
-uint32 pci_read_cfg_long(int32 bus, int32 devfn, int32 offset);
-void pci_write_cfg_long(int32 bus, int32 devfn, int32 offset, uint32 x);
-
-
-#endif
+++ /dev/null
-64 MB:
-0x00: 80 08 04 0c 09 01 40 00 01 a0 60 00 80 08 00 01
-0x10: 8f 04 04 01 01 00 06 a0 60 00 00 14 10 14 2d 10
-0x20: 20 10 20 10 00 00 00 00 00 00 00 00 00 00 00 00
-0x30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 f2
-0x40: 7f 61 00 00 00 00 00 00 46 04 00 ff ff ff ff ff
-0x50: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
-0x60: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
-0x70: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 64 f4
-
-512 MB:
-0x00: 80 08 04 0d 0a 02 40 00 01 75 54 00 82 08 00 01
-0x10: 8f 04 04 01 01 00 0f 00 00 00 00 14 0f 14 2d 40
-0x20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
-0x30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 d2
-0x40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-0x60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 fd
-
-256 MB:
-0x00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
-0x10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
-0x20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
-0x30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
-0x40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-0x60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 f6
-
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Thomas Frieden, Hyperion Entertainment
- * ThomasF@hyperion-entertainment.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "memio.h"
-
-void enable_nvram(void)
-{
- pci_write_cfg_byte(0, 0, 0x56, 0x0b);
-}
-
-void disable_nvram(void)
-{
- pci_write_cfg_byte(0, 0, 0x56, 0x0);
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * John W. Linville, linville@tuxdriver.com
- *
- * Modified from code for support of MIP405 and PIP405 boards. Previous
- * copyright follows.
- *
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- *
- * Source partly derived from:
- * linux/drivers/char/pc_keyb.c
- *
- *
- */
-#include <common.h>
-#include <asm/processor.h>
-#include <stdio_dev.h>
-#include "ps2kbd.h"
-
-
-unsigned char kbd_read_status(void);
-unsigned char kbd_read_input(void);
-void kbd_send_data(unsigned char data);
-void i8259_mask_irq(unsigned int irq);
-void i8259_unmask_irq(unsigned int irq);
-
-/* used only by send_data - set by keyboard_interrupt */
-
-
-#undef KBG_DEBUG
-
-#ifdef KBG_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-#define KBD_STAT_KOBF 0x01
-#define KBD_STAT_IBF 0x02
-#define KBD_STAT_SYS 0x04
-#define KBD_STAT_CD 0x08
-#define KBD_STAT_LOCK 0x10
-#define KBD_STAT_MOBF 0x20
-#define KBD_STAT_TI_OUT 0x40
-#define KBD_STAT_PARERR 0x80
-
-#define KBD_INIT_TIMEOUT 2000 /* Timeout in ms for initializing the keyboard */
-#define KBC_TIMEOUT 250 /* Timeout in ms for sending to keyboard controller */
-#define KBD_TIMEOUT 2000 /* Timeout in ms for keyboard command acknowledge */
-/*
- * Keyboard Controller Commands
- */
-
-#define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */
-#define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */
-#define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */
-#define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */
-#define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */
-#define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */
-#define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */
-#define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */
-#define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */
-#define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */
-#define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if
- initiated by the auxiliary device */
-#define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */
-
-/*
- * Keyboard Commands
- */
-
-#define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */
-#define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */
-#define KBD_CMD_ENABLE 0xF4 /* Enable scanning */
-#define KBD_CMD_DISABLE 0xF5 /* Disable scanning */
-#define KBD_CMD_RESET 0xFF /* Reset */
-
-/*
- * Keyboard Replies
- */
-
-#define KBD_REPLY_POR 0xAA /* Power on reset */
-#define KBD_REPLY_ACK 0xFA /* Command ACK */
-#define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */
-
-/*
- * Status Register Bits
- */
-
-#define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */
-#define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
-#define KBD_STAT_SELFTEST 0x04 /* Self test successful */
-#define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */
-#define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */
-#define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */
-#define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */
-#define KBD_STAT_PERR 0x80 /* Parity error */
-
-#define AUX_STAT_OBF (KBD_STAT_OBF | KBD_STAT_MOUSE_OBF)
-
-/*
- * Controller Mode Register Bits
- */
-
-#define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */
-#define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */
-#define KBD_MODE_SYS 0x04 /* The system flag (?) */
-#define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */
-#define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */
-#define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */
-#define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */
-#define KBD_MODE_RFU 0x80
-
-
-#define KDB_DATA_PORT 0x60
-#define KDB_COMMAND_PORT 0x64
-
-#define LED_SCR 0x01 /* scroll lock led */
-#define LED_CAP 0x04 /* caps lock led */
-#define LED_NUM 0x02 /* num lock led */
-
-#define KBD_BUFFER_LEN 0x20 /* size of the keyboardbuffer */
-
-
-static volatile char kbd_buffer[KBD_BUFFER_LEN];
-static volatile int in_pointer = 0;
-static volatile int out_pointer = 0;
-
-
-static unsigned char num_lock = 0;
-static unsigned char caps_lock = 0;
-static unsigned char scroll_lock = 0;
-static unsigned char shift = 0;
-static unsigned char ctrl = 0;
-static unsigned char alt = 0;
-static unsigned char e0 = 0;
-static unsigned char leds = 0;
-
-#define DEVNAME "ps2kbd"
-
-/* Simple translation table for the keys */
-
-static unsigned char kbd_plain_xlate[] = {
- 0xff,0x1b, '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=','\b','\t', /* 0x00 - 0x0f */
- 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']','\r',0xff, 'a', 's', /* 0x10 - 0x1f */
- 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';','\'', '`',0xff,'\\', 'z', 'x', 'c', 'v', /* 0x20 - 0x2f */
- 'b', 'n', 'm', ',', '.', '/',0xff,0xff,0xff, ' ',0xff,0xff,0xff,0xff,0xff,0xff, /* 0x30 - 0x3f */
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1', /* 0x40 - 0x4f */
- '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x50 - 0x5F */
- '\r',0xff,0xff
- };
-
-static unsigned char kbd_shift_xlate[] = {
- 0xff,0x1b, '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+','\b','\t', /* 0x00 - 0x0f */
- 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}','\r',0xff, 'A', 'S', /* 0x10 - 0x1f */
- 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"', '~',0xff, '|', 'Z', 'X', 'C', 'V', /* 0x20 - 0x2f */
- 'B', 'N', 'M', '<', '>', '?',0xff,0xff,0xff, ' ',0xff,0xff,0xff,0xff,0xff,0xff, /* 0x30 - 0x3f */
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1', /* 0x40 - 0x4f */
- '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x50 - 0x5F */
- '\r',0xff,0xff
- };
-
-static unsigned char kbd_ctrl_xlate[] = {
- 0xff,0x1b, '1',0x00, '3', '4', '5',0x1E, '7', '8', '9', '0',0x1F, '=','\b','\t', /* 0x00 - 0x0f */
- 0x11,0x17,0x05,0x12,0x14,0x18,0x15,0x09,0x0f,0x10,0x1b,0x1d,'\n',0xff,0x01,0x13, /* 0x10 - 0x1f */
- 0x04,0x06,0x08,0x09,0x0a,0x0b,0x0c, ';','\'', '~',0x00,0x1c,0x1a,0x18,0x03,0x16, /* 0x20 - 0x2f */
- 0x02,0x0e,0x0d, '<', '>', '?',0xff,0xff,0xff,0x00,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x30 - 0x3f */
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1', /* 0x40 - 0x4f */
- '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x50 - 0x5F */
- '\r',0xff,0xff
- };
-
-/******************************************************************
- * Init
- ******************************************************************/
-
-int isa_kbd_init (void)
-{
- char *result;
-
- result = kbd_initialize ();
- if (result != NULL) {
- result = kbd_initialize ();
- }
- if (result == NULL) {
- printf ("AT Keyboard initialized\n");
- irq_install_handler (KBD_INTERRUPT,
- (interrupt_handler_t *) kbd_interrupt,
- NULL);
- return (1);
- } else {
- printf ("%s\n", result);
- return (-1);
- }
-}
-
-#ifdef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
-extern int overwrite_console (void);
-#else
-int overwrite_console (void)
-{
- return (0);
-}
-#endif
-
-int drv_isa_kbd_init (void)
-{
- int error;
- struct stdio_dev kbddev ;
- char *stdinname = getenv ("stdin");
-
- if(isa_kbd_init() == -1)
- return -1;
- memset (&kbddev, 0, sizeof(kbddev));
- strcpy(kbddev.name, DEVNAME);
- kbddev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
- kbddev.putc = NULL ;
- kbddev.puts = NULL ;
- kbddev.getc = kbd_getc ;
- kbddev.tstc = kbd_testc ;
-
- error = stdio_register (&kbddev);
- if(error==0) {
- /* check if this is the standard input device */
- if(strcmp(stdinname,DEVNAME)==0) {
- /* reassign the console */
- if(overwrite_console()) {
- return 1;
- }
- error=console_assign(stdin,DEVNAME);
- if(error==0)
- return 1;
- else
- return error;
- }
- return 1;
- }
- return error;
-}
-
-/******************************************************************
- * Queue handling
- ******************************************************************/
-/* puts character in the queue and sets up the in and out pointer */
-void kbd_put_queue(char data)
-{
- if((in_pointer+1)==KBD_BUFFER_LEN) {
- if(out_pointer==0) {
- return; /* buffer full */
- } else{
- in_pointer=0;
- }
- } else {
- if((in_pointer+1)==out_pointer)
- return; /* buffer full */
- in_pointer++;
- }
- kbd_buffer[in_pointer]=data;
- return;
-}
-
-/* test if a character is in the queue */
-int kbd_testc(void)
-{
- if(in_pointer==out_pointer)
- return(0); /* no data */
- else
- return(1);
-}
-/* gets the character from the queue */
-int kbd_getc(void)
-{
- char c;
-
- while(in_pointer==out_pointer);
- if((out_pointer+1)==KBD_BUFFER_LEN)
- out_pointer=0;
- else
- out_pointer++;
- c=kbd_buffer[out_pointer];
- return (int)c;
-
-}
-
-/* set LEDs */
-
-void kbd_set_leds(void)
-{
- if(caps_lock==0)
- leds&=~LED_CAP; /* switch caps_lock off */
- else
- leds|=LED_CAP; /* switch on LED */
- if(num_lock==0)
- leds&=~LED_NUM; /* switch LED off */
- else
- leds|=LED_NUM; /* switch on LED */
- if(scroll_lock==0)
- leds&=~LED_SCR; /* switch LED off */
- else
- leds|=LED_SCR; /* switch on LED */
- kbd_send_data(KBD_CMD_SET_LEDS);
- kbd_send_data(leds);
-}
-
-void handle_keyboard_event (unsigned char scancode)
-{
- unsigned char keycode;
-
- /* Convert scancode to keycode */
- PRINTF ("scancode %x\n", scancode);
- if (scancode == 0xe0) {
- e0 = 1; /* special charakters */
- return;
- }
- if (e0 == 1) {
- e0 = 0; /* delete flag */
- if (!(((scancode & 0x7F) == 0x38) || /* the right ctrl key */
- ((scancode & 0x7F) == 0x1D) || /* the right alt key */
- ((scancode & 0x7F) == 0x35) || /* the right '/' key */
- ((scancode & 0x7F) == 0x1C) || /* the right enter key */
- ((scancode) == 0x48) || /* arrow up */
- ((scancode) == 0x50) || /* arrow down */
- ((scancode) == 0x4b) || /* arrow left */
- ((scancode) == 0x4d)))
- /* arrow right */
- /* we swallow unknown e0 codes */
- return;
- }
- /* special cntrl keys */
- switch (scancode) {
- case 0x48:
- kbd_put_queue (27);
- kbd_put_queue (91);
- kbd_put_queue ('A');
- return;
- case 0x50:
- kbd_put_queue (27);
- kbd_put_queue (91);
- kbd_put_queue ('B');
- return;
- case 0x4b:
- kbd_put_queue (27);
- kbd_put_queue (91);
- kbd_put_queue ('D');
- return;
- case 0x4D:
- kbd_put_queue (27);
- kbd_put_queue (91);
- kbd_put_queue ('C');
- return;
- case 0x58: /* F12 key */
- if (ctrl == 1) {
- extern int console_changed;
-
- setenv ("stdin", DEVNAME);
- setenv ("stdout", "vga");
- console_changed = 1;
- }
- return;
- case 0x2A:
- case 0x36: /* shift pressed */
- shift = 1;
- return; /* do nothing else */
- case 0xAA:
- case 0xB6: /* shift released */
- shift = 0;
- return; /* do nothing else */
- case 0x38: /* alt pressed */
- alt = 1;
- return; /* do nothing else */
- case 0xB8: /* alt released */
- alt = 0;
- return; /* do nothing else */
- case 0x1d: /* ctrl pressed */
- ctrl = 1;
- return; /* do nothing else */
- case 0x9d: /* ctrl released */
- ctrl = 0;
- return; /* do nothing else */
- case 0x46: /* scrollock pressed */
- scroll_lock = ~scroll_lock;
- kbd_set_leds ();
- return; /* do nothing else */
- case 0x3A: /* capslock pressed */
- caps_lock = ~caps_lock;
- kbd_set_leds ();
- return;
- case 0x45: /* numlock pressed */
- num_lock = ~num_lock;
- kbd_set_leds ();
- return;
- case 0xC6: /* scroll lock released */
- case 0xC5: /* num lock released */
- case 0xBA: /* caps lock released */
- return; /* just swallow */
- }
- if ((scancode & 0x80) == 0x80) /* key released */
- return;
- /* now, decide which table we need */
- if (scancode > (sizeof (kbd_plain_xlate) / sizeof (kbd_plain_xlate[0]))) { /* scancode not in list */
- PRINTF ("unkown scancode %X\n", scancode);
- return; /* swallow it */
- }
- /* setup plain code first */
- keycode = kbd_plain_xlate[scancode];
- if (caps_lock == 1) { /* caps_lock is pressed, overwrite plain code */
- if (scancode > (sizeof (kbd_shift_xlate) / sizeof (kbd_shift_xlate[0]))) { /* scancode not in list */
- PRINTF ("unkown caps-locked scancode %X\n", scancode);
- return; /* swallow it */
- }
- keycode = kbd_shift_xlate[scancode];
- if (keycode < 'A') { /* we only want the alphas capital */
- keycode = kbd_plain_xlate[scancode];
- }
- }
- if (shift == 1) { /* shift overwrites caps_lock */
- if (scancode > (sizeof (kbd_shift_xlate) / sizeof (kbd_shift_xlate[0]))) { /* scancode not in list */
- PRINTF ("unkown shifted scancode %X\n", scancode);
- return; /* swallow it */
- }
- keycode = kbd_shift_xlate[scancode];
- }
- if (ctrl == 1) { /* ctrl overwrites caps_lock and shift */
- if (scancode > (sizeof (kbd_ctrl_xlate) / sizeof (kbd_ctrl_xlate[0]))) { /* scancode not in list */
- PRINTF ("unkown ctrl scancode %X\n", scancode);
- return; /* swallow it */
- }
- keycode = kbd_ctrl_xlate[scancode];
- }
- /* check if valid keycode */
- if (keycode == 0xff) {
- PRINTF ("unkown scancode %X\n", scancode);
- return; /* swallow unknown codes */
- }
-
- kbd_put_queue (keycode);
- PRINTF ("%x\n", keycode);
-}
-
-/*
- * This reads the keyboard status port, and does the
- * appropriate action.
- *
- */
-unsigned char handle_kbd_event (void)
-{
- unsigned char status = kbd_read_status ();
- unsigned int work = 10000;
-
- while ((--work > 0) && (status & KBD_STAT_OBF)) {
- unsigned char scancode;
-
- scancode = kbd_read_input ();
-
- /* Error bytes must be ignored to make the
- Synaptics touchpads compaq use work */
- /* Ignore error bytes */
- if (!(status & (KBD_STAT_GTO | KBD_STAT_PERR))) {
- if (status & KBD_STAT_MOUSE_OBF); /* not supported: handle_mouse_event(scancode); */
- else
- handle_keyboard_event (scancode);
- }
- status = kbd_read_status ();
- }
- if (!work)
- PRINTF ("pc_keyb: controller jammed (0x%02X).\n", status);
- return status;
-}
-
-/******************************************************************************
- * Lowlevel Part of keyboard section
- */
-unsigned char kbd_read_status(void)
-{
- return(in8(CONFIG_SYS_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT));
-}
-
-unsigned char kbd_read_input(void)
-{
- return(in8(CONFIG_SYS_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT));
-}
-
-void kbd_write_command(unsigned char cmd)
-{
- out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT,cmd);
-}
-
-void kbd_write_output(unsigned char data)
-{
- out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT, data);
-}
-
-int kbd_read_data(void)
-{
- int val;
- unsigned char status;
-
- val = -1;
- status = kbd_read_status();
- if (status & KBD_STAT_OBF) {
- val = kbd_read_input();
- if (status & (KBD_STAT_GTO | KBD_STAT_PERR))
- val = -2;
- }
- return val;
-}
-
-int kbd_wait_for_input (void)
-{
- unsigned long timeout;
- int val;
-
- timeout = KBD_TIMEOUT;
- val = kbd_read_data ();
- while (val < 0) {
- if (timeout-- == 0)
- return -1;
- udelay (1000);
- val = kbd_read_data ();
- }
- return val;
-}
-
-
-int kb_wait (void)
-{
- unsigned long timeout = KBC_TIMEOUT * 10;
-
- do {
- unsigned char status = handle_kbd_event ();
-
- if (!(status & KBD_STAT_IBF))
- return 0; /* ok */
- udelay (1000);
- timeout--;
- } while (timeout);
- return 1;
-}
-
-void kbd_write_command_w (int data)
-{
- if (kb_wait ())
- PRINTF ("timeout in kbd_write_command_w\n");
- kbd_write_command (data);
-}
-
-void kbd_write_output_w (int data)
-{
- if (kb_wait ())
- PRINTF ("timeout in kbd_write_output_w\n");
- kbd_write_output (data);
-}
-
-void kbd_send_data (unsigned char data)
-{
- unsigned char status;
-
- i8259_mask_irq (KBD_INTERRUPT); /* disable interrupt */
- kbd_write_output_w (data);
- status = kbd_wait_for_input ();
- if (status == KBD_REPLY_ACK)
- i8259_unmask_irq (KBD_INTERRUPT); /* enable interrupt */
-}
-
-
-char *kbd_initialize (void)
-{
- int status;
-
- in_pointer = 0; /* delete in Buffer */
- out_pointer = 0;
- /*
- * Test the keyboard interface.
- * This seems to be the only way to get it going.
- * If the test is successful a x55 is placed in the input buffer.
- */
- kbd_write_command_w (KBD_CCMD_SELF_TEST);
- if (kbd_wait_for_input () != 0x55)
- return "Kbd: failed self test";
- /*
- * Perform a keyboard interface test. This causes the controller
- * to test the keyboard clock and data lines. The results of the
- * test are placed in the input buffer.
- */
- kbd_write_command_w (KBD_CCMD_KBD_TEST);
- if (kbd_wait_for_input () != 0x00)
- return "Kbd: interface failed self test";
- /*
- * Enable the keyboard by allowing the keyboard clock to run.
- */
- kbd_write_command_w (KBD_CCMD_KBD_ENABLE);
- status = kbd_wait_for_input ();
- /*
- * Reset keyboard. If the read times out
- * then the assumption is that no keyboard is
- * plugged into the machine.
- * This defaults the keyboard to scan-code set 2.
- *
- * Set up to try again if the keyboard asks for RESEND.
- */
- do {
- kbd_write_output_w (KBD_CMD_RESET);
- status = kbd_wait_for_input ();
- if (status == KBD_REPLY_ACK)
- break;
- if (status != KBD_REPLY_RESEND) {
- PRINTF ("status: %X\n", status);
- return "Kbd: reset failed, no ACK";
- }
- } while (1);
- if (kbd_wait_for_input () != KBD_REPLY_POR)
- return "Kbd: reset failed, no POR";
-
- /*
- * Set keyboard controller mode. During this, the keyboard should be
- * in the disabled state.
- *
- * Set up to try again if the keyboard asks for RESEND.
- */
- do {
- kbd_write_output_w (KBD_CMD_DISABLE);
- status = kbd_wait_for_input ();
- if (status == KBD_REPLY_ACK)
- break;
- if (status != KBD_REPLY_RESEND)
- return "Kbd: disable keyboard: no ACK";
- } while (1);
-
- kbd_write_command_w (KBD_CCMD_WRITE_MODE);
- kbd_write_output_w (KBD_MODE_KBD_INT
- | KBD_MODE_SYS
- | KBD_MODE_DISABLE_MOUSE | KBD_MODE_KCC);
-
- /* AMCC powerpc portables need this to use scan-code set 1 -- Cort */
- kbd_write_command_w (KBD_CCMD_READ_MODE);
- if (!(kbd_wait_for_input () & KBD_MODE_KCC)) {
- /*
- * If the controller does not support conversion,
- * Set the keyboard to scan-code set 1.
- */
- kbd_write_output_w (0xF0);
- kbd_wait_for_input ();
- kbd_write_output_w (0x01);
- kbd_wait_for_input ();
- }
- kbd_write_output_w (KBD_CMD_ENABLE);
- if (kbd_wait_for_input () != KBD_REPLY_ACK)
- return "Kbd: enable keyboard: no ACK";
-
- /*
- * Finally, set the typematic rate to maximum.
- */
- kbd_write_output_w (KBD_CMD_SET_RATE);
- if (kbd_wait_for_input () != KBD_REPLY_ACK)
- return "Kbd: Set rate: no ACK";
- kbd_write_output_w (0x00);
- if (kbd_wait_for_input () != KBD_REPLY_ACK)
- return "Kbd: Set rate: no ACK";
- return NULL;
-}
-
-void kbd_interrupt(void)
-{
- handle_kbd_event();
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * John W. Linville, linville@tuxdriver.com
- *
- * Modified from code for support of MIP405 and PIP405 boards. Previous
- * copyright follows.
- *
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#ifndef _KBD_H_
-#define _KBD_H_
-
-extern int kbd_testc(void);
-extern int kbd_getc(void);
-extern void kbd_interrupt(void);
-extern char *kbd_initialize(void);
-
-unsigned char kbd_is_init(void);
-#define KBD_INTERRUPT 1
-#endif
+++ /dev/null
-#include <common.h>
-#include <ns16550.h>
-#include "short_types.h"
-#include "memio.h"
-#include "articiaS.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifndef CONFIG_SYS_NS16550
-static uint32 ComPort1;
-
-uint16 SerialEcho = 1;
-
-
-#define RECEIVER_HOLDING 0
-#define TRANSMITTER_HOLDING 0
-#define INTERRUPT_ENABLE 1
-#define INTERRUPT_STATUS 2
-#define FIFO_CONTROL 2
-#define LINE_CONTROL 3
-#define MODEM_CONTROL 4
-#define LINE_STATUS 5
-#define MODEM_STATUS 6
-#define SCRATCH_PAD 7
-
-#define DIVISOR_LATCH_LSB 0
-#define DIVISOR_LATCH_MSB 1
-#define PRESCALER_DIVISION 5
-
-#define COM_WRITE_BYTE(reg, byte) out_byte((ComPort1+reg), byte)
-#define COM_READ_BYTE(reg) in_byte((ComPort1+reg))
-
-static int serial_init_done = 0;
-
-void serial_init (void)
-{
-#if 0
- uint32 clock_divisor = 115200 / baudrate;
- uint8 cfg;
- uint8 a;
- uint16 devfn = 7 << 3;
-
- if (serial_init_done)
- return;
-
- /* Enter configuration mode */
- cfg = pci_read_cfg_byte (0, devfn, 0x85);
- pci_write_cfg_byte (0, devfn, 0x85, cfg | 0x02);
-
- /* Set serial port COM1 as 3F8 */
- out_byte (0x3F0, 0xE7);
- out_byte (0x3f1, 0xfe);
-
- /* Set serial port COM2 as 2F8 */
- out_byte (0x3f0, 0xe8);
- out_byte (0x3f1, 0xeb);
-
- /* Enable */
- out_byte (0x3f0, 0xe2);
- a = in_byte (0x3f1);
- a |= 0xc;
- out_byte (0x3f0, 0xe2);
- out_byte (0x3f1, a);
-
- /* Reset the configuration mode */
- pci_write_cfg_byte (0, devfn, 0x85, cfg);
-#endif
-
- ComPort1 = 0x3F8;
-
- /* Disable interrupts */
- COM_WRITE_BYTE (INTERRUPT_ENABLE, 0x00);
-
- /* Set baud rate */
- /* COM_WRITE_BYTE(LINE_CONTROL, 0x83); */
- /* COM_WRITE_BYTE(DIVISOR_LATCH_LSB, (uint8)(clock_divisor & 0xFF)); */
- /* COM_WRITE_BYTE(DIVISOR_LATCH_MSB, (uint8)(clock_divisor >> 8)); */
- /* __asm__("eieio"); */
-
- /* Set 8-N-1 */
- COM_WRITE_BYTE (LINE_CONTROL, 0x03);
- __asm__ ("eieio");
-
- /* Disable FIFO */
- COM_WRITE_BYTE (MODEM_CONTROL, 0x03);
- COM_WRITE_BYTE (FIFO_CONTROL, 0x07);
-
- __asm__ ("eieio");
- serial_init_done = 1;
-}
-
-extern int console_changed;
-
-void serial_putc (const char sendme)
-{
- if (sendme == '\n') {
- while ((in_byte (0x3FD) & 0x40) == 0);
- out_byte (0x3f8, 0x0D);
- }
-
- while ((in_byte (0x3FD) & 0x40) == 0);
- out_byte (0x3f8, sendme);
-}
-
-int serial_getc (void)
-{
-#if 0
- uint8 c;
-
- for (;;) {
- uint8 x = in_byte (0x3FD);
-
- if (x & 0x01)
- break;
-
- if (x & 0x0C)
- out_byte (0x3fd, 0x0c);
- }
-
- c = in_byte (0x3F8);
-
- return c;
-#else
- while ((in_byte (0x3FD) & 0x01) == 0) {
- if (console_changed != 0) {
- printf ("Console changed\n");
- console_changed = 0;
- return 0;
- }
- }
- return in_byte (0x3F8);
-#endif
-}
-
-int serial_tstc (void)
-{
- return (in_byte (0x03FD) & 0x01) != 0;
-}
-
-void serial_debug_putc (int c)
-{
- serial_puts ("DBG");
- serial_putc (c);
- serial_putc (0x0d);
- serial_putc (0x0A);
-}
-
-#else
-
-const NS16550_t Com0 = (NS16550_t) CONFIG_SYS_NS16550_COM1;
-const NS16550_t Com1 = (NS16550_t) CONFIG_SYS_NS16550_COM2;
-
-int serial_init (void)
-{
- uint32 clock_divisor = 115200 / gd->baudrate;
-
- NS16550_init (Com0, clock_divisor);
- /* NS16550_reinit(Com1, clock_divisor); */
- /* serial_puts("COM1: 3F8h initalized"); */
-
- return (0);
-}
-
-#if 0
-void serial_putc (const char c)
-{
- NS16550_putc (Com0, c);
- if (c == '\n')
- NS16550_putc (Com0, 0x0D);
-}
-
-int serial_getc (void)
-{
- return (int) NS16550_getc (Com0);
-}
-
-int serial_tstc (void)
-{
- return NS16550_tstc (Com0);
-}
-#else
-void serial_putc (const char sendme)
-{
- if (sendme == '\n') {
- while ((in_byte (0x3FD) & 0x40) == 0);
- out_byte (0x3f8, 0x0D);
- }
-
- while ((in_byte (0x3FD) & 0x40) == 0);
- out_byte (0x3f8, sendme);
-}
-
-
-extern int console_changed;
-
-int serial_getc (void)
-{
-#if 0
- uint8 c;
-
- for (;;) {
- uint8 x = in_byte (0x3FD);
-
- if (x & 0x01)
- break;
-
- if (x & 0x0C)
- out_byte (0x3fd, 0x0c);
- }
-
- c = in_byte (0x3F8);
-
- return c;
-#else
- while ((in_byte (0x3FD) & 0x01) == 0) {
- if (console_changed != 0) {
- console_changed = 0;
- return 0;
- }
- }
-
- return in_byte (0x3F8);
-#endif
-}
-
-int serial_tstc (void)
-{
- return (in_byte (0x03FD) & 0x01) != 0;
-}
-#endif
-
-#endif
-
-void serial_puts (const char *string)
-{
- while (*string)
- serial_putc (*string++);
-}
-
-void serial_setbrg (void)
-{
- uint32 clock_divisor = 115200 / gd->baudrate;
-
- NS16550_init (Com0, clock_divisor);
-}
+++ /dev/null
-/*
- * short type names
- *
- * (C) Copyright 2002
- * Hyperion Entertainment, ThomasF@hyperion-entertainment.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _SHORT_TYPES_H
-#define _SHORT_TYPES_H
-
-typedef unsigned long uint32;
-typedef long int32;
-typedef unsigned short uint16;
-typedef short int16;
-typedef unsigned char uint8;
-typedef signed char int8;
-
-#endif
+++ /dev/null
-#include "memio.h"
-#include "articiaS.h"
-
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-
-
-void sm_write_mode(void)
-{
- out_byte(0xA539, 0x00);
- out_byte(0xA53A, 0x03);
-}
-
-void sm_read_mode(void)
-{
- out_byte(0xA53A, 0x02);
- out_byte(0xA539, 0x02);
-}
-
-void sm_write_byte(uint8 writeme)
-{
- int i;
- int level;
-
- out_byte(0xA539, 0x00);
-
- level = 0;
-
- for (i=0; i<8; i++)
- {
- if ((writeme & 0x80) == (level<<7))
- {
- /* Bit did not change, rewrite strobe */
- out_byte(0xA539, level | 0x02);
- out_byte(0xA539, level);
- }
- else
- {
- /* Bit changed, set bit, then strobe */
- level = (writeme & 0x80) >> 7;
- out_byte(0xA539, level);
- out_byte(0xA539, level | 0x02);
- out_byte(0xA539, level);
- }
- writeme <<= 1;
- }
- out_byte(0xA539, 0x00);
-}
-
-uint8 sm_read_byte(void)
-{
- uint8 retme, r;
- int i;
-
- retme = 0;
- for (i=0; i<8; i++)
- {
- retme <<= 1;
- out_byte(0xA539, 0x00);
- out_byte(0xA539, 0x02);
- r = in_byte(0xA538) & 0x01;
- retme |= r;
- }
-
- return retme;
-}
-
-int sm_get_ack(void)
-{
- uint8 r;
- r = in_byte(0xA538);
- if ((r&0x01) == 0) return TRUE;
- else return FALSE;
-}
-
-void sm_write_ack(void)
-{
- out_byte(0xA539, 0x00);
- out_byte(0xA539, 0x02);
- out_byte(0xA539, 0x00);
-}
-
-void sm_write_nack(void)
-{
- out_byte(0xA539, 0x01);
- out_byte(0xA539, 0x03);
- out_byte(0xA539, 0x01);
-}
-
-void sm_send_start(void)
-{
- out_byte(0xA539, 0x03);
- out_byte(0xA539, 0x02);
-}
-
-void sm_send_stop(void)
-{
- out_byte(0xA539, 0x02);
- out_byte(0xA539, 0x03);
-}
-
-int sm_read_byte_from_device(uint8 addr, uint8 reg, uint8 *storage)
-{
- /* S Addr Wr */
- sm_write_mode();
- sm_send_start();
- sm_write_byte((addr<<1));
-
- /* [A] */
- sm_read_mode();
- if (sm_get_ack() == FALSE) return FALSE;
-
- /* Comm */
- sm_write_mode();
- sm_write_byte(reg);
-
- /* [A] */
- sm_read_mode();
- if (sm_get_ack() == FALSE) return FALSE;
-
- /* S Addr Rd */
- sm_write_mode();
- sm_send_start();
- sm_write_byte((addr<<1)|1);
-
- /* [A] */
- sm_read_mode();
- if (sm_get_ack() == FALSE) return FALSE;
-
- /* [Data] */
- *storage = sm_read_byte();
-
- /* NA */
- sm_write_mode();
- sm_write_nack();
- sm_send_stop();
-
- return TRUE;
-}
-
-void sm_init(void)
-{
- /* Switch to PMC mode */
- pci_write_cfg_byte(0, 0, REG_GROUP, (uint8)(REG_GROUP_SPECIAL|REG_GROUP_POWER));
-
- /* Set GPIO Base */
- pci_write_cfg_long(0, 0, 0x40, 0xa500);
-
- /* Enable GPIO */
- pci_write_cfg_byte(0, 0, 0x44, 0x11);
-
- /* Set both GPIO 0 and 1 as output */
- out_byte(0xA53A, 0x03);
-}
-
-
-void sm_term(void)
-{
- /* Switch to normal mode */
- pci_write_cfg_byte(0, 0, REG_GROUP, 0);
-}
-
-
-int sm_get_data(uint8 *DataArray, int dimm_socket)
-{
- int j;
-
-#if 0
- /* Switch to PMC mode */
- pci_write_cfg_byte(0, 0, REG_GROUP, (uint8)(REG_GROUP_SPECIAL|REG_GROUP_POWER));
-
- /* Set GPIO Base */
- pci_write_cfg_long(0, 0, 0x40, 0xa500);
-
- /* Enable GPIO */
- pci_write_cfg_byte(0, 0, 0x44, 0x11);
-
- /* Set both GPIO 0 and 1 as output */
- out_byte(0xA53A, 0x03);
-#endif
-
- sm_init();
- /* Start reading the rom */
-
- j = 0;
-
- do
- {
- if (sm_read_byte_from_device(dimm_socket, (uint8)j, DataArray) == FALSE)
- {
- sm_term();
- return FALSE;
- }
-
- DataArray++;
- j++;
- } while (j < 128);
-
- sm_term();
- return TRUE;
-}
+++ /dev/null
-#ifndef _SMBUS_H_
-#define _SMBUS_H_
-
-#include "short_types.h"
-
-#define SM_DIMM0_ADDR 0x51
-#define SM_DIMM1_ADDR 0x52
-
-void sm_write_mode(void);
-void sm_read_mode(void);
-void sm_write_byte(uint8 writeme);
-uint8 sm_read_byte(void);
-int sm_get_ack(void);
-void sm_write_ack(void);
-void sm_write_nack(void);
-void sm_send_start(void);
-void sm_send_stop(void);
-int sm_read_byte_from_device(uint8 addr, uint8 reg, uint8 *storage);
-int sm_get_data(uint8 *DataArray, int dimm_socket);
-void sm_init(void);
-void sm_term(void);
-#endif
+++ /dev/null
-
- /*------------------------------------------------------*/
- /* TERON Articia / SDRAM Init */
- /*------------------------------------------------------*/
-
-* XD_CTL = 0x81000000 (0x74)
-
-* HBUS_ACC_CTL_0 &= 0xFFFFFDFF (0x5c)
- /* host bus access ctl reg 2(5e) */
- /* set - CPU read from memory data one clock after data is latched */
-
-* GLOBL_INFO_0 |= 0x00004000 (0x50)
- /* global info register 2 (52), AGP/PCI bus 1 arbiter is addressed in Articia S */
-
- PCI_1_SB_CONFIG_0 |= 0x00000400 (0x80d0)
- /* PCI1 side band config reg 2 (d2), enable read acces while write buffer not empty */
-
- MEM_RAS_CTL_0 |= 0x3f000000 (0xcc)
- &= 0x3fffffff
- /* RAS park control reg 0(cc), park access enable is set */
-
- HOST_RDBUF_CTL |= 0x10000000 (0x70)
- &= 0x10ffffff
- /* host read buffer control reg, enable prefetch for CPU read from DRAM control */
-
- HBUS_ACC_CTL_0 |= 0x0100001f (0x5c)
- &= 0xf1ffffff
- /* host bus access control register, enable CPU address bus pipe control */
- /* two outstanding requests, *** changed to 2 from 3 */
- /* enable line merge write control for CPU write to system memory, PCI 1 */
- /* and PCI 0 bus memory; enable page merge write control for write to */
- /* PCI bus 0 & bus 1 memory */
-
- SRAM_CTL |= 0x00004000 (0xc8)
- &= 0xffbff7ff
- /* DRAM detail timing control register 1 (ca), bit 3 set to 0 */
- /* DRAM start access latency control - wait for one clock */
- /* ff9f changed to ffbf */
-
- DIM0_TIM_CTL_0 = 0x737d737d (0xc9)
- /* DRAM timing control for dimm0 & dimm1; set wait one clock */
- /* cycle for next data access */
-
- DIM2_TIM_CTL_0 = 0x737d737d (0xca)
- /* DRAM timing control for dimm2 & dimm3; set wait one clock */
- /* cycle for next data access */
-
- DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB (0x90)
- /* set dimm0 bank0 for 128 MB */
-
- DIM0_BNK1_CTL_0 = BNK1_RAM_SIZ_128MB (0x94)
- /* set dimm0 for bank1 */
-
- DIM0_TIM_CTL_0 = 0xf3bf0000 (0xc9)
- /* dimm0 timing control register; RAS - CAS latency - 4 clock */
- /* CAS access latency - 3 wait; pre-charge latency - 3 wait */
- /* pre-charge command period control - 5 clock; wait one clock */
- /* cycle for next data access; read to write access latency control */
- /* - 2 clock cycles */
-
- DRAM_GBL_CTL_0 |= 0x00000100 (0xc0)
- &= 0xffff01ff
- /* memory global control register - support buffer sdram on bank 0 */
-
- DRAM_ECC_CTL_0 |= 0x00260000 (0xc4)
- &= 0xff26ffff
- /* enable ECC; enable read, modify, write control */
-
- DRAM_REF_CTL_0 = DRAM_REF_DATA (0xb8)
- /* set DRAM refresh parameters *** changed to 00940100 */
-
- nop
- nop
- nop
- nop
- nop
-
- DRAM_ECC_CTL_0 |= 0x20243280 (0xc4)
- /* turn off ecc */
- /* for SDRAM bank 0 */
-
- DRAM_ECC_CTL_0 |= 0x20243290 (0xc4) ?
- /* for SDRAM bank 1 */
-
-
-/* Additional Stuff...*/
-
- GLOBL_CTRL |= 0x20000b00 (0x54)
-
- PCI_0_SB_CONFIG |= 0x04100007 (0xd0)
- /* PCI 0 Side band config reg*/
-
- 0x8000083c |= 0x00080000
- /* Disable VGA decode on PCI Bus 1 */
-
-
-/*End Additional Stuff..*/
-
- /*--------------------------------------------------------------*/
- /* TERON serial port initialization code */
- /*--------------------------------------------------------------*/
-
- 0x84380080 |= 0x00030000
- /* enable super IO configuration VIA chip Register 85 */
- /* Enable super I/O config mode */
-
- 0xfe0003f0 = 0xe2
- bl delay1
-
- 0xfe0003f1 = 0x0f
- bl delay1
- /* enable com1 & com2, parallel port disabled */
-
- 0xfe0003f0 = 0xe7
- bl delay1
- /* let's make com1 base as 0x3f8 */
-
- 0xfe0003f1 = 0xfe
- bl delay1
-
- 0xfe0003f0 = 0xe8
- bl delay1
- /* let's make com2 base as 0x2f8 */
-
- 0xfe0003f1 = 0xbe
-
- 0x84380080 &= 0xfffdffff
- /* closing super IO configuration VIA chip Register 85 */
-
-
-/* -------------------------------*/
-
- 0xfe0003fb = 0x83
- bl delay1
- /*latch enable word length -8 bit */ /* set mslab bit */
- 0xfe0003f8 = 0x0c
- bl delay1
- /* set baud rate lsb for 9600 baud */
- 0xfe0003f9 = 0x0
- bl delay1
- /* set baud rate msb for 9600 baud */
- 0xfe0003fb = 0x03
- bl delay1
- /* reset mslab */
-
- /*--------------------------------------------------------------*/
- /* END TERON Serial Port Initialization Code */
- /*--------------------------------------------------------------*/
-
-
- /*--------------------------------------------------------------*/
- /* END TERON Articia / SDRAM Initialization code */
- /*--------------------------------------------------------------*/
-
-Proposed from Documentation:
-
-write dmem 0xfec00cf8 0x50000080
-write dmem 0xfee00cfc 0xc0305411
-
- Writes to index 0x50-0x53.
- 0x50: Global Information Register 0
- 0xC0 = Little Endian CPU, Sequential order Burst
- 0x51: Global Information Register 1
- Read only, 0x30 = Provides PowerPC and X86 support
- 0x52: Global Information Register 2
- 0x05 = 64/128 bit CPU bus support
- 0x53: Global Information Register 3
- 0x80 = PCI Bus 0 grant active time is 1 clock after REQ# deasserted
-
-write dmem 0xfec00cf8 0x5c000080
-write dmem 0xfee00cfc 0xb300011F
-
-write dmem 0xfec00cf8 0xc8000080
-write dmem 0xfee00cfc 0x0020f100
-
-write dmem 0xfec00cf8 0x90000080
-write dmem 0xfee00cfc 0x007fe700
-
-write dmem 0xfec00cf8 0x9400080
-write dmem 0xfee00cfc 0x007fe700
-
-write dmem 0xfec00cf8 0xb0000080
-write dmem 0xfee00cfc 0x737d737d
-
-write dmem 0xfec00cf8 0xb4000080
-write dmem 0xfee00cfc 0x737d737d
-
-write dmem 0xfec00cf8 0xc0000080
-write dmem 0xfee00cfc 0x40005500
-
-write dmem 0xfec00cf8 0xb8000080
-write dmem 0xfee00cfc 0x00940100
-
-write dmem 0xfec00cf8 0xc4000080
-write dmem 0xfee00cfc 0x00003280
-
-write dmem 0xfec00cf8 0xc4000080
-write dmem 0xfee00cfc 0x00003290
+++ /dev/null
-- Init interrupt controller
-- init sdram
-- init ide controller
\ No newline at end of file
+++ /dev/null
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * u-boot.lds - linker script for U-Boot on the AmigaOneG3SE Board.
- */
-
-OUTPUT_ARCH(powerpc)
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- arch/powerpc/cpu/74xx_7xx/start.o (.text)
-/* store the environment in a seperate sector in the boot flash */
-/* . = env_offset; */
- common/env_embedded.o(.text)
-
- *(.text)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.eh_frame)
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss (NOLOAD) :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = ALIGN(4) /*.*/ ;
- PROVIDE (end = ALIGN(4) /*.*/);
-}
+++ /dev/null
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Note: Part of this code has been derived from linux
- *
- */
-
-/**********************************************************************
- * How it works:
- * -------------
- * The framelist / Transfer descriptor / Queue Heads are similar like
- * in the linux usb_uhci.c.
- *
- * During initialization, the following skeleton is allocated in init_skel:
- *
- * framespecific | common chain
- *
- * framelist[]
- * [ 0 ]-----> TD ---------\
- * [ 1 ]-----> TD ----------> TD ------> QH -------> QH -------> QH ---> NULL
- * ... TD ---------/
- * [1023]-----> TD --------/
- *
- * ^^ ^^ ^^ ^^ ^^
- * 7 TDs for 1 TD for Start of Start of End Chain
- * INT (2-128ms) 1ms-INT CTRL Chain BULK Chain
- *
- *
- * Since this is a bootloader, the isochronous transfer descriptor have been removed.
- *
- * Interrupt Transfers.
- * --------------------
- * For Interupt transfers USB_MAX_TEMP_INT_TD Transfer descriptor are available. They
- * will be inserted after the appropriate (depending the interval setting) skeleton TD.
- * If an interrupt has been detected the dev->irqhandler is called. The status and number
- * of transfered bytes is stored in dev->irq_status resp. dev->irq_act_len. If the
- * dev->irqhandler returns 0, the interrupt TD is removed and disabled. If an 1 is returned,
- * the interrupt TD will be reactivated.
- *
- * Control Transfers
- * -----------------
- * Control Transfers are issued by filling the tmp_td with the appropriate data and connect
- * them to the qh_cntrl queue header. Before other control/bulk transfers can be issued,
- * the programm has to wait for completion. This does not allows asynchronous data transfer.
- *
- * Bulk Transfers
- * --------------
- * Bulk Transfers are issued by filling the tmp_td with the appropriate data and connect
- * them to the qh_bulk queue header. Before other control/bulk transfers can be issued,
- * the programm has to wait for completion. This does not allows asynchronous data transfer.
- *
- *
- */
-
-#include <common.h>
-#include <pci.h>
-
-#ifdef CONFIG_USB_UHCI
-
-#include <usb.h>
-#include "usb_uhci.h"
-
-#define USB_MAX_TEMP_TD 128 /* number of temporary TDs for bulk and control transfers */
-#define USB_MAX_TEMP_INT_TD 32 /* number of temporary TDs for Interrupt transfers */
-
-
-/*#define USB_UHCI_DEBUG */
-
-#ifdef USB_UHCI_DEBUG
-#define USB_UHCI_PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define USB_UHCI_PRINTF(fmt,args...)
-#endif
-
-
-static int irqvec = -1; /* irq vector, if -1 uhci is stopped / reseted */
-unsigned int usb_base_addr; /* base address */
-
-static uhci_td_t td_int[8]; /* Interrupt Transfer descriptors */
-static uhci_qh_t qh_cntrl; /* control Queue Head */
-static uhci_qh_t qh_bulk; /* bulk Queue Head */
-static uhci_qh_t qh_end; /* end Queue Head */
-static uhci_td_t td_last; /* last TD (linked with end chain) */
-
-/* temporary tds */
-static uhci_td_t tmp_td[USB_MAX_TEMP_TD]; /* temporary bulk/control td's */
-static uhci_td_t tmp_int_td[USB_MAX_TEMP_INT_TD]; /* temporary interrupt td's */
-
-static unsigned long framelist[1024] __attribute__ ((aligned (0x1000))); /* frame list */
-
-static struct virt_root_hub rh; /* struct for root hub */
-
-/**********************************************************************
- * some forward decleration
- */
-int uhci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
- void *buffer, int transfer_len,struct devrequest *setup);
-
-/* fill a td with the approproiate data. Link, status, info and buffer
- * are used by the USB controller itselfes, dev is used to identify the
- * "connected" device
- */
-void usb_fill_td(uhci_td_t* td,unsigned long link,unsigned long status,
- unsigned long info, unsigned long buffer, unsigned long dev)
-{
- td->link=swap_32(link);
- td->status=swap_32(status);
- td->info=swap_32(info);
- td->buffer=swap_32(buffer);
- td->dev_ptr=dev;
-}
-
-/* fill a qh with the approproiate data. Head and element are used by the USB controller
- * itselfes. As soon as a valid dev_ptr is filled, a td chain is connected to the qh.
- * Please note, that after completion of the td chain, the entry element is removed /
- * marked invalid by the USB controller.
- */
-void usb_fill_qh(uhci_qh_t* qh,unsigned long head,unsigned long element)
-{
- qh->head=swap_32(head);
- qh->element=swap_32(element);
- qh->dev_ptr=0L;
-}
-
-/* get the status of a td->status
- */
-unsigned long usb_uhci_td_stat(unsigned long status)
-{
- unsigned long result=0;
- result |= (status & TD_CTRL_NAK) ? USB_ST_NAK_REC : 0;
- result |= (status & TD_CTRL_STALLED) ? USB_ST_STALLED : 0;
- result |= (status & TD_CTRL_DBUFERR) ? USB_ST_BUF_ERR : 0;
- result |= (status & TD_CTRL_BABBLE) ? USB_ST_BABBLE_DET : 0;
- result |= (status & TD_CTRL_CRCTIMEO) ? USB_ST_CRC_ERR : 0;
- result |= (status & TD_CTRL_BITSTUFF) ? USB_ST_BIT_ERR : 0;
- result |= (status & TD_CTRL_ACTIVE) ? USB_ST_NOT_PROC : 0;
- return result;
-}
-
-/* get the status and the transfered len of a td chain.
- * called from the completion handler
- */
-int usb_get_td_status(uhci_td_t *td,struct usb_device *dev)
-{
- unsigned long temp,info;
- unsigned long stat;
- uhci_td_t *mytd=td;
-
- if(dev->devnum==rh.devnum)
- return 0;
- dev->act_len=0;
- stat=0;
- do {
- temp=swap_32((unsigned long)mytd->status);
- stat=usb_uhci_td_stat(temp);
- info=swap_32((unsigned long)mytd->info);
- if(((info & 0xff)!= USB_PID_SETUP) &&
- (((info >> 21) & 0x7ff)!= 0x7ff) &&
- (temp & 0x7FF)!=0x7ff)
- { /* if not setup and not null data pack */
- dev->act_len+=(temp & 0x7FF) + 1; /* the transfered len is act_len + 1 */
- }
- if(stat) { /* status no ok */
- dev->status=stat;
- return -1;
- }
- temp=swap_32((unsigned long)mytd->link);
- mytd=(uhci_td_t *)(temp & 0xfffffff0);
- }while((temp & 0x1)==0); /* process all TDs */
- dev->status=stat;
- return 0; /* Ok */
-}
-
-
-/*-------------------------------------------------------------------
- * LOW LEVEL STUFF
- * assembles QHs und TDs for control, bulk and iso
- *-------------------------------------------------------------------*/
-
-/* Submits a control message. That is a Setup, Data and Status transfer.
- * Routine does not wait for completion.
- */
-int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len,struct devrequest *setup)
-{
- unsigned long destination, status;
- int maxsze = usb_maxpacket(dev, pipe);
- unsigned long dataptr;
- int len;
- int pktsze;
- int i=0;
-
- if (!maxsze) {
- USB_UHCI_PRINTF("uhci_submit_control_urb: pipesize for pipe %lx is zero\n", pipe);
- return -1;
- }
- if(((pipe>>8)&0x7f)==rh.devnum) {
- /* this is the root hub -> redirect it */
- return uhci_submit_rh_msg(dev,pipe,buffer,transfer_len,setup);
- }
- USB_UHCI_PRINTF("uhci_submit_control start len %x, maxsize %x\n",transfer_len,maxsze);
- /* The "pipe" thing contains the destination in bits 8--18 */
- destination = (pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP; /* Setup stage */
- /* 3 errors */
- status = (pipe & TD_CTRL_LS) | TD_CTRL_ACTIVE | (3 << 27);
- /* (urb->transfer_flags & USB_DISABLE_SPD ? 0 : TD_CTRL_SPD); */
- /* Build the TD for the control request, try forever, 8 bytes of data */
- usb_fill_td(&tmp_td[i],UHCI_PTR_TERM ,status, destination | (7 << 21),(unsigned long)setup,(unsigned long)dev);
-#if 0
- {
- char *sp=(char *)setup;
- printf("SETUP to pipe %lx: %x %x %x %x %x %x %x %x\n", pipe,
- sp[0],sp[1],sp[2],sp[3],sp[4],sp[5],sp[6],sp[7]);
- }
-#endif
- dataptr = (unsigned long)buffer;
- len=transfer_len;
-
- /* If direction is "send", change the frame from SETUP (0x2D)
- to OUT (0xE1). Else change it from SETUP to IN (0x69). */
- destination = (pipe & PIPE_DEVEP_MASK) | ((pipe & USB_DIR_IN)==0 ? USB_PID_OUT : USB_PID_IN);
- while (len > 0) {
- /* data stage */
- pktsze = len;
- i++;
- if (pktsze > maxsze)
- pktsze = maxsze;
- destination ^= 1 << TD_TOKEN_TOGGLE; /* toggle DATA0/1 */
- usb_fill_td(&tmp_td[i],UHCI_PTR_TERM, status, destination | ((pktsze - 1) << 21),dataptr,(unsigned long)dev); /* Status, pktsze bytes of data */
- tmp_td[i-1].link=swap_32((unsigned long)&tmp_td[i]);
-
- dataptr += pktsze;
- len -= pktsze;
- }
-
- /* Build the final TD for control status */
- /* It's only IN if the pipe is out AND we aren't expecting data */
-
- destination &= ~UHCI_PID;
- if (((pipe & USB_DIR_IN)==0) || (transfer_len == 0))
- destination |= USB_PID_IN;
- else
- destination |= USB_PID_OUT;
- destination |= 1 << TD_TOKEN_TOGGLE; /* End in Data1 */
- i++;
- status &=~TD_CTRL_SPD;
- /* no limit on errors on final packet , 0 bytes of data */
- usb_fill_td(&tmp_td[i],UHCI_PTR_TERM, status | TD_CTRL_IOC, destination | (UHCI_NULL_DATA_SIZE << 21),0,(unsigned long)dev);
- tmp_td[i-1].link=swap_32((unsigned long)&tmp_td[i]); /* queue status td */
- /* usb_show_td(i+1);*/
- USB_UHCI_PRINTF("uhci_submit_control end (%d tmp_tds used)\n",i);
- /* first mark the control QH element terminated */
- qh_cntrl.element=0xffffffffL;
- /* set qh active */
- qh_cntrl.dev_ptr=(unsigned long)dev;
- /* fill in tmp_td_chain */
- qh_cntrl.element=swap_32((unsigned long)&tmp_td[0]);
- return 0;
-}
-
-/*-------------------------------------------------------------------
- * Prepare TDs for bulk transfers.
- */
-int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len)
-{
- unsigned long destination, status,info;
- unsigned long dataptr;
- int maxsze = usb_maxpacket(dev, pipe);
- int len;
- int i=0;
-
- if(transfer_len < 0) {
- printf("Negative transfer length in submit_bulk\n");
- return -1;
- }
- if (!maxsze)
- return -1;
- /* The "pipe" thing contains the destination in bits 8--18. */
- destination = (pipe & PIPE_DEVEP_MASK) | usb_packetid (pipe);
- /* 3 errors */
- status = (pipe & TD_CTRL_LS) | TD_CTRL_ACTIVE | (3 << 27);
- /* ((urb->transfer_flags & USB_DISABLE_SPD) ? 0 : TD_CTRL_SPD) | (3 << 27); */
- /* Build the TDs for the bulk request */
- len = transfer_len;
- dataptr = (unsigned long)buffer;
- do {
- int pktsze = len;
- if (pktsze > maxsze)
- pktsze = maxsze;
- /* pktsze bytes of data */
- info = destination | (((pktsze - 1)&UHCI_NULL_DATA_SIZE) << 21) |
- (usb_gettoggle (dev, usb_pipeendpoint (pipe), usb_pipeout (pipe)) << TD_TOKEN_TOGGLE);
-
- if((len-pktsze)==0)
- status |= TD_CTRL_IOC; /* last one generates INT */
-
- usb_fill_td(&tmp_td[i],UHCI_PTR_TERM, status, info,dataptr,(unsigned long)dev); /* Status, pktsze bytes of data */
- if(i>0)
- tmp_td[i-1].link=swap_32((unsigned long)&tmp_td[i]);
- i++;
- dataptr += pktsze;
- len -= pktsze;
- usb_dotoggle (dev, usb_pipeendpoint (pipe), usb_pipeout (pipe));
- } while (len > 0);
- /* first mark the bulk QH element terminated */
- qh_bulk.element=0xffffffffL;
- /* set qh active */
- qh_bulk.dev_ptr=(unsigned long)dev;
- /* fill in tmp_td_chain */
- qh_bulk.element=swap_32((unsigned long)&tmp_td[0]);
- return 0;
-}
-
-
-/* search a free interrupt td
- */
-uhci_td_t *uhci_alloc_int_td(void)
-{
- int i;
- for(i=0;i<USB_MAX_TEMP_INT_TD;i++) {
- if(tmp_int_td[i].dev_ptr==0) /* no device assigned -> free TD */
- return &tmp_int_td[i];
- }
- return NULL;
-}
-
-#if 0
-void uhci_show_temp_int_td(void)
-{
- int i;
- for(i=0;i<USB_MAX_TEMP_INT_TD;i++) {
- if((tmp_int_td[i].dev_ptr&0x01)!=0x1L) /* no device assigned -> free TD */
- printf("temp_td %d is assigned to dev %lx\n",i,tmp_int_td[i].dev_ptr);
- }
- printf("all others temp_tds are free\n");
-}
-#endif
-/*-------------------------------------------------------------------
- * submits USB interrupt (ie. polling ;-)
- */
-int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len, int interval)
-{
- int nint, n;
- unsigned long status, destination;
- unsigned long info,tmp;
- uhci_td_t *mytd;
- if (interval < 0 || interval >= 256)
- return -1;
-
- if (interval == 0)
- nint = 0;
- else {
- for (nint = 0, n = 1; nint <= 8; nint++, n += n) /* round interval down to 2^n */
- {
- if(interval < n) {
- interval = n / 2;
- break;
- }
- }
- nint--;
- }
-
- USB_UHCI_PRINTF("Rounded interval to %i, chain %i\n", interval, nint);
- mytd=uhci_alloc_int_td();
- if(mytd==NULL) {
- printf("No free INT TDs found\n");
- return -1;
- }
- status = (pipe & TD_CTRL_LS) | TD_CTRL_ACTIVE | TD_CTRL_IOC | (3 << 27);
-/* (urb->transfer_flags & USB_DISABLE_SPD ? 0 : TD_CTRL_SPD) | (3 << 27);
-*/
-
- destination =(pipe & PIPE_DEVEP_MASK) | usb_packetid (pipe) | (((transfer_len - 1) & 0x7ff) << 21);
-
- info = destination | (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)) << TD_TOKEN_TOGGLE);
- tmp = swap_32(td_int[nint].link);
- usb_fill_td(mytd,tmp,status, info,(unsigned long)buffer,(unsigned long)dev);
- /* Link it */
- tmp = swap_32((unsigned long)mytd);
- td_int[nint].link=tmp;
-
- usb_dotoggle (dev, usb_pipeendpoint (pipe), usb_pipeout (pipe));
-
- return 0;
-}
-
-/**********************************************************************
- * Low Level functions
- */
-
-
-void reset_hc(void)
-{
-
- /* Global reset for 100ms */
- out16r( usb_base_addr + USBPORTSC1,0x0204);
- out16r( usb_base_addr + USBPORTSC2,0x0204);
- out16r( usb_base_addr + USBCMD,USBCMD_GRESET | USBCMD_RS);
- /* Turn off all interrupts */
- out16r(usb_base_addr + USBINTR,0);
- wait_ms(50);
- out16r( usb_base_addr + USBCMD,0);
- wait_ms(10);
-}
-
-void start_hc(void)
-{
- int timeout = 1000;
-
- while(in16r(usb_base_addr + USBCMD) & USBCMD_HCRESET) {
- if (!--timeout) {
- printf("USBCMD_HCRESET timed out!\n");
- break;
- }
- }
- /* Turn on all interrupts */
- out16r(usb_base_addr + USBINTR,USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP);
- /* Start at frame 0 */
- out16r(usb_base_addr + USBFRNUM,0);
- /* set Framebuffer base address */
- out32r(usb_base_addr+USBFLBASEADD,(unsigned long)&framelist);
- /* Run and mark it configured with a 64-byte max packet */
- out16r(usb_base_addr + USBCMD,USBCMD_RS | USBCMD_CF | USBCMD_MAXP);
-}
-
-/* Initialize the skeleton
- */
-void usb_init_skel(void)
-{
- unsigned long temp;
- int n;
-
- for(n=0;n<USB_MAX_TEMP_INT_TD;n++)
- tmp_int_td[n].dev_ptr=0L; /* no devices connected */
- /* last td */
- usb_fill_td(&td_last,UHCI_PTR_TERM,TD_CTRL_IOC ,0,0,0L);
- /* usb_fill_td(&td_last,UHCI_PTR_TERM,0,0,0); */
- /* End Queue Header */
- usb_fill_qh(&qh_end,UHCI_PTR_TERM,(unsigned long)&td_last);
- /* Bulk Queue Header */
- temp=(unsigned long)&qh_end;
- usb_fill_qh(&qh_bulk,temp | UHCI_PTR_QH,UHCI_PTR_TERM);
- /* Control Queue Header */
- temp=(unsigned long)&qh_bulk;
- usb_fill_qh(&qh_cntrl, temp | UHCI_PTR_QH,UHCI_PTR_TERM);
- /* 1ms Interrupt td */
- temp=(unsigned long)&qh_cntrl;
- usb_fill_td(&td_int[0],temp | UHCI_PTR_QH,0,0,0,0L);
- temp=(unsigned long)&td_int[0];
- for(n=1; n<8; n++)
- usb_fill_td(&td_int[n],temp,0,0,0,0L);
- for (n = 0; n < 1024; n++) {
- /* link all framelist pointers to one of the interrupts */
- int m, o;
- if ((n&127)==127)
- framelist[n]= swap_32((unsigned long)&td_int[0]);
- else
- for (o = 1, m = 2; m <= 128; o++, m += m)
- if ((n & (m - 1)) == ((m - 1) / 2))
- framelist[n]= swap_32((unsigned long)&td_int[o]);
- }
-}
-
-/* check the common skeleton for completed transfers, and update the status
- * of the "connected" device. Called from the IRQ routine.
- */
-void usb_check_skel(void)
-{
- struct usb_device *dev;
- /* start with the control qh */
- if(qh_cntrl.dev_ptr!=0) /* it's a device assigned check if this caused IRQ */
- {
- dev=(struct usb_device *)qh_cntrl.dev_ptr;
- usb_get_td_status(&tmp_td[0],dev); /* update status */
- if(!(dev->status & USB_ST_NOT_PROC)) { /* is not active anymore, disconnect devices */
- qh_cntrl.dev_ptr=0;
- }
- }
- /* now process the bulk */
- if(qh_bulk.dev_ptr!=0) /* it's a device assigned check if this caused IRQ */
- {
- dev=(struct usb_device *)qh_bulk.dev_ptr;
- usb_get_td_status(&tmp_td[0],dev); /* update status */
- if(!(dev->status & USB_ST_NOT_PROC)) { /* is not active anymore, disconnect devices */
- qh_bulk.dev_ptr=0;
- }
- }
-}
-
-/* check the interrupt chain, ubdate the status of the appropriate device,
- * call the appropriate irqhandler and reactivate the TD if the irqhandler
- * returns with 1
- */
-void usb_check_int_chain(void)
-{
- int i,res;
- unsigned long link,status;
- struct usb_device *dev;
- uhci_td_t *td,*prevtd;
-
- for(i=0;i<8;i++) {
- prevtd = &td_int[i]; /* the first previous td is the skeleton td */
- link=swap_32(td_int[i].link) & 0xfffffff0; /* next in chain */
- td=(uhci_td_t *)link; /* assign it */
- /* all interrupt TDs are finally linked to the td_int[0].
- * so we process all until we find the td_int[0].
- * if int0 chain points to a QH, we're also done
- */
- while(((i>0) && (link != (unsigned long)&td_int[0])) ||
- ((i==0) && !(swap_32(td->link) & UHCI_PTR_QH)))
- {
- /* check if a device is assigned with this td */
- status=swap_32(td->status);
- if((td->dev_ptr!=0L) && !(status & TD_CTRL_ACTIVE)) {
- /* td is not active and a device is assigned -> call irqhandler */
- dev=(struct usb_device *)td->dev_ptr;
- dev->irq_act_len=((status & 0x7FF)==0x7FF) ? 0 : (status & 0x7FF) + 1; /* transfered length */
- dev->irq_status=usb_uhci_td_stat(status); /* get status */
- res=dev->irq_handle(dev); /* call irqhandler */
- if(res==1) {
- /* reactivate */
- status|=TD_CTRL_ACTIVE;
- td->status=swap_32(status);
- prevtd=td; /* previous td = this td */
- }
- else {
- prevtd->link=td->link; /* link previous td directly to the nex td -> unlinked */
- /* remove device pointer */
- td->dev_ptr=0L;
- }
- } /* if we call the irq handler */
- link=swap_32(td->link) & 0xfffffff0; /* next in chain */
- td=(uhci_td_t *)link; /* assign it */
- } /* process all td in this int chain */
- } /* next interrupt chain */
-}
-
-
-/* usb interrupt service routine.
- */
-void handle_usb_interrupt(void)
-{
- unsigned short status;
-
- /*
- * Read the interrupt status, and write it back to clear the
- * interrupt cause
- */
-
- status = in16r(usb_base_addr + USBSTS);
-
- if (!status) /* shared interrupt, not mine */
- return;
- if (status != 1) {
- /* remove host controller halted state */
- if ((status&0x20) && ((in16r(usb_base_addr+USBCMD) && USBCMD_RS)==0)) {
- out16r(usb_base_addr + USBCMD, USBCMD_RS | in16r(usb_base_addr + USBCMD));
- }
- }
- usb_check_int_chain(); /* call interrupt handlers for int tds */
- usb_check_skel(); /* call completion handler for common transfer routines */
- out16r(usb_base_addr+USBSTS,status);
-}
-
-
-/* init uhci
- */
-int usb_lowlevel_init(void)
-{
- unsigned char temp;
- int busdevfunc;
-/*
- * HJF - configure IRQ and base from variables optionally.
- */
- char *s;
-
-
- busdevfunc=pci_find_device(USB_UHCI_VEND_ID,USB_UHCI_DEV_ID,0); /* get PCI Device ID */
- if(busdevfunc == -1) {
- printf("Error USB UHCI (%04X,%04X) not found\n",USB_UHCI_VEND_ID,USB_UHCI_DEV_ID);
- return -1;
- }
-
-#if 1
- s = getenv("usb_irq");
- if (s)
- {
- temp = atoi(s);
- pci_write_config_byte(busdevfunc, PCI_INTERRUPT_LINE, temp);
- }
- else
-#endif
- pci_read_config_byte(busdevfunc,PCI_INTERRUPT_LINE,&temp);
-
- s = getenv("usb_base");
- if (s)
- {
- unsigned long temp2;
- temp2 = atoi(s);
- pci_write_config_dword(busdevfunc, PCI_BASE_ADDRESS_4, temp2|0x01);
- }
-
- irqvec = temp;
- irq_free_handler(irqvec);
- USB_UHCI_PRINTF("Interrupt Line = %d\n",irqvec);
- pci_read_config_byte(busdevfunc,PCI_INTERRUPT_PIN,&temp);
- USB_UHCI_PRINTF("Interrupt Pin = %ld\n",temp);
- pci_read_config_dword(busdevfunc,PCI_BASE_ADDRESS_4,&usb_base_addr);
- USB_UHCI_PRINTF("IO Base Address = 0x%lx\n",usb_base_addr);
- usb_base_addr&=0xFFFFFFF0;
- usb_base_addr+=CONFIG_SYS_ISA_IO_BASE_ADDRESS;
- rh.devnum = 0;
- usb_init_skel();
- reset_hc();
- start_hc();
- irq_install_handler(irqvec, (interrupt_handler_t *)handle_usb_interrupt, NULL);
- irq_install_handler(0, (interrupt_handler_t *)handle_usb_interrupt, NULL);
-
- return 0;
-}
-
-/* stop uhci
- */
-int usb_lowlevel_stop(void)
-{
- if(irqvec == -1)
- return 1;
- irq_free_handler(irqvec);
- irq_free_handler(0);
- reset_hc();
- irqvec = -1;
- return 0;
-}
-
-/*******************************************************************************************
- * Virtual Root Hub
- * Since the uhci does not have a real HUB, we simulate one ;-)
- */
-#undef USB_RH_DEBUG
-
-#ifdef USB_RH_DEBUG
-#define USB_RH_PRINTF(fmt,args...) printf (fmt ,##args)
-static void usb_display_wValue(unsigned short wValue,unsigned short wIndex);
-static void usb_display_Req(unsigned short req);
-#else
-#define USB_RH_PRINTF(fmt,args...)
-static void usb_display_wValue(unsigned short wValue,unsigned short wIndex) {}
-static void usb_display_Req(unsigned short req) {}
-#endif
-
-static unsigned char root_hub_dev_des[] =
-{
- 0x12, /* __u8 bLength; */
- 0x01, /* __u8 bDescriptorType; Device */
- 0x00, /* __u16 bcdUSB; v1.0 */
- 0x01,
- 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
- 0x00, /* __u8 bDeviceSubClass; */
- 0x00, /* __u8 bDeviceProtocol; */
- 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
- 0x00, /* __u16 idVendor; */
- 0x00,
- 0x00, /* __u16 idProduct; */
- 0x00,
- 0x00, /* __u16 bcdDevice; */
- 0x00,
- 0x01, /* __u8 iManufacturer; */
- 0x00, /* __u8 iProduct; */
- 0x00, /* __u8 iSerialNumber; */
- 0x01 /* __u8 bNumConfigurations; */
-};
-
-
-/* Configuration descriptor */
-static unsigned char root_hub_config_des[] =
-{
- 0x09, /* __u8 bLength; */
- 0x02, /* __u8 bDescriptorType; Configuration */
- 0x19, /* __u16 wTotalLength; */
- 0x00,
- 0x01, /* __u8 bNumInterfaces; */
- 0x01, /* __u8 bConfigurationValue; */
- 0x00, /* __u8 iConfiguration; */
- 0x40, /* __u8 bmAttributes;
- Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
- 0x00, /* __u8 MaxPower; */
-
- /* interface */
- 0x09, /* __u8 if_bLength; */
- 0x04, /* __u8 if_bDescriptorType; Interface */
- 0x00, /* __u8 if_bInterfaceNumber; */
- 0x00, /* __u8 if_bAlternateSetting; */
- 0x01, /* __u8 if_bNumEndpoints; */
- 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
- 0x00, /* __u8 if_bInterfaceSubClass; */
- 0x00, /* __u8 if_bInterfaceProtocol; */
- 0x00, /* __u8 if_iInterface; */
-
- /* endpoint */
- 0x07, /* __u8 ep_bLength; */
- 0x05, /* __u8 ep_bDescriptorType; Endpoint */
- 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
- 0x03, /* __u8 ep_bmAttributes; Interrupt */
- 0x08, /* __u16 ep_wMaxPacketSize; 8 Bytes */
- 0x00,
- 0xff /* __u8 ep_bInterval; 255 ms */
-};
-
-
-static unsigned char root_hub_hub_des[] =
-{
- 0x09, /* __u8 bLength; */
- 0x29, /* __u8 bDescriptorType; Hub-descriptor */
- 0x02, /* __u8 bNbrPorts; */
- 0x00, /* __u16 wHubCharacteristics; */
- 0x00,
- 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
- 0x00, /* __u8 bHubContrCurrent; 0 mA */
- 0x00, /* __u8 DeviceRemovable; *** 7 Ports max *** */
- 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */
-};
-
-static unsigned char root_hub_str_index0[] =
-{
- 0x04, /* __u8 bLength; */
- 0x03, /* __u8 bDescriptorType; String-descriptor */
- 0x09, /* __u8 lang ID */
- 0x04, /* __u8 lang ID */
-};
-
-static unsigned char root_hub_str_index1[] =
-{
- 28, /* __u8 bLength; */
- 0x03, /* __u8 bDescriptorType; String-descriptor */
- 'U', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'H', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'C', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'I', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- ' ', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'R', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'o', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'o', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 't', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- ' ', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'H', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'u', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'b', /* __u8 Unicode */
- 0, /* __u8 Unicode */
-};
-
-
-/*
- * Root Hub Control Pipe (interrupt Pipes are not supported)
- */
-
-
-int uhci_submit_rh_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len,struct devrequest *cmd)
-{
- void *data = buffer;
- int leni = transfer_len;
- int len = 0;
- int status = 0;
- int stat = 0;
- int i;
-
- unsigned short cstatus;
-
- unsigned short bmRType_bReq;
- unsigned short wValue;
- unsigned short wIndex;
- unsigned short wLength;
-
- if (usb_pipeint(pipe)) {
- printf("Root-Hub submit IRQ: NOT implemented\n");
-#if 0
- uhci->rh.urb = urb;
- uhci->rh.send = 1;
- uhci->rh.interval = urb->interval;
- rh_init_int_timer (urb);
-#endif
- return 0;
- }
- bmRType_bReq = cmd->requesttype | cmd->request << 8;
- wValue = swap_16(cmd->value);
- wIndex = swap_16(cmd->index);
- wLength = swap_16(cmd->length);
- usb_display_Req(bmRType_bReq);
- for (i = 0; i < 8; i++)
- rh.c_p_r[i] = 0;
- USB_RH_PRINTF("Root-Hub: adr: %2x cmd(%1x): %02x%02x %04x %04x %04x\n",
- dev->devnum, 8, cmd->requesttype,cmd->request, wValue, wIndex, wLength);
-
- switch (bmRType_bReq) {
- /* Request Destination:
- without flags: Device,
- RH_INTERFACE: interface,
- RH_ENDPOINT: endpoint,
- RH_CLASS means HUB here,
- RH_OTHER | RH_CLASS almost ever means HUB_PORT here
- */
-
- case RH_GET_STATUS:
- *(unsigned short *) data = swap_16(1);
- len=2;
- break;
- case RH_GET_STATUS | RH_INTERFACE:
- *(unsigned short *) data = swap_16(0);
- len=2;
- break;
- case RH_GET_STATUS | RH_ENDPOINT:
- *(unsigned short *) data = swap_16(0);
- len=2;
- break;
- case RH_GET_STATUS | RH_CLASS:
- *(unsigned long *) data = swap_32(0);
- len=4;
- break; /* hub power ** */
- case RH_GET_STATUS | RH_OTHER | RH_CLASS:
-
- status = in16r(usb_base_addr + USBPORTSC1 + 2 * (wIndex - 1));
- cstatus = ((status & USBPORTSC_CSC) >> (1 - 0)) |
- ((status & USBPORTSC_PEC) >> (3 - 1)) |
- (rh.c_p_r[wIndex - 1] << (0 + 4));
- status = (status & USBPORTSC_CCS) |
- ((status & USBPORTSC_PE) >> (2 - 1)) |
- ((status & USBPORTSC_SUSP) >> (12 - 2)) |
- ((status & USBPORTSC_PR) >> (9 - 4)) |
- (1 << 8) | /* power on ** */
- ((status & USBPORTSC_LSDA) << (-8 + 9));
-
- *(unsigned short *) data = swap_16(status);
- *(unsigned short *) (data + 2) = swap_16(cstatus);
- len=4;
- break;
- case RH_CLEAR_FEATURE | RH_ENDPOINT:
- switch (wValue) {
- case (RH_ENDPOINT_STALL):
- len=0;
- break;
- }
- break;
-
- case RH_CLEAR_FEATURE | RH_CLASS:
- switch (wValue) {
- case (RH_C_HUB_OVER_CURRENT):
- len=0; /* hub power over current ** */
- break;
- }
- break;
-
- case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
- usb_display_wValue(wValue,wIndex);
- switch (wValue) {
- case (RH_PORT_ENABLE):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) & ~USBPORTSC_PE;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_PORT_SUSPEND):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) & ~USBPORTSC_SUSP;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_PORT_POWER):
- len=0; /* port power ** */
- break;
- case (RH_C_PORT_CONNECTION):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_CSC;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_C_PORT_ENABLE):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_PEC;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_C_PORT_SUSPEND):
-/*** WR_RH_PORTSTAT(RH_PS_PSSC); */
- len=0;
- break;
- case (RH_C_PORT_OVER_CURRENT):
- len=0;
- break;
- case (RH_C_PORT_RESET):
- rh.c_p_r[wIndex - 1] = 0;
- len=0;
- break;
- }
- break;
- case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
- usb_display_wValue(wValue,wIndex);
- switch (wValue) {
- case (RH_PORT_SUSPEND):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_SUSP;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_PORT_RESET):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_PR;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- wait_ms(10);
- status = (status & 0xfff5) & ~USBPORTSC_PR;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- udelay(10);
- status = (status & 0xfff5) | USBPORTSC_PE;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- wait_ms(10);
- status = (status & 0xfff5) | 0xa;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_PORT_POWER):
- len=0; /* port power ** */
- break;
- case (RH_PORT_ENABLE):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_PE;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- }
- break;
-
- case RH_SET_ADDRESS:
- rh.devnum = wValue;
- len=0;
- break;
- case RH_GET_DESCRIPTOR:
- switch ((wValue & 0xff00) >> 8) {
- case (0x01): /* device descriptor */
- i=sizeof(root_hub_config_des);
- status=i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_dev_des, len);
- break;
- case (0x02): /* configuration descriptor */
- i=sizeof(root_hub_config_des);
- status=i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_config_des, len);
- break;
- case (0x03): /*string descriptors */
- if(wValue==0x0300) {
- i=sizeof(root_hub_str_index0);
- status = i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_str_index0, len);
- break;
- }
- if(wValue==0x0301) {
- i=sizeof(root_hub_str_index1);
- status = i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_str_index1, len);
- break;
- }
- stat = USB_ST_STALLED;
- }
- break;
-
- case RH_GET_DESCRIPTOR | RH_CLASS:
- root_hub_hub_des[2] = 2;
- i=sizeof(root_hub_hub_des);
- status= i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_hub_des, len);
- break;
- case RH_GET_CONFIGURATION:
- *(unsigned char *) data = 0x01;
- len = 1;
- break;
- case RH_SET_CONFIGURATION:
- len=0;
- break;
- default:
- stat = USB_ST_STALLED;
- }
- USB_RH_PRINTF("Root-Hub stat %lx port1: %x port2: %x\n\n",stat,
- in16r(usb_base_addr + USBPORTSC1), in16r(usb_base_addr + USBPORTSC2));
- dev->act_len=len;
- dev->status=stat;
- return stat;
-
-}
-
-/********************************************************************************
- * Some Debug Routines
- */
-
-#ifdef USB_RH_DEBUG
-
-static void usb_display_Req(unsigned short req)
-{
- USB_RH_PRINTF("- Root-Hub Request: ");
- switch (req) {
- case RH_GET_STATUS:
- USB_RH_PRINTF("Get Status ");
- break;
- case RH_GET_STATUS | RH_INTERFACE:
- USB_RH_PRINTF("Get Status Interface ");
- break;
- case RH_GET_STATUS | RH_ENDPOINT:
- USB_RH_PRINTF("Get Status Endpoint ");
- break;
- case RH_GET_STATUS | RH_CLASS:
- USB_RH_PRINTF("Get Status Class");
- break; /* hub power ** */
- case RH_GET_STATUS | RH_OTHER | RH_CLASS:
- USB_RH_PRINTF("Get Status Class Others");
- break;
- case RH_CLEAR_FEATURE | RH_ENDPOINT:
- USB_RH_PRINTF("Clear Feature Endpoint ");
- break;
- case RH_CLEAR_FEATURE | RH_CLASS:
- USB_RH_PRINTF("Clear Feature Class ");
- break;
- case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
- USB_RH_PRINTF("Clear Feature Other Class ");
- break;
- case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
- USB_RH_PRINTF("Set Feature Other Class ");
- break;
- case RH_SET_ADDRESS:
- USB_RH_PRINTF("Set Address ");
- break;
- case RH_GET_DESCRIPTOR:
- USB_RH_PRINTF("Get Descriptor ");
- break;
- case RH_GET_DESCRIPTOR | RH_CLASS:
- USB_RH_PRINTF("Get Descriptor Class ");
- break;
- case RH_GET_CONFIGURATION:
- USB_RH_PRINTF("Get Configuration ");
- break;
- case RH_SET_CONFIGURATION:
- USB_RH_PRINTF("Get Configuration ");
- break;
- default:
- USB_RH_PRINTF("****UNKNOWN**** 0x%04X ",req);
- }
- USB_RH_PRINTF("\n");
-
-}
-
-static void usb_display_wValue(unsigned short wValue,unsigned short wIndex)
-{
- switch (wValue) {
- case (RH_PORT_ENABLE):
- USB_RH_PRINTF("Root-Hub: Enable Port %d\n",wIndex);
- break;
- case (RH_PORT_SUSPEND):
- USB_RH_PRINTF("Root-Hub: Suspend Port %d\n",wIndex);
- break;
- case (RH_PORT_POWER):
- USB_RH_PRINTF("Root-Hub: Port Power %d\n",wIndex);
- break;
- case (RH_C_PORT_CONNECTION):
- USB_RH_PRINTF("Root-Hub: C Port Connection Port %d\n",wIndex);
- break;
- case (RH_C_PORT_ENABLE):
- USB_RH_PRINTF("Root-Hub: C Port Enable Port %d\n",wIndex);
- break;
- case (RH_C_PORT_SUSPEND):
- USB_RH_PRINTF("Root-Hub: C Port Suspend Port %d\n",wIndex);
- break;
- case (RH_C_PORT_OVER_CURRENT):
- USB_RH_PRINTF("Root-Hub: C Port Over Current Port %d\n",wIndex);
- break;
- case (RH_C_PORT_RESET):
- USB_RH_PRINTF("Root-Hub: C Port reset Port %d\n",wIndex);
- break;
- default:
- USB_RH_PRINTF("Root-Hub: unknown %x %x\n",wValue,wIndex);
- break;
- }
-}
-
-#endif
-
-
-#ifdef USB_UHCI_DEBUG
-
-static int usb_display_td(uhci_td_t *td)
-{
- unsigned long tmp;
- int valid;
-
- printf("TD at %p:\n",td);
-
- tmp=swap_32(td->link);
- printf("Link points to 0x%08lX, %s first, %s, %s\n",tmp&0xfffffff0,
- ((tmp & 0x4)==0x4) ? "Depth" : "Breath",
- ((tmp & 0x2)==0x2) ? "QH" : "TD",
- ((tmp & 0x1)==0x1) ? "invalid" : "valid");
- valid=((tmp & 0x1)==0x0);
- tmp=swap_32(td->status);
- printf(" %s %ld Errors %s %s %s \n %s %s %s %s %s %s\n Len 0x%lX\n",
- (((tmp>>29)&0x1)==0x1) ? "SPD Enable" : "SPD Disable",
- ((tmp>>28)&0x3),
- (((tmp>>26)&0x1)==0x1) ? "Low Speed" : "Full Speed",
- (((tmp>>25)&0x1)==0x1) ? "ISO " : "",
- (((tmp>>24)&0x1)==0x1) ? "IOC " : "",
- (((tmp>>23)&0x1)==0x1) ? "Active " : "Inactive ",
- (((tmp>>22)&0x1)==0x1) ? "Stalled" : "",
- (((tmp>>21)&0x1)==0x1) ? "Data Buffer Error" : "",
- (((tmp>>20)&0x1)==0x1) ? "Babble" : "",
- (((tmp>>19)&0x1)==0x1) ? "NAK" : "",
- (((tmp>>18)&0x1)==0x1) ? "Bitstuff Error" : "",
- (tmp&0x7ff));
- tmp=swap_32(td->info);
- printf(" MaxLen 0x%lX\n",((tmp>>21)&0x7FF));
- printf(" %s Endpoint 0x%lX Dev Addr 0x%lX PID 0x%lX\n",((tmp>>19)&0x1)==0x1 ? "TOGGLE" : "",
- ((tmp>>15)&0xF),((tmp>>8)&0x7F),tmp&0xFF);
- tmp=swap_32(td->buffer);
- printf(" Buffer 0x%08lX\n",tmp);
- printf(" DEV %08lX\n",td->dev_ptr);
- return valid;
-}
-
-
-void usb_show_td(int max)
-{
- int i;
- if(max>0) {
- for(i=0;i<max;i++) {
- usb_display_td(&tmp_td[i]);
- }
- }
- else {
- i=0;
- do {
- printf("tmp_td[%d]\n",i);
- }while(usb_display_td(&tmp_td[i++]));
- }
-}
-
-
-#endif
-#endif /* CONFIG_USB_UHCI */
-
-/* EOF */
+++ /dev/null
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Note: Part of this code has been derived from linux
- *
- */
-#ifndef _USB_UHCI_H_
-#define _USB_UHCI_H_
-
-#undef USB_UHCI_VEND_ID
-#define USB_UHCI_VEND_ID PCI_VENDOR_ID_VIA
-#undef USB_UHCI_DEV_ID
-#define USB_UHCI_DEV_ID 0x3038
-
-/* Command register */
-#define USBCMD 0
-#define USBCMD_RS 0x0001 /* Run/Stop */
-#define USBCMD_HCRESET 0x0002 /* Host reset */
-#define USBCMD_GRESET 0x0004 /* Global reset */
-#define USBCMD_EGSM 0x0008 /* Global Suspend Mode */
-#define USBCMD_FGR 0x0010 /* Force Global Resume */
-#define USBCMD_SWDBG 0x0020 /* SW Debug mode */
-#define USBCMD_CF 0x0040 /* Config Flag (sw only) */
-#define USBCMD_MAXP 0x0080 /* Max Packet (0 = 32, 1 = 64) */
-
-/* Status register */
-#define USBSTS 2
-#define USBSTS_USBINT 0x0001 /* Interrupt due to IOC */
-#define USBSTS_ERROR 0x0002 /* Interrupt due to error */
-#define USBSTS_RD 0x0004 /* Resume Detect */
-#define USBSTS_HSE 0x0008 /* Host System Error - basically PCI problems */
-#define USBSTS_HCPE 0x0010 /* Host Controller Process Error - the scripts were buggy */
-#define USBSTS_HCH 0x0020 /* HC Halted */
-
-/* Interrupt enable register */
-#define USBINTR 4
-#define USBINTR_TIMEOUT 0x0001 /* Timeout/CRC error enable */
-#define USBINTR_RESUME 0x0002 /* Resume interrupt enable */
-#define USBINTR_IOC 0x0004 /* Interrupt On Complete enable */
-#define USBINTR_SP 0x0008 /* Short packet interrupt enable */
-
-#define USBFRNUM 6
-#define USBFLBASEADD 8
-#define USBSOF 12
-
-/* USB port status and control registers */
-#define USBPORTSC1 16
-#define USBPORTSC2 18
-#define USBPORTSC_CCS 0x0001 /* Current Connect Status ("device present") */
-#define USBPORTSC_CSC 0x0002 /* Connect Status Change */
-#define USBPORTSC_PE 0x0004 /* Port Enable */
-#define USBPORTSC_PEC 0x0008 /* Port Enable Change */
-#define USBPORTSC_LS 0x0030 /* Line Status */
-#define USBPORTSC_RD 0x0040 /* Resume Detect */
-#define USBPORTSC_LSDA 0x0100 /* Low Speed Device Attached */
-#define USBPORTSC_PR 0x0200 /* Port Reset */
-#define USBPORTSC_SUSP 0x1000 /* Suspend */
-
-/* Legacy support register */
-#define USBLEGSUP 0xc0
-#define USBLEGSUP_DEFAULT 0x2000 /* only PIRQ enable set */
-
-#define UHCI_NULL_DATA_SIZE 0x7ff /* for UHCI controller TD */
-#define UHCI_PID 0xff /* PID MASK */
-
-#define UHCI_PTR_BITS 0x000F
-#define UHCI_PTR_TERM 0x0001
-#define UHCI_PTR_QH 0x0002
-#define UHCI_PTR_DEPTH 0x0004
-
-/* for TD <status>: */
-#define TD_CTRL_SPD (1 << 29) /* Short Packet Detect */
-#define TD_CTRL_C_ERR_MASK (3 << 27) /* Error Counter bits */
-#define TD_CTRL_LS (1 << 26) /* Low Speed Device */
-#define TD_CTRL_IOS (1 << 25) /* Isochronous Select */
-#define TD_CTRL_IOC (1 << 24) /* Interrupt on Complete */
-#define TD_CTRL_ACTIVE (1 << 23) /* TD Active */
-#define TD_CTRL_STALLED (1 << 22) /* TD Stalled */
-#define TD_CTRL_DBUFERR (1 << 21) /* Data Buffer Error */
-#define TD_CTRL_BABBLE (1 << 20) /* Babble Detected */
-#define TD_CTRL_NAK (1 << 19) /* NAK Received */
-#define TD_CTRL_CRCTIMEO (1 << 18) /* CRC/Time Out Error */
-#define TD_CTRL_BITSTUFF (1 << 17) /* Bit Stuff Error */
-#define TD_CTRL_ACTLEN_MASK 0x7ff /* actual length, encoded as n - 1 */
-
-#define TD_CTRL_ANY_ERROR (TD_CTRL_STALLED | TD_CTRL_DBUFERR | \
- TD_CTRL_BABBLE | TD_CTRL_CRCTIME | TD_CTRL_BITSTUFF)
-
-#define TD_TOKEN_TOGGLE 19
-
-/* ------------------------------------------------------------------------------------
- Virtual Root HUB
- ------------------------------------------------------------------------------------ */
-/* destination of request */
-#define RH_INTERFACE 0x01
-#define RH_ENDPOINT 0x02
-#define RH_OTHER 0x03
-
-#define RH_CLASS 0x20
-#define RH_VENDOR 0x40
-
-/* Requests: bRequest << 8 | bmRequestType */
-#define RH_GET_STATUS 0x0080
-#define RH_CLEAR_FEATURE 0x0100
-#define RH_SET_FEATURE 0x0300
-#define RH_SET_ADDRESS 0x0500
-#define RH_GET_DESCRIPTOR 0x0680
-#define RH_SET_DESCRIPTOR 0x0700
-#define RH_GET_CONFIGURATION 0x0880
-#define RH_SET_CONFIGURATION 0x0900
-#define RH_GET_STATE 0x0280
-#define RH_GET_INTERFACE 0x0A80
-#define RH_SET_INTERFACE 0x0B00
-#define RH_SYNC_FRAME 0x0C80
-/* Our Vendor Specific Request */
-#define RH_SET_EP 0x2000
-
-/* Hub port features */
-#define RH_PORT_CONNECTION 0x00
-#define RH_PORT_ENABLE 0x01
-#define RH_PORT_SUSPEND 0x02
-#define RH_PORT_OVER_CURRENT 0x03
-#define RH_PORT_RESET 0x04
-#define RH_PORT_POWER 0x08
-#define RH_PORT_LOW_SPEED 0x09
-#define RH_C_PORT_CONNECTION 0x10
-#define RH_C_PORT_ENABLE 0x11
-#define RH_C_PORT_SUSPEND 0x12
-#define RH_C_PORT_OVER_CURRENT 0x13
-#define RH_C_PORT_RESET 0x14
-
-/* Hub features */
-#define RH_C_HUB_LOCAL_POWER 0x00
-#define RH_C_HUB_OVER_CURRENT 0x01
-
-#define RH_DEVICE_REMOTE_WAKEUP 0x00
-#define RH_ENDPOINT_STALL 0x01
-
-/* Our Vendor Specific feature */
-#define RH_REMOVE_EP 0x00
-
-
-#define RH_ACK 0x01
-#define RH_REQ_ERR -1
-#define RH_NACK 0x00
-
-
-/* Transfer descriptor structure */
-typedef struct {
- unsigned long link; /* next td/qh (LE)*/
- unsigned long status; /* status of the td */
- unsigned long info; /* Max Lenght / Endpoint / device address and PID */
- unsigned long buffer; /* pointer to data buffer (LE) */
- unsigned long dev_ptr; /* pointer to the assigned device (BE) */
- unsigned long res[3]; /* reserved (TDs must be 8Byte aligned) */
-} uhci_td_t, *puhci_td_t;
-
-/* Queue Header structure */
-typedef struct {
- unsigned long head; /* Next QH (LE)*/
- unsigned long element; /* Queue element pointer (LE) */
- unsigned long res[5]; /* reserved */
- unsigned long dev_ptr; /* if 0 no tds have been assigned to this qh */
-} uhci_qh_t, *puhci_qh_t;
-
-struct virt_root_hub {
- int devnum; /* Address of Root Hub endpoint */
- int numports; /* number of ports */
- int c_p_r[8]; /* C_PORT_RESET */
-};
-
-
-#endif /* _USB_UHCI_H_ */
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Hyperion Entertainment, Hans-JoergF@hyperion-entertainment.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <common.h>
-#include <pci.h>
-#include <ata.h>
-#include "memio.h"
-#include "articiaS.h"
-#include "via686.h"
-#include "i8259.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#undef VIA_DEBUG
-
-#ifdef VIA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-
-/* Setup the ISA-to-PCI host bridge */
-void via_isa_init(pci_dev_t dev, struct pci_config_table *table)
-{
- char regval;
- if (PCI_FUNC(dev) == 0)
- {
- PRINTF("... PCI-to-ISA bridge, dev=0x%X\n", dev);
-
- /* Enable I/O Recovery time */
- pci_write_config_byte(dev, 0x40, 0x08);
-
- /* Enable ISA refresh */
- pci_write_config_byte(dev, 0x41, 0x41); /* was 01 */
-
- /* Enable ISA line buffer */
- pci_write_config_byte(dev, 0x45, 0x80);
-
- /* Gate INTR, and flush line buffer */
- pci_write_config_byte(dev, 0x46, 0x60);
-
- /* Enable EISA ports 4D0/4D1. Do we need this ? */
- pci_write_config_byte(dev, 0x47, 0xe6); /* was 20 */
-
- /* 512 K PCI Decode */
- pci_write_config_byte(dev, 0x48, 0x01);
-
- /* Wait for PGNT before grant to ISA Master/DMA */
- /* ports 0-FF to SDBus */
- /* IRQ 14 and 15 for ide 0/1 */
- pci_write_config_byte(dev, 0x4a, 0x04); /* Was c4 */
-
- /* Plug'n'Play */
- /* Parallel DRQ 3, Floppy DRQ 2 (default) */
- pci_write_config_byte(dev, 0x50, 0x0e);
-
- /* IRQ Routing for Floppy and Parallel port */
- /* IRQ 6 for floppy, IRQ 7 for parallel port */
- pci_write_config_byte(dev, 0x51, 0x76);
-
- /* IRQ Routing for serial ports (take IRQ 3 and 4) */
- pci_write_config_byte(dev, 0x52, 0x34);
-
- /* All IRQ's level triggered. */
- pci_write_config_byte(dev, 0x54, 0x00);
-
- /* PCI IRQ's all at IRQ 9 */
- pci_write_config_byte(dev, 0x55, 0x90);
- pci_write_config_byte(dev, 0x56, 0x99);
- pci_write_config_byte(dev, 0x57, 0x90);
-
- /* Enable Keyboard */
- pci_read_config_byte(dev, 0x5A, ®val);
- regval |= 0x01;
- pci_write_config_byte(dev, 0x5A, regval);
-
- pci_write_config_byte(dev, 0x80, 0);
- pci_write_config_byte(dev, 0x85, 0x01);
-
-/* pci_write_config_byte(dev, 0x77, 0x00); */
- }
-}
-
-/*
- * Initialize PNP irq routing
- */
-
-void via_init_irq_routing(uint8 irq_map[])
-{
- char *s;
- uint8 level_edge_bits = 0xf;
-
- /* Set irq routings */
- pci_write_cfg_byte(0, 7<<3, 0x55, irq_map[0]<<4);
- pci_write_cfg_byte(0, 7<<3, 0x56, irq_map[1] | irq_map[2]<<4);
- pci_write_cfg_byte(0, 7<<3, 0x57, irq_map[3]<<4);
-
- /*
- * Gather level/edge bits
- * Default is to assume level triggered
- */
-
- s = getenv("pci_irqa_select");
- if (s && strcmp(s, "level") == 0)
- level_edge_bits &= ~0x01;
-
- s = getenv("pci_irqb_select");
- if (s && strcmp(s, "level") == 0)
- level_edge_bits &= ~0x02;
-
- s = getenv("pci_irqc_select");
- if (s && strcmp(s, "level") == 0)
- level_edge_bits &= ~0x04;
-
- s = getenv("pci_irqd_select");
- if (s && strcmp(s, "level") == 0)
- level_edge_bits &= ~0x08;
-
- PRINTF("IRQ map\n");
- PRINTF("%d: %s\n", irq_map[0], level_edge_bits&0x1 ? "edge" : "level");
- PRINTF("%d: %s\n", irq_map[1], level_edge_bits&0x2 ? "edge" : "level");
- PRINTF("%d: %s\n", irq_map[2], level_edge_bits&0x4 ? "edge" : "level");
- PRINTF("%d: %s\n", irq_map[3], level_edge_bits&0x8 ? "edge" : "level");
- pci_write_cfg_byte(0, 7<<3, 0x54, level_edge_bits);
-
- PRINTF("%02x %02x %02x %02x\n", pci_read_cfg_byte(0, 7<<3, 0x54),
- pci_read_cfg_byte(0, 7<<3, 0x55), pci_read_cfg_byte(0, 7<<3, 0x56),
- pci_read_cfg_byte(0, 7<<3, 0x57));
-}
-
-
-/* Setup the IDE controller. This doesn't seem to work yet. I/O to an IDE controller port */
-/* always return the last character output on the serial port (!) */
-/* This function is called by the pnp-library when it encounters 0:7:1 */
-void via_cfgfunc_ide_init(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table)
-{
- PRINTF("... IDE controller, dev=0x%X\n", dev);
-
- /* Enable both IDE channels. */
- pci_write_config_byte(dev, 0x40, 0x03);
- /* udelay(10000); */
- /* udelay(10000); */
-
- /* Enable IO Space */
- pci_write_config_word(dev, 0x04, 0x03);
-
- /* Set to compatibility mode */
- pci_write_config_byte(dev, 0x09, 0x8A); /* WAS: 0x8f); */
-
- /* Set to legacy interrupt mode */
- pci_write_config_byte(dev, 0x3d, 0x00); /* WAS: 0x01); */
-
-}
-
-
-/* Set the base address of the floppy controller to 0x3F0 */
-void via_fdc_init(pci_dev_t dev)
-{
- unsigned char c;
- /* Enable Configuration mode */
- pci_read_config_byte(dev, 0x85, &c);
- c |= 0x02;
- pci_write_config_byte(dev, 0x85, c);
-
- /* Set floppy controller port to 0x3F0. */
- SIO_WRITE_CONFIG(0xE3, (0x3F<<2));
-
- /* Enable floppy controller */
- SIO_READ_CONFIG(0xE2, c);
- c |= 0x10;
- SIO_WRITE_CONFIG(0xE2, c);
-
- /* Switch of configuration mode */
- pci_read_config_byte(dev, 0x85, &c);
- c &= ~0x02;
- pci_write_config_byte(dev, 0x85, c);
-}
-
-/* Init function 0 of the via southbridge. Called by the pnp-library */
-void via_cfgfunc_via686(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table)
-{
- if (PCI_FUNC(dev) == 0)
- {
- /* FIXME: Try to generate a PCI reset */
- /* unsigned char c; */
- /* pci_read_config_byte(dev, 0x47, &c); */
- /* pci_write_config_byte(dev, 0x47, c | 0x01); */
-
- via_isa_init(dev, table);
- via_fdc_init(dev);
- }
-}
-
-__asm__ (" .globl via_calibrate_time_base \n"
- "via_calibrate_time_base: \n"
- " lis 9, 0xfe00 \n"
- " li 0, 0x00 \n"
- " mttbu 0 \n"
- " mttbl 0 \n"
- "ctb_loop: \n"
- " lbz 0, 0x61(9) \n"
- " eieio \n"
- " andi. 0, 0, 0x20 \n"
- " beq ctb_loop \n"
- "ctb_done: \n"
- " mftb 3 \n"
- " blr");
-
-extern unsigned long via_calibrate_time_base(void);
-
-void via_calibrate_bus_freq (void)
-{
- unsigned long tb;
-
- /* This is 20 microseconds */
-#define CALIBRATE_TIME 28636
-
- /* Enable the timer (and disable speaker) */
- unsigned char c;
-
- c = in_byte (0x61);
- out_byte (0x61, ((c & ~0x02) | 0x01));
-
- /* Set timer 2 to low/high writing */
- out_byte (0x43, 0xb0);
- out_byte (0x42, CALIBRATE_TIME & 0xff);
- out_byte (0x42, CALIBRATE_TIME >> 8);
-
- /* Read the time base */
- tb = via_calibrate_time_base ();
-
- if (tb >= 700000)
- gd->bus_clk = 133333333;
- else
- gd->bus_clk = 100000000;
-
-}
-
-
-void ide_led(uchar led, uchar status)
-{
-/* unsigned char c = in_byte(0x92); */
-
-/* if (!status) */
-/* out_byte(0x92, c | 0xC0); */
-/* else */
-/* out_byte(0x92, c & ~0xC0); */
-}
-
-
-void via_init_afterscan(void)
-{
- /* Modify IDE controller setup */
- pci_write_cfg_byte(0, 7<<3|1, PCI_LATENCY_TIMER, 0x20);
- pci_write_cfg_byte(0, 7<<3|1, PCI_COMMAND, PCI_COMMAND_IO|PCI_COMMAND_MEMORY|PCI_COMMAND_MASTER);
- pci_write_cfg_byte(0, 7<<3|1, PCI_INTERRUPT_LINE, 0xff);
- pci_write_cfg_byte(0, 7<<3|1, 0x40, 0x0b); /* FIXME: Might depend on drives connected */
- pci_write_cfg_byte(0, 7<<3|1, 0x41, 0x42); /* FIXME: Might depend on drives connected */
- pci_write_cfg_byte(0, 7<<3|1, 0x43, 0x05);
- pci_write_cfg_byte(0, 7<<3|1, 0x44, 0x18);
- pci_write_cfg_byte(0, 7<<3|1, 0x45, 0x10);
- pci_write_cfg_byte(0, 7<<3|1, 0x4e, 0x22); /* FIXME: Not documented, but set in PC bios */
- pci_write_cfg_byte(0, 7<<3|1, 0x4f, 0x20); /* FIXME: Not documented */
-
- /* Modify some values in the USB controller */
- pci_write_cfg_byte(0, 7<<3|2, 0x05, 0x17);
- pci_write_cfg_byte(0, 7<<3|2, 0x06, 0x01);
- pci_write_cfg_byte(0, 7<<3|2, 0x41, 0x12);
- pci_write_cfg_byte(0, 7<<3|2, 0x42, 0x03);
- pci_write_cfg_byte(0, 7<<3|2, PCI_LATENCY_TIMER, 0x40);
-
- pci_write_cfg_byte(0, 7<<3|3, 0x05, 0x17);
- pci_write_cfg_byte(0, 7<<3|3, 0x06, 0x01);
- pci_write_cfg_byte(0, 7<<3|3, 0x41, 0x12);
- pci_write_cfg_byte(0, 7<<3|3, 0x42, 0x03);
- pci_write_cfg_byte(0, 7<<3|3, PCI_LATENCY_TIMER, 0x40);
-
-
-}
+++ /dev/null
-#ifndef VIA686_H_
-#define VIA686_H_
-
-
-#define CMOS_ADDR 0x70
-#define CMOS_DATA 0x71
-
-#define I8259_MASTER_CONTROL 0x20
-#define I8259_MASTER_MASK 0x21
-
-#define I8259_SLAVE_CONTROL 0xA0
-#define I8259_SLAVE_MASK 0xA1
-
-#define SIO_CONFIG_ADDR 0x3F0
-#define SIO_CONFIG_DATA 0x3F1
-
-#define SIO_WRITE_CONFIG(addr, byte) \
- out_byte(SIO_CONFIG_ADDR, addr); \
- out_byte(SIO_CONFIG_DATA, byte);
-
-#define SIO_READ_CONFIG(addr, byte) \
- out_byte(SIO_CONFIG_ADDR, addr); \
- byte = in_byte(SIO_CONFIG_DATA);
-
-void via_init(void);
-
-void via_calibrate_bus_freq(void);
-
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Hyperion Entertainment, Hans-JoergF@hyperion-entertainment.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <stdio_dev.h>
-#include "memio.h"
-#include <part.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-unsigned char *cursor_position;
-unsigned int cursor_row;
-unsigned int cursor_col;
-
-unsigned char current_attr;
-
-unsigned int video_numrows = 25;
-unsigned int video_numcols = 80;
-unsigned int video_scrolls = 0;
-
-#define VIDEO_BASE (unsigned char *)0xFD0B8000
-#define VIDEO_ROWS video_numrows
-#define VIDEO_COLS video_numcols
-#define VIDEO_PITCH (2 * video_numcols)
-#define VIDEO_SIZE (video_numrows * video_numcols * 2)
-#define VIDEO_NAME "vga"
-
-void video_test(void);
-void video_putc(char ch);
-void video_puts(char *string);
-void video_scroll(int rows);
-void video_banner(void);
-int video_init(void);
-int video_start(void);
-int video_rows(void);
-int video_cols(void);
-
-char *prompt_string = "=>";
-unsigned char video_get_attr(void);
-
-void video_set_color(unsigned char attr)
-{
- unsigned char *fb = (unsigned char *)VIDEO_BASE;
- int i;
-
- current_attr = video_get_attr();
-
- for (i=0; i<VIDEO_SIZE; i+=2)
- {
- *(fb+i+1) = current_attr;
- }
-}
-
-unsigned char video_get_attr(void)
-{
- char *s;
- unsigned char attr;
-
- attr = 0x0f;
-
- s = getenv("vga_fg_color");
- if (s)
- {
- attr = atoi(s);
- }
-
- s = getenv("vga_bg_color");
- if (s)
- {
- attr |= atoi(s)<<4;
- }
-
- return attr;
-}
-
-int video_inited = 0;
-
-int drv_video_init(void)
-{
- int error, devices = 1 ;
- struct stdio_dev vgadev ;
- if (video_inited) return 1;
- video_inited = 1;
- video_init();
- memset (&vgadev, 0, sizeof(vgadev));
-
- strcpy(vgadev.name, VIDEO_NAME);
- vgadev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_SYSTEM;
- vgadev.putc = video_putc;
- vgadev.puts = video_puts;
- vgadev.getc = NULL;
- vgadev.tstc = NULL;
- vgadev.start = video_start;
-
- error = stdio_register (&vgadev);
-
- if (error == 0)
- {
- char *s = getenv("stdout");
- if (s && strcmp(s, VIDEO_NAME)==0)
- {
- if (overwrite_console()) return 1;
- error = console_assign(stdout, VIDEO_NAME);
- if (error == 0) return 1;
- else return error;
- }
- return 1;
- }
-
- return error;
-}
-
-int video_init(void)
-{
- cursor_position = VIDEO_BASE; /* Color text display base */
- cursor_row = 0;
- cursor_col = 0;
- current_attr = video_get_attr(); /* Currently selected value for attribute. */
-/* video_test(); */
- video_set_color(current_attr);
-
- return 0;
-}
-
-void video_set_cursor(int line, int column)
-{
- unsigned short offset = line*video_numcols + column;
- cursor_position = VIDEO_BASE + line*VIDEO_PITCH + column*2;
- out_byte(0x3D4, 0x0E);
- out_byte(0x3D5, offset/256);
- out_byte(0x3D4, 0x0F);
- out_byte(0x3D5, offset%256);
-}
-
-void video_write_char(int character)
-{
- *cursor_position = character;
- *(cursor_position+1) = current_attr;
-}
-
-void video_test(void)
-{
-
-}
-
-void video_putc(char ch)
-{
- switch(ch)
- {
- case '\n':
- cursor_col = 0;
- cursor_row += 1;
- break;
- case '\r':
- cursor_col = 0;
- break;
- case '\b':
- if (cursor_col) cursor_col--;
- else return;
- break;
- case '\t':
- cursor_col = (cursor_col/8+1)*8;
- break;
- default:
- video_write_char(ch);
- cursor_col++;
- if (cursor_col > VIDEO_COLS-1)
- {
- cursor_row++;
- cursor_col=0;
- }
- }
-
- if (cursor_row > VIDEO_ROWS-1)
- video_scroll(1);
- video_set_cursor(cursor_row, cursor_col);
-}
-
-void video_scroll(int rows)
-{
- unsigned short clear = ((unsigned short)current_attr) | (' '<<8);
- unsigned short* addr16 = &((unsigned short *)VIDEO_BASE)[(VIDEO_ROWS-rows)*VIDEO_COLS];
- int i;
- char *s;
-
- s = getenv("vga_askscroll");
- video_scrolls += rows;
-
- if (video_scrolls >= video_numrows)
- {
- if (s && strcmp(s, "yes"))
- {
- while (-1 == tstc());
- }
-
- video_scrolls = 0;
- }
-
-
- memcpy(VIDEO_BASE, VIDEO_BASE+rows*(VIDEO_COLS*2), (VIDEO_ROWS-rows)*(VIDEO_COLS*2));
- for (i = 0 ; i < rows * VIDEO_COLS ; i++)
- addr16[i] = clear;
- cursor_row-=rows;
- cursor_col=0;
-}
-
-void video_puts(char *string)
-{
- while (*string)
- {
- video_putc(*string);
- string++;
- }
-}
-
-int video_start(void)
-{
- return 0;
-}
-
-unsigned char video_single_box[] =
-{
- 218, 196, 191,
- 179, 179,
- 192, 196, 217
-};
-
-unsigned char video_double_box[] =
-{
- 201, 205, 187,
- 186, 186,
- 200, 205, 188
-};
-
-unsigned char video_single_title[] =
-{
- 195, 196, 180, 180, 195
-};
-
-unsigned char video_double_title[] =
-{
- 204, 205, 185, 181, 198
-};
-
-#define SINGLE_BOX 0
-#define DOUBLE_BOX 1
-
-unsigned char *video_addr(int x, int y)
-{
- return VIDEO_BASE + 2*(VIDEO_COLS*y) + 2*x;
-}
-
-void video_bios_print_string(char *s, int x, int y, int attr, int count)
-{
- int cattr = current_attr;
- if (attr != -1) current_attr = attr;
- video_set_cursor(x,y);
- while (count)
- {
- char c = *s++;
- if (attr == -1) current_attr = *s++;
- video_putc(c);
- count--;
- }
-}
-
-void video_draw_box(int style, int attr, char *title, int separate, int x, int y, int w, int h)
-{
- unsigned char *fb, *fb2;
- unsigned char *st = (style == SINGLE_BOX)?video_single_box : video_double_box;
- unsigned char *ti = (style == SINGLE_BOX)?video_single_title : video_double_title;
- int i;
-
- fb = video_addr(x,y);
- *(fb) = st[0];
- *(fb+1) = attr;
- fb += 2;
-
- fb2 = video_addr(x,y+h-1);
- *(fb2) = st[5];
- *(fb2+1) = attr;
- fb2 += 2;
-
- for (i=0; i<w-2;i++)
- {
- *fb = st[1];
- fb++;
- *fb = attr;
- fb++;
-
- *fb2 = st[6];
- fb2++;
- *fb2 = attr;
- fb2++;
-
- }
- *fb = st[2];
- *(fb+1) = attr;
-
- *fb2 = st[7];
- *(fb2+1) = attr;
-
- fb = video_addr(x, y+1);
- fb2 = video_addr(x+w-1, y+1);
- for (i=0; i<h-2; i++)
- {
- *fb = st[3];
- *(fb+1) = attr; fb += 2*VIDEO_COLS;
-
- *fb2 = st[4];
- *(fb2+1) = attr; fb2 += 2*VIDEO_COLS;
- }
-
- /* Draw title */
- if (title)
- {
- if (separate == 0)
- {
- fb = video_addr(x+1, y);
- *fb = ti[3];
- fb += 2;
- *fb = ' ';
- fb += 2;
- while (*title)
- {
- *fb = *title;
- fb ++;
- *fb = attr;
- fb++; title++;
- }
- *fb = ' ';
- fb += 2;
- *fb = ti[4];
- }
- else
- {
- fb = video_addr(x, y+2);
- *fb = ti[0];
- fb += 2;
- for (i=0; i<w-2; i++)
- {
- *fb = ti[1];
- *(fb+1) = attr;
- fb += 2;
- }
- *fb = ti[2];
- *(fb+1) = attr;
- fb = video_addr(x+1, y+1);
- for (i=0; i<w-2; i++)
- {
- *fb = ' ';
- *(fb+1) = attr;
- fb += 2;
- }
- fb = video_addr(x+2, y+1);
-
- while (*title)
- {
- *fb = *title;
- *(fb+1) = attr;
- fb += 2;
- title++;
- }
- }
- }
-
-}
-
-void video_draw_text(int x, int y, int attr, char *text)
-{
- unsigned char *fb = video_addr(x,y);
- while (*text)
- {
- *fb++ = *text++;
- *fb++ = attr;
- }
-}
-
-void video_save_rect(int x, int y, int w, int h, void *save_area, int clearchar, int clearattr)
-{
- unsigned char *save = (unsigned char *)save_area;
- unsigned char *fb = video_addr(x,y);
- int i,j;
- for (i=0; i<h; i++)
- {
- unsigned char *fbb = fb;
- for (j=0; j<w; j++)
- {
- *save ++ = *fb;
- if (clearchar > 0) *fb = clearchar;
- fb ++;
- *save ++ = *fb;
- if (clearattr > 0) *fb = clearattr;
- }
- fb = fbb + 2*VIDEO_COLS;
- }
-}
-
-void video_restore_rect(int x, int y, int w, int h, void *save_area)
-{
- unsigned char *save = (unsigned char *)save_area;
- unsigned char *fb = video_addr(x,y);
- int i,j;
- for (i=0; i<h; i++)
- {
- unsigned char *fbb = fb;
- for (j=0; j<w; j++)
- {
- *fb ++ = *save ++;
- *fb ++ = *save ++;
- }
- fb = fbb + 2*VIDEO_COLS;
- }
-
-}
-
-int video_rows(void)
-{
- return VIDEO_ROWS;
-}
-
-int video_cols(void)
-{
- return VIDEO_COLS;
-}
-
-void video_size(int cols, int rows)
-{
- video_numrows = rows;
- video_numcols = cols;
-}
-
-void video_clear(void)
-{
- unsigned short *fbb = (unsigned short *)0xFD0B8000;
- int i,j;
- unsigned short val = 0x2000 | current_attr;
-
- for (i=0; i<video_rows(); i++)
- {
- for (j=0; j<video_cols(); j++)
- {
- *fbb++ = val;
- }
- }
- video_set_cursor(0,0);
- cursor_row = 0;
- cursor_col = 0;
-}
-
-#ifdef EASTEREGG
-int video_easteregg_active = 0;
-
-void video_easteregg(void)
-{
- video_easteregg_active = 1;
-}
-#endif
-
-extern block_dev_desc_t * ide_get_dev(int dev);
-extern char version_string[];
-
-void video_banner(void)
-{
- block_dev_desc_t *ide;
- int i;
- char *s;
- int maxdev;
-
-
- if (video_inited == 0) return;
-#ifdef EASTEREGG
- if (video_easteregg_active)
- {
- prompt_string="";
- video_clear();
- printf("\n");
- printf(" **** COMMODORE 64 BASIC X2 ****\n\n");
- printf(" 64K RAM SYSTEM 38911 BASIC BYTES FREE\n\n");
- printf("READY\n");
- }
- else
- {
-#endif
- s = getenv("ide_maxbus");
- if (s)
- maxdev = atoi(s) * 2;
- else
- maxdev = 4;
-
- s = getenv("stdout");
- if (s && strcmp(s, "serial") == 0)
- return;
-
- video_clear();
- printf("%s\n\nCPU: ", version_string);
- checkcpu();
- printf("DRAM: %ld MB\n", gd->bd->bi_memsize/(1024*1024));
- printf("FSB: %ld MHz\n", gd->bd->bi_busfreq/1000000);
-
- printf("\n---- Disk summary ----\n");
- for (i = 0; i < maxdev; i++)
- {
- ide = ide_get_dev(i);
- printf("Device %d: ", i);
- dev_print(ide);
- }
-
-/*
- video_draw_box(SINGLE_BOX, 0x0F, "Test 1", 0, 0,18, 72, 4);
- video_draw_box(DOUBLE_BOX, 0x0F, "Test 2", 1, 4,10, 50, 6);
- video_draw_box(DOUBLE_BOX, 0x0F, "Test 3", 0, 40, 3, 20, 5);
-
- video_draw_text(1, 4, 0x2F, "Highlighted options");
- video_draw_text(1, 5, 0x0F, "Non-selected option");
- video_draw_text(1, 6, 0x07, "disabled option");
-*/
-#ifdef EASTEREGG
- }
-#endif
-}
+++ /dev/null
-#include <common.h>
-#include <command.h>
-
-int do_menu( cmd_tbl_t *cmdtp, /*bd_t *bd,*/ int flag, int argc, char *argv[] )
-{
-/* printf("<NOT YET IMPLEMENTED>\n"); */
- return 0;
-}
-
-#if defined(CONFIG_AMIGAONEG3SE) && defined(CONFIG_CMD_BSP)
-U_BOOT_CMD(
- menu, 1, 1, do_menu,
- "display BIOS setup menu",
- ""
-);
-#endif
case 0x0:
case 0x80: /* refresh period is 15.625 usec */
sdram_config_reg =
- (unsigned int) (((float) 15.625 * (float) CONFIG_SYS_BUS_HZ)
+ (unsigned int) (((float) 15.625 * (float) CONFIG_SYS_BUS_CLK)
/ (float) 1000000.0);
break;
case 0x1:
case 0x81: /* refresh period is 3.9 usec */
sdram_config_reg =
- (unsigned int) (((float) 3.9 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 3.9 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
case 0x2:
case 0x82: /* refresh period is 7.8 usec */
sdram_config_reg =
- (unsigned int) (((float) 7.8 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 7.8 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
case 0x3:
case 0x83: /* refresh period is 31.3 usec */
sdram_config_reg =
- (unsigned int) (((float) 31.3 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 31.3 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
case 0x4:
case 0x84: /* refresh period is 62.5 usec */
sdram_config_reg =
- (unsigned int) (((float) 62.5 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 62.5 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
case 0x5:
case 0x85: /* refresh period is 125 usec */
sdram_config_reg =
- (unsigned int) (((float) 125 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 125 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
default: /* refresh period undefined */
case 0x0:
case 0x80: /* refresh period is 15.625 usec */
sdram_config_reg =
- (unsigned int) (((float) 15.625 * (float) CONFIG_SYS_BUS_HZ)
+ (unsigned int) (((float) 15.625 * (float) CONFIG_SYS_BUS_CLK)
/ (float) 1000000.0);
break;
case 0x1:
case 0x81: /* refresh period is 3.9 usec */
sdram_config_reg =
- (unsigned int) (((float) 3.9 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 3.9 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
case 0x2:
case 0x82: /* refresh period is 7.8 usec */
sdram_config_reg =
- (unsigned int) (((float) 7.8 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 7.8 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
case 0x3:
case 0x83: /* refresh period is 31.3 usec */
sdram_config_reg =
- (unsigned int) (((float) 31.3 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 31.3 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
case 0x4:
case 0x84: /* refresh period is 62.5 usec */
sdram_config_reg =
- (unsigned int) (((float) 62.5 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 62.5 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
case 0x5:
case 0x85: /* refresh period is 125 usec */
sdram_config_reg =
- (unsigned int) (((float) 125 * (float) CONFIG_SYS_BUS_HZ) /
+ (unsigned int) (((float) 125 * (float) CONFIG_SYS_BUS_CLK) /
(float) 1000000.0);
break;
default: /* refresh period undefined */
+++ /dev/null
-#
-# (C) Copyright 2003
-# Psyent Corporation
-# Scott McNutt <smcnutt@psyent.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x018c0000
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * CompactFlash/IDE:
- * (C) Copyright 2004, Shlomo Kut <skut@vyyo.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <nios-io.h>
-#if defined(CONFIG_SEVENSEG)
-#include "../common/sevenseg.h"
-#endif
-
-void _default_hdlr (void)
-{
- printf ("default_hdlr\n");
-}
-
-int board_early_init_f (void)
-{
-#if defined(CONFIG_SEVENSEG)
- /* init seven segment led display and switch off */
- sevenseg_set(SEVENSEG_OFF);
-#endif
- return 0;
-}
-
-int checkboard (void)
-{
- puts ("Board: Altera Nios 1C20 Development Kit\n");
- return 0;
-}
-
-phys_size_t initdram (int board_type)
-{
- return (0);
-}
-
-#if defined(CONFIG_CMD_IDE)
-int ide_preinit (void)
-{
- nios_pio_t *present = (nios_pio_t *) CONFIG_SYS_CF_PRESENT;
- nios_pio_t *power = (nios_pio_t *) CONFIG_SYS_CF_POWER;
- nios_pio_t *atasel = (nios_pio_t *) CONFIG_SYS_CF_ATASEL;
-
- /* setup data direction registers */
- present->direction = NIOS_PIO_IN;
- power->direction = NIOS_PIO_OUT;
- atasel->direction = NIOS_PIO_OUT;
-
- /* Check for presence of card */
- if (present->data)
- return 1;
- printf ("Ok\n");
-
- /* Finish setup */
- power->data = 1; /* Turn on power FET */
- atasel->data = 0; /* Put in ATA mode */
-
- return 0;
-}
-#endif
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_CS8900
- rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
-#endif
- return rc;
-}
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <nios.h>
-
-/*
- * include common flash code (for altera boards)
- */
-#include "../common/flash.c"
-
-/*----------------------------------------------------------------------*/
-#define BANKSZ CONFIG_SYS_FLASH_SIZE
-#define SECTSZ (64 * 1024)
-#define USERFLASH (2 * 1024 * 1024) /* bottom 2 MB for user */
-
-/*----------------------------------------------------------------------*/
-unsigned long flash_init (void)
-{
- int i;
- unsigned long addr;
- flash_info_t *fli = &flash_info[0];
-
- fli->size = BANKSZ;
- fli->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- fli->flash_id = FLASH_MAN_AMD + FLASH_AMDLV065D;
-
- addr = CONFIG_SYS_FLASH_BASE;
- for (i = 0; i < fli->sector_count; ++i) {
- fli->start[i] = addr;
- addr += SECTSZ;
-
- /* Protect all but 2 MByte user area */
- if (addr < (CONFIG_SYS_FLASH_BASE + USERFLASH))
- fli->protect[i] = 0;
- else
- fli->protect[i] = 1;
- }
-
- return (BANKSZ);
-}
+++ /dev/null
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * board/altera/dk1s10/misc.c
- *
- * miscellaneous board interfaces / drivers
- */
-
-#include <common.h>
-
-#if defined(CONFIG_SEVENSEG)
-#include "../common/sevenseg.h"
-#include "../common/sevenseg.c"
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-OUTPUT_FORMAT("elf32-nios")
-OUTPUT_ARCH(nios)
-ENTRY(_start)
-
-SECTIONS
-{
- .text :
- {
- arch/nios/cpu/start.o (.text)
- *(.text)
- }
- __text_end = .;
-
- . = ALIGN(4);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
- __rodata_end = .;
-
- . = ALIGN(4);
- .data :
- {
- *(.data)
- }
- . = ALIGN(4);
- __data_end = .;
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- }
- . = ALIGN(4);
- __u_boot_cmd_end = .;
-
- __bss_start = .;
- . = ALIGN(4);
- .bss (NOLOAD) :
- {
- *(.bss)
- }
- . = ALIGN(4);
- __bss_end = .;
-}
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-/*************************************************************************
- * Exception Vector Table
- *
- * This could have gone in the cpu soure tree, but the whole point of
- * Nios is customization -- and polluting the cpu source tree with
- * board-specific ifdef's really defeats the purpose, no? With this in
- * the board-specific tree, each board has the freedom to organize
- * vectors/traps, etc anyway it wants. The init code copies this table
- * to the proper location.
- *
- * Each board can do what it likes here. But there are four "standard"
- * handlers availble:
- *
- * _cwp_lolimit -Handles register window underflows.
- * _cwp_hilimit -Handles register window overflows.
- * _timebase_int -Increments the timebase.
- * _brkpt_hw_int -Hardware breakpoint handler.
- * _brkpt_sw_int -Software breakpoint handler.
- * _def_xhandler -Default exception handler.
- *
- * _timebase_int handles a Nios Timer interrupt and increments the
- * timestamp used for the get_timer(), reset_timer(), etc. routines. It
- * expects the timer to be configured like the standard-32 low priority
- * timer.
- *
- * _def_xhandler dispatches exceptions/traps via the external_interrupt()
- * routine. This lets you use the irq_install_handler() and handle your
- * interrupts/traps with code written in C.
- ************************************************************************/
-
- .data
- .global _vectors
- .align 4
-_vectors:
-
- .long _def_xhandler@h /* Vector 0 - NMI */
- .long _cwp_lolimit@h /* Vector 1 - underflow */
- .long _cwp_hilimit@h /* Vector 2 - overflow */
- .long _brkpt_hw_int@h /* Vector 3 - Breakpoint */
- .long _brkpt_sw_int@h /* Vector 4 - Single step*/
- .long _def_xhandler@h /* Vector 5 - GNUPro debug */
- .long _def_xhandler@h /* Vector 6 - future reserved */
- .long _def_xhandler@h /* Vector 7 - future reserved */
- .long _def_xhandler@h /* Vector 8 - future reserved */
- .long _def_xhandler@h /* Vector 9 - future reserved */
- .long _def_xhandler@h /* Vector 10 - future reserved */
- .long _def_xhandler@h /* Vector 11 - future reserved */
- .long _def_xhandler@h /* Vector 12 - future reserved */
- .long _def_xhandler@h /* Vector 13 - future reserved */
- .long _def_xhandler@h /* Vector 14 - future reserved */
- .long _def_xhandler@h /* Vector 15 - future reserved */
- .long _def_xhandler@h /* Vector 16 */
- .long _def_xhandler@h /* Vector 17 */
- .long _def_xhandler@h /* Vector 18 */
- .long _def_xhandler@h /* Vector 19 */
- .long _def_xhandler@h /* Vector 20 */
- .long _def_xhandler@h /* Vector 21 */
- .long _def_xhandler@h /* Vector 22 */
- .long _def_xhandler@h /* Vector 23 */
- .long _def_xhandler@h /* Vector 24 */
- .long _def_xhandler@h /* Vector 25 */
- .long _def_xhandler@h /* Vector 26 */
- .long _def_xhandler@h /* Vector 27 */
- .long _def_xhandler@h /* Vector 28 */
- .long _def_xhandler@h /* Vector 29 */
- .long _def_xhandler@h /* Vector 30 */
- .long _def_xhandler@h /* Vector 31 */
- .long _def_xhandler@h /* Vector 32 */
- .long _def_xhandler@h /* Vector 33 */
- .long _def_xhandler@h /* Vector 34 */
- .long _def_xhandler@h /* Vector 35 */
- .long _def_xhandler@h /* Vector 36 */
- .long _def_xhandler@h /* Vector 37 */
- .long _def_xhandler@h /* Vector 38 */
- .long _def_xhandler@h /* Vector 39 */
- .long _def_xhandler@h /* Vector 40 */
- .long _def_xhandler@h /* Vector 41 */
- .long _def_xhandler@h /* Vector 42 */
- .long _def_xhandler@h /* Vector 43 */
- .long _def_xhandler@h /* Vector 44 */
- .long _def_xhandler@h /* Vector 45 */
- .long _def_xhandler@h /* Vector 46 */
- .long _def_xhandler@h /* Vector 47 */
- .long _def_xhandler@h /* Vector 48 */
- .long _def_xhandler@h /* Vector 49 */
- .long _timebase_int@h /* Vector 50 - lopri timer*/
- .long _def_xhandler@h /* Vector 51 */
- .long _def_xhandler@h /* Vector 52 */
- .long _def_xhandler@h /* Vector 53 */
- .long _def_xhandler@h /* Vector 54 */
- .long _def_xhandler@h /* Vector 55 */
- .long _def_xhandler@h /* Vector 56 */
- .long _def_xhandler@h /* Vector 57 */
- .long _def_xhandler@h /* Vector 58 */
- .long _def_xhandler@h /* Vector 59 */
- .long _def_xhandler@h /* Vector 60 */
- .long _def_xhandler@h /* Vector 61 */
- .long _def_xhandler@h /* Vector 62 */
- .long _def_xhandler@h /* Vector 63 */
+++ /dev/null
-#
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).a
-
-COBJS := $(BOARD).o flash.o misc.o
-SOBJS = vectors.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <netdev.h>
-#if defined(CONFIG_SEVENSEG)
-#include "../common/sevenseg.h"
-#endif
-
-void _default_hdlr (void)
-{
- printf ("default_hdlr\n");
-}
-
-int board_early_init_f (void)
-{
-#if defined(CONFIG_SEVENSEG)
- /* init seven segment led display and switch off */
- sevenseg_set(SEVENSEG_OFF);
-#endif
- return 0;
-}
-
-int checkboard (void)
-{
- puts ("Board: Altera Nios 1S10 Development Kit\n");
-#if defined(CONFIG_NIOS_SAFE_32)
- puts ("Conf.: Altera Safe 32 (safe_32)\n");
-#elif defined(CONFIG_NIOS_STANDARD_32)
- puts ("Conf.: Altera Standard 32 (standard_32)\n");
-#elif defined(CONFIG_NIOS_MTX_LDK_20)
- puts ("Conf.: Microtronix LDK 2.0 (LDK2)\n");
-#endif
-
- return 0;
-}
-
-phys_size_t initdram (int board_type)
-{
- return (0);
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_CS8900
- rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
-#endif
- return rc;
-}
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <nios.h>
-
-/*
- * include common flash code (for altera boards)
- */
-#include "../common/flash.c"
-
-/*---------------------------------------------------------------------*/
-#define BANKSZ (8 * 1024 * 1024)
-#define SECTSZ (64 * 1024)
-#define USERFLASH (2 * 1024 * 1024) /* bottom 2 MB for user */
-
-/*---------------------------------------------------------------------*/
-unsigned long flash_init (void)
-{
- int i;
- unsigned long addr;
- flash_info_t *fli = &flash_info[0];
-
- fli->size = BANKSZ;
- fli->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- fli->flash_id = FLASH_MAN_AMD + FLASH_AMDLV065D;
-
- addr = CONFIG_SYS_FLASH_BASE;
- for (i = 0; i < fli->sector_count; ++i) {
- fli->start[i] = addr;
- addr += SECTSZ;
-
- /* Protect all but 2 MByte user area */
- if (addr < (CONFIG_SYS_FLASH_BASE + USERFLASH))
- fli->protect[i] = 0;
- else
- fli->protect[i] = 1;
- }
-
- return (BANKSZ);
-}
+++ /dev/null
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * board/altera/dk1s10/misc.c
- *
- * miscellaneous board interfaces / drivers
- */
-
-#include <common.h>
-
-#if defined(CONFIG_SEVENSEG)
-#include "../common/sevenseg.h"
-#include "../common/sevenseg.c"
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-OUTPUT_FORMAT("elf32-nios")
-OUTPUT_ARCH(nios)
-ENTRY(_start)
-
-SECTIONS
-{
- .text :
- {
- arch/nios/cpu/start.o (.text)
- *(.text)
- }
- __text_end = .;
-
- . = ALIGN(4);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
- __rodata_end = .;
-
- . = ALIGN(4);
- .data :
- {
- *(.data)
- }
- . = ALIGN(4);
- __data_end = .;
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- }
- . = ALIGN(4);
- __u_boot_cmd_end = .;
-
- __bss_start = .;
- . = ALIGN(4);
- .bss (NOLOAD) :
- {
- *(.bss)
- }
- . = ALIGN(4);
- __bss_end = .;
-}
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-
-
-/*************************************************************************
- * Exception Vector Table
- *
- * This could have gone in the cpu soure tree, but the whole point of
- * Nios is customization -- and polluting the cpu source tree with
- * board-specific ifdef's really defeats the purpose, no? With this in
- * the board-specific tree, each board has the freedom to organize
- * vectors/traps, etc anyway it wants. The init code copies this table
- * to the proper location.
- *
- * Each board can do what it likes here. But there are four "standard"
- * handlers availble:
- *
- * _cwp_lolimit -Handles register window underflows.
- * _cwp_hilimit -Handles register window overflows.
- * _timebase_int -Increments the timebase.
- * _def_xhandler -Default exception handler.
- *
- * _timebase_int handles a Nios Timer interrupt and increments the
- * timestamp used for the get_timer(), reset_timer(), etc. routines. It
- * expects the timer to be configured like the standard-32 low priority
- * timer.
- *
- * _def_xhandler dispatches exceptions/traps via the external_interrupt()
- * routine. This lets you use the irq_install_handler() and handle your
- * interrupts/traps with code written in C.
- ************************************************************************/
-
- .data
- .global _vectors
- .align 4
-_vectors:
-
-#if defined(CONFIG_SYS_NIOS_CPU_OCI_BASE)
- /* OCI does the reset job */
- .long _def_xhandler@h /* Vector 0 - NMI / Reset */
-#else
- /* there is no OCI, so we have to do a direct reset jump here */
- .long CONFIG_SYS_NIOS_CPU_RST_VECT /* Vector 0 - Reset to GERMS */
-#endif
- .long _cwp_lolimit@h /* Vector 1 - underflow */
- .long _cwp_hilimit@h /* Vector 2 - overflow */
-
- .long _def_xhandler@h /* Vector 3 - GNUPro debug */
- .long _def_xhandler@h /* Vector 4 - GNUPro debug */
- .long _def_xhandler@h /* Vector 5 - GNUPro debug */
- .long _def_xhandler@h /* Vector 6 - future reserved */
- .long _def_xhandler@h /* Vector 7 - future reserved */
- .long _def_xhandler@h /* Vector 8 - future reserved */
- .long _def_xhandler@h /* Vector 9 - future reserved */
- .long _def_xhandler@h /* Vector 10 - future reserved */
- .long _def_xhandler@h /* Vector 11 - future reserved */
- .long _def_xhandler@h /* Vector 12 - future reserved */
- .long _def_xhandler@h /* Vector 13 - future reserved */
- .long _def_xhandler@h /* Vector 14 - future reserved */
- .long _def_xhandler@h /* Vector 15 - future reserved */
-#if (CONFIG_SYS_NIOS_TMRIRQ == 16)
- .long _timebase_int@h /* Vector 16 - lopri timer*/
-#else
- .long _def_xhandler@h /* Vector 16 */
-#endif
- .long _def_xhandler@h /* Vector 17 */
- .long _def_xhandler@h /* Vector 18 */
- .long _def_xhandler@h /* Vector 19 */
- .long _def_xhandler@h /* Vector 20 */
- .long _def_xhandler@h /* Vector 21 */
- .long _def_xhandler@h /* Vector 22 */
- .long _def_xhandler@h /* Vector 23 */
- .long _def_xhandler@h /* Vector 24 */
- .long _def_xhandler@h /* Vector 25 */
- .long _def_xhandler@h /* Vector 26 */
- .long _def_xhandler@h /* Vector 27 */
- .long _def_xhandler@h /* Vector 28 */
- .long _def_xhandler@h /* Vector 29 */
- .long _def_xhandler@h /* Vector 30 */
- .long _def_xhandler@h /* Vector 31 */
- .long _def_xhandler@h /* Vector 32 */
- .long _def_xhandler@h /* Vector 33 */
- .long _def_xhandler@h /* Vector 34 */
- .long _def_xhandler@h /* Vector 35 */
- .long _def_xhandler@h /* Vector 36 */
- .long _def_xhandler@h /* Vector 37 */
- .long _def_xhandler@h /* Vector 38 */
- .long _def_xhandler@h /* Vector 39 */
- .long _def_xhandler@h /* Vector 40 */
- .long _def_xhandler@h /* Vector 41 */
- .long _def_xhandler@h /* Vector 42 */
- .long _def_xhandler@h /* Vector 43 */
- .long _def_xhandler@h /* Vector 44 */
- .long _def_xhandler@h /* Vector 45 */
- .long _def_xhandler@h /* Vector 46 */
- .long _def_xhandler@h /* Vector 47 */
- .long _def_xhandler@h /* Vector 48 */
- .long _def_xhandler@h /* Vector 49 */
-#if (CONFIG_SYS_NIOS_TMRIRQ == 50)
- .long _timebase_int@h /* Vector 50 - lopri timer*/
-#else
- .long _def_xhandler@h /* Vector 50 */
-#endif
- .long _def_xhandler@h /* Vector 51 */
- .long _def_xhandler@h /* Vector 52 */
- .long _def_xhandler@h /* Vector 53 */
- .long _def_xhandler@h /* Vector 54 */
- .long _def_xhandler@h /* Vector 55 */
- .long _def_xhandler@h /* Vector 56 */
- .long _def_xhandler@h /* Vector 57 */
- .long _def_xhandler@h /* Vector 58 */
- .long _def_xhandler@h /* Vector 59 */
- .long _def_xhandler@h /* Vector 60 */
- .long _def_xhandler@h /* Vector 61 */
- .long _def_xhandler@h /* Vector 62 */
- .long _def_xhandler@h /* Vector 63 */
COBJS-y := $(BOARD).o
COBJS-$(CONFIG_CMD_IDE) += ../common/cfide.o
COBJS-$(CONFIG_EPLED) += ../common/epled.o
+COBJS-$(CONFIG_GPIO) += gpio.o
COBJS-$(CONFIG_SEVENSEG) += ../common/sevenseg.o
SOBJS-y := text_base.o
--- /dev/null
+/*
+ * board gpio driver
+ *
+ * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
+ * Licensed under the GPL-2 or later.
+ */
+#include <common.h>
+#include <asm/io.h>
+
+#ifndef CONFIG_SYS_GPIO_BASE
+
+#define ALTERA_PIO_BASE LED_PIO_BASE
+#define ALTERA_PIO_DATA (ALTERA_PIO_BASE + 0)
+#define ALTERA_PIO_DIR (ALTERA_PIO_BASE + 4)
+static u32 pio_data_reg;
+static u32 pio_dir_reg;
+
+int gpio_direction_input(unsigned gpio)
+{
+ u32 mask = 1 << gpio;
+ writel(pio_dir_reg &= ~mask, ALTERA_PIO_DIR);
+ return 0;
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ u32 mask = 1 << gpio;
+ if (value)
+ pio_data_reg |= mask;
+ else
+ pio_data_reg &= ~mask;
+ writel(pio_data_reg, ALTERA_PIO_DATA);
+ writel(pio_dir_reg |= mask, ALTERA_PIO_DIR);
+ return 0;
+}
+
+int gpio_get_value(unsigned gpio)
+{
+ u32 mask = 1 << gpio;
+ if (pio_dir_reg & mask)
+ return (pio_data_reg & mask) ? 1 : 0;
+ else
+ return (readl(ALTERA_PIO_DATA) & mask) ? 1 : 0;
+}
+
+void gpio_set_value(unsigned gpio, int value)
+{
+ u32 mask = 1 << gpio;
+ if (value)
+ pio_data_reg |= mask;
+ else
+ pio_data_reg &= ~mask;
+ writel(pio_data_reg, ALTERA_PIO_DATA);
+}
+#endif
0x00, 0x00, 0x00, 0x00
};
-static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u8 chip;
u8 *buf;
* int do_l2cache()
*
************************************************************************/
-int do_l2cache( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] )
+int do_l2cache( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] )
{
switch (argc) {
case 2: /* on / off */
}
int
-do_pll_alter (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_pll_alter (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char c = '\0';
pll_freq_t pll_freq;
return 0;
}
-static int do_lcd_clear (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_lcd_clear (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
out_8((u8 *) LCD_CMD_ADDR, 0x01);
udelay(2000);
return 0;
}
-static int do_lcd_puts (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_lcd_puts (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
if (argc < 2) {
cmd_usage(cmdtp);
return 0;
}
-static int do_lcd_putc (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_lcd_putc (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
if (argc < 2) {
cmd_usage(cmdtp);
return 0;
}
-static int do_lcd_cur (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_lcd_cur (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong count;
ulong dir;
return 0;
}
-static int do_sw_stat(cmd_tbl_t* cmd_tp, int flags, int argc, char *argv[])
+static int do_sw_stat(cmd_tbl_t* cmd_tp, int flags, int argc, char * const argv[])
{
char stat;
int i;
""
);
-static int do_led_ctl(cmd_tbl_t* cmd_tp, int flags, int argc, char *argv[])
+static int do_led_ctl(cmd_tbl_t* cmd_tp, int flags, int argc, char * const argv[])
{
int led_no;
0x00
};
-static int update_boot_eeprom(cmd_tbl_t* cmdtp, int flag, int argc, char *argv[])
+static int update_boot_eeprom(cmd_tbl_t* cmdtp, int flag, int argc, char * const argv[])
{
ulong len = 0x20;
uchar chip = CONFIG_SYS_I2C_EEPROM_ADDR;
return 0;
}
-static int do_lcd_test(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_lcd_test(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
lcd_init();
return 0;
}
-static int do_lcd_clear(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_lcd_clear(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
*LCD_CMD_ADDR = 0x01;
mdelay(LCD_DELAY_NORMAL_MS);
return 0;
}
-static int do_lcd_puts(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_lcd_puts(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
if (argc < 2) {
cmd_usage(cmdtp);
lcd_puts(argv[1]);
return 0;
}
-static int do_lcd_putc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_lcd_putc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
if (argc < 2) {
cmd_usage(cmdtp);
lcd_putc((char)argv[1][0]);
return 0;
}
-static int do_lcd_cur(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_lcd_cur(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong count;
ulong dir;
}
#endif /* 0 - test only */
-static int do_led_test_off(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_led_test_off(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
volatile unsigned int *GpioOr =
(volatile unsigned int *)(CONFIG_SYS_PERIPHERAL_BASE + 0x700);
return 0;
}
-static int do_led_test_on(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_led_test_on(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
volatile unsigned int *GpioOr =
(volatile unsigned int *)(CONFIG_SYS_PERIPHERAL_BASE + 0x700);
printf("PCIL0_XSTS = %#010lx\n", in32r(PCIL0_STS));
}
-int do_show_xbridge_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_show_xbridge_info(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
show_xbridge_info();
return 0;
}
int do_show_pcix_device_info(cmd_tbl_t * cmdtp, int flag, int argc,
- char *argv[])
+ char * const argv[])
{
show_pcix_device_info();
return 0;
extern void show_reset_reg(void);
-int do_show_reset_reg_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_show_reset_reg_info(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
show_reset_reg();
return 0;
return 0;
}
-int do_update_boot_eeprom(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_update_boot_eeprom(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
return update_boot_eeprom();
}
extern void print_evb440spe_info(void);
static int setBootStrapClock(cmd_tbl_t *cmdtp, int incrflag,
- int flag, int argc, char *argv[]);
+ int flag, int argc, char * const argv[]);
/* ------------------------------------------------------------------------- */
-int do_evb440spe(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_evb440spe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
return setBootStrapClock (cmdtp, 1, flag, argc, argv);
}
* evb440spe wrclk prom0,prom1
*/
static int setBootStrapClock(cmd_tbl_t *cmdtp, int incrflag, int flag,
- int argc, char *argv[])
+ int argc, char * const argv[])
{
uchar chip;
ulong data;
/*
This function loads FPGA configurations from the SystemACE CompactFlash
*/
-int do_loadace (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_loadace (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned char *p = (unsigned char *) AP1000_SYSACE_REGBASE;
int cfg;
* -1 if failed
* </pre>
*/
-int do_swconfigbyte (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_swconfigbyte (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned char *sector_buffer = NULL;
unsigned char input_char;
#define ONE_SECOND 1000000
-int do_pause (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_pause (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int pause_time;
unsigned int delay_time;
return 0;
}
-int do_swreconfig (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_swreconfig (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
printf ("Triggering software reconfigure (software config byte is 0x%02x)...\n",
*((unsigned char *) (SW_BYTE_SECTOR_ADDR + SW_BYTE_SECTOR_OFFSET)));
#define TEMP_ETHERM_BIT 0x02
#define TEMP_LTHERM_BIT 0x01
-int do_temp_sensor (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_temp_sensor (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
char cmd;
int ret_val = 0;
&theValue, I2C_WRITE);
}
-int do_eeprom (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_eeprom (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
char cmd;
int ret_val = 0;
return 0;
}
-int do_bridge (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_bridge (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
char cmd;
int ret_val = 1;
}
#endif
+#ifdef CONFIG_CMD_USB
+static void at91sam9m10g45ek_usb_hw_init(void)
+{
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_PIODE);
+
+ at91_set_gpio_output(AT91_PIN_PD1, 0);
+ at91_set_gpio_output(AT91_PIN_PD3, 0);
+}
+#endif
+
#ifdef CONFIG_MACB
static void at91sam9m10g45ek_macb_hw_init(void)
{
#ifdef CONFIG_CMD_NAND
at91sam9m10g45ek_nand_hw_init();
#endif
+#ifdef CONFIG_CMD_USB
+ at91sam9m10g45ek_usb_hw_init();
+#endif
#ifdef CONFIG_HAS_DATAFLASH
at91_spi0_hw_init(1 << 0);
#endif
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
PLATFORM_LDFLAGS += --gc-sections
TEXT_BASE = 0x00000000
-LDSCRIPT = $(obj)board/atmel/atstk1000/u-boot.lds
+LDSCRIPT = $(src)board/atmel/atstk1000/u-boot.lds
do_bootm (NULL,0,2,bootm_args);
}
-int barcobcd_boot_image (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int barcobcd_boot_image (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
#if 0
if (argc > 1) {
* read and prints the dip switch
* and/or external config inputs (4bits) 0...0x0F
*/
-int cmd_dip (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int cmd_dip (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
vu_long rc = 0;
* buz - turns Buzzer on/off
*/
#ifdef CONFIG_BC3450_BUZZER
-static int cmd_buz (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int cmd_buz (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
if (argc != 2) {
printf ("Usage:\nspecify one argument: \"on\" or \"off\"\n");
/*
* fp - front panel commands
*/
-static int cmd_fp (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int cmd_fp (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
sm501_gpio_init ();
ds1620_out (THERM_START_CONVERT, 0, 0);
}
-static int cmd_temp (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int cmd_temp (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int i;
struct therm therm;
* return 1 on CAN failure
* return 0 if no failure
*/
-int do_can (char *argv[])
+int do_can (char * const argv[])
{
int i;
struct mpc5xxx_mscan *can1 =
/*
* test - BC3450 HW test routines
*/
-int cmd_test (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int cmd_test (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
#ifdef CONFIG_BC3450_CAN
int rcode;
return retval;
}
-int do_bf537led(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_bf537led(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int led_mask = 0;
int led_current_state = 0;
#include <asm/blackfin.h>
-int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc != 3) {
show_usage:
#include <asm/blackfin.h>
#include "gpio_cfi_flash.h"
-int do_pf(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_pf(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong faddr = CONFIG_SYS_FLASH_BASE;
ushort data;
#include <asm/blackfin.h>
#include "gpio_cfi_flash.h"
-int do_ph(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ph(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong faddr = CONFIG_SYS_FLASH_BASE;
ushort data;
#ifdef CONFIG_CMD_BSP
-static int do_i2c_test(char *argv[])
+static int do_i2c_test(char * const argv[])
{
unsigned char temp, temp1;
return 0;
}
-static int do_usb_test(char *argv[])
+static int do_usb_test(char * const argv[])
{
int i;
static int usb_stor_curr_dev = -1; /* current device */
return 0;
}
-static int do_led_test(char *argv[])
+static int do_led_test(char * const argv[])
{
int i = 0;
struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT;
return 0;
}
-static int do_rs232_test(char *argv[])
+static int do_rs232_test(char * const argv[])
{
int error_status = 0;
struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
return error_status;
}
-static int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int rcode = -1;
#include "fwupdate.h"
-extern int do_bootm(cmd_tbl_t *, int, int, char *[]);
+extern int do_bootm(cmd_tbl_t *, int, int, char * const []);
extern long do_fat_read(const char *, void *, unsigned long, int);
-extern int do_fat_fsload(cmd_tbl_t *, int, int, char *[]);
+extern int do_fat_fsload(cmd_tbl_t *, int, int, char * const []);
static int load_rescue_image(ulong);
char *rsargs;
char *tmp = NULL;
char ka[16];
- char *argv[3] = { "bootm", ka, NULL };
+ char * const argv[3] = { "bootm", ka, NULL };
/* Check if rescue system is disabled... */
if (getenv("norescue")) {
char *tmp;
char dev[7];
char addr_str[16];
- char *argv[6] = { "fatload", "usb", dev, addr_str, nxri, NULL };
+ char * const argv[6] = { "fatload", "usb", dev, addr_str, nxri, NULL };
block_dev_desc_t *stor_dev = NULL;
cmd_tbl_t *bcmd;
LIB = $(obj)lib$(BOARD).a
-COBJS := da830evm.o
+COBJS-y += common.o
+COBJS-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o
+COBJS-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o
+
+COBJS := $(COBJS-y)
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
--- /dev/null
+/*
+ * Miscellaneous DA8XX functions.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include "common.h"
+
+#ifndef CONFIG_USE_IRQ
+void irq_init(void)
+{
+ /*
+ * Mask all IRQs by clearing the global enable and setting
+ * the enable clear for all the 90 interrupts.
+ */
+
+ writel(0, &davinci_aintc_regs->ger);
+
+ writel(0, &davinci_aintc_regs->hier);
+
+ writel(0xffffffff, &davinci_aintc_regs->ecr1);
+ writel(0xffffffff, &davinci_aintc_regs->ecr2);
+ writel(0xffffffff, &davinci_aintc_regs->ecr3);
+}
+#endif
+
+/*
+ * Enable PSC for various peripherals.
+ */
+int da8xx_configure_lpsc_items(const struct lpsc_resource *item,
+ const int n_items)
+{
+ int i;
+
+ for (i = 0; i < n_items; i++)
+ lpsc_on(item[i].lpsc_no);
+
+ return 0;
+}
--- /dev/null
+/*
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __COMMON_H
+#define __COMMON_H
+
+struct lpsc_resource {
+ const int lpsc_no;
+};
+
+void irq_init(void);
+int da8xx_configure_lpsc_items(const struct lpsc_resource *item,
+ int n_items);
+
+#endif /* __COMMON_H */
#include <asm/arch/emac_defs.h>
#include <asm/io.h>
#include "../common/misc.h"
+#include "common.h"
DECLARE_GLOBAL_DATA_PTR;
#endif
};
+static const struct lpsc_resource lpsc[] = {
+ { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
+ { DAVINCI_LPSC_SPI0 }, /* Serial Flash */
+ { DAVINCI_LPSC_EMAC }, /* image download */
+ { DAVINCI_LPSC_UART2 }, /* console */
+ { DAVINCI_LPSC_GPIO },
+};
+
int board_init(void)
{
#ifndef CONFIG_USE_IRQ
- /*
- * Mask all IRQs by clearing the global enable and setting
- * the enable clear for all the 90 interrupts.
- */
-
- writel(0, &davinci_aintc_regs->ger);
-
- writel(0, &davinci_aintc_regs->hier);
-
- writel(0xffffffff, &davinci_aintc_regs->ecr1);
- writel(0xffffffff, &davinci_aintc_regs->ecr2);
- writel(0xffffffff, &davinci_aintc_regs->ecr3);
+ irq_init();
#endif
#ifdef CONFIG_NAND_DAVINCI
* assuming here that the DSP bootloader has set the IOPU
* such that PSC access is available to ARM
*/
- lpsc_on(DAVINCI_LPSC_AEMIF); /* NAND, NOR */
- lpsc_on(DAVINCI_LPSC_SPI0); /* Serial Flash */
- lpsc_on(DAVINCI_LPSC_EMAC); /* image download */
- lpsc_on(DAVINCI_LPSC_UART2); /* console */
- lpsc_on(DAVINCI_LPSC_GPIO);
+ if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
+ return 1;
/* setup the SUSPSRC for ARM to control emulation suspend */
writel(readl(&davinci_syscfg_regs->suspsrc) &
--- /dev/null
+/*
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Based on da830evm.c. Original Copyrights follow:
+ *
+ * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include "../common/misc.h"
+#include "common.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define pinmux (&davinci_syscfg_regs->pinmux)
+
+/* SPI0 pin muxer settings */
+static const struct pinmux_config spi1_pins[] = {
+ { pinmux[5], 1, 1 },
+ { pinmux[5], 1, 2 },
+ { pinmux[5], 1, 4 },
+ { pinmux[5], 1, 5 }
+};
+
+/* UART pin muxer settings */
+static const struct pinmux_config uart_pins[] = {
+ { pinmux[0], 4, 6 },
+ { pinmux[0], 4, 7 },
+ { pinmux[4], 2, 4 },
+ { pinmux[4], 2, 5 }
+};
+
+/* I2C pin muxer settings */
+static const struct pinmux_config i2c_pins[] = {
+ { pinmux[4], 2, 2 },
+ { pinmux[4], 2, 3 }
+};
+
+static const struct pinmux_resource pinmuxes[] = {
+#ifdef CONFIG_SPI_FLASH
+ PINMUX_ITEM(spi1_pins),
+#endif
+ PINMUX_ITEM(uart_pins),
+ PINMUX_ITEM(i2c_pins),
+};
+
+static const struct lpsc_resource lpsc[] = {
+ { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
+ { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
+ { DAVINCI_LPSC_EMAC }, /* image download */
+ { DAVINCI_LPSC_UART2 }, /* console */
+ { DAVINCI_LPSC_GPIO },
+};
+
+int board_init(void)
+{
+#ifndef CONFIG_USE_IRQ
+ irq_init();
+#endif
+
+ /* arch number of the board */
+ gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
+
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+
+ /*
+ * Power on required peripherals
+ * ARM does not have access by default to PSC0 and PSC1
+ * assuming here that the DSP bootloader has set the IOPU
+ * such that PSC access is available to ARM
+ */
+ if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
+ return 1;
+
+ /* setup the SUSPSRC for ARM to control emulation suspend */
+ writel(readl(&davinci_syscfg_regs->suspsrc) &
+ ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
+ DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
+ DAVINCI_SYSCFG_SUSPSRC_UART2),
+ &davinci_syscfg_regs->suspsrc);
+
+ /* configure pinmux settings */
+ if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
+ return 1;
+
+ /* enable the console UART */
+ writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
+ DAVINCI_UART_PWREMU_MGMT_UTRST),
+ &davinci_uart2_ctrl_regs->pwremu_mgmt);
+
+ return 0;
+}
return (NULL);
}
-int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
uchar kbd_data[KEYBD_DATALEN];
char keybd_env[2 * KEYBD_DATALEN + 1];
packet->cks += buff[i];
}
-static int do_mtc_led(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_mtc_led(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
tx_msp_cmd pcmd;
rx_msp_cmd prx;
return err;
}
-static int do_mtc_key(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_mtc_key(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
tx_msp_cmd pcmd;
rx_msp_cmd prx;
return err;
}
-static int do_mtc_digout(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_mtc_digout(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
tx_msp_cmd pcmd;
rx_msp_cmd prx;
return err;
}
-static int do_mtc_digin(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_mtc_digin(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
tx_msp_cmd pcmd;
rx_msp_cmd prx;
return err;
}
-static int do_mtc_appreg(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_mtc_appreg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
tx_msp_cmd pcmd;
rx_msp_cmd prx;
return err;
}
-static int do_mtc_version(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_mtc_version(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
tx_msp_cmd pcmd;
rx_msp_cmd prx;
return err;
}
-static int do_mtc_state(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_mtc_state(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
tx_msp_cmd pcmd;
rx_msp_cmd prx;
return err;
}
-static int do_mtc_help(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+static int do_mtc_help(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
cmd_tbl_t cmd_mtc_sub[] = {
U_BOOT_CMD_MKENT(led, 3, 1, do_mtc_led,
"[command] - get help for command\n"),
};
-static int do_mtc_help(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_mtc_help(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
extern int _do_help(cmd_tbl_t *cmd_start, int cmd_items,
cmd_tbl_t *cmdtp, int flag,
- int argc, char *argv[]);
+ int argc, char * const argv[]);
#ifdef CONFIG_SYS_LONGHELP
puts("mtc ");
#endif
ARRAY_SIZE(cmd_mtc_sub), cmdtp, flag, argc, argv);
}
-int cmd_mtc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int cmd_mtc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
cmd_tbl_t *c;
int err = 0;
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
PLATFORM_LDFLAGS += --gc-sections
TEXT_BASE = 0x00000000
-LDSCRIPT = $(obj)board/earthlcd/favr-32-ezkit/u-boot.lds
+LDSCRIPT = $(src)board/earthlcd/favr-32-ezkit/u-boot.lds
* do_reset is done here because in this case it is board specific, since the
* 7xx CPUs can only be reset by external HW (the RTC in this case).
*/
-void do_reset (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+void do_reset (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char * const argv[])
{
#if defined(CONFIG_RTC_MK48T59)
/* trigger watchdog immediately */
* Register PI in the MPC 107 (at offset 0x41090 of the Embedded Utilities
* Memory Block).
*/
-int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
out8 (MPC107_EUMB_PI, 1);
return (0);
#undef FPGA_DEBUG
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
extern void lxt971_no_sleep(void);
extern ulong flash_get_size (ulong base, int banknum);
DECLARE_GLOBAL_DATA_PTR;
/*cmd_boot.c*/
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
extern void lxt971_no_sleep(void);
/* ------------------------------------------------------------------------- */
/*
* Some test routines
*/
-int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i;
int k;
short dummy;
};
-int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
short val;
int i;
}
-int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong *incin;
int i;
#define FPGA_DEBUG
#endif
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
extern void lxt971_no_sleep(void);
/* fpga configuration data - gzip compressed and generated by bin2c */
DECLARE_GLOBAL_DATA_PTR;
/*cmd_boot.c*/
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
/* ------------------------------------------------------------------------- */
return state;
}
-int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int query = argc == 1;
int state = 0;
return 0;
}
-int auto_update(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int auto_update(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
do_auto_update();
/*
* Command loadpci: wait for signal from host and boot image.
*/
-int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u32 *ptr = 0;
int count = 0;
return lcd_bmp(logo_bmp);
}
-int do_esdbmp(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_esdbmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr;
#ifdef CONFIG_VIDEO_SM501
* ppzArgv - array of ptrs to strings (command-line arguments).
* Returns: int - Legacy return value: 1 = success; 0 = error.
*****************************************************************************/
-int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int iErrorCode;
char* pzXsvfFileName;
#endif
#if defined(CONFIG_SYS_EEPROM_WREN)
-int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int query = argc == 1;
int state = 0;
DECLARE_GLOBAL_DATA_PTR;
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
extern void __ft_board_setup(void *blob, bd_t *bd);
#undef FPGA_DEBUG
return result;
}
-int do_onewire(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_onewire(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned short val;
int result;
/*
* Write backplane ip-address...
*/
-int do_get_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_get_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
bd_t *bd = gd->bd;
char *buf;
/*
* Set and print backplane ip...
*/
-int do_set_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_set_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *buf;
char str[32];
return pci_eth_init(bis);
}
-int do_writepci(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_writepci(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned int addr;
unsigned int size;
/*
* Command loadpci: wait for signal from host and boot image.
*/
-int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
volatile unsigned int *ptr;
int count = 0;
dcache_disable ();
}
-int do_show_config(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_show_config(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned int reset_sample_low;
unsigned int reset_sample_high;
"Show Marvell strapping register (ResetSampleLow ResetSampleHigh)"
);
-int do_pldver(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_pldver(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
printf("PLD version:0x%02x\n", in_8((void *)CONFIG_SYS_PLD_VER));
return (0);
}
-int do_show_ecc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_show_ecc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned int ecc_counter;
unsigned int ecc_addr;
/*cmd_boot.c*/
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
extern void lxt971_no_sleep(void);
/* ------------------------------------------------------------------------- */
int do_pci9054 (cmd_tbl_t * cmdtp, int flag, int argc,
- char *argv[])
+ char * const argv[])
{
if (strcmp (argv[1], "info") == 0) {
showPci9054 ();
/*cmd_boot.c*/
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
extern void lxt971_no_sleep(void);
return mv;
}
-int do_dcf77(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_dcf77(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int mv;
u32 pin, pinold;
return ret;
}
-int do_hubinit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_hubinit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
usbhub_init();
return 0;
return rcode;
}
-int do_setup_boot_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_setup_boot_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong sdsdp[4];
return state;
}
-int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int query = argc == 1;
int state = 0;
return rc;
}
-int do_waitpwrirq(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_waitpwrirq(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
got_pldirq = 0;
return ret;
}
-int do_dviinit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_dviinit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
dvi_init();
return 0;
* TODO: 'time' command might be useful for others as well.
* Move to 'common' directory.
*/
-int do_time(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_time(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned long long start, end;
char c, cmd[CONFIG_SYS_CBSIZE];
return Y;
}
-int do_gfxdemo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_gfxdemo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned int color;
unsigned int x, y, dx, dy;
#define FPGA_DEBUG
#endif
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
extern void lxt971_no_sleep(void);
/* fpga configuration data - gzip compressed and generated by bin2c */
return state;
}
-int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int query = argc == 1;
int state = 0;
/*
* Set device number on pci board
*/
-int do_setdevice(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_setdevice(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int idx = 1; /* start at 1 (skip device 0) */
pci_dev_t bdf = 0;
/*
* Get device number on pci board
*/
-int do_getdevice(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_getdevice(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u32 device;
char str[32];
/*
* Command loadpci: wait for signal from host and boot image.
*/
-int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned int *ptr = 0;
int count = 0;
DECLARE_GLOBAL_DATA_PTR;
/* Prototypes */
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
unsigned long fpga_done_state(void);
unsigned long fpga_init_state(void);
return wp_state;
}
-int do_wpeeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_wpeeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int wp = -1;
if (argc >= 2) {
}
}
-int do_poweroff(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_poweroff(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
power_set_reset(1);
return (0);
return (status);
}
-int do_phypower(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_phypower(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int status;
U_BOOT_CMD(phypower, 2, 2, do_phypower,
"Switch power of ethernet phy", "");
-int do_writepci(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_writepci(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned int addr;
unsigned int size;
DECLARE_GLOBAL_DATA_PTR;
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
extern void lxt971_no_sleep(void);
/* fpga configuration data - gzip compressed and generated by bin2c */
return state;
}
-int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int query = argc == 1;
int state = 0;
return state;
}
-int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int query = argc == 1;
int state = 0;
#include <environment.h>
extern env_t *env_ptr;
-int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u32 pram, nextbase, base;
char *v;
);
#endif /* CONFIG_PRAM */
-int do_selfreset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_selfreset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
struct ppc4xx_gpio *gpio0 = (struct ppc4xx_gpio *)GPIO_BASE;
setbits_be32(&gpio0->tcr, CONFIG_SYS_GPIO_SELFRST_N);
""
);
-int do_resetout(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_resetout(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
struct pmc405de_cpld *cpld =
(struct pmc405de_cpld *)CONFIG_SYS_CPLD_BASE;
return rc;
}
-int do_waithci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_waithci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
pmc440_fpga_t *fpga = (pmc440_fpga_t *)FPGA_BA;
}
}
-int do_fifo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_fifo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
pmc440_fpga_t *fpga = (pmc440_fpga_t *)FPGA_BA;
int i;
"'fifo' or 'address'"
);
-int do_setup_bootstrap_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_setup_bootstrap_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong sdsdp[5];
ulong delay;
#include <environment.h>
extern env_t *env_ptr;
-int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u32 pram, nextbase, base;
char *v;
);
#endif /* CONFIG_PRAM */
-int do_selfreset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_selfreset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
in_be32((void*)CONFIG_SYS_RESET_BASE);
return 0;
""
);
-int do_resetout(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_resetout(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
pmc440_fpga_t *fpga = (pmc440_fpga_t *)FPGA_BA;
""
);
-int do_inta(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_inta(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (is_monarch()) {
printf("This command is only supported in non-monarch mode\n");
);
/* test-only */
-int do_pmm(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_pmm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong pciaddr;
);
#if defined(CONFIG_SYS_EEPROM_WREN)
-int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int query = argc == 1;
int state = 0;
/* Prototypes */
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
/*
*/
-int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr;
/*
*/
-int do_codec(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_codec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
uchar buf[8];
/*
*/
-int do_saa(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_saa(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr;
ulong instr;
/*
*/
-int do_iwrite(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_iwrite(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr;
ulong data0;
/*
*/
-int do_iread(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_iread(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr;
ulong cnt;
/*
*/
-int do_ireadl(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ireadl(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr;
uchar buf[32];
caddy_interface->answer_in = ptr;
}
-int do_caddy(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_caddy(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned long base_addr;
uint32_t ptr;
#define FPGA_DEBUG
#endif
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
extern void lxt971_no_sleep(void);
/* fpga configuration data - gzip compressed and generated by bin2c */
return state;
}
-int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int query = argc == 1;
int state = 0;
#define FPGA_DEBUG
#endif
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
/* fpga configuration data - gzip compressed and generated by bin2c */
const unsigned char fpgadata[] =
/* GT64240A errata: cant read MPSC/BRG registers... so make mirrors in ram for read/modify write */
-#define MIRROR_HACK ((struct _tag_mirror_hack *)&(gd->mirror_hack))
+#define MIRROR_HACK ((struct _tag_mirror_hack *)&(gd->mirror_hack[0]))
#define GT_REG_WRITE_MIRROR_G(a,d) {MIRROR_HACK->a ## _M = d; GT_REG_WRITE(a,d);}
#define GTREGREAD_MIRROR_G(a) (MIRROR_HACK->a ## _M)
#if defined(CONFIG_ZUMA_V2) || defined(CONFIG_P3G4)
/* from tclk */
- clock = (CONFIG_SYS_BUS_HZ/(16*rate)) - 1;
+ clock = (CONFIG_SYS_BUS_CLK/(16*rate)) - 1;
#else
clock = (3686400/(16*rate)) - 1;
#endif
static int last_size = 64;
int
-do_zuma_init_pbb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_zuma_init_pbb (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
zuma_init_pbb ();
return 0;
}
int
-do_zuma_test_dma (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_zuma_test_dma (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc > 1) {
last_cmd = simple_strtoul (argv[1], NULL, 10);
}
int
-do_zuma_init_mbox (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_zuma_init_mbox (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
zuma_mbox_init ();
return 0;
}
-int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned int i;
char *p_altbank = NULL;
u8 aux;
u8 spd;
u8 brdcfg0;
- u8 dma;
+ u8 brdcfg1; /* On some boards, this register is called 'dma' */
u8 addr;
u8 res2[2];
u8 data;
*
*/
static int pixis_disable_watchdog_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
- char *argv[])
+ char * const argv[])
{
/* Disable the VELA sequencer and the watchdog */
clrbits_8(pixis_base + PIXIS_VCTL, 9);
/* Enable or disable SGMII mode for a TSEC
*/
-static int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int which_tsec = -1;
unsigned char mask;
return intval + decval;
}
-static int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned int i;
char *p_cf = NULL;
update_crc();
}
-int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char cmd;
/* Prototypes */
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
int checkboard (void) {
ulong val;
}
int mpc8610diu_init_show_bmp(cmd_tbl_t *cmdtp,
- int flag, int argc, char *argv[])
+ int flag, int argc, char * const argv[])
{
unsigned int addr;
return (void *)pGD;
}
-void video_set_lut (unsigned int index, /* color number */
- unsigned char r, /* red */
- unsigned char g, /* green */
- unsigned char b /* blue */
- )
-{
- return;
-}
-
#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */
#endif /* CONFIG_FSL_DIU_FB */
#define CONFIG_SYS_DDR_TIMING_0_667 0x55770802
#define CONFIG_SYS_DDR_TIMING_1_667 0x5f599543
#define CONFIG_SYS_DDR_TIMING_2_667 0x0fa074d1
-#define CONFIG_SYS_DDR_CLK_CTRL_667 0x02800000
+#define CONFIG_SYS_DDR_CLK_CTRL_667 0x03000000
#define CONFIG_SYS_DDR_MODE_1_667 0x00040852
#define CONFIG_SYS_DDR_MODE_2_667 0x00000000
#define CONFIG_SYS_DDR_INTERVAL_667 0x0a280100
#define BOARDREV_MASK 0x10100000
#define BOARDREV_B 0x10100000
#define BOARDREV_C 0x00100000
+#define BOARDREV_D 0x00000000
#define SYSCLK_66 66666666
#define SYSCLK_50 50000000
volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
u32 val_gpdat, sysclk_gpio, board_rev_gpio;
- val_gpdat = pgpio->gpdat;
+ val_gpdat = in_be32(&pgpio->gpdat);
sysclk_gpio = val_gpdat & SYSCLK_MASK;
board_rev_gpio = val_gpdat & BOARDREV_MASK;
if (board_rev_gpio == BOARDREV_C) {
return SYSCLK_66;
else
return SYSCLK_50;
+ } else if (board_rev_gpio == BOARDREV_D) {
+ if(sysclk_gpio == 0)
+ return SYSCLK_66;
+ else
+ return SYSCLK_100;
}
return 0;
}
char board_rev = 0;
struct cpu_type *cpu;
- val_gpdat = pgpio->gpdat;
+ val_gpdat = in_be32(&pgpio->gpdat);
board_rev_gpio = val_gpdat & BOARDREV_MASK;
if (board_rev_gpio == BOARDREV_C)
board_rev = 'C';
else if (board_rev_gpio == BOARDREV_B)
board_rev = 'B';
+ else if (board_rev_gpio == BOARDREV_D)
+ board_rev = 'D';
else
panic ("Unexpected Board REV %x detected!!\n", board_rev_gpio);
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
int num = 0;
char *tmp;
+ u32 pordevsr;
unsigned int vscfw_addr;
#ifdef CONFIG_TSEC1
#endif
#ifdef CONFIG_TSEC3
SET_STD_TSEC_INFO(tsec_info[num], 3);
- if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
+ pordevsr = in_be32(&gur->pordevsr);
+ if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
tsec_info[num].flags |= TSEC_SGMII;
num++;
#endif
#if defined(CONFIG_HAVE_OWN_RESET)
int
-do_reset (void *cmdtp, int flag, int argc, char *argv[])
+do_reset (void *cmdtp, int flag, int argc, char * const argv[])
{
volatile ioport_t *iop;
}
#if 0 /* test-only !!! */
-int do_dumpebc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_dumpebc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong ap, cr;
);
-int do_dumpdcr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_dumpdcr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i;
);
-int do_dumpspr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_dumpspr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
printf("\nSpecial Purpose Registers (SPR's) for PPC405GP:");
printf("\n%04x %08x ", 947, mfspr(947));
/* ------------------------------------------------------------------------- */
int
-do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
uchar *addr, *save_addr;
ulong size;
);
/* ------------------------------------------------------------------------- */
int
-do_eecl (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+do_eecl (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
uchar data[HYMOD_EEPROM_SIZE];
uint addr = CONFIG_SYS_I2C_EEPROM_ADDR;
/* ------------------------------------------------------------------------- */
int
-do_htest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_htest (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
#if 0
int rc;
}
static int do_inkadiag_io(cmd_tbl_t *cmdtp, int flag, int argc,
- char *argv[]) {
+ char * const argv[]) {
unsigned int state, val;
switch (argc) {
}
static int do_inkadiag_serial(cmd_tbl_t *cmdtp, int flag, int argc,
- char *argv[]) {
+ char * const argv[]) {
volatile struct NS16550 *uart;
volatile struct mpc5xxx_psc *psc;
unsigned int num, mode;
}
static int do_inkadiag_buzzer(cmd_tbl_t *cmdtp, int flag, int argc,
- char *argv[]) {
+ char * const argv[]) {
unsigned int period, freq;
int prev, i;
return 0;
}
-static int do_inkadiag_help(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+static int do_inkadiag_help(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
cmd_tbl_t cmd_inkadiag_sub[] = {
U_BOOT_CMD_MKENT(io, 1, 1, do_inkadiag_io, "read digital input",
};
static int do_inkadiag_help(cmd_tbl_t *cmdtp, int flag,
- int argc, char *argv[]) {
+ int argc, char * const argv[]) {
extern int _do_help (cmd_tbl_t *cmd_start, int cmd_items,
cmd_tbl_t *cmdtp, int flag,
- int argc, char *argv[]);
+ int argc, char * const argv[]);
/* do_help prints command name - we prepend inkadiag to our subcommands! */
#ifdef CONFIG_SYS_LONGHELP
puts ("inkadiag ");
}
static int do_inkadiag(cmd_tbl_t *cmdtp, int flag, int argc,
- char *argv[]) {
+ char * const argv[]) {
cmd_tbl_t *c;
c = find_cmd_tbl(argv[1], &cmd_inkadiag_sub[0], ARRAY_SIZE(cmd_inkadiag_sub));
}
#if defined(CONFIG_CMD_SF)
-int do_spi_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_spi_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u32 tmp;
if (argc < 2) {
#if defined(CONFIG_CMD_BSP)
/***********************************************************************
F* Function: int do_pic (cmd_tbl_t *cmdtp, int flag,
-F* int argc, char *argv[]) P*A*Z*
+F* int argc, char * const argv[]) P*A*Z*
*
P* Parameters: cmd_tbl_t *cmdtp
P* - Pointer to our command table entry
P* a repetition
P* int argc
P* - Argument count
-P* char *argv[]
+P* char * const argv[]
P* - Array of the actual arguments
P*
P* Returnvalue: int
C* Coding: wd@denx.de
V* Verification: dzu@denx.de
***********************************************************************/
-int do_pic (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_pic (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
uchar reg, val;
/***********************************************************************
F* Function: int do_kbd (cmd_tbl_t *cmdtp, int flag,
-F* int argc, char *argv[]) P*A*Z*
+F* int argc, char * const argv[]) P*A*Z*
*
P* Parameters: cmd_tbl_t *cmdtp
P* - Pointer to our command table entry
P* a repetition
P* int argc
P* - Argument count
-P* char *argv[]
+P* char * const argv[]
P* - Array of the actual arguments
P*
P* Returnvalue: int
C* Coding: wd@denx.de
V* Verification: dzu@denx.de
***********************************************************************/
-int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
uchar kbd_data[KEYBD_DATALEN];
char keybd_env[2 * KEYBD_DATALEN + 1];
/***********************************************************************
F* Function: int do_lsb (cmd_tbl_t *cmdtp, int flag,
-F* int argc, char *argv[]) P*A*Z*
+F* int argc, char * const argv[]) P*A*Z*
*
P* Parameters: cmd_tbl_t *cmdtp
P* - Pointer to our command table entry
P* a repetition
P* int argc
P* - Argument count
-P* char *argv[]
+P* char * const argv[]
P* - Array of the actual arguments
P*
P* Returnvalue: int
C* Coding: wd@denx.de
V* Verification: dzu@denx.de
***********************************************************************/
-int do_lsb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_lsb (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
uchar val;
immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
/***********************************************************************
F* Function: int do_kbd (cmd_tbl_t *cmdtp, int flag,
-F* int argc, char *argv[]) P*A*Z*
+F* int argc, char * const argv[]) P*A*Z*
*
P* Parameters: cmd_tbl_t *cmdtp
P* - Pointer to our command table entry
P* a repetition
P* int argc
P* - Argument count
-P* char *argv[]
+P* char * const argv[]
P* - Array of the actual arguments
P*
P* Returnvalue: int
C* Coding: wd@denx.de
V* Verification: dzu@denx.de
***********************************************************************/
-int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
uchar kbd_data[KEYBD_DATALEN];
char keybd_env[2 * KEYBD_DATALEN + 1];
gpio_write_bit(CONFIG_SYS_GPIO_WATCHDOG, val);
}
-int do_eeprom_wp(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_eeprom_wp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc < 2) {
cmd_usage(cmdtp);
return result;
}
-static int do_eeprom_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_eeprom_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unchar data = 0, index = 0;
ulong gpio_old_val;
return 0;
}
-static int do_eeprom_erase_all(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_eeprom_erase_all(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
eeprom_erase_all();
return 0;
}
-static int do_eeprom_save_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_eeprom_save_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong hi16, lo32;
unchar ethaddr[6], i;
/* Only 2 PCIe ports used on ICON, so the last one is 1 */
return 1;
}
+
+/*
+ * Video
+ */
+#ifdef CONFIG_VIDEO_SM501
+#include <sm501.h>
+
+#define DISPLAY_WIDTH 640
+#define DISPLAY_HEIGHT 480
+
+static const SMI_REGS sm502_init_regs[] = {
+ {0x00004, 0x0},
+ {0x00040, 0x00021847},
+ {0x00044, 0x091a0a01}, /* 24 MHz pixclk */
+ {0x00054, 0x0},
+ {0x00048, 0x00021847},
+ {0x0004C, 0x091a0a01},
+ {0x00054, 0x1},
+ {0x80004, 0xc428bb17},
+ {0x8000C, 0x00000000},
+ {0x80010, 0x0a000a00},
+ {0x80014, 0x02800000},
+ {0x80018, 0x01e00000},
+ {0x8001C, 0x00000000},
+ {0x80020, 0x01e00280},
+ {0x80024, 0x02fa027f},
+ {0x80028, 0x004a0280},
+ {0x8002C, 0x020c01df},
+ {0x80030, 0x000201e7},
+ {0x80200, 0x00010000},
+ {0x00008, 0x20000000}, /* gpio29 is pwm0, LED_PWM */
+ {0x0000C, 0x3f000000}, /* gpio56 - gpio61 as flat panel data pins */
+ {0x10020, 0x25725728}, /* 20 kHz pwm0, 50 % duty cycle, disabled */
+ {0x80000, 0x0f010106}, /* vsync & hsync pos, disp on */
+ {0, 0}
+};
+
+/*
+ * Return a pointer to the register initialization table.
+ */
+const SMI_REGS *board_get_regs(void)
+{
+ return sm502_init_regs;
+}
+
+int board_get_width(void)
+{
+ return DISPLAY_WIDTH;
+}
+
+int board_get_height(void)
+{
+ return DISPLAY_HEIGHT;
+}
+
+#ifdef CONFIG_CONSOLE_EXTRA_INFO
+/*
+ * Return text to be printed besides the logo.
+ */
+void video_get_info_str(int line_number, char *info)
+{
+ if (line_number == 1)
+ strcpy(info, " Board: ICON");
+ else
+ info[0] = '\0';
+}
+#endif
+
+#endif /* CONFIG_VIDEO_SM501 */
#endif /* #if !defined(CONFIG_PATI) */
-int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong size,src,ld_addr;
int result;
extern void print_mip405_info(void);
-extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
/* ------------------------------------------------------------------------- */
-int do_mip405(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mip405(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong led_on;
#include "pci_eeprom.h"
extern void show_pld_regs(void);
-extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
extern void user_led0(int led_on);
extern void user_led1(int led_on);
}
-int do_pati(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_pati(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (strcmp(argv[1], "info") == 0)
{
extern void print_pip405_info(void);
-extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
/* ------------------------------------------------------------------------- */
-int do_pip405(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_pip405(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong led_on,led_nr;
extern int vcma9_nandread(ulong);
extern int vcma9_nandwrite(ulong);
extern int vcma9_dactest(int);
-extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
/* ------------------------------------------------------------------------- */
-int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
struct eth_device *dev;
char cs8900_name[10];
return EXIT_SUCCESS;
}
-int main(int argc, char **argv)
+int main(int argc, char * const *argv)
{
if (argc == 2) {
return do_crc(argv[1], 0);
return cnt;
}
-int eeprom(int argc, char *argv[])
+int eeprom(int argc, char * const argv[])
{
int i, len, ret;
unsigned char buf[58], *p;
#include <asm/mach-types.h>
#include "pandora.h"
+#define TWL4030_BB_CFG_BBCHEN (1 << 4)
+#define TWL4030_BB_CFG_BBSEL_3200MV (3 << 2)
+#define TWL4030_BB_CFG_BBISEL_500UA 2
+
/*
* Routine: board_init
* Description: Early hardware init.
writel(GPIO28, &gpio5_base->setdataout);
writel(GPIO4, &gpio6_base->setdataout);
+ /* Enable battery backup capacitor (3.2V, 0.5mA charge current) */
+ twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
+ TWL4030_BB_CFG_BBCHEN | TWL4030_BB_CFG_BBSEL_3200MV |
+ TWL4030_BB_CFG_BBISEL_500UA, TWL4030_PM_RECEIVER_BB_CFG);
+
dieid_num_r();
return 0;
return cpc710_ram_init ();
}
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
out32 (REG (CPC0, SPOR), 0);
iobarrier_rw ();
}
#if defined(CONFIG_CMD_BSP)
-int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
switch (argc) {
case 1:
* "led" Commando for the U-Boot shell
*
************************************************************************/
-int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int rcode = 0, i;
ulong pattern = 0;
* "sha1" Commando for the U-Boot shell
*
************************************************************************/
-int do_sha1 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_sha1 (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int rcode = -1;
}
static int cmd_lcd_brightness(cmd_tbl_t *cmdtp, int flag,
- int argc, char *argv[])
+ int argc, char * const argv[])
{
if (argc < 2) {
cmd_usage(cmdtp);
/*
* Command led: controls the various LEDs 0..11 on the PN62 card.
*/
-int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned int number, function;
#define CMD_MOVE_WINDOW 0x1
#define CMD_BOOT_IMAGE 0x2
-int do_loadpci (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_loadpci (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *s;
ulong addr = 0, count = 0;
*
* Shell command to reset the board.
*/
-void do_reset( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] )
+void do_reset( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] )
{
printf( "Resetting...\n" );
DECLARE_GLOBAL_DATA_PTR;
/* Prototypes */
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
/* predefine these here for FPGA programming (before including fpga.c) */
#define SET_FPGA(data) *IXP425_GPIO_GPOUTR = (data)
return (0);
}
-int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr;
GPCR0 = led_bit;
}
-int do_idpcmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_idpcmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
printf("IDPCMD started\n");
return 0;
#endif /* CONFIG_PREBOOT */
/* Read Keyboard status */
-int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
uchar kbd_data[KEYBD_DATALEN];
uchar keybd_env[2 * KEYBD_DATALEN + 1];
data[0], data[1], data[2], data[3], data[4], data[5]);
}
-int do_set_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_set_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i;
unsigned char mac[6];
"setmac <mac address> - write MAC address for RTL8110SCL"
);
-int do_print_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_print_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc != 1) {
cmd_usage(cmdtp);
printf("PCI CN2 ID = %08x\n", readl(0xfe040220));
}
-int do_hw_test(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_hw_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *cmd;
}
#if defined(CONFIG_SH_32BIT)
-int do_pmb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_pmb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
/* clear ITLB */
writel(0x00000004, 0xff000010);
extern void eth_loopback_test(void);
#endif /* CONFIG_ETHER_LOOPBACK_TEST */
-extern int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
#include "clkinit.h"
#include "ioconfig.h" /* I/O configuration table */
}
-int do_i2c1_probe(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_i2c1_probe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int j;
#if defined(CONFIG_SYS_I2C_NOPROBES)
return;
}
-int karefSetupVars(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int karefSetupVars(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned short sernum;
char envstr[255];
return(1);
}
-int karefRecover(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int karefRecover(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned short sernum;
char envstr[255];
return;
}
-int metroboxSetupVars(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int metroboxSetupVars(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned short sernum;
char envstr[255];
return(1);
}
-int metroboxRecover(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int metroboxRecover(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned short sernum;
char envstr[255];
/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
-int do_fpga (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_fpga (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr = 0;
int i;
#define PUMA_READ_MODE 0
#define PUMA_LOAD_MODE 1
-int do_puma (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_puma (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong addr, len;
return -1;
}
-int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
void (*sram_setfreq) (unsigned int, unsigned int);
struct chip_data *chip = &chip_data;
+++ /dev/null
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <nios-io.h>
-#include <spi.h>
-
-#if defined(CONFIG_HW_WATCHDOG)
-extern void ssv_wd_pio_init(void); /* comes from ../common/wd_pio.c
- included by ./misc.c */
-#endif
-
-void _default_hdlr (void)
-{
- printf ("default_hdlr\n");
-}
-
-int board_early_init_f (void)
-{
-#if defined(CONFIG_HW_WATCHDOG)
- ssv_wd_pio_init();
-#endif
- return 0;
-}
-
-int checkboard (void)
-{
- puts ( "Board: SSV DilNetPC ADNP/ESC1"
-#if defined(CONFIG_DNPEVA2)
- " on DNP/EVA2"
-#endif
- "\n");
-#if defined(CONFIG_NIOS_BASE_32)
- puts ("Conf.: SSV Base 32 (nios_32)\n");
-#endif
-
- return 0;
-}
-
-phys_size_t initdram (int board_type)
-{
- return (0);
-}
-
-/*
- * The following are used to control the SPI chip selects for the SPI command.
- */
-#if defined(CONFIG_CMD_SPI) && CONFIG_NIOS_SPI
-
-#define SPI_RTC_CS_MASK 0x00000001
-
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- return bus == 0 && cs == 0;
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
- nios_spi_t *spi = (nios_spi_t *)CONFIG_SYS_NIOS_SPIBASE;
-
- spi->slaveselect = SPI_RTC_CS_MASK; /* activate (1) */
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- nios_spi_t *spi = (nios_spi_t *)CONFIG_SYS_NIOS_SPIBASE;
-
- spi->slaveselect = 0; /* deactivate (0) */
-}
-
-#endif
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_CS8900
- rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
-#endif
- return rc;
-}
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <nios.h>
-
-/*
- * include common flash code (for ssv boards)
- */
-#include "../common/flash.c"
-
-/*---------------------------------------------------------------------*/
-#define BANKSZ (8 * 1024 * 1024)
-#define SECTSZ (64 * 1024)
-#define UBOOTSECS ((CONFIG_SYS_MONITOR_LEN + CONFIG_ENV_SIZE) / SECTSZ)
-#define UBOOTAREA (UBOOTSECS * 64 * 1024) /* monitor / env area */
-
-/*---------------------------------------------------------------------*/
-unsigned long flash_init (void)
-{
- int i;
- unsigned long addr;
- flash_info_t *fli = &flash_info[0];
-
- fli->size = BANKSZ;
- fli->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- fli->flash_id = FLASH_MAN_AMD + FLASH_AMLV640U;
-
- addr = CONFIG_SYS_FLASH_BASE;
- for (i = 0; i < fli->sector_count; ++i) {
- fli->start[i] = addr;
- addr += SECTSZ;
-
- /* Protect monitor / environment area */
- if (addr <= (CONFIG_SYS_FLASH_BASE + UBOOTAREA))
- fli->protect[i] = 1;
- else
- fli->protect[i] = 0;
- }
-
- return (BANKSZ);
-}
+++ /dev/null
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * board/ssv/adnpesc1/misc.c
- *
- * miscellaneous board interfaces / drivers
- */
-
-#include <common.h>
-
-#if defined(CONFIG_STATUS_LED)
-#include "../common/cmd_sled.c"
-#endif
-
-#if defined(CONFIG_HW_WATCHDOG)
-#include "../common/wd_pio.c"
-#endif
-
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
-#include "../common/post.c"
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-OUTPUT_FORMAT("elf32-nios")
-OUTPUT_ARCH(nios)
-ENTRY(_start)
-
-SECTIONS
-{
- .text :
- {
- arch/nios/cpu/start.o (.text)
- *(.text)
- }
- __text_end = .;
-
- . = ALIGN(4);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
- __rodata_end = .;
-
- . = ALIGN(4);
- .data :
- {
- *(.data)
- }
- . = ALIGN(4);
- __data_end = .;
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- }
- . = ALIGN(4);
- __u_boot_cmd_end = .;
-
- __bss_start = .;
- . = ALIGN(4);
- .bss (NOLOAD) :
- {
- *(.bss)
- }
- . = ALIGN(4);
- __bss_end = .;
-}
+++ /dev/null
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-
-
-/*************************************************************************
- * Exception Vector Table
- *
- * This could have gone in the cpu soure tree, but the whole point of
- * Nios is customization -- and polluting the cpu source tree with
- * board-specific ifdef's really defeats the purpose, no? With this in
- * the board-specific tree, each board has the freedom to organize
- * vectors/traps, etc anyway it wants. The init code copies this table
- * to the proper location.
- *
- * Each board can do what it likes here. But there are four "standard"
- * handlers availble:
- *
- * _cwp_lolimit -Handles register window underflows.
- * _cwp_hilimit -Handles register window overflows.
- * _timebase_int -Increments the timebase.
- * _def_xhandler -Default exception handler.
- *
- * _timebase_int handles a Nios Timer interrupt and increments the
- * timestamp used for the get_timer(), reset_timer(), etc. routines. It
- * expects the timer to be configured like the standard-32 low priority
- * timer.
- *
- * _def_xhandler dispatches exceptions/traps via the external_interrupt()
- * routine. This lets you use the irq_install_handler() and handle your
- * interrupts/traps with code written in C.
- ************************************************************************/
-
- .data
- .global _vectors
- .align 4
-_vectors:
-
-#if defined(CONFIG_SYS_NIOS_CPU_OCI_BASE)
- /* OCI does the reset job */
- .long _def_xhandler@h /* Vector 0 - NMI / Reset */
-#else
- /* there is no OCI, so we have to do a direct reset jump here */
- .long CONFIG_SYS_NIOS_CPU_RST_VECT /* Vector 0 - Reset to GERMS */
-#endif
- .long _cwp_lolimit@h /* Vector 1 - underflow */
- .long _cwp_hilimit@h /* Vector 2 - overflow */
-
- .long _def_xhandler@h /* Vector 3 - GNUPro debug */
- .long _def_xhandler@h /* Vector 4 - GNUPro debug */
- .long _def_xhandler@h /* Vector 5 - GNUPro debug */
- .long _def_xhandler@h /* Vector 6 - future reserved */
- .long _def_xhandler@h /* Vector 7 - future reserved */
- .long _def_xhandler@h /* Vector 8 - future reserved */
- .long _def_xhandler@h /* Vector 9 - future reserved */
- .long _def_xhandler@h /* Vector 10 - future reserved */
- .long _def_xhandler@h /* Vector 11 - future reserved */
- .long _def_xhandler@h /* Vector 12 - future reserved */
- .long _def_xhandler@h /* Vector 13 - future reserved */
- .long _def_xhandler@h /* Vector 14 - future reserved */
- .long _def_xhandler@h /* Vector 15 - future reserved */
-#if (CONFIG_SYS_NIOS_TMRIRQ == 16)
- .long _timebase_int@h /* Vector 16 - lopri timer*/
-#else
- .long _def_xhandler@h /* Vector 16 */
-#endif
- .long _def_xhandler@h /* Vector 17 */
- .long _def_xhandler@h /* Vector 18 */
- .long _def_xhandler@h /* Vector 19 */
- .long _def_xhandler@h /* Vector 20 */
- .long _def_xhandler@h /* Vector 21 */
- .long _def_xhandler@h /* Vector 22 */
- .long _def_xhandler@h /* Vector 23 */
- .long _def_xhandler@h /* Vector 24 */
- .long _def_xhandler@h /* Vector 25 */
- .long _def_xhandler@h /* Vector 26 */
- .long _def_xhandler@h /* Vector 27 */
- .long _def_xhandler@h /* Vector 28 */
- .long _def_xhandler@h /* Vector 29 */
- .long _def_xhandler@h /* Vector 30 */
- .long _def_xhandler@h /* Vector 31 */
- .long _def_xhandler@h /* Vector 32 */
- .long _def_xhandler@h /* Vector 33 */
- .long _def_xhandler@h /* Vector 34 */
- .long _def_xhandler@h /* Vector 35 */
- .long _def_xhandler@h /* Vector 36 */
- .long _def_xhandler@h /* Vector 37 */
- .long _def_xhandler@h /* Vector 38 */
- .long _def_xhandler@h /* Vector 39 */
- .long _def_xhandler@h /* Vector 40 */
- .long _def_xhandler@h /* Vector 41 */
- .long _def_xhandler@h /* Vector 42 */
- .long _def_xhandler@h /* Vector 43 */
- .long _def_xhandler@h /* Vector 44 */
- .long _def_xhandler@h /* Vector 45 */
- .long _def_xhandler@h /* Vector 46 */
- .long _def_xhandler@h /* Vector 47 */
- .long _def_xhandler@h /* Vector 48 */
- .long _def_xhandler@h /* Vector 49 */
-#if (CONFIG_SYS_NIOS_TMRIRQ == 50)
- .long _timebase_int@h /* Vector 50 - lopri timer*/
-#else
- .long _def_xhandler@h /* Vector 50 */
-#endif
- .long _def_xhandler@h /* Vector 51 */
- .long _def_xhandler@h /* Vector 52 */
- .long _def_xhandler@h /* Vector 53 */
- .long _def_xhandler@h /* Vector 54 */
- .long _def_xhandler@h /* Vector 55 */
- .long _def_xhandler@h /* Vector 56 */
- .long _def_xhandler@h /* Vector 57 */
- .long _def_xhandler@h /* Vector 58 */
- .long _def_xhandler@h /* Vector 59 */
- .long _def_xhandler@h /* Vector 60 */
- .long _def_xhandler@h /* Vector 61 */
- .long _def_xhandler@h /* Vector 62 */
- .long _def_xhandler@h /* Vector 63 */
+++ /dev/null
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <status_led.h>
-
-#if defined(CONFIG_STATUS_LED)
-
-/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
- * !!!!! Q u i c k & D i r t y H a c k !!!!!
- * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
- * !!!!! !!!!!
- * !!!!! Next type definition was coming from original !!!!!
- * !!!!! status LED driver drivers/misc/status_led.c !!!!!
- * !!!!! and should be exported for using it here. !!!!!
- * !!!!! !!!!!
- * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
-
-typedef struct {
- led_id_t mask;
- int state;
- int period;
- int cnt;
-} led_dev_t;
-
-extern led_dev_t led_dev[];
-
-#if defined(CONFIG_CMD_BSP)
-int do_sled (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- int led_id = 0;
-
- if (argc > 1) {
-#ifdef STATUS_LED_BOOT
- if (!strcmp (argv[1], "boot")) {
- led_id = STATUS_LED_BOOT + 1;
- }
-#endif
-#ifdef STATUS_LED_RED
- if (!strcmp (argv[1], "red")) {
- led_id = STATUS_LED_RED + 1;
- }
-#endif
-#ifdef STATUS_LED_YELLOW
- if (!strcmp (argv[1], "yellow")) {
- led_id = STATUS_LED_YELLOW + 1;
- }
-#endif
-#ifdef STATUS_LED_GREEN
- if (!strcmp (argv[1], "green")) {
- led_id = STATUS_LED_GREEN + 1;
- }
-#endif
- }
-
- switch (argc) {
- case 1:
-#if (STATUS_LED_BITS > 3)
- for (; led_id < 4; led_id++)
-#elif (STATUS_LED_BITS > 2)
- for (; led_id < 3; led_id++)
-#elif (STATUS_LED_BITS > 1)
- for (; led_id < 2; led_id++)
-#elif (STATUS_LED_BITS > 0)
- for (; led_id < 1; led_id++)
-#else
-#error "*** STATUS_LED_BITS not correct defined ***"
-#endif
- {
- printf ("Status LED '%s' is %s\n",
- led_id == STATUS_LED_BOOT ? "boot"
- : led_id == STATUS_LED_RED ? "red"
- : led_id == STATUS_LED_YELLOW ? "yellow"
- : led_id ==
- STATUS_LED_GREEN ? "green" : "unknown",
- led_dev[led_id].state ==
- STATUS_LED_ON ? "on" : led_dev[led_id].
- state ==
- STATUS_LED_OFF ? "off" : led_dev[led_id].
- state ==
- STATUS_LED_BLINKING ? "blinking" : "unknown");
- }
- return 0;
- case 2:
- if (led_id) {
- printf ("Status LED '%s' is %s\n", argv[1],
- led_dev[led_id - 1].state ==
- STATUS_LED_ON ? "on" : led_dev[led_id -
- 1].state ==
- STATUS_LED_OFF ? "off" : led_dev[led_id -
- 1].state ==
- STATUS_LED_BLINKING ? "blinking" : "unknown");
- return 0;
- } else
- break;
- case 3:
- if (led_id) {
- if (!strcmp (argv[2], "on")) {
- status_led_set (led_id - 1, STATUS_LED_ON);
- return 0;
- } else if (!strcmp (argv[2], "off")) {
- status_led_set (led_id - 1, STATUS_LED_OFF);
- return 0;
- } else if (!strcmp (argv[2], "blink")) {
- status_led_set (led_id - 1,
- STATUS_LED_BLINKING);
- return 0;
- } else
- break;
- } else
- break;
- default:
- break;
- }
- cmd_usage(cmdtp);
- return 1;
-}
-
-#ifdef STATUS_LED_BOOT
-#ifdef STATUS_LED_RED
-#ifdef STATUS_LED_YELLOW
-#ifdef STATUS_LED_GREEN
-#define __NAME_STR " - name: boot|red|yellow|green\n"
-#else
-#define __NAME_STR " - name: boot|red|yellow\n"
-#endif
-#else
-#define __NAME_STR " - name: boot|red\n"
-#endif
-#else
-#define __NAME_STR " - name: boot\n"
-#endif
-#else
-#define __NAME_STR " - name: (no such defined)\n"
-#endif
-
-U_BOOT_CMD (sled, 3, 0, do_sled,
- "check and set status led",
- "sled [name [state]]\n" __NAME_STR " - state: on|off|blink");
-#endif
-#endif /* CONFIG_STATUS_LED */
+++ /dev/null
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <watchdog.h>
-#include <nios.h>
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-/*--------------------------------------------------------------------*/
-void flash_print_info (flash_info_t * info)
-{
- int i, k;
- unsigned long size;
- int erased;
- volatile unsigned char *flash;
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
-
- /* Check if whole sector is erased */
- if (i != (info->sector_count - 1))
- size = info->start[i + 1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned char *) info->start[i];
- for (k = 0; k < size; k++) {
- if (*flash++ != 0xff) {
- erased = 0;
- break;
- }
- }
-
- /* Print the info */
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s%s", info->start[i], erased ? " E" : " ",
- info->protect[i] ? "RO " : " ");
- }
- printf ("\n");
-}
-
-/*-------------------------------------------------------------------*/
-
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
- volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2;
- int prot, sect, wait;
- unsigned oldpri;
- ulong start;
-
- /* Some sanity checking */
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
-#ifdef DEBUG
- for (sect = s_first; sect <= s_last; sect++) {
- printf("- Erase: Sect: %i @ 0x%08x\n", sect, info->start[sect]);
- }
-#endif
-
- /* NOTE: disabling interrupts on Nios can be very bad since it
- * also disables the LO_LIMIT exception. It's better here to
- * set the interrupt priority to 3 & restore it when we're done.
- */
- oldpri = ipri (3);
-
- /* It's ok to erase multiple sectors provided we don't delay more
- * than 50 usec between cmds ... at which point the erase time-out
- * occurs. So don't go and put printf() calls in the loop ... it
- * won't be very helpful ;-)
- */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
- *addr = 0xf0;
- *(addr+0xAAA/2) = 0xaa;
- *(addr+0x554/2) = 0x55;
- *(addr+0xAAA/2) = 0x80;
- *(addr+0xAAA/2) = 0xaa;
- *(addr+0x554/2) = 0x55;
- *addr2 = 0x30;
- /* Now just wait for 0xffff & provide some user
- * feedback while we wait. Here we have to grant
- * timer interrupts. Otherwise get_timer() can't
- * work right. */
- ipri(oldpri);
- start = get_timer (0);
- while (*addr2 != 0xffff) {
- for (wait = 8; wait; wait--) {
- udelay (125 * 1000);
- }
- putc ('.');
- if (get_timer (start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf ("timeout\n");
- return 1;
- }
- }
- oldpri = ipri (3); /* disallow non important irqs again */
- }
- }
-
- printf ("\n");
- *addr = 0xf0;
-
- /* Restore interrupt priority */
- ipri (oldpri);
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * srcbuffer, ulong addr, ulong cnt)
-{
-
- volatile CONFIG_SYS_FLASH_WORD_SIZE *cmd = (vu_short *) info->start[0];
- volatile CONFIG_SYS_FLASH_WORD_SIZE *dst = (vu_short *) addr;
- CONFIG_SYS_FLASH_WORD_SIZE *src = (void *) srcbuffer;
- CONFIG_SYS_FLASH_WORD_SIZE b;
- unsigned oldpri;
- ulong start;
-
- cnt /= sizeof(CONFIG_SYS_FLASH_WORD_SIZE);
- while (cnt) {
- /* Check for sufficient erase */
- b = *src;
- if ((*dst & b) != b) {
- printf ("%02x : %02x\n", *dst, b);
- return (2);
- }
-
- /* Disable interrupts other than window underflow
- * (interrupt priority 2)
- */
- oldpri = ipri (3);
- *(cmd+0xAAA/2) = 0xaa;
- *(cmd+0x554/2) = 0x55;
- *(cmd+0xAAA/2) = 0xa0;
- ipri (oldpri);
- *dst = b;
-
- /* Verify write */
- start = get_timer (0);
- while (*dst != b) {
- if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- *cmd = 0xf0;
- return 1;
- }
- }
- dst++;
- src++;
- cnt--;
- }
-
- *cmd = 0xf0;
- return (0);
-}
+++ /dev/null
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
-
-#if !defined(CONFIG_SYS_NIOS_POST_WORD_ADDR)
-#error "*** CONFIG_SYS_NIOS_POST_WORD_ADDR not defined ***"
-#endif
-
-void post_word_store (ulong a)
-{
- volatile void *save_addr = (void *)(CONFIG_SYS_NIOS_POST_WORD_ADDR);
- *(volatile ulong *) save_addr = a;
-}
-
-ulong post_word_load (void)
-{
- volatile void *save_addr = (void *)(CONFIG_SYS_NIOS_POST_WORD_ADDR);
- return *(volatile ulong *) save_addr;
-}
-
-#endif /* CONFIG_POST || CONFIG_LOGBUFFER*/
+++ /dev/null
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <nios.h>
-#include <nios-io.h>
-
-#if defined(CONFIG_HW_WATCHDOG)
-
-#if !defined(CONFIG_HW_WDENA_BASE)
-#error "*** CONFIG_HW_WDENA_BASE not defined ***"
-#if !defined(CONFIG_HW_WDENA_BIT)
-#error "*** CONFIG_HW_WDENA_BIT not defined ***"
-#endif
-#endif
-
-#if !defined(CONFIG_HW_WDTOG_BASE)
-#error "*** CONFIG_HW_WDTOG_BASE not defined ***"
-#if !defined(CONFIG_HW_WDTOG_BIT)
-#error "*** CONFIG_HW_WDTOG_BIT not defined ***"
-#endif
-#endif
-
-#ifdef CONFIG_HW_WDPORT_WRONLY /* emulate read access */
-static unsigned __wd_ena_pio_portval = 0;
-#endif
-
-#define WD_PIO_INIT_DONE(V) ((V) & (1 << CONFIG_HW_WDENA_BIT))
-
-void ssv_wd_pio_init(void)
-{
- nios_pio_t *ena_piop = (nios_pio_t*)CONFIG_HW_WDENA_BASE;
- nios_pio_t *trg_piop = (nios_pio_t*)CONFIG_HW_WDTOG_BASE;
-
- trg_piop->data &= ~(1 << CONFIG_HW_WDTOG_BIT);
-
-#ifdef CONFIG_HW_WDPORT_WRONLY /* emulate read access */
-
- __wd_ena_pio_portval |= (1 << CONFIG_HW_WDENA_BIT);
- ena_piop->data = __wd_ena_pio_portval;
-
-#else /* !CONFIG_HW_WDPORT_WRONLY */
-
- trg_piop->direction |= (1 << CONFIG_HW_WDTOG_BIT);
-
- ena_piop->data |= (1 << CONFIG_HW_WDENA_BIT);
- ena_piop->direction |= (1 << CONFIG_HW_WDENA_BIT);
-
-#endif /* CONFIG_HW_WDPORT_WRONLY */
-}
-
-void ssv_wd_pio_done(void)
-{
- nios_pio_t *piop = (nios_pio_t*)CONFIG_HW_WDENA_BASE;
-
-#ifdef CONFIG_HW_WDPORT_WRONLY /* emulate read access */
-
- __wd_ena_pio_portval &= ~(1 << CONFIG_HW_WDENA_BIT);
- piop->data = __wd_ena_pio_portval;
-
-#else /* !CONFIG_HW_WDPORT_WRONLY */
-
- piop->data &= ~(1 << CONFIG_HW_WDENA_BIT);
-
-#endif /* CONFIG_HW_WDPORT_WRONLY */
-}
-
-void ssv_wd_pio_reset(void)
-{
- nios_pio_t *trg_piop = (nios_pio_t*)CONFIG_HW_WDTOG_BASE;
-
-#ifdef CONFIG_HW_WDPORT_WRONLY
- if (WD_PIO_INIT_DONE(__wd_ena_pio_portval))
-#else
- nios_pio_t *ena_piop = (nios_pio_t*)CONFIG_HW_WDENA_BASE;
-
- if (WD_PIO_INIT_DONE(ena_piop->data))
-#endif
- {
- trg_piop->data |= (1 << CONFIG_HW_WDTOG_BIT);
- trg_piop->data &= ~(1 << CONFIG_HW_WDTOG_BIT);
- }
-}
-
-void hw_watchdog_reset(void)
-{
- int re_enable = disable_interrupts ();
-
- ssv_wd_pio_reset();
- if (re_enable)
- enable_interrupts ();
-}
-
-#if defined(CONFIG_CMD_BSP)
-int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- nios_pio_t *ena_piop = (nios_pio_t*)CONFIG_HW_WDENA_BASE;
-
- switch (argc)
- {
- case 1:
- printf ("Watchdog timer status is %s\n",
-#ifdef CONFIG_HW_WDPORT_WRONLY
- WD_PIO_INIT_DONE(__wd_ena_pio_portval)
-#else
- WD_PIO_INIT_DONE(ena_piop->data)
-#endif
- ? "on" : "off");
- return 0;
- case 2:
- if (!strcmp(argv[1],"on"))
- {
- ssv_wd_pio_init();
- printf("Watchdog timer now is on\n");
- return 0;
- }
- else if (!strcmp(argv[1],"off"))
- {
- ssv_wd_pio_done();
- printf("Watchdog timer now is off\n");
- return 0;
- }
- break;
- default:
- break;
- }
- cmd_usage(cmdtp);
- return 1;
-}
-
-U_BOOT_CMD(
- wd, 2, 1, do_wd,
- "check and set watchdog",
- "on - switch watchDog on\n"
- "wd off - switch watchdog off\n"
- "wd - print current status"
-);
-#endif
-#endif /* CONFIG_HW_WATCHDOG */
#
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# (C) Copyright 2010
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
LIB = $(obj)lib$(BOARD).a
-COBJS := $(BOARD).o flash.o misc.o
-SOBJS = vectors.o
+COBJS-y := $(BOARD).o
+COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
+SOBJS := init.o
+COBJS := $(COBJS-y)
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+$(LIB): $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
--- /dev/null
+/*
+ * (C) Copyright 2010
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <asm/ppc4xx_config.h>
+
+struct ppc4xx_config ppc4xx_config_val[] = {
+ {
+ "600", "CPU: 600 PLB: 200 OPB: 100 EBC: 100",
+ {
+ 0x86, 0x80, 0xce, 0x1f, 0x79, 0x80, 0x00, 0xa0,
+ 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ }
+ },
+ {
+ "800", "CPU: 800 PLB: 200 OPB: 100 EBC: 100",
+ {
+ 0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0,
+ 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ }
+ },
+ {
+ "1000", "CPU:1000 PLB: 200 OPB: 100 EBC: 100",
+ {
+ 0x86, 0x82, 0x96, 0x19, 0xb9, 0x80, 0x00, 0xa0,
+ 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ }
+ },
+ {
+ "1066", "CPU:1066 PLB: 266 OPB: 88 EBC: 88",
+ {
+ 0x86, 0x80, 0xb3, 0x01, 0x9d, 0x80, 0x00, 0xa0,
+ 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ }
+ },
+};
+
+int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);
#
-# (C) Copyright 2004
-# Li-Pro.Net <www.li-pro.net>
-# Stephan Linz <linz@li-pro.net>
+# (C) Copyright 2010
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
+#
+
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+ifndef TEXT_BASE
+TEXT_BASE = 0xFFFA0000
+endif
-TEXT_BASE = 0x02fc0000 # ATTENTION: notice your CONFIG_SYS_MONITOR_LEN setting
+PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG
endif
+
+ifeq ($(dbcr),1)
+PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
+endif
--- /dev/null
+/*
+ * (C) Copyright 2010
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <ppc_asm.tmpl>
+#include <config.h>
+#include <asm/mmu.h>
+
+/*
+ * TLB TABLE
+ *
+ * This table is used by the cpu boot code to setup the initial tlb
+ * entries. Rather than make broad assumptions in the cpu source tree,
+ * this table lets each board set things up however they like.
+ *
+ * Pointer to the table is returned in r1
+ *
+ */
+ .section .bootpg,"ax"
+ .globl tlbtab
+
+tlbtab:
+ tlbtab_start
+
+ /*
+ * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to
+ * use the speed up boot process. It is patched after relocation to
+ * enable SA_I
+ */
+ tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_16M,
+ CONFIG_SYS_BOOT_BASE_ADDR, 4, AC_RWX | SA_G)
+
+ /*
+ * TLB entries for SDRAM are not needed on this platform.
+ * They are dynamically generated in the DDR(2) detection
+ * routine.
+ */
+
+#ifdef CONFIG_SYS_INIT_RAM_DCACHE
+ /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
+ tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR, 0,
+ AC_RWX | SA_G)
+#endif
+
+ tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 0xc,
+ AC_RW | SA_IG)
+ tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x20000000, 0xc,
+ AC_RW | SA_IG)
+ tlbentry(CONFIG_SYS_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xd,
+ AC_RW | SA_IG)
+
+ tlbentry(CONFIG_SYS_PCIE0_CFGBASE, SZ_16M, 0x00000000, 0xd,
+ AC_RW | SA_IG)
+ tlbentry(CONFIG_SYS_PCIE1_CFGBASE, SZ_16M, 0x20000000, 0xd,
+ AC_RW | SA_IG)
+ tlbentry(CONFIG_SYS_PCIE0_XCFGBASE, SZ_1K, 0x10000000, 0xd,
+ AC_RW | SA_IG)
+ tlbentry(CONFIG_SYS_PCIE1_XCFGBASE, SZ_1K, 0x30000000, 0xd,
+ AC_RW | SA_IG)
+
+ /* PCIe UTL register */
+ tlbentry(CONFIG_SYS_PCIE_BASE, SZ_16K, 0x08010000, 0xc, AC_RW | SA_IG)
+
+ /* TLB-entry for FPGA(s) */
+ tlbentry(CONFIG_SYS_FPGA1_BASE, SZ_1M, CONFIG_SYS_FPGA1_BASE, 4,
+ AC_RW | SA_IG)
+ tlbentry(CONFIG_SYS_FPGA2_BASE, SZ_1M, CONFIG_SYS_FPGA2_BASE, 4,
+ AC_RW | SA_IG)
+ tlbentry(CONFIG_SYS_FPGA3_BASE, SZ_1M, CONFIG_SYS_FPGA3_BASE, 4,
+ AC_RW | SA_IG)
+
+ /* TLB-entry for OCM */
+ tlbentry(CONFIG_SYS_OCM_BASE, SZ_1M, 0x00000000, 4,
+ AC_RWX | SA_I)
+
+ /* TLB-entry for Local Configuration registers => peripherals */
+ tlbentry(CONFIG_SYS_LOCAL_CONF_REGS, SZ_16M,
+ CONFIG_SYS_LOCAL_CONF_REGS, 4, AC_RWX | SA_IG)
+
+ tlbtab_end
--- /dev/null
+/*
+ * (C) Copyright 2010
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc440.h>
+#include <libfdt.h>
+#include <fdt_support.h>
+#include <i2c.h>
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <asm/mmu.h>
+#include <asm/4xx_pcie.h>
+#include <asm/gpio.h>
+
+int board_early_init_f(void)
+{
+ /*
+ * Setup the interrupt controller polarities, triggers, etc.
+ */
+ mtdcr(UIC0SR, 0xffffffff); /* clear all */
+ mtdcr(UIC0ER, 0x00000000); /* disable all */
+ mtdcr(UIC0CR, 0x00000005); /* ATI & UIC1 crit are critical */
+ mtdcr(UIC0PR, 0xffffffff); /* per ref-board manual */
+ mtdcr(UIC0TR, 0x00000000); /* per ref-board manual */
+ mtdcr(UIC0VR, 0x00000000); /* int31 highest, base=0x000 */
+ mtdcr(UIC0SR, 0xffffffff); /* clear all */
+
+ mtdcr(UIC1SR, 0xffffffff); /* clear all */
+ mtdcr(UIC1ER, 0x00000000); /* disable all */
+ mtdcr(UIC1CR, 0x00000000); /* all non-critical */
+ mtdcr(UIC1PR, 0xffffffff); /* per ref-board manual */
+ mtdcr(UIC1TR, 0x00000000); /* per ref-board manual */
+ mtdcr(UIC1VR, 0x00000000); /* int31 highest, base=0x000 */
+ mtdcr(UIC1SR, 0xffffffff); /* clear all */
+
+ mtdcr(UIC2SR, 0xffffffff); /* clear all */
+ mtdcr(UIC2ER, 0x00000000); /* disable all */
+ mtdcr(UIC2CR, 0x00000000); /* all non-critical */
+ mtdcr(UIC2PR, 0xffffffff); /* per ref-board manual */
+ mtdcr(UIC2TR, 0x00000000); /* per ref-board manual */
+ mtdcr(UIC2VR, 0x00000000); /* int31 highest, base=0x000 */
+ mtdcr(UIC2SR, 0xffffffff); /* clear all */
+
+ mtdcr(UIC3SR, 0xffffffff); /* clear all */
+ mtdcr(UIC3ER, 0x00000000); /* disable all */
+ mtdcr(UIC3CR, 0x00000000); /* all non-critical */
+ mtdcr(UIC3PR, 0xffffffff); /* per ref-board manual */
+ mtdcr(UIC3TR, 0x00000000); /* per ref-board manual */
+ mtdcr(UIC3VR, 0x00000000); /* int31 highest, base=0x000 */
+ mtdcr(UIC3SR, 0xffffffff); /* clear all */
+
+ /*
+ * Configure PFC (Pin Function Control) registers
+ * enable GPIO 49-63
+ * UART0: 4 pins
+ */
+ mtsdr(SDR0_PFC0, 0x00007fff);
+ mtsdr(SDR0_PFC1, 0x00040000);
+
+ /* Enable PCI host functionality in SDR0_PCI0 */
+ mtsdr(SDR0_PCI0, 0xe0000000);
+
+ mtsdr(SDR0_SRST1, 0); /* Pull AHB out of reset default=1 */
+
+ /* Setup PLB4-AHB bridge based on the system address map */
+ mtdcr(AHB_TOP, 0x8000004B);
+ mtdcr(AHB_BOT, 0x8000004B);
+
+ return 0;
+}
+
+int checkboard(void)
+{
+ char *s = getenv("serial#");
+
+ printf("Board: T3CORP");
+
+ if (s != NULL) {
+ puts(", serial# ");
+ puts(s);
+ }
+ putc('\n');
+
+ return 0;
+}
+
+int board_early_init_r(void)
+{
+ /*
+ * T3CORP has 64MBytes of NOR flash (Spansion 29GL512), but the
+ * boot EBC mapping only supports a maximum of 16MBytes
+ * (4.ff00.0000 - 4.ffff.ffff).
+ * To solve this problem, the flash has to get remapped to another
+ * EBC address which accepts bigger regions:
+ *
+ * 0xfn00.0000 -> 4.cn00.0000
+ */
+
+ /* Remap the NOR flash to 0xcn00.0000 ... 0xcfff.ffff */
+ mtebc(PB0CR, CONFIG_SYS_FLASH_BASE_PHYS_L | EBC_BXCR_BS_64MB |
+ EBC_BXCR_BU_RW | EBC_BXCR_BW_16BIT);
+
+ /* Remove TLB entry of boot EBC mapping */
+ remove_tlb(CONFIG_SYS_BOOT_BASE_ADDR, 16 << 20);
+
+ /* Add TLB entry for 0xfn00.0000 -> 0x4.cn00.0000 */
+ program_tlb(CONFIG_SYS_FLASH_BASE_PHYS, CONFIG_SYS_FLASH_BASE,
+ CONFIG_SYS_FLASH_SIZE, TLB_WORD2_I_ENABLE);
+
+ /*
+ * Now accessing of the whole 64Mbytes of NOR flash at virtual address
+ * 0xfc00.0000 is possible
+ */
+
+ /*
+ * Clear potential errors resulting from auto-calibration.
+ * If not done, then we could get an interrupt later on when
+ * exceptions are enabled.
+ */
+ set_mcsr(get_mcsr());
+
+ return 0;
+}
+
+int misc_init_r(void)
+{
+ u32 sdr0_srst1 = 0;
+ u32 eth_cfg;
+
+ /*
+ * Set EMAC mode/configuration (GMII, SGMII, RGMII...).
+ * This is board specific, so let's do it here.
+ */
+ mfsdr(SDR0_ETH_CFG, eth_cfg);
+ /* disable SGMII mode */
+ eth_cfg &= ~(SDR0_ETH_CFG_SGMII2_ENABLE |
+ SDR0_ETH_CFG_SGMII1_ENABLE |
+ SDR0_ETH_CFG_SGMII0_ENABLE);
+ /* Set the for 2 RGMII mode */
+ /* GMC0 EMAC4_0, GMC0 EMAC4_1, RGMII Bridge 0 */
+ eth_cfg &= ~SDR0_ETH_CFG_GMC0_BRIDGE_SEL;
+ eth_cfg &= ~SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
+ mtsdr(SDR0_ETH_CFG, eth_cfg);
+
+ /*
+ * The AHB Bridge core is held in reset after power-on or reset
+ * so enable it now
+ */
+ mfsdr(SDR0_SRST1, sdr0_srst1);
+ sdr0_srst1 &= ~SDR0_SRST1_AHB;
+ mtsdr(SDR0_SRST1, sdr0_srst1);
+
+ return 0;
+}
+
+int board_pcie_last(void)
+{
+ /*
+ * Only PCIe0 for now, PCIe1 hangs on this board
+ */
+ return 0;
+}
+
+/*
+ * Board specific WRDTR and CLKTR values used by the auto-
+ * calibration code (4xx_ibm_ddr2_autocalib.c).
+ */
+static struct sdram_timing board_scan_options[] = {
+ {1, 2},
+ {-1, -1}
+};
+
+struct sdram_timing *ddr_scan_option(struct sdram_timing *default_val)
+{
+ return board_scan_options;
+}
#include <asm/blackfin.h>
#include "gpio_cfi_flash.h"
-int do_pf(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_pf(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong faddr = CONFIG_SYS_FLASH_BASE;
ushort data;
#include <asm/mach-types.h>
#include "evm.h"
+static u8 omap3_evm_version;
+
+u8 get_omap3_evm_rev(void)
+{
+ return omap3_evm_version;
+}
+
+static void omap3_evm_get_revision(void)
+{
+ unsigned int smsc_id;
+
+ /* Ethernet PHY ID is stored at ID_REV register */
+ smsc_id = readl(CONFIG_SMC911X_BASE + 0x50) & 0xFFFF0000;
+ printf("Read back SMSC id 0x%x\n", smsc_id);
+
+ switch (smsc_id) {
+ /* SMSC9115 chipset */
+ case 0x01150000:
+ omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
+ break;
+ /* SMSC 9220 chipset */
+ case 0x92200000:
+ default:
+ omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
+ }
+}
+
+/*
+ * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
+ */
+u8 omap3_evm_need_extvbus(void)
+{
+ u8 retval = 0;
+
+ if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
+ retval = 1;
+
+ return retval;
+}
+
/*
* Routine: board_init
* Description: Early hardware init.
writel(GPIO0, &gpio3_base->cleardataout);
udelay(1);
writel(GPIO0, &gpio3_base->setdataout);
+
+ /* determine omap3evm revision */
+ omap3_evm_get_revision();
}
int board_eth_init(bd_t *bis)
#endif
};
+/*
+ * OMAP35x EVM revision
+ * Run time detection of EVM revision is done by reading Ethernet
+ * PHY ID -
+ * GEN_1 = 0x01150000
+ * GEN_2 = 0x92200000
+ */
+enum {
+ OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
+ OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
+};
+
+u8 get_omap3_evm_rev(void);
+
static void setup_net_chip(void);
/*
return 0;
}
-static int cmd_sound(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int cmd_sound(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned long reg, val, duration;
char *tmp;
return 1;
}
-static int cmd_wav(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int cmd_wav(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned long length, addr;
unsigned char volume;
return rcode;
}
-static int cmd_beep(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int cmd_beep(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned char volume;
unsigned int channel;
* return 1 if led number unknown
* return 0 else
*/
-int do_led(char *argv[])
+int do_led(char * const argv[])
{
struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT;
* return 1 on CAN failure
* return 0 if no failure
*/
-int do_can(char *argv[])
+int do_can(char * const argv[])
{
int i;
struct mpc5xxx_mscan *can1 =
* return 3 on rts/cts failure
* return 0 if no failure
*/
-int do_rs232(char *argv[])
+int do_rs232(char * const argv[])
{
int error_status = 0;
struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
}
#endif /* !CONFIG_FO300 & !CONFIG_TQM5200S */
-int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int rcode;
gpt->gpt4.emsr |= 0x00000024;
}
-int cmd_led(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int cmd_led(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT;
~((1 << 26) | (1 << 27));
}
-int cmd_backlight(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int cmd_backlight(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (strcmp (argv[1], "on") == 0) {
debug ("switch backlight on\n");
}
#endif
-int do_hwib_dump (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_hwib_dump (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
dump_hwib ();
return 0;
extern void tsc2000_spi_init(void);
/* function declarations */
-int do_dip (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-int do_vcc5v (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-int do_burn_in (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-int do_contact_temp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-int do_burn_in_status (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_dip (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_vcc5v (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_burn_in (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_contact_temp (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_burn_in_status (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
int i2c_write_multiple (uchar chip, uint addr, int alen,
uchar *buffer, int len);
int i2c_read_multiple (uchar chip, uint addr, int alen,
uchar *buffer, int len);
-int do_temp_log (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_temp_log (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
/* helper functions */
static void adc_init (void);
test_function_t test_function[BIF_MAX];
-int do_burn_in (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_burn_in (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i;
int cycle_status;
);
-int do_dip (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_dip (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i, dip;
);
-int do_vcc5v (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_vcc5v (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int vcc5v;
);
-int do_contact_temp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_contact_temp (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int contact_temp;
);
-int do_burn_in_status (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_burn_in_status (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc > 1) {
cmd_usage(cmdtp);
return (0);
}
-int do_temp_log (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_temp_log (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int contact_temp;
int delay = 0;
#endif /* CONFIG_PREBOOT */
/* Read Keyboard status */
-int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong kbd_data = KBD_DATA;
char keybd_env[KEYBD_KEY_NUM + 1];
int do_pressure (void);
int do_v_bat (void);
int do_vfd_id (void);
-int do_buzzer (char **);
-int do_led (char **);
-int do_full_bridge (char **);
-int do_dac (char **);
+int do_buzzer (char * const *);
+int do_led (char * const *);
+int do_full_bridge (char * const *);
+int do_dac (char * const *);
int do_motor_contact (void);
-int do_motor (char **);
-int do_pwm (char **);
-int do_thermo (char **);
-int do_touch (char **);
-int do_rs485 (char **);
-int do_serial_number (char **);
+int do_motor (char * const *);
+int do_pwm (char * const *);
+int do_thermo (char * const *);
+int do_touch (char * const *);
+int do_rs485 (char * const *);
+int do_serial_number (char * const *);
int do_crc16 (void);
int do_power_switch (void);
-int do_gain (char **);
-int do_eeprom (char **);
+int do_gain (char * const *);
+int do_eeprom (char * const *);
/* helper functions */
static void adc_init (void);
unsigned int icnt);
#if defined(CONFIG_CMD_I2C)
-static int trab_eeprom_read (char **argv);
-static int trab_eeprom_write (char **argv);
+static int trab_eeprom_read (char * const *argv);
+static int trab_eeprom_write (char * const *argv);
int i2c_write_multiple (uchar chip, uint addr, int alen, uchar *buffer,
int len);
int i2c_read_multiple ( uchar chip, uint addr, int alen, uchar *buffer,
* test.
*/
-int trab_fkt (int argc, char *argv[])
+int trab_fkt (int argc, char * const argv[])
{
int i;
return 0;
}
-int do_buzzer (char **argv)
+int do_buzzer (char * const *argv)
{
int counter;
}
-int do_led (char **argv)
+int do_led (char * const *argv)
{
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
}
-int do_full_bridge (char **argv)
+int do_full_bridge (char * const *argv)
{
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
}
-int do_dac (char **argv)
+int do_dac (char * const *argv)
{
int brightness;
return 0;
}
-int do_motor (char **argv)
+int do_motor (char * const *argv)
{
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
printf ("## FKT: ");
}
-int do_pwm (char **argv)
+int do_pwm (char * const *argv)
{
int counter;
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
}
-int do_thermo (char **argv)
+int do_thermo (char * const *argv)
{
int channel, res;
}
-int do_touch (char **argv)
+int do_touch (char * const *argv)
{
int x, y;
}
-int do_rs485 (char **argv)
+int do_rs485 (char * const *argv)
{
int timeout;
char data[RS485_MAX_RECEIVE_BUF_LEN];
}
-int do_serial_number (char **argv)
+int do_serial_number (char * const *argv)
{
#if defined(CONFIG_CMD_I2C)
unsigned int serial_number;
}
-int do_gain (char **argv)
+int do_gain (char * const *argv)
{
int range;
}
-int do_eeprom (char **argv)
+int do_eeprom (char * const *argv)
{
#if defined(CONFIG_CMD_I2C)
if (strcmp (argv[2], "read") == 0) {
}
#if defined(CONFIG_CMD_I2C)
-static int trab_eeprom_read (char **argv)
+static int trab_eeprom_read (char * const *argv)
{
int i;
int len;
return (0);
}
-static int trab_eeprom_write (char **argv)
+static int trab_eeprom_write (char * const *argv)
{
int i;
int len;
#include <command.h>
#include <dm9000.h>
-static int do_read_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) {
+static int do_read_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) {
unsigned int i;
u8 data[2];
return (0);
}
-static int do_write_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) {
+static int do_write_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) {
int offset,value;
if (argc < 4) {
return (0);
}
-int do_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) {
+int do_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) {
if (argc < 2) {
cmd_usage(cmdtp);
return 1;
return cnt;
}
-int eeprom(int argc, char *argv[])
+int eeprom(int argc, char * const argv[])
{
int i, len, ret;
unsigned char buf[58], *p;
* Interpreter command to retrieve board specific Vital Product Data, "VPD"
* ======================================================================
*/
-int do_vpd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_vpd (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
VPD vpd; /* Board specific data struct */
uchar dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
return 0;
}
-int do_update_boot_eeprom(cmd_tbl_t* cmdtp, int flag, int argc, char* argv[])
+int do_update_boot_eeprom(cmd_tbl_t* cmdtp, int flag, int argc, char * const argv[])
{
return update_boot_eeprom();
}
ulong flash_get_size(ulong base, int banknum);
void env_crc_update(void);
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
static u32 start_time;
return 0;
}
-int do_set_default(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_set_default(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *buf;
char *buf_save;
return !(in_be32((void *)GPIO0_IR) & GPIO_VAL(CONFIG_SYS_GPIO_SW_RESET));
}
-int do_chkreset(cmd_tbl_t* cmdtp, int flag, int argc, char* argv[])
+int do_chkreset(cmd_tbl_t* cmdtp, int flag, int argc, char * const argv[])
{
int delta;
int count = 0;
--- /dev/null
+#
+# List of boards
+#
+# Syntax:
+# white-space separated list of entries;
+# each entry has the following fields:
+#
+# Targetname Architecture CPU Boardname Vendor SoC
+#
+# Unused fields can be specified as "-", or omitted if they
+# are the last field on the line.
+#
+# Lines starting with '#' are comments.
+# Blank lines are ignored.
+#
+# To keep the list sorted, use something like
+#
+# :.,$! sort -f -k2,2 -k3,3 -k6,6 -k5,5 -k1,1
+#
+# Target ARCH CPU Board name Vendor SoC
+###########################################################################
+
+qong arm arm1136 - davedenx mx31
+mx31ads arm arm1136 - freescale mx31
+ep7312 arm arm720t
+impa7 arm arm720t
+SMN42 arm arm720t - siemens lpc2292
+evb4510 arm arm720t - - s3c4510b
+a320evb arm arm920t - faraday a320
+cmc_pu2 arm arm920t - - at91rm9200
+csb637 arm arm920t - - at91rm9200
+kb9202 arm arm920t - - at91rm9200
+m501sk arm arm920t - - at91rm9200
+mp2usb arm arm920t - - at91rm9200
+mx1ads arm arm920t - - imx
+mx1fs2 arm arm920t - - imx
+scb9328 arm arm920t - - imx
+cm4008 arm arm920t - - ks8695
+cm41xx arm arm920t - - ks8695
+VCMA9 arm arm920t vcma9 mpl s3c24x0
+netstar arm arm925t
+meesc arm arm926ejs - esd at91
+otc570 arm arm926ejs - esd at91
+pm9261 arm arm926ejs - ronetix at91
+pm9263 arm arm926ejs - ronetix at91
+suen3 arm arm926ejs km_arm keymile kirkwood
+rd6281a arm arm926ejs - Marvell kirkwood
+mx51evk arm arm_cortexa8 mx51evk freescale mx51
+actux1 arm ixp
+actux2 arm ixp
+actux3 arm ixp
+actux4 arm ixp
+ixdp425 arm ixp
+cerf250 arm pxa
+cradle arm pxa
+csb226 arm pxa
+delta arm pxa
+innokom arm pxa
+logodl arm pxa
+lubbock arm pxa
+pleb2 arm pxa
+xaeniax arm pxa
+xm250 arm pxa
+B2 arm s3c44b0 - dave
+assabet arm sa1100
+dnp1110 arm sa1100
+gcplus arm sa1100
+lart arm sa1100
+shannon arm sa1100
+mimc200 avr32 at32ap - mimc at32ap700x
+eNET i386 i386 - - sc520
+idmr m68k mcf52x2
+TASREG m68k mcf52x2 tasreg esd
+M5272C3 m68k mcf52x2 m5272c3 freescale
+EP2500 m68k mcf52x2 ep2500 Mercury
+purple mips mips
+tb0229 mips mips
+EP1C20 nios2 nios2 ep1c20 altera
+EP1S10 nios2 nios2 ep1s10 altera
+EP1S40 nios2 nios2 ep1s40 altera
+PCI5441 nios2 nios2 pci5441 psyent
+PK1C20 nios2 nios2 pk1c20 psyent
+P3G4 powerpc 74xx_7xx evb64260
+ppmc7xx powerpc 74xx_7xx
+ZUMA powerpc 74xx_7xx evb64260
+BAB7xx powerpc 74xx_7xx bab7xx eltec
+ELPPC powerpc 74xx_7xx elppc eltec
+CPCI750 powerpc 74xx_7xx cpci750 esd
+DB64360 powerpc 74xx_7xx db64360 Marvell
+DB64460 powerpc 74xx_7xx db64460 Marvell
+aria powerpc mpc512x - davedenx
+PATI powerpc mpc5xx pati mpl
+BC3450 powerpc mpc5xxx bc3450
+canmb powerpc mpc5xxx
+cm5200 powerpc mpc5xxx
+hmi1001 powerpc mpc5xxx
+inka4x0 powerpc mpc5xxx
+ipek01 powerpc mpc5xxx
+jupiter powerpc mpc5xxx
+mucmc52 powerpc mpc5xxx
+munices powerpc mpc5xxx
+o2dnt powerpc mpc5xxx
+uc101 powerpc mpc5xxx
+v38b powerpc mpc5xxx
+pf5200 powerpc mpc5xxx - esd
+aev powerpc mpc5xxx tqm5200 tqc
+smmaco4 powerpc mpc5xxx tqm5200 tqc
+spieval powerpc mpc5xxx tqm5200 tqc
+sorcery powerpc mpc8220
+A3000 powerpc mpc824x a3000
+barco powerpc mpc824x
+BMW powerpc mpc824x bmw
+CU824 powerpc mpc824x cu824
+MOUSSE powerpc mpc824x mousse
+MUSENKI powerpc mpc824x musenki
+MVBLUE powerpc mpc824x mvblue
+OXC powerpc mpc824x oxc
+PN62 powerpc mpc824x pn62
+sbc8240 powerpc mpc824x
+utx8245 powerpc mpc824x
+debris powerpc mpc824x - etin
+kvme080 powerpc mpc824x - etin
+atc powerpc mpc8260
+ep8260 powerpc mpc8260
+ep82xxm powerpc mpc8260
+gw8260 powerpc mpc8260
+hymod powerpc mpc8260
+IDS8247 powerpc mpc8260 ids8247
+sacsng powerpc mpc8260
+sbc8260 powerpc mpc8260
+ZPC1900 powerpc mpc8260 zpc1900
+mgcoge powerpc mpc8260 - keymile
+SCM powerpc mpc8260 - siemens
+TQM8272 powerpc mpc8260 tqm8272 tqc
+kmeter1 powerpc mpc83xx kmeter1 keymile
+MVBLM7 powerpc mpc83xx mvblm7 matrix_vision
+TQM834x powerpc mpc83xx tqm834x tqc
+PM854 powerpc mpc85xx pm854
+PM856 powerpc mpc85xx pm856
+stxgp3 powerpc mpc85xx stxgp3 stx
+c2mon powerpc mpc8xx
+EP88x powerpc mpc8xx ep88x
+ETX094 powerpc mpc8xx etx094
+FLAGADM powerpc mpc8xx flagadm
+GENIETV powerpc mpc8xx genietv
+GTH powerpc mpc8xx gth
+hermes powerpc mpc8xx
+IP860 powerpc mpc8xx ip860
+LANTEC powerpc mpc8xx lantec
+lwmon powerpc mpc8xx
+NX823 powerpc mpc8xx nx823
+quantum powerpc mpc8xx
+R360MPI powerpc mpc8xx r360mpi
+RBC823 powerpc mpc8xx rbc823
+rmu powerpc mpc8xx
+RPXlite powerpc mpc8xx
+spc1920 powerpc mpc8xx
+uc100 powerpc mpc8xx
+MHPC powerpc mpc8xx mhpc eltec
+TOP860 powerpc mpc8xx top860 emk
+kmsupx4 powerpc mpc8xx km8xx keymile
+mgsuvd powerpc mpc8xx km8xx keymile
+KUP4K powerpc mpc8xx kup4k kup
+KUP4X powerpc mpc8xx kup4k kup
+ELPT860 powerpc mpc8xx elpt860 LEOX
+CCM powerpc mpc8xx - siemens
+IAD210 powerpc mpc8xx - siemens
+pcu_e powerpc mpc8xx - siemens
+QS823 powerpc mpc8xx qs850 snmc
+QS850 powerpc mpc8xx qs850 snmc
+QS860T powerpc mpc8xx qs860t snmc
+stxxtc powerpc mpc8xx stxxtc stx
+HMI10 powerpc mpc8xx tqm8xx tqc
+SM850 powerpc mpc8xx tqm8xx tqc
+AMX860 powerpc mpc8xx amx860 westel
+csb272 powerpc ppc4xx
+csb472 powerpc ppc4xx
+ERIC powerpc ppc4xx eric
+G2000 powerpc ppc4xx g2000
+JSE powerpc ppc4xx jse
+korat powerpc ppc4xx
+lwmon5 powerpc ppc4xx
+ML2 powerpc ppc4xx ml2
+sbc405 powerpc ppc4xx
+sc3 powerpc ppc4xx
+t3corp powerpc ppc4xx
+zeus powerpc ppc4xx
+acadia powerpc ppc4xx - amcc
+bamboo powerpc ppc4xx - amcc
+bubinga powerpc ppc4xx - amcc
+ebony powerpc ppc4xx - amcc
+katmai powerpc ppc4xx - amcc
+luan powerpc ppc4xx - amcc
+makalu powerpc ppc4xx - amcc
+ocotea powerpc ppc4xx - amcc
+redwood powerpc ppc4xx - amcc
+taihu powerpc ppc4xx - amcc
+taishan powerpc ppc4xx - amcc
+yucca powerpc ppc4xx - amcc
+AP1000 powerpc ppc4xx ap1000 amirix
+CRAYL1 powerpc ppc4xx L1 cray
+ADCIOP powerpc ppc4xx adciop esd
+APC405 powerpc ppc4xx apc405 esd
+AR405 powerpc ppc4xx ar405 esd
+ASH405 powerpc ppc4xx ash405 esd
+CANBT powerpc ppc4xx canbt esd
+CMS700 powerpc ppc4xx cms700 esd
+CPCI2DP powerpc ppc4xx cpci2dp esd
+DP405 powerpc ppc4xx dp405 esd
+DU405 powerpc ppc4xx du405 esd
+DU440 powerpc ppc4xx du440 esd
+HH405 powerpc ppc4xx hh405 esd
+HUB405 powerpc ppc4xx hub405 esd
+PCI405 powerpc ppc4xx pci405 esd
+PLU405 powerpc ppc4xx plu405 esd
+PMC405 powerpc ppc4xx pmc405 esd
+PMC440 powerpc ppc4xx pmc440 esd
+VOH405 powerpc ppc4xx voh405 esd
+VOM405 powerpc ppc4xx vom405 esd
+WUH405 powerpc ppc4xx wuh405 esd
+neo powerpc ppc4xx - gdsys
+icon powerpc ppc4xx - mosaixtech
+MIP405 powerpc ppc4xx mip405 mpl
+PIP405 powerpc ppc4xx pip405 mpl
+alpr powerpc ppc4xx - prodrive
+p3p440 powerpc ppc4xx - prodrive
+KAREF powerpc ppc4xx karef sandburst
+grsim sparc leon3 - gaisler
+imx31_litekit arm arm1136 - logicpd mx31
+omap2420h4 arm arm1136 - ti omap24xx
+tnetv107x_evm arm arm1176 tnetv107xevm ti tnetv107x
+armadillo arm arm720t
+modnet50 arm arm720t
+lpc2292sodimm arm arm720t - - lpc2292
+eb_cpux9k2 arm arm920t - BuS at91
+at91rm9200dk arm arm920t - atmel at91rm9200
+at91rm9200ek arm arm920t - atmel at91rm9200
+sbc2410x arm arm920t - - s3c24x0
+smdk2400 arm arm920t - samsung s3c24x0
+smdk2410 arm arm920t - samsung s3c24x0
+voiceblue arm arm925t
+omap1510inn arm arm925t - ti
+afeb9260 arm arm926ejs - - at91
+at91cap9adk arm arm926ejs - atmel at91
+davinci_dvevm arm arm926ejs dvevm davinci davinci
+davinci_sffsdr arm arm926ejs sffsdr davinci davinci
+davinci_sonata arm arm926ejs sonata davinci davinci
+da830evm arm arm926ejs da8xxevm davinci davinci
+da850evm arm arm926ejs da8xxevm davinci davinci
+guruplug arm arm926ejs - Marvell kirkwood
+mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood
+openrd_base arm arm926ejs - Marvell kirkwood
+sheevaplug arm arm926ejs - Marvell kirkwood
+imx27lite arm arm926ejs imx27lite logicpd mx27
+magnesium arm arm926ejs imx27lite logicpd mx27
+omap5912osk arm arm926ejs - ti omap
+edminiv2 arm arm926ejs - LaCie orion5x
+omap3_overo arm arm_cortexa8 overo - omap3
+omap3_pandora arm arm_cortexa8 pandora - omap3
+omap3_zoom1 arm arm_cortexa8 zoom1 logicpd omap3
+omap3_zoom2 arm arm_cortexa8 zoom2 logicpd omap3
+omap3_beagle arm arm_cortexa8 beagle ti omap3
+omap3_evm arm arm_cortexa8 evm ti omap3
+omap3_sdp3430 arm arm_cortexa8 sdp3430 ti omap3
+am3517_evm arm arm_cortexa8 am3517evm logicpd omap3
+devkit8000 arm arm_cortexa8 devkit8000 timll omap3
+s5p_goni arm arm_cortexa8 goni samsung s5pc1xx
+smdkc100 arm arm_cortexa8 smdkc100 samsung s5pc1xx
+ixdpg425 arm ixp
+lpd7a400 arm lh7a40x lpd7a40x
+lpd7a404 arm lh7a40x lpd7a40x
+pxa255_idp arm pxa
+wepep250 arm pxa
+xsengine arm pxa
+zylonite arm pxa
+atngw100 avr32 at32ap - atmel at32ap700x
+atstk1002 avr32 at32ap atstk1000 atmel at32ap700x
+atstk1003 avr32 at32ap atstk1000 atmel at32ap700x
+atstk1004 avr32 at32ap atstk1000 atmel at32ap700x
+atstk1006 avr32 at32ap atstk1000 atmel at32ap700x
+favr-32-ezkit avr32 at32ap - earthlcd at32ap700x
+hammerhead avr32 at32ap - miromico at32ap700x
+bf518f-ezbrd blackfin blackfin
+bf526-ezbrd blackfin blackfin
+bf527-ezkit blackfin blackfin
+bf533-ezkit blackfin blackfin
+bf533-stamp blackfin blackfin
+bf537-minotaur blackfin blackfin
+bf537-pnav blackfin blackfin
+bf537-srv1 blackfin blackfin
+bf537-stamp blackfin blackfin
+bf538f-ezkit blackfin blackfin
+bf548-ezkit blackfin blackfin
+bf561-acvilon blackfin blackfin
+bf561-ezkit blackfin blackfin
+blackstamp blackfin blackfin
+cm-bf527 blackfin blackfin
+cm-bf533 blackfin blackfin
+cm-bf537e blackfin blackfin
+cm-bf537u blackfin blackfin
+cm-bf548 blackfin blackfin
+cm-bf561 blackfin blackfin
+ibf-dsp561 blackfin blackfin
+ip04 blackfin blackfin
+tcm-bf518 blackfin blackfin
+tcm-bf537 blackfin blackfin
+sc520_cdp i386 i386 - - sc520
+sc520_spunk i386 i386 - - sc520
+sc520_spunk_rel i386 i386 sc520_spunk_rel - sc520
+M5208EVBE m68k mcf52x2 m5208evbe freescale
+M5249EVB m68k mcf52x2 m5249evb freescale
+M5253DEMO m68k mcf52x2 m5253demo freescale
+M5253EVBE m68k mcf52x2 m5253evbe freescale
+M5271EVB m68k mcf52x2 m5271evb freescale
+M5275EVB m68k mcf52x2 m5275evb freescale
+M5282EVB m68k mcf52x2 m5282evb freescale
+M53017EVB m68k mcf52x2 m53017evb freescale
+microblaze-generic microblaze microblaze microblaze-generic xilinx
+mpc7448hpc2 powerpc 74xx_7xx mpc7448hpc2 freescale
+pdm360ng powerpc mpc512x
+mecp5123 powerpc mpc512x - esd
+cmi_mpc5xx powerpc mpc5xx cmi
+motionpro powerpc mpc5xxx
+cpci5200 powerpc mpc5xxx - esd
+mecp5200 powerpc mpc5xxx - esd
+Alaska8220 powerpc mpc8220 alaska
+Yukon8220 powerpc mpc8220 alaska
+HIDDEN_DRAGON powerpc mpc824x hidden_dragon
+IPHASE4539 powerpc mpc8260 iphase4539
+ppmc8260 powerpc mpc8260
+RPXsuper powerpc mpc8260 rpxsuper
+rsdproto powerpc mpc8260
+MPC8266ADS powerpc mpc8260 mpc8266ads freescale
+MPC8323ERDB powerpc mpc83xx mpc8323erdb freescale
+MPC8349EMDS powerpc mpc83xx mpc8349emds freescale
+MPC837XERDB powerpc mpc83xx mpc837xerdb freescale
+ATUM8548 powerpc mpc85xx atum8548
+socrates powerpc mpc85xx socrates
+MPC8540ADS powerpc mpc85xx mpc8540ads freescale
+MPC8544DS powerpc mpc85xx mpc8544ds freescale
+MPC8560ADS powerpc mpc85xx mpc8560ads freescale
+MPC8568MDS powerpc mpc85xx mpc8568mds freescale
+XPEDITE5200 powerpc mpc85xx xpedite5200 xes
+XPEDITE5370 powerpc mpc85xx xpedite5370 xes
+sbc8641d powerpc mpc86xx
+MPC8610HPCD powerpc mpc86xx mpc8610hpcd freescale
+XPEDITE5170 powerpc mpc86xx xpedite5170 xes
+cogent_mpc8xx powerpc mpc8xx cogent
+ESTEEM192E powerpc mpc8xx esteem192e
+RPXClassic powerpc mpc8xx
+RRvision powerpc mpc8xx
+svm_sc8xx powerpc mpc8xx
+pcs440ep powerpc ppc4xx
+quad100hd powerpc ppc4xx
+dlvision powerpc ppc4xx - gdsys
+gdppc440etx powerpc ppc4xx - gdsys
+CPCIISER4 powerpc ppc4xx cpciiser4 esd
+DASA_SIM powerpc ppc4xx dasa_sim esd
+PMC405DE powerpc ppc4xx pmc405de esd
+METROBOX powerpc ppc4xx metrobox sandburst
+XPEDITE1000 powerpc ppc4xx xpedite1000 xes
+grsim_leon2 sparc leon2 - gaisler
+gr_cpci_ax2000 sparc leon3 - gaisler
+gr_ep2s60 sparc leon3 - gaisler
+gr_xc3s_1500 sparc leon3 - gaisler
+davinci_dm355evm arm arm926ejs dm355evm davinci davinci
+davinci_dm365evm arm arm926ejs dm365evm davinci davinci
+davinci_dm6467evm arm arm926ejs dm6467evm davinci davinci
+davinci_schmoogie arm arm926ejs schmoogie davinci davinci
+davinci_dm355leopard arm arm926ejs dm355leopard davinci davinci
printf(" irq: %-2d (ver: %d)\n", irq, ver);
}
-int do_ambapp_print(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_ambapp_print(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
/* Print AHB Masters */
#ifndef CONFIG_ARM /* PowerPC and other */
static void print_lnum(const char *, u64);
+#endif
-#ifdef CONFIG_PPC
+#if defined(CONFIG_PPC)
static void print_str(const char *, const char *);
-int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
bd_t *bd = gd->bd;
char buf[32];
return 0;
}
-#elif defined(CONFIG_NIOS) /* NIOS*/
+#elif defined(CONFIG_NIOS2)
-int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- bd_t *bd = gd->bd;
-
- print_num ("memstart", (ulong)bd->bi_memstart);
- print_lnum ("memsize", (u64)bd->bi_memsize);
- print_num ("flashstart", (ulong)bd->bi_flashstart);
- print_num ("flashsize", (ulong)bd->bi_flashsize);
- print_num ("flashoffset", (ulong)bd->bi_flashoffset);
-
- print_eth(0);
- printf ("ip_addr = %pI4\n", &bd->bi_ip_addr);
- printf ("baudrate = %ld bps\n", bd->bi_baudrate);
-
- return 0;
-}
-
-#elif defined(CONFIG_NIOS2) /* Nios-II */
-
-int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
bd_t *bd = gd->bd;
return 0;
}
-#elif defined(CONFIG_MICROBLAZE) /* ! PPC, which leaves Microblaze */
-int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+#elif defined(CONFIG_MICROBLAZE)
+
+int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
bd_t *bd = gd->bd;
print_num ("mem start ", (ulong)bd->bi_memstart);
return 0;
}
-#elif defined(CONFIG_SPARC) /* SPARC */
-int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+#elif defined(CONFIG_SPARC)
+
+int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
bd_t *bd = gd->bd;
return 0;
}
-#elif defined(CONFIG_M68K) /* M68K */
+#elif defined(CONFIG_M68K)
+
static void print_str(const char *, const char *);
-int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
bd_t *bd = gd->bd;
char buf[32];
}
#elif defined(CONFIG_BLACKFIN)
+
static void print_str(const char *, const char *);
-int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
bd_t *bd = gd->bd;
char buf[32];
return 0;
}
-#else /* ! PPC, which leaves MIPS */
+#elif defined(CONFIG_MIPS)
-int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
bd_t *bd = gd->bd;
return 0;
}
-#endif /* MIPS */
-#else /* ARM */
+#elif defined(CONFIG_AVR32)
int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ bd_t *bd = gd->bd;
+
+ print_num ("boot_params", (ulong)bd->bi_boot_params);
+ print_num ("memstart", (ulong)bd->bi_memstart);
+ print_lnum ("memsize", (u64)bd->bi_memsize);
+ print_num ("flashstart", (ulong)bd->bi_flashstart);
+ print_num ("flashsize", (ulong)bd->bi_flashsize);
+ print_num ("flashoffset", (ulong)bd->bi_flashoffset);
+
+ print_eth(0);
+ printf ("ip_addr = %pI4\n", &bd->bi_ip_addr);
+ printf ("baudrate = %lu bps\n", bd->bi_baudrate);
+
+ return 0;
+}
+
+#elif defined(CONFIG_ARM)
+
+int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i;
bd_t *bd = gd->bd;
return 0;
}
-#endif /* CONFIG_ARM XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
+#else
+ #error "a case for this architecture does not exist!"
+#endif
static void print_num(const char *name, ulong value)
{
* Entry point from the interpreter to the disassembler. Repeated calls
* will resume from the last disassembled address.
* ====================================================================== */
-int do_bedbug_dis (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_dis (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong addr; /* Address to start disassembly from */
ulong len; /* # of instructions to disassemble */
* instructions in consecutive memory locations until a '.' (period) is
* entered on a line by itself.
* ====================================================================== */
-int do_bedbug_asm (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_asm (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
long mem_addr; /* Address to assemble into */
unsigned long instr; /* Machine code for text */
* CPU-specific break point set routine.
* ====================================================================== */
-int do_bedbug_break (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_break (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
/* -------------------------------------------------- */
if (bug_ctx.do_break)
* stopped flag in the context so that the breakpoint routine will
* return.
* ====================================================================== */
-int do_bedbug_continue (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_continue (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
/* -------------------------------------------------- */
* the address passes control to the CPU-specific set breakpoint routine
* for the current breakpoint number.
* ====================================================================== */
-int do_bedbug_step (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_step (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned long addr; /* Address to stop at */
* the address passes control to the CPU-specific set breakpoint routine
* for the current breakpoint number.
* ====================================================================== */
-int do_bedbug_next (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_next (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned long addr; /* Address to stop at */
* Interpreter command to print the current stack. This assumes an EABI
* architecture, so it starts with GPR R1 and works back up the stack.
* ====================================================================== */
-int do_bedbug_stack (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_stack (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned long sp; /* Stack pointer */
unsigned long func; /* LR from stack */
* Interpreter command to dump the registers. Calls the CPU-specific
* show registers routine.
* ====================================================================== */
-int do_bedbug_rdump (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_rdump (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
/* -------------------------------------------------- */
}
#endif
-static int do_bmp_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_bmp_info(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong addr;
return (bmp_info(addr));
}
-static int do_bmp_display(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_bmp_display(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong addr;
int x = 0, y = 0;
* Return: None
*
*/
-static int do_bmp(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_bmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
cmd_tbl_t *c;
/* Allow ports to override the default behavior */
__attribute__((weak))
-unsigned long do_go_exec (ulong (*entry)(int, char *[]), int argc, char *argv[])
+unsigned long do_go_exec (ulong (*entry)(int, char * const []), int argc, char * const argv[])
{
return entry (argc, argv);
}
-int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr, rc;
int rcode = 0;
" passing 'arg' as arguments"
);
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
U_BOOT_CMD(
reset, 1, 0, do_reset,
* to also add booting from SPI, or TWI, but this function does
* not currently support that.
*/
-int do_bootldr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bootldr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
void *addr;
#if defined(CONFIG_CMD_IMLS)
#include <flash.h>
extern flash_info_t flash_info[]; /* info for FLASH chips */
-static int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+static int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
#endif
#ifdef CONFIG_SILENT_CONSOLE
static int fit_check_kernel (const void *fit, int os_noffset, int verify);
#endif
-static void *boot_get_kernel (cmd_tbl_t *cmdtp, int flag,int argc, char *argv[],
+static void *boot_get_kernel (cmd_tbl_t *cmdtp, int flag,int argc, char * const argv[],
bootm_headers_t *images, ulong *os_data, ulong *os_len);
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
/*
* Continue booting an OS image; caller already has:
* - loaded (first part of) image to header load address,
* - disabled interrupts.
*/
-typedef int boot_os_fn (int flag, int argc, char *argv[],
+typedef int boot_os_fn (int flag, int argc, char * const argv[],
bootm_headers_t *images); /* pointers to os/initrd/fdt */
#ifdef CONFIG_BOOTM_LINUX
#if defined(CONFIG_CMD_ELF)
static boot_os_fn do_bootm_vxworks;
static boot_os_fn do_bootm_qnxelf;
-int do_bootvx (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-int do_bootelf (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_bootvx (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_bootelf (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
#endif
#if defined(CONFIG_INTEGRITY)
static boot_os_fn do_bootm_integrity;
#define IH_INITRD_ARCH IH_ARCH_MICROBLAZE
#elif defined(__mips__)
#define IH_INITRD_ARCH IH_ARCH_MIPS
-#elif defined(__nios__)
- #define IH_INITRD_ARCH IH_ARCH_NIOS
#elif defined(__nios2__)
#define IH_INITRD_ARCH IH_ARCH_NIOS2
#elif defined(__PPC__)
#endif
}
-static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
void *os_hdr;
int ret;
return 0;
}
-static int bootm_start_standalone(ulong iflag, int argc, char *argv[])
+static int bootm_start_standalone(ulong iflag, int argc, char * const argv[])
{
char *s;
- int (*appl)(int, char *[]);
+ int (*appl)(int, char * const []);
/* Don't start if "autostart" is set to "no" */
if (((s = getenv("autostart")) != NULL) && (strcmp(s, "no") == 0)) {
setenv("filesize", buf);
return 0;
}
- appl = (int (*)(int, char *[]))ntohl(images.ep);
+ appl = (int (*)(int, char * const []))ntohl(images.ep);
(*appl)(argc-1, &argv[1]);
return 0;
U_BOOT_CMD_MKENT(go, 0, 1, (void *)BOOTM_STATE_OS_GO, "", ""),
};
-int do_bootm_subcommand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bootm_subcommand (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int ret = 0;
int state;
/* bootm - boot application image from image in memory */
/*******************************************************************/
-int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong iflag;
ulong load_end = 0;
usb_stop();
#endif
-#ifdef CONFIG_AMIGAONEG3SE
- /*
- * We've possible left the caches enabled during
- * bios emulation, so turn them off again
- */
- icache_disable();
- dcache_disable();
-#endif
-
ret = bootm_load_os(images.os, &load_end, 1);
if (ret < 0) {
* pointer to image header if valid image was found, plus kernel start
* address and length, otherwise NULL
*/
-static void *boot_get_kernel (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
+static void *boot_get_kernel (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
bootm_headers_t *images, ulong *os_data, ulong *os_len)
{
image_header_t *hdr;
/* bootd - boot default image */
/*******************************************************************/
#if defined(CONFIG_CMD_BOOTD)
-int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int rcode = 0;
/* iminfo - print header info for a requested image */
/*******************************************************************/
#if defined(CONFIG_CMD_IMI)
-int do_iminfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_iminfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int arg;
ulong addr;
/* imls - list all images found in flash */
/*******************************************************************/
#if defined(CONFIG_CMD_IMLS)
-int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
flash_info_t *info;
int i, j;
/*******************************************************************/
#ifdef CONFIG_BOOTM_NETBSD
-static int do_bootm_netbsd (int flag, int argc, char *argv[],
+static int do_bootm_netbsd (int flag, int argc, char * const argv[],
bootm_headers_t *images)
{
void (*loader)(bd_t *, image_header_t *, char *, char *);
#endif /* CONFIG_BOOTM_NETBSD*/
#ifdef CONFIG_LYNXKDI
-static int do_bootm_lynxkdi (int flag, int argc, char *argv[],
+static int do_bootm_lynxkdi (int flag, int argc, char * const argv[],
bootm_headers_t *images)
{
image_header_t *hdr = &images->legacy_hdr_os_copy;
#endif /* CONFIG_LYNXKDI */
#ifdef CONFIG_BOOTM_RTEMS
-static int do_bootm_rtems (int flag, int argc, char *argv[],
+static int do_bootm_rtems (int flag, int argc, char * const argv[],
bootm_headers_t *images)
{
void (*entry_point)(bd_t *);
#endif /* CONFIG_BOOTM_RTEMS */
#if defined(CONFIG_CMD_ELF)
-static int do_bootm_vxworks (int flag, int argc, char *argv[],
+static int do_bootm_vxworks (int flag, int argc, char * const argv[],
bootm_headers_t *images)
{
char str[80];
return 1;
}
-static int do_bootm_qnxelf(int flag, int argc, char *argv[],
+static int do_bootm_qnxelf(int flag, int argc, char * const argv[],
bootm_headers_t *images)
{
char *local_args[2];
#endif
#ifdef CONFIG_INTEGRITY
-static int do_bootm_integrity (int flag, int argc, char *argv[],
+static int do_bootm_integrity (int flag, int argc, char * const argv[],
bootm_headers_t *images)
{
void (*entry_point)(void);
static int on_off (const char *);
-int do_icache ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_icache ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
switch (argc) {
case 2: /* on / off */
return 0;
}
-int do_dcache ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_dcache ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
switch (argc) {
case 2: /* on / off */
#include <stdio_dev.h>
extern void _do_coninfo (void);
-int do_coninfo (cmd_tbl_t * cmd, int flag, int argc, char *argv[])
+int do_coninfo (cmd_tbl_t * cmd, int flag, int argc, char * const argv[])
{
int l;
struct list_head *list = stdio_get_list();
/*
* display current instruction and data cplb tables
*/
-int do_cplbinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_cplbinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
printf("%s CPLB table [%08x]:\n", "Instruction", *(uint32_t *)DMEM_CONTROL);
show_cplb_table((uint32_t *)ICPLB_ADDR0, (uint32_t *)ICPLB_DATA0);
* @param argv arguments list
* @return 0 on success, 1 otherwise
*/
-int do_cramfs_load(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_cramfs_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename;
int size;
* @param argv arguments list
* @return 0 on success, 1 otherwise
*/
-int do_cramfs_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_cramfs_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename = "/";
int ret;
static int mmc_nspi (const char *);
-int do_dataflash_mmc_mux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_dataflash_mmc_mux (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
switch (argc) {
case 2: /* on / off */
int mk_date (char *, struct rtc_time *);
-int do_date (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_date (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
struct rtc_time tm;
int rcode = 0;
* Interpreter command to retrieve an AMCC PPC 4xx Device Control Register
* =======================================================================
*/
-int do_getdcr ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] )
+int do_getdcr ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] )
{
unsigned short dcrn; /* Device Control Register Num */
unsigned long value; /* DCR's value */
* Interpreter command to set an AMCC PPC 4xx Device Control Register
* ======================================================================
*/
-int do_setdcr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_setdcr (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned short dcrn; /* Device Control Register Num */
unsigned long value;
* Device Control Register inderect addressing.
* =======================================================================
*/
-int do_getidcr (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_getidcr (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned short adr_dcrn; /* Device Control Register Num for Address */
unsigned short dat_dcrn; /* Device Control Register Num for Data */
* Device Control Register inderect addressing.
* =======================================================================
*/
-int do_setidcr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_setidcr (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned short adr_dcrn; /* Device Control Register Num for Address */
unsigned short dat_dcrn; /* Device Control Register Num for Data */
#include <common.h>
#include <df.h>
-static int do_df(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_df(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
const char *cmd;
#include <command.h>
#include <post.h>
-int do_diag (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_diag (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned int i;
#define CWORD_CLEAR 0x80
#define CLEAR_DELAY (110 * 2)
-int do_display (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_display (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i;
int pos;
#include <dtt.h>
#include <i2c.h>
-int do_dtt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_dtt (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int i;
unsigned char sensors[] = CONFIG_DTT_SENSORS;
#include <common.h>
#include <command.h>
-int do_echo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_echo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i;
int putnl = 1;
/* ------------------------------------------------------------------------- */
#if defined(CONFIG_CMD_EEPROM)
-int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
const char *const fmt =
"\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
/* Allow ports to override the default behavior */
__attribute__((weak))
-unsigned long do_bootelf_exec (ulong (*entry)(int, char *[]), int argc, char *argv[])
+unsigned long do_bootelf_exec (ulong (*entry)(int, char * const[]),
+ int argc, char * const argv[])
{
unsigned long ret;
/* ======================================================================
* Interpreter command to boot an arbitrary ELF image from memory.
* ====================================================================== */
-int do_bootelf (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bootelf (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned long addr; /* Address of the ELF image */
unsigned long rc; /* Return value from user code */
* be either an ELF image or a raw binary. Will attempt to setup the
* bootline and other parameters correctly.
* ====================================================================== */
-int do_bootvx (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bootvx (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned long addr; /* Address of image */
unsigned long bootaddr; /* Address to put the bootline */
#include <common.h>
#include <command.h>
-int do_exit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_exit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int r;
#define PRINTF(fmt,args...)
#endif
-int do_ext2ls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ext2ls (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename = "/";
int dev=0;
/******************************************************************************
* Ext2fs boot command intepreter. Derived from diskboot
*/
-int do_ext2load (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ext2load (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename = NULL;
char *ep;
#include <fat.h>
-int do_fat_fsload (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_fat_fsload (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
long size;
unsigned long offset;
" to address 'addr' from dos filesystem"
);
-int do_fat_ls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_fat_ls (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename = "/";
int ret;
" - list files from 'dev' on 'interface' in a 'directory'"
);
-int do_fat_fsinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_fat_fsinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int dev=0;
int part=1;
}
int
-do_fat_dump (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+do_fat_dump (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[])
{
__u8 block[1024];
int ret;
#define CONFIG_SYS_ISA_IO_OFFSET 0
#endif
-
-#ifdef CONFIG_AMIGAONEG3SE
-unsigned char INT6_Status;
-
-void fdc_interrupt(void)
-{
- INT6_Status = 0x80;
-}
-
-/* waits for an interrupt (polling) */
-int wait_for_fdc_int(void)
-{
- unsigned long timeout;
- timeout = FDC_TIME_OUT;
- while(((volatile)INT6_Status & 0x80) == 0) {
- timeout--;
- udelay(10);
- if(timeout == 0) /* timeout occured */
- return FALSE;
- }
- INT6_Status = 0;
- return TRUE;
-}
-#endif
-
/* Supporting Functions */
/* reads a Register of the FDC */
unsigned char read_fdc_reg(unsigned int addr)
tmp[0]=val;
}
-#ifndef CONFIG_AMIGAONEG3SE
/* waits for an interrupt (polling) */
int wait_for_fdc_int(void)
{
return TRUE;
}
-#endif
-
/* reads a byte from the FIFO of the FDC and checks direction and RQM bit
of the MSR. returns -1 if timeout, or byte if ok */
int read_fdc_byte(void)
return(fdc_issue_cmd(pCMD,pFG));
}
-#ifndef CONFIG_AMIGAONEG3SE
/* terminates current command, by not servicing the FIFO
* waits for interrupt and fills in the result bytes */
int fdc_terminate(FDC_COMMAND_STRUCT *pCMD)
}
return TRUE;
}
-#endif
-#ifdef CONFIG_AMIGAONEG3SE
-int fdc_terminate(FDC_COMMAND_STRUCT *pCMD)
-{
- int i;
- for(i=0;i<100;i++)
- udelay(500); /* wait 500usec for fifo overrun */
- while((INT6_Status&0x80)==0x00); /* wait as long as no int has occured */
- for(i=0;i<7;i++) {
- pCMD->result[i]=(unsigned char)read_fdc_byte();
- }
- INT6_Status = 0;
- return TRUE;
-}
-
-#endif
-
-#ifdef CONFIG_AMIGAONEG3SE
-#define disable_interrupts() 0
-#define enable_interrupts() (void)0
-#endif
/* reads data from FDC, seek commands are issued automatic */
int fdc_read_data(unsigned char *buffer, unsigned long blocks,FDC_COMMAND_STRUCT *pCMD, FD_GEO_STRUCT *pFG)
return TRUE;
}
-#ifdef CONFIG_AMIGAONEG3SE
-#undef disable_interrupts()
-#undef enable_interrupts()
-#endif
-
/* Scan all drives and check if drive is present and disk is inserted */
int fdc_check_drive(FDC_COMMAND_STRUCT *pCMD, FD_GEO_STRUCT *pFG)
{
{
int i;
-#ifdef CONFIG_AMIGAONEG3SE
- irq_install_handler(6, (interrupt_handler_t *)fdc_interrupt, NULL);
- i8259_unmask_irq(6);
-#endif
-
#ifdef CONFIG_SYS_FDC_HW_INIT
fdc_hw_init ();
#endif
/****************************************************************************
* main routine do_fdcboot
*/
-int do_fdcboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_fdcboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
FD_GEO_STRUCT *pFG = (FD_GEO_STRUCT *)floppy_type;
FDC_COMMAND_STRUCT *pCMD = &cmd;
* do_fdosboot --
*-----------------------------------------------------------------------------
*/
-int do_fdosboot(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_fdosboot(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *name;
char *ep;
* do_fdosls --
*-----------------------------------------------------------------------------
*/
-int do_fdosls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_fdosls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *path = "";
int drive = CONFIG_SYS_FDC_DRIVE_NUMBER;
DECLARE_GLOBAL_DATA_PTR;
static int fdt_valid(void);
-static int fdt_parse_prop(char **newval, int count, char *data, int *len);
+static int fdt_parse_prop(char *const*newval, int count, char *data, int *len);
static int fdt_print(const char *pathp, char *prop, int depth);
/*
/*
* Flattened Device Tree command, see the help for parameter definitions.
*/
-int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
if (argc < 2) {
cmd_usage(cmdtp);
* data: A bytestream to be placed in the property
* len: The length of the resulting bytestream
*/
-static int fdt_parse_prop(char **newval, int count, char *data, int *len)
+static int fdt_parse_prop(char * const *newval, int count, char *data, int *len)
{
char *cp; /* temporary char pointer */
char *newp; /* temporary newval char pointer */
}
#endif /* CONFIG_SYS_NO_FLASH */
-int do_flinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_flinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
#ifndef CONFIG_SYS_NO_FLASH
ulong bank;
return 0;
}
-int do_flerase (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_flerase (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
#ifndef CONFIG_SYS_NO_FLASH
flash_info_t *info;
}
#endif /* CONFIG_SYS_NO_FLASH */
-int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
#ifndef CONFIG_SYS_NO_FLASH
flash_info_t *info;
* If there is no data addr field, the fpgadata environment variable is used.
* The info command requires no data address field.
*/
-int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int op, dev = FPGA_INVALID_DEVICE;
size_t data_size = 0;
#include <common.h>
#include <command.h>
-int do_help(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_help(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
return _do_help(&__u_boot_cmd_start,
&__u_boot_cmd_end - &__u_boot_cmd_start,
* i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr}
*/
-static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u_char chip;
uint devaddr, alen, length;
* Syntax:
* i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
*/
-static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u_char chip;
uint addr, alen, length;
* Syntax:
* i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
*/
-static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
uchar chip;
ulong addr;
* Syntax:
* i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
*/
-static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
uchar chip;
ulong addr;
*/
static int
-mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
+mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
{
uchar chip;
ulong addr;
* Syntax:
* i2c probe {addr}{.0, .1, .2}
*/
-static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int j;
#if defined(CONFIG_SYS_I2C_NOPROBES)
* {length} - Number of bytes to read
* {delay} - A DECIMAL number and defaults to 1000 uSec
*/
-static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u_char chip;
ulong alen;
* Syntax:
* i2c sdram {i2c_chip}
*/
-static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
enum { unknown, EDO, SDRAM, DDR2 } type;
#endif
#if defined(CONFIG_I2C_MUX)
-static int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int ret=0;
#endif /* CONFIG_I2C_MUX */
#if defined(CONFIG_I2C_MULTI_BUS)
-static int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int bus_idx, ret=0;
}
#endif /* CONFIG_I2C_MULTI_BUS */
-static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int speed, ret=0;
return ret;
}
-static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
}
-static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
}
-static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
return 0;
U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""),
};
-static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
cmd_tbl_t *c;
};
-#ifndef CONFIG_AMIGAONEG3SE
static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
-#else
-static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS] = {0,};
-#endif
block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
/* ------------------------------------------------------------------------- */
#ifdef CONFIG_IDE_LED
-#if !defined(CONFIG_KUP4K) && !defined(CONFIG_KUP4X) &&!defined(CONFIG_BMS2003) &&!defined(CONFIG_CPC45)
+# if !defined(CONFIG_BMS2003) && \
+ !defined(CONFIG_CPC45) && \
+ !defined(CONFIG_KUP4K) && \
+ !defined(CONFIG_KUP4X)
static void ide_led (uchar led, uchar status);
#else
extern void ide_led (uchar led, uchar status);
#endif
#else
-#ifndef CONFIG_AMIGAONEG3SE
#define ide_led(a,b) /* dummy */
-#else
-extern void ide_led(uchar led, uchar status);
-#define LED_IDE1 1
-#define LED_IDE2 2
-#define CONFIG_IDE_LED 1
-#define DEVICE_LED(x) 1
-#endif
#endif
#ifdef CONFIG_IDE_RESET
/* ------------------------------------------------------------------------- */
-int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int rcode = 0;
}
}
-int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *boot_device = NULL;
char *ep;
#endif
unsigned char c;
int i, bus;
-#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
+#if defined(CONFIG_SC3)
unsigned int ata_reset_time = ATA_RESET_TIME;
- char *s;
-#endif
-#ifdef CONFIG_AMIGAONEG3SE
- unsigned int max_bus_scan;
#endif
#ifdef CONFIG_IDE_8xx_PCCARD
extern int pcmcia_on (void);
* Wait for IDE to get ready.
* According to spec, this can take up to 31 seconds!
*/
-#ifndef CONFIG_AMIGAONEG3SE
for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
-#else
- s = getenv("ide_maxbus");
- if (s)
- max_bus_scan = simple_strtol(s, NULL, 10);
- else
- max_bus_scan = CONFIG_SYS_IDE_MAXBUS;
-
- for (bus=0; bus<max_bus_scan; ++bus) {
- int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / max_bus_scan);
-#endif
#ifdef CONFIG_IDE_8xx_PCCARD
/* Skip non-ide devices from probing */
udelay (100000); /* 100 ms */
ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
udelay (100000); /* 100 ms */
-#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
- if ((s = getenv("ide_reset_timeout")) != NULL)
- ata_reset_time = simple_strtol(s, NULL, 10);
-#endif
i = 0;
do {
udelay (10000); /* 10 ms */
c = ide_inb (dev, ATA_STATUS);
i++;
-#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
+#if defined(CONFIG_SC3)
if (i > (ata_reset_time * 100)) {
#else
if (i > (ATA_RESET_TIME * 100)) {
#endif
puts ("** Timeout **\n");
ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
-#ifdef CONFIG_AMIGAONEG3SE
- /* If this is the second bus, the first one was OK */
- if (bus != 0) {
- ide_bus_ok[bus] = 0;
- goto skip_bus;
- }
-#endif
return;
}
if ((i >= 100) && ((i%100)==0)) {
WATCHDOG_RESET();
}
-#ifdef CONFIG_AMIGAONEG3SE
- skip_bus:
-#endif
putc ('\n');
ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
unsigned char c;
hd_driveid_t *iop = (hd_driveid_t *)iobuf;
-#ifdef CONFIG_AMIGAONEG3SE
- int max_bus_scan;
- char *s;
-#endif
#ifdef CONFIG_ATAPI
int retries = 0;
int do_retry = 0;
device=dev_desc->dev;
printf (" Device %d: ", device);
-#ifdef CONFIG_AMIGAONEG3SE
- s = getenv("ide_maxbus");
- if (s) {
- max_bus_scan = simple_strtol(s, NULL, 10);
- } else {
- max_bus_scan = CONFIG_SYS_IDE_MAXBUS;
- }
- if (device >= max_bus_scan*2) {
- dev_desc->type=DEV_TYPE_UNKNOWN;
- return;
- }
-#endif
-
ide_led (DEVICE_LED(device), 1); /* LED on */
/* Select device
*/
if (((c & ATA_STAT_DRQ) == 0) ||
((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
#ifdef CONFIG_ATAPI
-#ifdef CONFIG_AMIGAONEG3SE
- s = getenv("ide_doreset");
- if (s && strcmp(s, "on") == 0)
-#endif
{
/* Need to soft reset the device in case it's an ATAPI... */
debug ("Retrying...\n");
/* ------------------------------------------------------------------------- */
#if defined(CONFIG_IDE_LED) && \
- !defined(CONFIG_AMIGAONEG3SE)&& \
!defined(CONFIG_CPC45) && \
!defined(CONFIG_HMI10) && \
!defined(CONFIG_KUP4K) && \
*/
mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
res = 0;
-#ifdef CONFIG_AMIGAONEG3SE
-# warning THF: Removed LBA mode ???
-#endif
ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
if ((c & mask) != res) {
ide_outb (device, ATA_SECT_NUM, 0);
ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
-#ifdef CONFIG_AMIGAONEG3SE
-# warning THF: Removed LBA mode ???
-#endif
ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
unsigned char res,key,asc,ascq;
int notready,unitattn;
-#ifdef CONFIG_AMIGAONEG3SE
- char *s;
- unsigned int timeout, retrycnt;
-
- s = getenv("ide_cd_timeout");
- timeout = s ? (simple_strtol(s, NULL, 10)*1000000)/5 : 0;
-
- retrycnt = 0;
-#endif
-
unitattn=ATAPI_UNIT_ATTN;
notready=ATAPI_DRIVE_NOT_READY;
goto error;
}
-#ifdef CONFIG_AMIGAONEG3SE
- if ((sense_data[2]&0xF)==0x0B) {
- debug ("ABORTED COMMAND...retry\n");
- if (retrycnt++ < 4)
- goto retry;
- return (0xFF);
- }
-
- if ((sense_data[2]&0xf) == 0x02 &&
- sense_data[12] == 0x04 &&
- sense_data[13] == 0x01 ) {
- debug ("Waiting for unit to become active\n");
- udelay(timeout);
- if (retrycnt++ < 4)
- goto retry;
- return 0xFF;
- }
-#endif /* CONFIG_AMIGAONEG3SE */
-
printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
error:
debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
DECLARE_GLOBAL_DATA_PTR;
static void
-unimplemented ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+unimplemented ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
printf ("Sorry, but the '%s' command has not been implemented\n",
cmdtp->name);
}
int
-do_siuinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_siuinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
}
int
-do_memcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_memcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
}
int
-do_sitinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_sitinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unimplemented (cmdtp, flag, argc, argv);
return 0;
#ifdef CONFIG_8260
int
-do_icinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_icinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unimplemented (cmdtp, flag, argc, argv);
return 0;
#endif
int
-do_carinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_carinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
#endif
int
-do_iopinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_iopinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
* use *uint and set the address based on cmd + port
*/
int
-do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
uint rcode = 0;
iopin_t iopin;
}
int
-do_dmainfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_dmainfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unimplemented (cmdtp, flag, argc, argv);
return 0;
}
int
-do_fccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_fccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unimplemented (cmdtp, flag, argc, argv);
return 0;
}
int
-do_brginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_brginfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
}
int
-do_i2cinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_i2cinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
}
int
-do_sccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_sccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unimplemented (cmdtp, flag, argc, argv);
return 0;
}
int
-do_smcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_smcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unimplemented (cmdtp, flag, argc, argv);
return 0;
}
int
-do_spiinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_spiinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unimplemented (cmdtp, flag, argc, argv);
return 0;
}
int
-do_muxinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_muxinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unimplemented (cmdtp, flag, argc, argv);
return 0;
}
int
-do_siinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_siinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unimplemented (cmdtp, flag, argc, argv);
return 0;
}
int
-do_mccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_mccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unimplemented (cmdtp, flag, argc, argv);
return 0;
#include <config.h>
#include <command.h>
-int do_interrupts(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_interrupts(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc != 2) {
);
/* Implemented in $(CPU)/interrupts.c */
-int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
U_BOOT_CMD(
irqinfo, 1, 1, do_irqinfo,
}
/* command line interface to the shell test */
-int do_itest ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] )
+int do_itest ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] )
{
int value, w;
* @param argv arguments list
* @return 0 on success, 1 otherwise
*/
-int do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *fsname;
char *filename;
* @param argv arguments list
* @return 0 on success, 1 otherwise
*/
-int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename = "/";
int ret;
* @param argv arguments list
* @return 0 on success, 1 otherwise
*/
-int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
struct part_info *part;
char *fsname;
#include <malloc.h>
#include <license.h>
-int do_license(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_license(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *tok, *dst = malloc(LICENSE_MAX);
unsigned long len = LICENSE_MAX;
/* -------------------------------------------------------------------- */
#if defined(CONFIG_CMD_LOADS)
-int do_load_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_load_serial (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
long offset = 0;
ulong addr;
#if defined(CONFIG_CMD_SAVES)
-int do_save_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_save_serial (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong offset = 0;
ulong size = 0;
char his_pad_char; /* pad chars he needs */
char his_quote; /* quote chars he'll use */
-int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong offset = 0;
ulong addr;
/* -------------------------------------------------------------------- */
#if defined(CONFIG_CMD_HWFLOW)
-int do_hwflow (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_hwflow (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
extern int hwflow_onoff(int);
* Return: None
*
*/
-int do_log (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_log (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *s;
unsigned long i, start, size;
#include <common.h>
#include <command.h>
-extern int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
U_BOOT_CMD(
mac, 3, 1, do_mac,
#define PRINTF(fmt,args...)
#endif
-static int mod_mem(cmd_tbl_t *, int, int, int, char *[]);
+static int mod_mem(cmd_tbl_t *, int, int, int, char * const []);
/* Display values from last command.
* Memory modify remembered values are different from display memory.
* md{.b, .w, .l} {addr} {len}
*/
#define DISP_LINE_LEN 16
-int do_mem_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mem_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr, length;
#if defined(CONFIG_HAS_DATAFLASH)
return (rc);
}
-int do_mem_mm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mem_mm ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
return mod_mem (cmdtp, 1, flag, argc, argv);
}
-int do_mem_nm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mem_nm ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
return mod_mem (cmdtp, 0, flag, argc, argv);
}
-int do_mem_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mem_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr, writeval, count;
int size;
}
#ifdef CONFIG_MX_CYCLIC
-int do_mem_mdc ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mem_mdc ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i;
ulong count;
return 0;
}
-int do_mem_mwc ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mem_mwc ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i;
ulong count;
}
#endif /* CONFIG_MX_CYCLIC */
-int do_mem_cmp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mem_cmp (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr1, addr2, count, ngood;
int size;
return rcode;
}
-int do_mem_cp ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mem_cp ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr, dest, count;
int size;
return 0;
}
-int do_mem_base (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mem_base (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc > 1) {
/* Set new base address.
return 0;
}
-int do_mem_loop (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mem_loop (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr, length, i, junk;
int size;
}
#ifdef CONFIG_LOOPW
-int do_mem_loopw (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mem_loopw (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr, length, i, data;
int size;
* configured using CONFIG_SYS_ALT_MEMTEST. The complete test loops until
* interrupted by ctrl-c or by a failure of one of the sub-tests.
*/
-int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
vu_long *addr, *start, *end;
ulong val;
* nm{.b, .w, .l} {addr}
*/
static int
-mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
+mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
{
ulong addr, i;
int nbytes, size;
#ifndef CONFIG_CRC32_VERIFY
-int do_mem_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mem_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr, length;
ulong crc;
#else /* CONFIG_CRC32_VERIFY */
-int do_mem_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mem_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr, length;
ulong crc;
ulong vcrc;
int verify;
int ac;
- char **av;
+ char * const *av;
if (argc < 3) {
usage:
#endif /* CONFIG_CRC32_VERIFY */
#ifdef CONFIG_CMD_MD5SUM
-int do_md5sum(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_md5sum(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned long addr, len;
unsigned int i;
#endif
#ifdef CONFIG_CMD_SHA1
-int do_sha1sum(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_sha1sum(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned long addr, len;
unsigned int i;
#endif
#ifdef CONFIG_CMD_UNZIP
-int do_unzip ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_unzip ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned long src, dst;
unsigned long src_len = ~0UL, dst_len = ~0UL;
#include <command.h>
#include <asm/asm.h>
-int do_frd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_frd (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned int fslnum;
unsigned int num;
return 0;
}
-int do_fwr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_fwr (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned int fslnum;
unsigned int num;
}
-int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
unsigned int reg = 0;
unsigned int val = 0;
#include <mg_disk.h>
-int do_mg_disk_cmd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mg_disk_cmd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u32 from, to, size;
}
/* ---------------------------------------------------------------- */
-int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
char op[2];
unsigned char addrlo, addrhi, reglo, reghi;
#include <common.h>
#include <command.h>
-int do_sleep (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_sleep (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong start = get_timer(0);
ulong delay;
#ifndef CONFIG_GENERIC_MMC
static int curr_device = -1;
-int do_mmc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mmc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int dev;
printf("Bus Width: %d-bit\n", mmc->bus_width);
}
-int do_mmcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mmcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
struct mmc *mmc;
int dev_num;
""
);
-int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int rc = 0;
#include <command.h>
int
-cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned long cpuid;
* @param argv arguments list
* @return 0 on success, 1 otherwise
*/
-int do_chpart(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_chpart(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
/* command line only */
struct mtd_device *dev;
* @param argv arguments list
* @return 0 on success, 1 otherwise
*/
-int do_mtdparts(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_mtdparts(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc == 2) {
if (strcmp(argv[1], "default") == 0) {
}
static int
-arg_off_size(int argc, char *argv[], nand_info_t *nand, ulong *off, size_t *size)
+arg_off_size(int argc, char * const argv[], nand_info_t *nand, ulong *off, size_t *size)
{
int idx = nand_curr_device;
#if defined(CONFIG_CMD_MTDPARTS)
nand->name, nand->erasesize >> 10);
}
-int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int i, dev, ret = 0;
ulong addr, off;
return 0;
}
-int do_nandboot(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_nandboot(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
char *boot_device = NULL;
int idx;
#include <command.h>
#include <net.h>
-extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
+extern int do_bootm (cmd_tbl_t *, int, int, char * const []);
-static int netboot_common (proto_t, cmd_tbl_t *, int , char *[]);
+static int netboot_common (proto_t, cmd_tbl_t *, int , char * const []);
-int do_bootp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bootp (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
return netboot_common (BOOTP, cmdtp, argc, argv);
}
"[loadAddress] [[hostIPaddr:]bootfilename]"
);
-int do_tftpb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_tftpb (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
return netboot_common (TFTP, cmdtp, argc, argv);
}
"[loadAddress] [[hostIPaddr:]bootfilename]"
);
-int do_rarpb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_rarpb (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
return netboot_common (RARP, cmdtp, argc, argv);
}
);
#if defined(CONFIG_CMD_DHCP)
-int do_dhcp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_dhcp (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
return netboot_common(DHCP, cmdtp, argc, argv);
}
#endif
#if defined(CONFIG_CMD_NFS)
-int do_nfs (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_nfs (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
return netboot_common(NFS, cmdtp, argc, argv);
}
}
static int
-netboot_common (proto_t proto, cmd_tbl_t *cmdtp, int argc, char *argv[])
+netboot_common (proto_t proto, cmd_tbl_t *cmdtp, int argc, char * const argv[])
{
char *s;
char *end;
}
#if defined(CONFIG_CMD_PING)
-int do_ping (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ping (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc < 2)
return -1;
}
-int do_cdp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_cdp (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int r;
#endif
#if defined(CONFIG_CMD_SNTP)
-int do_sntp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_sntp (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *toff;
#endif
#if defined(CONFIG_CMD_DNS)
-int do_dns(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_dns(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc == 1) {
cmd_usage(cmdtp);
return i;
}
-int do_printenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_printenv (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i;
int rcode = 0;
* This function will ONLY work with a in-RAM copy of the environment
*/
-int _do_setenv (int flag, int argc, char *argv[])
+int _do_setenv (int flag, int argc, char * const argv[])
{
int i, len, oldval;
int console = -1;
return 0;
}
#endif
-
-#ifdef CONFIG_AMIGAONEG3SE
- if (strcmp(argv[1], "vga_fg_color") == 0 ||
- strcmp(argv[1], "vga_bg_color") == 0 ) {
- extern void video_set_color(unsigned char attr);
- extern unsigned char video_get_attr(void);
-
- video_set_color(video_get_attr());
- return 0;
- }
-#endif /* CONFIG_AMIGAONEG3SE */
-
return 0;
}
int setenv (char *varname, char *varvalue)
{
- char *argv[4] = { "setenv", varname, varvalue, NULL };
+ char * const argv[4] = { "setenv", varname, varvalue, NULL };
if ((varvalue == NULL) || (varvalue[0] == '\0'))
return _do_setenv (0, 2, argv);
else
#ifdef CONFIG_HAS_UID
void forceenv (char *varname, char *varvalue)
{
- char *argv[4] = { "forceenv", varname, varvalue, NULL };
+ char * const argv[4] = { "forceenv", varname, varvalue, NULL };
_do_setenv (0xdeaf4add, 3, argv);
}
#endif
-int do_setenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_setenv (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc < 2) {
cmd_usage(cmdtp);
*/
#if defined(CONFIG_CMD_ASKENV)
-int do_askenv ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_askenv ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
extern char console_buffer[CONFIG_SYS_CBSIZE];
char message[CONFIG_SYS_CBSIZE];
* Interactively edit an environment variable
*/
#if defined(CONFIG_CMD_EDITENV)
-int do_editenv(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_editenv(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char buffer[CONFIG_SYS_CBSIZE];
char *init_val;
#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
-int do_saveenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_saveenv (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
extern char * env_name_spec;
#endif
#if defined(CONFIG_CMD_RUN)
-int do_run (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_run (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
U_BOOT_CMD(
run, CONFIG_SYS_MAXARGS, 1, do_run,
"run commands in an environment variable",
return (*p != '\0' && *endptr == '\0') ? 1 : 0;
}
-static int arg_off_size(int argc, char *argv[], ulong *off, size_t *size)
+static int arg_off_size(int argc, char * const argv[], ulong *off, size_t *size)
{
if (argc >= 1) {
if (!(str2long(argv[0], off))) {
return 0;
}
-static int do_onenand_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_onenand_info(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
printf("%s\n", mtd->name);
return 0;
}
-static int do_onenand_bad(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_onenand_bad(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong ofs;
return 0;
}
-static int do_onenand_read(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_onenand_read(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
char *s;
int oob = 0;
return ret == 0 ? 0 : 1;
}
-static int do_onenand_write(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_onenand_write(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong addr, ofs;
size_t len;
return ret == 0 ? 0 : 1;
}
-static int do_onenand_erase(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_onenand_erase(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong ofs;
int ret = 0;
return ret == 0 ? 0 : 1;
}
-static int do_onenand_test(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_onenand_test(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong ofs;
int ret = 0;
return ret == 0 ? 0 : 1;
}
-static int do_onenand_dump(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_onenand_dump(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong ofs;
int ret = 0;
return ret == 0 ? 1 : 0;
}
-static int do_onenand_markbad(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_onenand_markbad(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int ret = 0;
ulong addr;
U_BOOT_CMD_MKENT(markbad, CONFIG_SYS_MAXARGS, 0, do_onenand_markbad, "", ""),
};
-static int do_onenand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_onenand(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
cmd_tbl_t *c;
bfrom_OtpCommand(OTP_INIT, write ? timing : timing & ~(-1 << 15));
}
-int do_otp(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_otp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
uint32_t ret, base_flags;
bool prompt_user, force_read;
* pci modify[.b, .w, .l] bus.device.function [addr]
* pci write[.b, .w, .l] bus.device.function addr value
*/
-int do_pci (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_pci (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr = 0, value = 0, size = 0;
pci_dev_t bdf = 0;
extern int pcmcia_on (void);
extern int pcmcia_off (void);
-int do_pinit (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_pinit (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int rcode = 0;
static uint out_last_addr, out_last_size, out_last_value;
-int do_portio_out (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_portio_out (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
uint addr = out_last_addr;
uint size = out_last_size;
"[.b, .w, .l] port value\n - output to IO port"
);
-int do_portio_in (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_portio_in (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
uint addr = in_last_addr;
uint size = in_last_size;
extern void mpc86xx_reginfo(void);
#endif
-int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
#if defined(CONFIG_8xx)
volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
#define PRINTF(fmt,args...)
#endif
-int do_reiserls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reiserls (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename = "/";
int dev=0;
/******************************************************************************
* Reiserfs boot command intepreter. Derived from diskboot
*/
-int do_reiserload (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reiserload (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename = NULL;
char *ep;
return (dev < CONFIG_SYS_SATA_MAX_DEVICE) ? &sata_dev_desc[dev] : NULL;
}
-int do_sata(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_sata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int rc = 0;
/******************************************************************************
* scsi boot command intepreter. Derived from diskboot
*/
-int do_scsiboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_scsiboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *boot_device = NULL;
char *ep;
/*********************************************************************************
* scsi command intepreter
*/
-int do_scsi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_scsi (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
switch (argc) {
case 0:
{
ulong *p;
- /*
+ /*
* if the parameter starts with a '*' then assume
* it is a pointer to the value we want
*/
}
}
-int do_setexpr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_setexpr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong a, b;
char buf[16];
static struct spi_flash *flash;
-static int do_spi_flash_probe(int argc, char *argv[])
+static int do_spi_flash_probe(int argc, char * const argv[])
{
unsigned int bus = 0;
unsigned int cs;
return 1;
}
-static int do_spi_flash_read_write(int argc, char *argv[])
+static int do_spi_flash_read_write(int argc, char * const argv[])
{
unsigned long addr;
unsigned long offset;
return 1;
}
-static int do_spi_flash_erase(int argc, char *argv[])
+static int do_spi_flash_erase(int argc, char * const argv[])
{
unsigned long offset;
unsigned long len;
return 1;
}
-static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
const char *cmd;
/**************************************************/
#if defined(CONFIG_CMD_SOURCE)
int
-do_source (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_source (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr;
int rcode;
* The command prints out the hexadecimal string received via SPI.
*/
-int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
struct spi_slave *slave;
char *cp = 0;
#include <asm/blackfin.h>
#include <asm/mach-common/bits/bootrom.h>
-int do_spibootldr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_spibootldr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
s32 addr;
static char *start_addr, *last_addr;
-int do_strings(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_strings(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc == 1) {
cmd_usage(cmdtp);
#include <stdio_dev.h>
#include <serial.h>
-int do_terminal(cmd_tbl_t * cmd, int flag, int argc, char *argv[])
+int do_terminal(cmd_tbl_t * cmd, int flag, int argc, char * const argv[])
{
int last_tilde = 0;
struct stdio_dev *dev = NULL;
#include <common.h>
#include <command.h>
-int do_test(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- char **ap;
+ char * const *ap;
int left, adv, expr, last_expr, neg, last_cmp;
/* args? */
"[args..]"
);
-int do_false(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_false(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
return 1;
}
NULL
);
-int do_true(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_true(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
return 0;
}
/*
* Tundra Tsi148 configuration
*/
-int do_tsi148(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_tsi148(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr1 = 0, addr2 = 0, size = 0, vam = 0, vdw = 0;
char cmd = 'x';
return 0;
}
-static int do_ubi(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_ubi(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
size_t size = 0;
ulong addr = 0;
int ubifs_ls(char *dir_name);
int ubifs_load(char *filename, u32 addr, u32 size);
-int do_ubifs_mount(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ubifs_mount(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *vol_name;
int ret;
return 0;
}
-int do_ubifs_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ubifs_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename = "/";
int ret;
return ret;
}
-int do_ubifs_load(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ubifs_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename;
char *endp;
/*
* Tundra Universe configuration
*/
-int do_universe(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_universe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr1 = 0, addr2 = 0, size = 0, vam = 0, pms = 0, vdw = 0;
char cmd = 'x';
* usb boot command intepreter. Derived from diskboot
*/
#ifdef CONFIG_USB_STORAGE
-int do_usbboot(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_usbboot(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *boot_device = NULL;
char *ep;
/******************************************************************************
* usb command intepreter
*/
-int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i;
extern char version_string[];
-int do_version(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_version(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
printf("\n%s\n", version_string);
int trab_vfd (ulong bitmap);
-int do_vfd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_vfd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong bitmap;
#endif
int
-do_imgextract(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+do_imgextract(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
ulong addr = load_addr;
ulong dest = 0;
extern int yaffs_DumpDevStruct(const char *path);
-int do_ymount (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ymount (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *mtpoint = argv[1];
cmd_yaffs_mount(mtpoint);
return(0);
}
-int do_yumount (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_yumount (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *mtpoint = argv[1];
cmd_yaffs_umount(mtpoint);
return(0);
}
-int do_yls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_yls (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *dirname = argv[argc-1];
return(0);
}
-int do_yrd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_yrd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename = argv[1];
printf ("Reading file %s ", filename);
return(0);
}
-int do_ywr (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ywr (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename = argv[1];
ulong value = simple_strtoul(argv[2], NULL, 16);
return(0);
}
-int do_yrdm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_yrdm (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename = argv[1];
ulong addr = simple_strtoul(argv[2], NULL, 16);
return(0);
}
-int do_ywrm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ywrm (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename = argv[1];
ulong addr = simple_strtoul(argv[2], NULL, 16);
return(0);
}
-int do_ymkdir (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ymkdir (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *dirname = argv[1];
return(0);
}
-int do_yrmdir (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_yrmdir (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *dirname = argv[1];
return(0);
}
-int do_yrm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_yrm (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *path = argv[1];
return(0);
}
-int do_ymv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ymv (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *oldPath = argv[1];
char *newPath = argv[2];
return(0);
}
-int do_ydump (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ydump (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *dirname = argv[1];
if (yaffs_DumpDevStruct(dirname) != 0)
*/
int _do_help (cmd_tbl_t *cmd_start, int cmd_items, cmd_tbl_t * cmdtp, int
- flag, int argc, char *argv[])
+ flag, int argc, char * const argv[])
{
int i;
int rcode = 0;
#ifdef CONFIG_AUTO_COMPLETE
-int var_complete(int argc, char *argv[], char last_char, int maxv, char *cmdv[])
+int var_complete(int argc, char * const argv[], char last_char, int maxv, char *cmdv[])
{
static char tmp_buf[512];
int space;
}
static void install_auto_complete_handler(const char *cmd,
- int (*complete)(int argc, char *argv[], char last_char, int maxv, char *cmdv[]))
+ int (*complete)(int argc, char * const argv[], char last_char, int maxv, char *cmdv[]))
{
cmd_tbl_t *cmdtp;
/*************************************************************************************/
-static int complete_cmdv(int argc, char *argv[], char last_char, int maxv, char *cmdv[])
+static int complete_cmdv(int argc, char * const argv[], char last_char, int maxv, char *cmdv[])
{
cmd_tbl_t *cmdtp;
const char *p;
return argc;
}
-static void print_argv(const char *banner, const char *leader, const char *sep, int linemax, char *argv[])
+static void print_argv(const char *banner, const char *leader, const char *sep, int linemax, char * const argv[])
{
int ll = leader != NULL ? strlen(leader) : 0;
int sl = sep != NULL ? strlen(sep) : 0;
printf("\n");
}
-static int find_common_prefix(char *argv[])
+static int find_common_prefix(char * const argv[])
{
int i, len;
char *anchor, *s, *t;
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_AMIGAONEG3SE
-int console_changed = 0;
-#endif
-
#ifdef CONFIG_SYS_CONSOLE_IS_IN_ENV
/*
* if overwrite_console returns 1, the stdin, stderr and stdout
/** U-Boot INITIAL CONSOLE-NOT COMPATIBLE FUNCTIONS *************************/
-void serial_printf(const char *fmt, ...)
+int serial_printf(const char *fmt, ...)
{
va_list args;
uint i;
va_end(args);
serial_puts(printbuffer);
+ return i;
}
int fgetc(int file)
console_puts(file, s);
}
-void fprintf(int file, const char *fmt, ...)
+int fprintf(int file, const char *fmt, ...)
{
va_list args;
uint i;
/* Send to desired file */
fputs(file, printbuffer);
+ return i;
}
/** U-Boot INITIAL CONSOLE-COMPATIBLE FUNCTION *****************************/
}
}
-void printf(const char *fmt, ...)
+int printf(const char *fmt, ...)
{
va_list args;
uint i;
/* Print the string */
puts(printbuffer);
+ return i;
}
-void vprintf(const char *fmt, va_list args)
+int vprintf(const char *fmt, va_list args)
{
uint i;
char printbuffer[CONFIG_SYS_PBSIZE];
/* Print the string */
puts(printbuffer);
+ return i;
}
/* test if ctrl-c was pressed */
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_AMIGAONEG3SE
- extern void enable_nvram(void);
- extern void disable_nvram(void);
-#endif
-
#undef DEBUG_ENV
#ifdef DEBUG_ENV
#define DEBUGF(fmt,args...) printf(fmt ,##args)
return (c);
}
-#ifdef CONFIG_AMIGAONEG3SE
-uchar env_get_char_memory (int index)
-{
- uchar retval;
- enable_nvram();
- if (gd->env_valid) {
- retval = ( *((uchar *)(gd->env_addr + index)) );
- } else {
- retval = ( default_environment[index] );
- }
- disable_nvram();
- return retval;
-}
-#else
uchar env_get_char_memory (int index)
{
if (gd->env_valid) {
return ( default_environment[index] );
}
}
-#endif
uchar env_get_char (int index)
{
gd->reloc_off);
#endif
-#ifdef CONFIG_AMIGAONEG3SE
- enable_nvram();
-#endif
-
#ifdef ENV_IS_EMBEDDED
/*
* The environment buffer is embedded with the text segment,
env_relocate_spec ();
}
gd->env_addr = (ulong)&(env_ptr->data);
-
-#ifdef CONFIG_AMIGAONEG3SE
- disable_nvram();
-#endif
}
#ifdef CONFIG_AUTO_COMPLETE
#include <i2c.h>
#endif
-#ifdef CONFIG_ENV_OFFSET_REDUND
-#define ACTIVE_FLAG 1
-#define OBSOLETE_FLAG 0
-#endif
-
DECLARE_GLOBAL_DATA_PTR;
env_t *env_ptr = NULL;
#error CONFIG_ENV_SIZE_REDUND should not be less then CONFIG_ENV_SIZE
#endif
-#ifdef CONFIG_INFERNO
-# ifdef CONFIG_ENV_ADDR_REDUND
-#error CONFIG_ENV_ADDR_REDUND is not implemented for CONFIG_INFERNO
-# endif
-#endif
-
char * env_name_spec = "Flash";
#ifdef ENV_IS_EMBEDDED
/* CONFIG_ENV_ADDR is supposed to be on sector boundary */
static ulong end_addr = CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1;
static ulong end_addr_new = CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1;
-
-#define ACTIVE_FLAG 1
-#define OBSOLETE_FLAG 0
#endif /* CONFIG_ENV_ADDR_REDUND */
extern uchar default_environment[];
len = CONFIG_ENV_SIZE;
#endif /* CONFIG_ENV_SECT_SIZE */
-#ifndef CONFIG_INFERNO
end_addr = flash_sect_addr + len - 1;
-#else
- /* this is the last sector, and the size is hardcoded here */
- /* otherwise we will get stack problems on loading 128 KB environment */
- end_addr = flash_sect_addr + 0x20000 - 1;
-#endif
debug ("Protect off %08lX ... %08lX\n",
(ulong)flash_sect_addr, end_addr);
#error CONFIG_ENV_SIZE_REDUND should be the same as CONFIG_ENV_SIZE
#endif
-#ifdef CONFIG_INFERNO
-#error CONFIG_INFERNO not supported yet
-#endif
-
#ifndef CONFIG_ENV_RANGE
#define CONFIG_ENV_RANGE CONFIG_ENV_SIZE
#endif
extern uchar default_environment[];
-#ifdef CONFIG_AMIGAONEG3SE
-uchar env_get_char_spec (int index)
-{
-#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE
- uchar c;
-
- nvram_read(&c, CONFIG_ENV_ADDR+index, 1);
-
- return c;
-#else
- uchar retval;
- enable_nvram();
- retval = *((uchar *)(gd->env_addr + index));
- disable_nvram();
- return retval;
-#endif
-}
-#else
uchar env_get_char_spec (int index)
{
#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE
return *((uchar *)(gd->env_addr + index));
#endif
}
-#endif
void env_relocate_spec (void)
{
int saveenv (void)
{
int rcode = 0;
-#ifdef CONFIG_AMIGAONEG3SE
- enable_nvram();
-#endif
#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE
nvram_write(CONFIG_ENV_ADDR, env_ptr, CONFIG_ENV_SIZE);
#else
if (memcpy ((char *)CONFIG_ENV_ADDR, env_ptr, CONFIG_ENV_SIZE) == NULL)
rcode = 1 ;
-#endif
-#ifdef CONFIG_AMIGAONEG3SE
- udelay(10000);
- disable_nvram();
#endif
return rcode;
}
*/
int env_init (void)
{
-#ifdef CONFIG_AMIGAONEG3SE
- enable_nvram();
-#endif
#if defined(CONFIG_SYS_NVRAM_ACCESS_ROUTINE)
ulong crc;
uchar data[ENV_SIZE];
gd->env_addr = (ulong)&default_environment[0];
gd->env_valid = 0;
}
-#ifdef CONFIG_AMIGAONEG3SE
- disable_nvram();
-#endif
return (0);
}
# define CONFIG_ENV_SPI_MODE SPI_MODE_3
#endif
+#ifdef CONFIG_ENV_OFFSET_REDUND
+static ulong env_offset = CONFIG_ENV_OFFSET;
+static ulong env_new_offset = CONFIG_ENV_OFFSET_REDUND;
+
+#define ACTIVE_FLAG 1
+#define OBSOLETE_FLAG 0
+#endif /* CONFIG_ENV_ADDR_REDUND */
+
DECLARE_GLOBAL_DATA_PTR;
/* references to names in env_common.c */
return *((uchar *)(gd->env_addr + index));
}
+#if defined(CONFIG_ENV_OFFSET_REDUND)
+void swap_env(void)
+{
+ ulong tmp_offset = env_offset;
+
+ env_offset = env_new_offset;
+ env_new_offset = tmp_offset;
+}
+
+int saveenv(void)
+{
+ u32 saved_size, saved_offset;
+ char *saved_buffer = NULL;
+ u32 sector = 1;
+ int ret;
+ char flag = OBSOLETE_FLAG, new_flag = ACTIVE_FLAG;
+
+ if (!env_flash) {
+ puts("Environment SPI flash not initialized\n");
+ return 1;
+ }
+
+ /* Is the sector larger than the env (i.e. embedded) */
+ if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
+ saved_size = CONFIG_ENV_SECT_SIZE - CONFIG_ENV_SIZE;
+ saved_offset = env_new_offset + CONFIG_ENV_SIZE;
+ saved_buffer = malloc(saved_size);
+ if (!saved_buffer) {
+ ret = 1;
+ goto done;
+ }
+ ret = spi_flash_read(env_flash, saved_offset,
+ saved_size, saved_buffer);
+ if (ret)
+ goto done;
+ }
+
+ if (CONFIG_ENV_SIZE > CONFIG_ENV_SECT_SIZE) {
+ sector = CONFIG_ENV_SIZE / CONFIG_ENV_SECT_SIZE;
+ if (CONFIG_ENV_SIZE % CONFIG_ENV_SECT_SIZE)
+ sector++;
+ }
+
+ puts("Erasing SPI flash...");
+ ret = spi_flash_erase(env_flash, env_new_offset,
+ sector * CONFIG_ENV_SECT_SIZE);
+ if (ret)
+ goto done;
+
+ puts("Writing to SPI flash...");
+ ret = spi_flash_write(env_flash,
+ env_new_offset + offsetof(env_t, data),
+ sizeof(env_ptr->data), env_ptr->data);
+ if (ret)
+ goto done;
+
+ ret = spi_flash_write(env_flash,
+ env_new_offset + offsetof(env_t, crc),
+ sizeof(env_ptr->crc), &env_ptr->crc);
+ if (ret)
+ goto done;
+
+ ret = spi_flash_write(env_flash,
+ env_offset + offsetof(env_t, flags),
+ sizeof(env_ptr->flags), &flag);
+ if (ret)
+ goto done;
+
+ ret = spi_flash_write(env_flash,
+ env_new_offset + offsetof(env_t, flags),
+ sizeof(env_ptr->flags), &new_flag);
+ if (ret)
+ goto done;
+
+ if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
+ ret = spi_flash_write(env_flash, saved_offset,
+ saved_size, saved_buffer);
+ if (ret)
+ goto done;
+ }
+
+ swap_env();
+
+ ret = 0;
+ puts("done\n");
+
+ done:
+ if (saved_buffer)
+ free(saved_buffer);
+ return ret;
+}
+
+void env_relocate_spec(void)
+{
+ int ret;
+ int crc1_ok = 0, crc2_ok = 0;
+ env_t *tmp_env1 = NULL;
+ env_t *tmp_env2 = NULL;
+ uchar flag1, flag2;
+ /* current_env is set only in case both areas are valid! */
+ int current_env = 0;
+
+ tmp_env1 = (env_t *)malloc(CONFIG_ENV_SIZE);
+ if (!tmp_env1) {
+ puts("*** Warning: could not init environment,"
+ " using defaults\n\n");
+ goto out;
+ }
+
+ tmp_env2 = (env_t *)malloc(CONFIG_ENV_SIZE);
+ if (!tmp_env2) {
+ puts("*** Warning: could not init environment,"
+ " using defaults\n\n");
+ goto out;
+ }
+
+ env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
+ CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
+ if (!env_flash)
+ goto err_probe;
+
+ ret = spi_flash_read(env_flash, CONFIG_ENV_OFFSET,
+ CONFIG_ENV_SIZE, tmp_env1);
+ if (ret)
+ goto err_read;
+
+ if (crc32(0, tmp_env1->data, ENV_SIZE) == tmp_env1->crc)
+ crc1_ok = 1;
+ flag1 = tmp_env1->flags;
+
+ ret = spi_flash_read(env_flash, CONFIG_ENV_OFFSET_REDUND,
+ CONFIG_ENV_SIZE, tmp_env2);
+ if (!ret) {
+ if (crc32(0, tmp_env2->data, ENV_SIZE) == tmp_env2->crc)
+ crc2_ok = 1;
+ flag2 = tmp_env2->flags;
+ }
+
+ if (!crc1_ok && !crc2_ok)
+ goto err_crc;
+ else if (crc1_ok && !crc2_ok) {
+ gd->env_valid = 1;
+ memcpy(env_ptr, tmp_env1, CONFIG_ENV_SIZE);
+ } else if (!crc1_ok && crc2_ok) {
+ gd->env_valid = 1;
+ memcpy(env_ptr, tmp_env2, CONFIG_ENV_SIZE);
+ swap_env();
+ } else if (flag1 == ACTIVE_FLAG && flag2 == OBSOLETE_FLAG) {
+ gd->env_valid = 1;
+ memcpy(env_ptr, tmp_env1, CONFIG_ENV_SIZE);
+ } else if (flag1 == OBSOLETE_FLAG && flag2 == ACTIVE_FLAG) {
+ gd->env_valid = 1;
+ memcpy(env_ptr, tmp_env2, CONFIG_ENV_SIZE);
+ swap_env();
+ } else if (flag1 == flag2) {
+ gd->env_valid = 2;
+ memcpy(env_ptr, tmp_env1, CONFIG_ENV_SIZE);
+ current_env = 1;
+ } else if (flag1 == 0xFF) {
+ gd->env_valid = 2;
+ memcpy(env_ptr, tmp_env1, CONFIG_ENV_SIZE);
+ current_env = 1;
+ } else {
+ /*
+ * this differs from code in env_flash.c, but I think a sane
+ * default path is desirable.
+ */
+ gd->env_valid = 2;
+ memcpy(env_ptr, tmp_env2, CONFIG_ENV_SIZE);
+ swap_env();
+ current_env = 2;
+ }
+ if (current_env == 1) {
+ if (flag2 != OBSOLETE_FLAG) {
+ flag2 = OBSOLETE_FLAG;
+ spi_flash_write(env_flash,
+ env_new_offset + offsetof(env_t, flags),
+ sizeof(env_ptr->flags), &flag2);
+ }
+ if (flag1 != ACTIVE_FLAG) {
+ flag1 = ACTIVE_FLAG;
+ spi_flash_write(env_flash,
+ env_offset + offsetof(env_t, flags),
+ sizeof(env_ptr->flags), &flag1);
+ }
+ } else if (current_env == 2) {
+ if (flag1 != OBSOLETE_FLAG) {
+ flag1 = OBSOLETE_FLAG;
+ spi_flash_write(env_flash,
+ env_new_offset + offsetof(env_t, flags),
+ sizeof(env_ptr->flags), &flag1);
+ }
+ if (flag2 != ACTIVE_FLAG) {
+ flag2 = ACTIVE_FLAG;
+ spi_flash_write(env_flash,
+ env_offset + offsetof(env_t, flags),
+ sizeof(env_ptr->flags), &flag2);
+ }
+ }
+ if (gd->env_valid == 2) {
+ puts("*** Warning - some problems detected "
+ "reading environment; recovered successfully\n\n");
+ }
+ if (tmp_env1)
+ free(tmp_env1);
+ if (tmp_env2)
+ free(tmp_env2);
+ return;
+
+err_read:
+ spi_flash_free(env_flash);
+ env_flash = NULL;
+err_probe:
+err_crc:
+ puts("*** Warning - bad CRC, using default environment\n\n");
+out:
+ if (tmp_env1)
+ free(tmp_env1);
+ if (tmp_env2)
+ free(tmp_env2);
+ set_default_env();
+}
+#else
int saveenv(void)
{
u32 saved_size, saved_offset;
set_default_env();
}
+#endif
int env_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
-static void dummy(void)
+__attribute__((unused)) static void dummy(void)
{
}
{ 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
{ 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
{ 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
- { 0x0303, 4, 24, 0x97c, 0x03ab0abf }, /* SEC 3.3 */
+ { 0x0301, 4, 24, 0xbfe, 0x03ab0ebf }, /* SEC 3.1 */
+ { 0x0303, 4, 24, 0x97c, 0x03a30abf }, /* SEC 3.3 */
};
char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
sizeof("fsl,secX.Y")];
#include <hush.h>
#include <command.h> /* find_cmd */
/*cmd_boot.c*/
-extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* do_bootd */
+extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); /* do_bootd */
#endif
#ifndef __U_BOOT__
#include <ctype.h> /* isalpha, isdigit */
fflush(stdout);
i->p = the_command;
#else
- extern char console_buffer[CONFIG_SYS_CBSIZE];
+ extern char console_buffer[];
int n;
static char the_command[CONFIG_SYS_CBSIZE];
#ifdef CONFIG_BOOT_RETRY_TIME
# ifdef CONFIG_RESET_TO_RETRY
- extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+ extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
# else
# error "This currently only works with CONFIG_RESET_TO_RETRY enabled"
# endif
} else {
int rcode;
#if defined(CONFIG_CMD_BOOTD)
- extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+ extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
/* avoid "bootd" recursion */
if (cmdtp->cmd == do_bootd) {
tcsetpgrp(shell_terminal, shell_pgrp);
}
-int hush_main(int argc, char **argv)
+int hush_main(int argc, char * const *argv)
{
int opt;
FILE *input;
}
#ifdef __U_BOOT__
-int do_showvar (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_showvar (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i, k;
int rcode = 0;
* the License, or (at your option) any later version.
*/
+#ifndef HWCONFIG_TEST
#include <config.h>
#include <common.h>
#include <exports.h>
#include <hwconfig.h>
#include <linux/types.h>
#include <linux/string.h>
+#else
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <assert.h>
+#define min(a, b) (((a) < (b)) ? (a) : (b))
+#endif /* HWCONFIG_TEST */
static const char *hwconfig_parse(const char *opts, size_t maxlen,
- const char *opt, char stopch, char eqch,
+ const char *opt, char *stopchs, char eqch,
size_t *arglen)
{
size_t optlen = strlen(opt);
if (end - start > maxlen)
return NULL;
- if (str && (str == opts || str[-1] == stopch) &&
- (*end == stopch || *end == eqch || *end == '\0')) {
+ if (str && (str == opts || strpbrk(str - 1, stopchs) == str - 1) &&
+ (strpbrk(end, stopchs) == end || *end == eqch ||
+ *end == '\0')) {
const char *arg_end;
if (!arglen)
if (*end != eqch)
return NULL;
- arg_end = strchr(str, stopch);
+ arg_end = strpbrk(str, stopchs);
if (!arg_end)
*arglen = min(maxlen, strlen(str)) - optlen - 1;
else
if (env_hwconfig)
return hwconfig_parse(env_hwconfig, strlen(env_hwconfig),
- opt, ';', ':', arglen);
+ opt, ";", ':', arglen);
if (board_hwconfig)
return hwconfig_parse(board_hwconfig, strlen(board_hwconfig),
- opt, ';', ':', arglen);
+ opt, ";", ':', arglen);
if (cpu_hwconfig)
return hwconfig_parse(cpu_hwconfig, strlen(cpu_hwconfig),
- opt, ';', ':', arglen);
+ opt, ";", ':', arglen);
return NULL;
}
arg = __hwconfig(opt, &arglen);
if (!arg)
return 0;
- return !!hwconfig_parse(arg, arglen, subopt, ',', '=', NULL);
+ return !!hwconfig_parse(arg, arglen, subopt, ",;", '=', NULL);
}
/*
arg = __hwconfig(opt, &arglen);
if (!arg)
return NULL;
- return hwconfig_parse(arg, arglen, subopt, ',', '=', subarglen);
+ return hwconfig_parse(arg, arglen, subopt, ",;", '=', subarglen);
}
/*
return !strncmp(argstr, subarg, arglen);
}
+
+#ifdef HWCONFIG_TEST
+int main()
+{
+ const char *ret;
+ size_t len;
+
+ setenv("hwconfig", "key1:subkey1=value1,subkey2=value2;key2:value3;;;;"
+ "key3;:,:=;key4", 1);
+
+ ret = hwconfig_arg("key1", &len);
+ printf("%zd %.*s\n", len, (int)len, ret);
+ assert(len == 29);
+ assert(hwconfig_arg_cmp("key1", "subkey1=value1,subkey2=value2"));
+ assert(!strncmp(ret, "subkey1=value1,subkey2=value2", len));
+
+ ret = hwconfig_subarg("key1", "subkey1", &len);
+ printf("%zd %.*s\n", len, (int)len, ret);
+ assert(len == 6);
+ assert(hwconfig_subarg_cmp("key1", "subkey1", "value1"));
+ assert(!strncmp(ret, "value1", len));
+
+ ret = hwconfig_subarg("key1", "subkey2", &len);
+ printf("%zd %.*s\n", len, (int)len, ret);
+ assert(len == 6);
+ assert(hwconfig_subarg_cmp("key1", "subkey2", "value2"));
+ assert(!strncmp(ret, "value2", len));
+
+ ret = hwconfig_arg("key2", &len);
+ printf("%zd %.*s\n", len, (int)len, ret);
+ assert(len == 6);
+ assert(hwconfig_arg_cmp("key2", "value3"));
+ assert(!strncmp(ret, "value3", len));
+
+ assert(hwconfig("key3"));
+ assert(hwconfig_arg("key4", &len) == NULL);
+ assert(hwconfig_arg("bogus", &len) == NULL);
+
+ unsetenv("hwconfig");
+
+ assert(hwconfig(NULL) == 0);
+ assert(hwconfig("") == 0);
+ assert(hwconfig("key3") == 0);
+
+ return 0;
+}
+#endif /* HWCONFIG_TEST */
#endif
#ifdef CONFIG_CMD_BDI
-extern int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
#endif
DECLARE_GLOBAL_DATA_PTR;
{ IH_ARCH_MICROBLAZE, "microblaze", "MicroBlaze", },
{ IH_ARCH_MIPS, "mips", "MIPS", },
{ IH_ARCH_MIPS64, "mips64", "MIPS 64 Bit", },
- { IH_ARCH_NIOS, "nios", "NIOS", },
{ IH_ARCH_NIOS2, "nios2", "NIOS II", },
{ IH_ARCH_PPC, "powerpc", "PowerPC", },
{ IH_ARCH_PPC, "ppc", "PowerPC", },
* 1, if ramdisk image is found but corrupted, or invalid
* rd_start and rd_end are set to 0 if no ramdisk exists
*/
-int boot_get_ramdisk (int argc, char *argv[], bootm_headers_t *images,
+int boot_get_ramdisk (int argc, char * const argv[], bootm_headers_t *images,
uint8_t arch, ulong *rd_start, ulong *rd_end)
{
ulong rd_addr, rd_load;
* 1, if fdt image is found but corrupted
* of_flat_tree and of_size are set to 0 if no fdt exists
*/
-int boot_get_fdt (int flag, int argc, char *argv[], bootm_headers_t *images,
+int boot_get_fdt (int flag, int argc, char * const argv[], bootm_headers_t *images,
char **of_flat_tree, ulong *of_size)
{
const image_header_t *fdt_hdr;
}
int
-do_kgdb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+do_kgdb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
printf("Entering KGDB mode via exception handler...\n\n");
kgdb_breakpoint(argc - 1, argv + 1);
static int lcd_init (void *lcdbase);
-static int lcd_clear (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]);
+static int lcd_clear (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]);
static void *lcd_logo (void);
static int lcd_getbgcolor (void);
}
/*----------------------------------------------------------------------*/
-static int lcd_clear (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int lcd_clear (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
#if LCD_BPP == LCD_MONOCHROME
/* Setting the palette */
void show_boot_progress (int val) __attribute__((weak, alias("__show_boot_progress")));
#if defined(CONFIG_BOOT_RETRY_TIME) && defined(CONFIG_RESET_TO_RETRY)
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* for do_reset() prototype */
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); /* for do_reset() prototype */
#endif
-extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
#if defined(CONFIG_UPDATE_TFTP)
void update_tftp (void);
}
}
#endif /* CONFIG_MENUKEY */
-#endif /* CONFIG_BOOTDELAY */
-
-#ifdef CONFIG_AMIGAONEG3SE
- {
- extern void video_banner(void);
- video_banner();
- }
-#endif
+#endif /* CONFIG_BOOTDELAY */
/*
* Main Loop for Monitor Command Processing
/****************************************************************************/
#if defined(CONFIG_CMD_RUN)
-int do_run (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_run (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
int i;
CFLAGS += $(call cc-option,-fno-stack-protector)
-# avoid trigraph warnings while parsing pci.h (produced by NIOS gcc-2.9)
-# this option have to be placed behind -Wall -- that's why it is here
-ifeq ($(ARCH),nios)
-ifeq ($(findstring 2.9,$(shell $(CC) --version)),2.9)
-CFLAGS := $(CPPFLAGS) -Wall -Wno-trigraphs
-endif
-endif
-
# $(CPPFLAGS) sets -g, which causes gcc to pass a suitable -g<format>
# option to the assembler.
AFLAGS_DEBUG :=
+++ /dev/null
-
- SSV ADNP/ESC1 Embedded Softcore Computing
- Nios Softcore, Altera Cyclone FPGA
-
- Last Update: February 27, 2004
-====================================================================
-
-This file contains information regarding U-Boot and the SSV Embedded
-Nios Softcore Computing platform ADNP/ESC1. For general Nios
-information see doc/README.nios.
-
-Most stuff of this file was borrowed and based on README.dk1s10,
-the Altera DK-1S10 related information file.
-
-For those interested in contributing ... see HELP WANTED section
-in doc/README.nios.
-
-Contents:
-
- 1. Files
- 2. Memory Organization
- 3. CPU Variations
- 4. Examples
- 5. Programming U-Boot into FLASH with GERMS
- 6. Autoboot
- 7. U-Boot environment convention and update philosophy
-
-====================================================================
-
-1. Files
-=========
- board/ssv/adnpesc1/*
- include/configs/ADNPESC1.h
- include/configs/ADNPESC1_base_32.h
-
-
-2. Memory Organization
-=======================
-
-For the most part, you can put things pretty much anywhere.
-This is pretty flexible for Nios. So here we make some arbitrary
-choices & assume that the monitor is placed at the end of a memory
-resource. So you must make sure TEXT_BASE is chosen appropriately.
-This is very important if you plan to move your memory to another
-place as configured at this time!
-
- -The heap is placed below the monitor (U-Boot code).
- -Global data is placed below the heap.
- -The stack is placed below global data (&grows down).
-
-(see doc/README.adnpesc1_base32 too)
-
-
-3. CPU Variations
-=================
-
-There are more than one NIOS CPU variation for the ADNP/ESC1 possible.
-U-Boot supports the following CPU configurations:
-
- - SSV Basis 32 (make ADNPESC1_base_32_config)
- - SSV Basis 32 at DNP evaluation base board 2
- (make ADNPESC1_DNPEVA2_base_32_config)
-
-
-4. Examples
-============
-
-The hello_world example works fine. To try out you have to change
-the default load address from 0x0100_0000 to 0x0204_0000 in
-examples/Makefile (the real SDRAM for default board configuration).
-
-
-5. Programming U-Boot into FLASH with GERMS
-============================================
-
-The current version of the ADNP/ESC1 port with the default
-configuration settings occupies about 97 KBytes of flash.
-A minimal configuration occupies less than 70 KByte
-(network, SPI, POST and board command support disabled). You
-can save more memory by deactivating the Hu-Shell support and
-long command help (CONFIG_SYS_HUSH_PARSER, CONFIG_SYS_LONGHELP).
-
-To program U-Boot into the ADNP/ESC1 flash using GERMS do the
-following:
-
-1. Download U-Boot to its target run space in SDRAM:
-
- a. Close jumper RCM_EN# and push the reset button.
-
- b. From the command line, download U-Boot using the
- nios-run:
-
- $ nios-run -r u-boot.srec
-
- NOTE: In some cases this want fail. I don't know why,
- but try again.
-
-This takes about 1 minute (GERMS is not very speedy here).
-After u-boot is downloaded it will be executed. You should
-see the following:
-
- U-Boot 1.0.2 (Jan 30 2004 - 12:59:15)
-
- CPU: Nios-32 Rev. 3.3 (0x3038)
- Reg file size: 512 LO_LIMIT/HI_LIMIT: 1/30
- Board: SSV DilNetPC ADNP/ESC1
- Conf.: SSV Base 32 (nios_32)
- In: serial
- Out: serial
- Err: serial
- ADNPESC1 >
-
-
-2. Quit nios-run and start your terminal application (e.g. start
- Hyperterminal or minicom).
-
-3. Download the u-boot code to RAM. When using Hyperterminal, do the
- following:
-
- a. From the u-boot command prompt start a binary download to SDRAM:
-
- at the SSV Basis 32 to SDRAM:
-
- ==> loadb 2000100
-
- b. Download u-boot.bin using kermit.
-
-4. From the U-Boot command prompt, erase flash:
-
- at the SSV Basis 32 from 0x1000000 to 0x103ffff:
-
- ==> protect off 1:0-3
- ==> erase 1:0-3
-
-5. Copy the binary image from SDRAM to flash:
-
- at the SSV Basis 32 from SDRAM:
-
- ==> cp.b 2000100 1000000 $filesize
-
-U-Boot will now automatically start when the board is powered on or
-reset using the SSV Basis 32 configuration without closed RCM jumper.
-To start U-Boot with closed RCM Jumper, enter the following GERMS
-command:
-
- + g 1000000
-
-
-6. Autoboot
-===========
-
-U-Boot will try to boot a valid Nios application from Flash. For this
-it will use the deposited Hu-Shell script in environment variable
-'bootcmd' which is looking for a valid Nios application identifier
-string in Flash and go on at even its entry address. For more
-information see the next chapter.
-
-
-7. U-Boot environment convention and update philosophy
-======================================================
-
-U-Boot for the SSV ADNP/ESC1 target knows about many environment
-variables used to control the startup process, update process for
-raw Nios applications, and optionally file system image updates.
-In default configuration there are two Hu-Shell scripts to update
-the Nios application and/or the file system image:
-
-1. Update Nios application (ex. the uCLinux kernel):
-
- run 'appl_update'
-
-2. Update optional file system image (ex. RomFS image used by uCLinux):
-
- run 'fs_update'
-
-The Nios application can be any programm code generated in relation
-to the Nios application identifier -- the string "Nios" at offset
-address 0x0c. To use the scripts like described above in a secure way
-you have to check-up the next environment variables:
-
-1. update_allowed
-
- - Update switch -- must be set to '1' (one) to allow any update
- - default is '0' (zero)
-
- NOTE: You should avoid to save this variable with non zero
- value to Flash. Otherwise it would be allow any
- update process at any time!
-
-2. appl_entry_addr
-
- - Nios application area start address (usually in Flash)
- - this is the startup address for autoboot
- - each Nios application code we want to update will be copied
- to this address
- - default is CONFIG_SYS_ADNPESC1_NIOS_APPL_ENTRY
-
-3. appl_end_addr
-
- - Nios application area end address (usually in Flash)
- - will be used to unprotect/erase the Flash area while updating
- - default is CONFIG_SYS_ADNPESC1_NIOS_APPL_END
-
-4. appl_ident_addr
-
- - address of the Nios application identification string
- - this is the address checked-up by autoboot
- - default is CONFIG_SYS_ADNPESC1_NIOS_APPL_IDENT
-
-5. appl_ident_str
-
- - the Nios application identification string itself
- - default is CONFIG_SYS_ADNPESC1_NIOS_IDENTIFIER
-
-6. appl_name
-
- - name of file we have to download/update
- - default is ADNPESC1/base32/linux.bin
-
-7. fs_base_addr
-
- - optionally file system area start address (usually in Flash)
- - each file system we want to update will be copied to this address
- - default is CONFIG_SYS_ADNPESC1_FILESYSTEM_BASE
-
-8. fs_end_addr
-
- - optionally file system area end address (usually in Flash)
- - will be used to unprotect/erase the Flash area while updating
- - default is CONFIG_SYS_ADNPESC1_FILESYSTEM_END
-
-9. fs_name
-
- - name of file we have to download/update
- - default is ADNPESC1/base32/romfs.img
+++ /dev/null
-
-TODO: specify IDE i/f
-
-
-===============================================================================
- C P U , M E M O R Y , I N / O U T C O M P O N E N T S
-===============================================================================
-see also [1]-[5]
-
-CPU: "DNP_ESC1"
- 32 bit NIOS for 50 MHz
- 512 Byte for register file (30 levels)
- with out instruction cache
- with out data cache
- 2 KByte On Chip ROM with GERMS boot monitor
- with out On Chip RAM
- MSTEP multiplier
- no Debug Core
- no On Chip Instrumentation (OCI)
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_CLK = 50000000
- CONFIG_SYS_NIOS_CPU_ICACHE = (not present)
- CONFIG_SYS_NIOS_CPU_DCACHE = (not present)
- CONFIG_SYS_NIOS_CPU_REG_NUMS = 512
- CONFIG_SYS_NIOS_CPU_MUL = 0
- CONFIG_SYS_NIOS_CPU_MSTEP = 1
- CONFIG_SYS_NIOS_CPU_DBG_CORE = 0
-
-IRQ: Nr. | used by
- ------+--------------------------------------------------------
- 16 | TIMER0 | CONFIG_SYS_NIOS_CPU_TIMER0_IRQ = 16
- 17 | UART0 | CONFIG_SYS_NIOS_CPU_UART0_IRQ = 17
- 18 | UART1 | CONFIG_SYS_NIOS_CPU_UART1_IRQ = 18
- 20 | LAN91C111 | CONFIG_SYS_NIOS_CPU_LAN0_IRQ =
- | PIO6 | CONFIG_SYS_NIOS_CPU_PIO6_IRQ = 20
- 25 | SPI0 | CONFIG_SYS_NIOS_CPU_SPI0_IRQ = 25
- 31 | PIO7 | CONFIG_SYS_NIOS_CPU_PIO7_IRQ = 31
- 32 | PIO8 | CONFIG_SYS_NIOS_CPU_PIO8_IRQ = 32
- 33 | PIO9 | CONFIG_SYS_NIOS_CPU_PIO9_IRQ = 33
- 34 | PIO10 | CONFIG_SYS_NIOS_CPU_PIO10_IRQ = 34
- 35 | PIO11 | CONFIG_SYS_NIOS_CPU_PIO11_IRQ = 35
- 36 | PIO12 | CONFIG_SYS_NIOS_CPU_PIO12_IRQ =
- | IDE0 | CONFIG_SYS_NIOS_CPU_IDE0_IRQ = 36
- 37 | PIO13 | CONFIG_SYS_NIOS_CPU_PIO13_IRQ =
- | IDE1 | CONFIG_SYS_NIOS_CPU_IDE1_IRQ = 37
-
-MEMORY: 8 MByte Flash
- 16 MByte SDRAM
-
-Timer: TIMER0: high priority programmable timer (IRQ16)
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_TICK_TIMER = 0
- CONFIG_SYS_NIOS_CPU_USER_TIMER = (not present)
-
-PIO: Nr. | description
- ------+--------------------------------------------------------
- PIO0 | PORTA: 8 in/outputs for general purpose usage
- PIO1 | PORTB: 8 in/outputs for general purpose usage
- PIO2 | PORTC: 4 in/outputs for general purpose usage
- PIO3 | RCM: 1 input for RCM_EN# jumper (Req.Conf.Mon.)
- PIO4 | WDTENA: 1 output to enable the on-board watchdog
- PIO5 | WDTTRIG: 1 output to trigger the on-board watchdog
- PIO6 | LAN0INT: 1 input for LAN91C111 irq input (IRQ20)
- PIO7 | INT1: 1 input for general purpose irq (IRQ31)
- PIO8 | INT2: 1 input for general purpose irq (IRQ32)
- PIO9 | INT3: 1 input for general purpose irq (IRQ33)
- PIO10| INT4: 1 input for general purpose irq (IRQ34)
- PIO11| INT5: 1 input for general purpose irq (IRQ35)
- PIO12| INT6: 1 input for general purpose irq (IRQ36)
- | IDE0INT: (same) for IDE0 irq input
- PIO13| INT7: 1 input for general purpose irq (IRQ37)
- | IDE1INT: (same) for IDE1 irq input
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_PORTA_PIO = 0
- CONFIG_SYS_NIOS_CPU_PORTB_PIO = 1
- CONFIG_SYS_NIOS_CPU_PORTC_PIO = 2
- CONFIG_SYS_NIOS_CPU_RCM_PIO = 3
- CONFIG_SYS_NIOS_CPU_WDTENA_PIO = 4
- CONFIG_SYS_NIOS_CPU_WDTTRIG_PIO = 5
- CONFIG_SYS_NIOS_CPU_LED_PIO = (not present)
-
-UART: UART0: fixed baudrate of 115200, fixed protocol 8N1, RTS/CTS (IRQ17)
- UART1: fixed baudrate of 115200, fixed protocol 8N1,
- without handshake RTS/CTS (IRQ18)
-
-SPI: SPI0: master capable, 1 slave selectable, 250kHz target clock,
- 2 usec targets delay between slave select and clock,
- data is transferred MSB-first / LSB-last (IRQ25)
-
-LAN: SMsC LAN91C111 with:
- - without offset
- - data bus width 16 bit (on-board hard wired at 32 bit bus)
- - !!! 32 bit bus access --> each address * 2 !!!
-
-IDE: (TODO)
-
-
-===============================================================================
- M E M O R Y M A P
-===============================================================================
-
-- - - - - - - - - - - external extension - - - - - - - - - - - - - - - - - - -
-
- 0x44000000 ---32-----------16|15------------0-
- | | | \
- : (real size : : |
- EXT3 (CS4) : and content : : > CONFIG_SYS_NIOS_CPU_CS3_SIZE
- : unknown) : : | = 0x01000000
- | | | /
- 0x43000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_CS3_BASE
- | | | \
- : (real size : : |
- EXT2 (CS3) : and content : : > CONFIG_SYS_NIOS_CPU_CS2_SIZE
- : unknown) : : | = 0x01000000
- | | | /
- 0x42000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_CS2_BASE
- | | | \
- : (real size : : |
- EXT1 (CS2) : and content : : > CONFIG_SYS_NIOS_CPU_CS1_SIZE
- : unknown) : : | = 0x01000000
- | | | /
- 0x41000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_CS1_BASE
- | | | \
- : (real size : : |
- EXT0 (CS1) : and content : : > CONFIG_SYS_NIOS_CPU_CS0_SIZE
- : unknown) : : | = 0x01000000
- | | | /
- 0x40000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_CS0_BASE
- | |
- : gap :
- : :
-
-- - - - - - - - - - - external memory - - - - - - - - - - - - - - - - - - -
-
- : :
- : gap :
- | |
- 0x03000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_STACK
- | . | \
- | . | | (U-Boot run-time system)
- | . | |
- | . | > CONFIG_SYS_MONITOR_LEN
- | . | | = 0x00040000
- | . | |
- | . | /
- 0x02fc0000 --+32-----------16|15------------0+ TEXT_BASE
- | . | \
- | . | > CONFIG_SYS_MALLOC_LEN (heap)
- | . | /
- --+32-----------16|15------------0+
- | . | \
- | . | > CONFIG_SYS_GBL_DATA_SIZE (global)
- | . | /
- --+32-----------16|15------------0+ CONFIG_SYS_INIT_SP (u-boot stack)
- | . | \ \
- | . | | |
- | . | | > stack area
- | . | | |
- | . | | V
- | . | |
- | . | |
- SDRAM | . | > CONFIG_SYS_NIOS_CPU_SDRAM_SIZE
- | . | | = 0x01000000
- | . | |
- 0x02000100 |- - - - - - - - - - - - - - - -+-|-
- | . | | \
- | . | | |
- | . | | > CONFIG_SYS_NIOS_CPU_VEC_SIZE
- | . | | | = 0x00000100
- | | / /
- 0x02000000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_VEC_BASE
- 0x02000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SDRAM_BASE
- | | \
- : gap : > (space for 2nd Flash)
- | | /
- 0x01800000 ---32-----------16|15------------0-
- | sector 127 | \
- + 0x7f0000 |- - - - - - - - - - - - - - - -| |
- | : | |
- Flash |- - - - : - - - -| > CONFIG_SYS_NIOS_CPU_FLASH_SIZE
- | sector 1 : | | = 0x00800000
- + 0x010000 |- - - - - - - - - - - - - - - -| |
- | sector 0 (size = 0x10000) | /
- 0x01000000 ---8-------------4|3-------------0- CONFIG_SYS_NIOS_CPU_FLASH_BASE
- | |
- : gap :
- : :
-
-- - - - - - - - - - - external i/o - - - - - - - - - - - - - - - - - - -
-
- : :
- : gap :
- | |
- 0x00010020 ---32-----------16|15------------0-
- | | \
- | register bank | |
- | size = (real_size << 1) | |
- | real_size = 0x10 | |
- | +--------.---.---.--- | |
- | | bank 0 \ 1 \ 2 \ 3 \ | |
- | |---------------------------+ | |
- LAN91C111 | | BANK | RESERVED | | > na_enet_size
- | |- - - - - - -|- - - - - - -| | | = 0x00000020
- | | RPCR | MIR | | |
- | |- - - - - - -|- - - - - - -| | |
- | | COUNTER | RCR | | |
- | |- - - - - - -|- - - - - - -| | |
- | | EPH STATUS | TCR | | |
- | +---------------------------+ | /
- 0x00010000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_LAN0_BASE
- | |
- : gap :
- : :
-
-- - - - - - - - - - - on chip i/o - - - - - - - - - - - - - - - - - - -
-
- : :
- : gap :
- | |
- 0x00001040 ---32-----------16|15------------0-
- | | | \
- : : : |
- IDE1 i/f : : : > 0x00000020
- [5] : : : |
- | | | /
- 0x00001020 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_IDE1
- | | | \
- : : : |
- IDE0 i/f : : : > 0x00000020
- [5] : : : |
- | | | /
- 0x00001000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_IDE0
- | |
- : gap :
- | |
- 0x00000980 ---32-----------16|15------------0-
- | edgecapture (1 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO13 | interruptmask (1 bit) (rw) | |
- [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (ro) | /
- 0x00000970 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO13
- | edgecapture (1 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO12 | interruptmask (1 bit) (rw) | |
- [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (ro) | /
- 0x00000960 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO12
- | edgecapture (1 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO11 | interruptmask (1 bit) (rw) | |
- [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (ro) | /
- 0x00000950 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO11
- | edgecapture (1 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO10 | interruptmask (1 bit) (rw) | |
- [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (ro) | /
- 0x00000940 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO10
- | edgecapture (1 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO9 | interruptmask (1 bit) (rw) | |
- [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (ro) | /
- 0x00000930 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO9
- | edgecapture (1 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO8 | interruptmask (1 bit) (rw) | |
- [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (ro) | /
- 0x00000920 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO8
- | edgecapture (1 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO7 | interruptmask (1 bit) (rw) | |
- [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (ro) | /
- 0x00000910 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO7
- | edgecapture (1 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO6 | interruptmask (1 bit) (rw) | |
- [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (ro) | /
- 0x00000900 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO6
- | |
- : gap :
- | |
- 0x000008e0 ---32-----------16|15------------0-
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | endofpacket (16 bit) (rw) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | slaveselect (1 bit) (rw) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- SPI0 | (reserved) | |
- [4] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020
- | control (11 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | status (9 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | txdata (16 bit) (wo) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | rxdata (16 bit) (ro) | /
- 0x000008c0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SPI0
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO5 | (unused) | |
- [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (wo) | /
- 0x000008b0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO5
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO4 | (unused) | |
- [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (wo) | /
- 0x000008a0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO4
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO3 | (unused) | |
- [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (ro) | /
- 0x00000890 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO3
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO2 | (unused) | |
- [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | direction (4 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (4 bit) (rw) | /
- 0x00000880 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO2
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO1 | (unused) | |
- [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | direction (8 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (8 bit) (rw) | /
- 0x00000870 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO1
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO0 | (unused) | |
- [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | direction (8 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (8 bit) (rw) | /
- 0x00000860 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO0
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | snaph (16 bit) (rw) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- TIMER0 | snapl (16 bit) (rw) | |
- [2] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020
- | periodh (16 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | periodl (16 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | control (4 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | status (2 bit) (rw) | /
- 0x00000840 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER0
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- UART1 | (unused) | > 0x00000020
- [1] + 0x10 |- - - - - - - - - - - - - - - -| |
- | control (10 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | status (10 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | txdata (8 bit) (wo) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | rxdata (8 bit) (ro) | /
- 0x00000820 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART1
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- UART0 | (unused) | > 0x00000020
- [1] + 0x10 |- - - - - - - - - - - - - - - -| |
- | control (10 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | status (10 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | txdata (8 bit) (wo) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | rxdata (8 bit) (ro) | /
- 0x00000800 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART0
-
-- - - - - - - - - - - on chip memory 1 - - - - - - - - - - -
-
- 0x00000800 ---32-----------16|15------------0-
- | : | \
- | : | |
- GERMS | : | > CONFIG_SYS_NIOS_CPU_ROM_SIZE
- | : | | = 0x00000800
- | : | /
- 0x00000000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_RST_VECT
- 0x00000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_ROM_BASE
-
-
-===============================================================================
- F L A S H M E M O R Y A L L O C A T I O N
-===============================================================================
-
- 0x01800000 ---8-------------4|3-------------0-
- | : | \
- | : | |
- | : | > 6 MByte ROM FS
- | : | |
- | : | /
- 0x01200000 --+- - - - - - - -:- - - - - - - -+- - file system image(s)
- | : | \
- | : | |
- | : | > 1728 kByte ucLinux
- | : | |
- | : | /
- 0x01050000 --+- - - - - - - -:- - - - - - - -+- - os image(s)
- | : | \
- 0x01040000 --+- - - - - - - -:- - - - - - - -+-|- u-boot environment
- | : | |
- | : | > 320 kByte U-Boot
- | : | |
- | : | |
- | : | /
- 0x01000000 --+- - - - - - - -:- - - - - - - -+- - u-boot _start()
- 0x01000000 ---8-------------4|3-------------0-
-
-
-===============================================================================
- R E F E R E N C E S
-===============================================================================
-[1] http://www.altera.com/literature/ds/ds_nios_uart.pdf
-[2] http://www.altera.com/literature/ds/ds_nios_timer.pdf
-[3] http://www.altera.com/literature/ds/ds_nios_pio.pdf
-[4] http://www.altera.com/literature/ds/ds_nios_spi.pdf
-[5] http://www.t13.org/index.html
-
-
-===============================================================================
-Stephan Linz <linz@li-pro.net>
+++ /dev/null
-
- Nios Development Kit
- Cyclone Editions
-
- Last Update: January 2, 2004
-====================================================================
-
-This file contains information regarding U-Boot and the Altera
-Nios Development Kit, Cyclone Edition (DK-1C20). For general Nios
-information see doc/README.nios.
-
-For those interested in contributing ... see HELP WANTED section
-in doc/README.nios.
-
-Contents:
-
- 1. Files
- 2. Memory Organization
- 3. Examples
- 4. Programming U-Boot into FLASH with GERMS
- 5. Active Serial Memory Interface (ASMI) Support
-
-====================================================================
-
-1. Files
-=========
- board/altera/dk1c20/*
- include/configs/DK1C20.h
-
-2. Memory Organization
-=======================
-
- -The heap is placed below the monitor (U-Boot code).
- -Global data is placed below the heap.
- -The stack is placed below global data (&grows down).
-
-3. Examples
-============
-
-The hello_world example works fine. The default load address
-is 0x0100_0000 (the start of SDRAM).
-
-
-4. Programming U-Boot into FLASH with GERMS
-============================================
-The current version of the DK-1C20 port with the default
-configuration settings occupies about 81 KBytes of flash.
-A minimal configuration occupies less than 60 KByte (asmi
-and network support disabled).
-
-To program U-Boot into the DK-1C20 flash using GERMS do the
-following:
-
-1. From the command line, download U-Boot using the nios-run:
-
- $ nios-run -r u-boot.srec
-
-This takes about 45 seconds (GERMS is not very speedy here).
-After u-boot is downloaded it will be executed. You should
-see the following:
-
- U-Boot 1.0.0-pre (Oct 4 2003 - 07:39:24)
-
- CPU: Nios-32 Rev. 3.3 (0x3038)
- Reg file size: 256 LO_LIMIT/HI_LIMIT: 2/14
- Board: Altera Nios 1C20 Development Kit
- In: serial
- Out: serial
- Err: serial
- ==>
-
-
-2. Quit nios-run and start your terminal application (e.g. start
-Hyperterminal or minicom).
-
-3. Download the u-boot code to RAM. When using Hyperterminal, do the
-following:
-
- a. From the u-boot command prompt start a binary download to SRAM:
-
- ==> loadb 800000
-
- b. Download u-boot.bin using kermit.
-
-4. From the U-Boot command prompt, erase flash 0x40000 to 0x5ffff:
-
- ==> erase 1:4-5
-
-5. Copy the binary image from SRAM to flash:
-
- ==> cp.b 800000 40000 10000
-
-U-Boot will now automatically start when the board is powered on or
-reset using the Standard-32 configuration. To start U-Boot with the
-Safe-32 configuration, enter the following GERMS command:
-
- + g 40000
-
-5. Active Serial Memory Interface (ASMI) Support
-================================================
-ASMI is fully supported in U-Boot. Please note that ASMI is supported
-only on Cyclone devices. Do not expect ASMI to work with Stratix or
-APEX devices.
-
- ************* IMPORTANT *************
- ===================================================
- IN ORDER FOR THE NIOS ASMI TO OPERATE PROPERLY, THE
- CYCLONE DEVICE MUST BE CONFIGURED USING JTAG OR ASMI.
-
-There are two techniques you can use to bootstrap the ASMI. The
-first is to use the program_epcs utility that is part of Altera's SDK.
-But I've found program_epcs to be slow and cumbersome at best.
-
-An undocumented alternative is to use the Quartus device programing
-interface:
-
- 1. Select "Active Serial" mode.
-
- 2. Choose the xxx.pof file. For example, for the standard_32
- configuration use the "standard_32.pof" file.
-
- 3. Attach your ByteBlaster to J28. Make sure you have the
- cable attached properly -- the orientation of J28 is
- different than J24 (the JTAG header). On J28, pin 1 is on
- the bottom row, left-most pin.
-
- 4. Press and hold the "Power-On Reset" switch (SW10). You will
- see the green "Loading" and red "Error" LEDs (LED3 and LED4)
- in the on state.
-
- 5. While holding down the "Power-On Reset" switch, start the
- programming sequence. This only takes about 10 seconds.
-
- 6. After programming is complete, release the "Power-On Reset"
- switch. The Cyclone device should now load its configuration
- from the EPCS4 (U59). The green "User" LED (LED 1) should be
- blinking if the device was successfully loaded via ASMI.
-
- 7. Remove the ByteBlaster cable. The cable must be removed to
- allow the Nios ASMI access to the EPCS4 device.
-
-After you have successfully programmed a configuration into the
-EPCS4, the ASMI will be used to load the Cyclone configuration
-unless the "Force Safe" switch (SW9) is pressed.
-
-NOTE: To maximize the amount of space available for program use,
-you can enable configuration compression in Quartus. With compression
-enabled, the size of the standard_32 configuration data is
-approximately 192 KBytes.
-
-To use the U-Boot ASMI commands, try typing "help asmi" at the
-command prompt. The command "asmi info" will show the current
-status of the ASMI.
+++ /dev/null
-
-TODO: specify IDE i/f
- specify ASMI i/f
- specify OCI
-
-
-===============================================================================
- C P U , M E M O R Y , I N / O U T C O M P O N E N T S
-===============================================================================
-see also [1]-[6]
-
-CPU: "standard_32"
- 32 bit NIOS for 50 MHz
- 256 Byte for register file (15 levels)
- 4 KByte instruction cache (2 bytes in each cache line)
- 4 KByte data cache (4 bytes in each cache line)
- 2 KByte On Chip ROM with GERMS boot monitor
- no On Chip RAM
- MSTEP multiplier
- no Debug Core
- On Chip Instrumentation (OCI) enabled
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_CLK = 50000000
- CONFIG_SYS_NIOS_CPU_ICACHE = 4096
- CONFIG_SYS_NIOS_CPU_DCACHE = 4096
- CONFIG_SYS_NIOS_CPU_REG_NUMS = 256
- CONFIG_SYS_NIOS_CPU_MUL = 0
- CONFIG_SYS_NIOS_CPU_MSTEP = 1
- CONFIG_SYS_NIOS_CPU_DBG_CORE = 0
-
-OCI: (TODO)
-
-IRQ: Nr. | used by
- ------+--------------------------------------------------------
- 16 | TIMER0 | CONFIG_SYS_NIOS_CPU_TIMER0_IRQ = 16
- 25 | UART0 | CONFIG_SYS_NIOS_CPU_UART0_IRQ = 25
- 30 | LAN91C111 | CONFIG_SYS_NIOS_CPU_LAN0_IRQ = 30
- 35 | PIO5 | CONFIG_SYS_NIOS_CPU_PIO5_IRQ = 35
- 40 | PIO0 | CONFIG_SYS_NIOS_CPU_PIO0_IRQ = 40
- 45 | ASMI | CONFIG_SYS_NIOS_CPU_ASMI0_IRQ = 45
- 50 | TIMER1 | CONFIG_SYS_NIOS_CPU_TIMER1_IRQ = 50
-
-MEMORY: 8 MByte Flash
- 1 MByte SRAM
- 16 MByte SDRAM
-
-ASMI: (TODO) <-- ASMI part is 4M bits
-
-Timer: TIMER0: high priority programmable timer (IRQ16)
- TIMER1: low priority fixed timer for 10 ms @ 50 MHz (IRQ50)
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_TICK_TIMER = 1
- CONFIG_SYS_NIOS_CPU_USER_TIMER = 0
-
-PIO: Nr. | description
- ------+--------------------------------------------------------
- PIO0 | BUTTON: 4 inputs for user push buttons (IRQ40)
- PIO1 | LCD: 11 in/outputs for ASCII LCD
- PIO2 | LED: 8 outputs for user LEDs
- PIO3 | SEVENSEG: 16 outputs for user seven segment display
- PIO4 | RECONF: 1 in/output for . . . . . . . . . . . .
- PIO5 | CFPRESENT: 1 input for CF present event (IRQ35)
- PIO6 | CFPOWER: 1 output to controll CF power supply
- PIO7 | CFATASEL: 1 output to controll CF ATA card select
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_BUTTON_PIO = 0
- CONFIG_SYS_NIOS_CPU_LCD_PIO = 1
- CONFIG_SYS_NIOS_CPU_LED_PIO = 2
- CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO = 3
- CONFIG_SYS_NIOS_CPU_RECONF_PIO = 4
- CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO = 5
- CONFIG_SYS_NIOS_CPU_CFPOWER_PIO = 6
- CONFIG_SYS_NIOS_CPU_CFATASEL_PIO = 7
-
-UART: UART0: fixed baudrate of 115200, fixed protocol 8N1,
- without handshake RTS/CTS (IRQ25)
-
-LAN: SMsC LAN91C111 with:
- - offset 0x300 (LAN91C111_REGISTERS_OFFSET)
- - data bus width 32 bit (LAN91C111_DATA_BUS_WIDTH)
-
-IDE: (TODO)
-
-
-===============================================================================
- M E M O R Y M A P
-===============================================================================
-
-- - - - - - - - - - - external memory 2 - - - - - - - - - - - - - - - - - - -
-
- 0x02000000 ---32-----------16|15------------0-
- | : | \
- | : | |
- SDRAM | : | > CONFIG_SYS_NIOS_CPU_SDRAM_SIZE
- | : | | = 0x01000000
- | : | /
- 0x01000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SDRAM_BASE
- | |
- : gap :
- : :
-
-- - - - - - - - - - - on chip i/o - - - - - - - - - - - - - - - - - - -
-
- : :
- : gap :
- | |
- 0x________ ---32-----------16|15------------0-
- | | | \
- : (real size : : |
- ASMI i/f : and content : : > 0x________
- [5] : unknown) : : |
- | | | /
- 0x00920b00 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_ASMI0
- | |
- : gap :
- | |
- 0x00920a80 ---32-----------16|15------------0-
- | | | \
- : (real size : : |
- IDE i/f : and content : : > 0x00000080
- [6] : unknown) : : |
- | | | /
- 0x00920a00 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_IDE0
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- TIMER1 | (unused) | |
- [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020
- | (unused) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | control (1 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | status (2 bit) (rw) | /
- 0x009209e0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER1
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO7 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (wo) | /
- 0x009209d0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO7
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO6 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (wo) | /
- 0x009209c0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO6
- | edgecapture (1 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO5 | interruptmask (1 bit) (rw) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (ro) | /
- 0x009209b0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO5
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO4 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | direction (1 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (rw) | /
- 0x009209a0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO4
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO3 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (16 bit) (wo) | /
- 0x00920990 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO3
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO2 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (8 bit) (wo) | /
- 0x00920980 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO2
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO1 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | direction (11 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (11 bit) (rw) | /
- 0x00920970 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO1
- | edgecapture (4 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO0 | interruptmask (4 bit) (rw) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (4 bit) (ro) | /
- 0x00920960 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO0
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | snaph (16 bit) (rw) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- TIMER0 | snapl (16 bit) (rw) | |
- [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020
- | periodh (16 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | periodl (16 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | control (4 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | status (2 bit) (rw) | /
- 0x00920940 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER0
- | | \
- : gap : > (space for UART1)
- | | /
- 0x00920920 ---32-----------16|15------------0-
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- UART0 | (unused) | > 0x00000020
- [2] + 0x10 |- - - - - - - - - - - - - - - -| |
- | control (10 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | status (10 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | txdata (8 bit) (wo) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | rxdata (8 bit) (ro) | /
- 0x00920900 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART0
-
-- - - - - - - - - - - on chip debugging - - - - - - - - - - - - - - - - - - -
-
- 0x00920900 -----------------------------------
- | | \
- : (real size : |
- OCI Debug : and content : > CONFIG_SYS_NIOS_CPU_OCI_SIZE
- : unknown) : | = 0x00000100
- | | /
- 0x00920800 ----------------------------------- CONFIG_SYS_NIOS_CPU_OCI_BASE
-
-- - - - - - - - - - - on chip memory - - - - - - - - - - -
-
- 0x00920800 ---32-----------16|15------------0-
- | : | \
- | : | |
- GERMS | : | > CONFIG_SYS_NIOS_CPU_ROM_SIZE
- | : | | = 0x00000800
- | : | /
- 0x00920000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_RST_VECT
- 0x00920000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_ROM_BASE
-
-- - - - - - - - - - - external i/o - - - - - - - - - - - - - - - - - - -
-
- 0x00920000 ---32-----------16|15------------0-
- | gap | \
- 0x00910310 --+-------------------------------| |
- | | |
- | register bank (size = 0x10) | |
- | +--------.---.---.--- | |
- | | bank 0 \ 1 \ 2 \ 3 \ | |
- | |---------------------------+ | |
- LAN91C111 | | BANK | RESERVED | | |
- | |- - - - - - -|- - - - - - -| | > na_lan91c111_size
- | | RPCR | MIR | | | = 0x00010000
- | |- - - - - - -|- - - - - - -| | |
- | | COUNTER | RCR | | |
- | |- - - - - - -|- - - - - - -| | |
- | | EPH STATUS | TCR | | |
- | +---------------------------+ | |
- 0x00910300 --+--LAN91C111_REGISTERS_OFFSET---| |
- | gap | /
- 0x00910000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_LAN0_BASE
- | |
- : gap :
- : :
-
-- - - - - - - - - - - external memory 1 - - - - - - - - - - - - - - - - - - -
-
- : :
- : gap :
- | |
- 0x00900000 ---32-----------16|15------------0-
- 0x00900000 --+32-----------16|15------------0+
- | : | \ \
- | : | | |
- | : | | > CONFIG_SYS_NIOS_CPU_VEC_SIZE
- | : | | | = 0x00000100
- | : | | /
- 0x008fff00 |- - - - - - - -:- - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_VEC_BASE
- 0x008fff00 |- - - - - - - -:- - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_STACK
- | : | | \
- | : | | |
- | : | | > stack area
- | : | | |
- | : | | V
- | : | |
- SRAM | : | > CONFIG_SYS_NIOS_CPU_SRAM_SIZE
- | : | | = 0x00100000
- | : | /
- 0x00800000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SRAM_BASE
- 0x00800000 ---8-------------4|3-------------0-
- | sector 127 | \
- + 0x7f0000 |- - - - - - - - - - - - - - - -| |
- | : | |
- Flash |- - - - : - - - -| > CONFIG_SYS_NIOS_CPU_FLASH_SIZE
- | sector 1 : | | = 0x00800000
- + 0x010000 |- - - - - - - - - - - - - - - -| |
- | sector 0 (size = 0x10000) | /
- 0x00000000 ---8-------------4|3-------------0- CONFIG_SYS_NIOS_CPU_FLASH_BASE
-
-
-===============================================================================
- F L A S H M E M O R Y A L L O C A T I O N
-===============================================================================
-
- 0x00800000 ---8-------------4|3-------------0-
- | : | \
- SAFE | : | > 1 MByte
- FPGA conf. | : | / (NOT usable by software)
- 0x00700000 --+- - - - - - - -:- - - - - - - -+-
- | : | \
- USER | : | > 1 MByte
- FPGA conf. | : | / (NOT usable by software)
- 0x00600000 --+- - - - - - - -:- - - - - - - -+-
- | : | \
- | : | |
- WEB pages | : | > 2 MByte
- | : | | (provisory usable)
- | : | /
- 0x00400000 --+- - - - - - - -:- - - - - - - -+-
- | : | \
- | : | |
- | : | |
- | : | > 4 MByte free for use
- | : | |
- 0x00040000 --+- - - - - - - -:- - - - - - - -+-|- u-boot _start()
- | : | /
- 0x00000000 |- - - - - - - -:- - - - - - - -+- - u-boot environment
- 0x00000000 ---8-------------4|3-------------0-
-
-
-===============================================================================
- R E F E R E N C E S
-===============================================================================
-[1] http://www.altera.com/literature/manual/mnl_nios_board_cyclone_1c20.pdf
-[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf
-[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf
-[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf
-[5] http://www.altera.com/literature/ds/ds_nios_asmi.pdf
- http://www.altera.com/literature/wp/wp_epcs_cyc.pdf
-[6] http://www.opencores.org/projects/ata/
- http://www.t13.org/index.html
-
-
-===============================================================================
-Stephan Linz <linz@li-pro.net>
+++ /dev/null
-
- Nios Development Kit
- Startix Editions
-
- Last Update: January 28, 2004
-====================================================================
-
-This file contains information regarding U-Boot and the Altera
-Nios Development Kit, Startix Edition (DK-1S10). For general Nios
-information see doc/README.nios.
-
-Most stuff of this file was borrowed and based on README.dk1c20,
-the DK-1C20 related information file.
-
-For those interested in contributing ... see HELP WANTED section
-in doc/README.nios.
-
-Contents:
-
- 1. Files
- 2. Memory Organization
- 3. CPU Variations
- 4. Examples
- 5. Programming U-Boot into FLASH with GERMS
-
-====================================================================
-
-1. Files
-=========
- board/altera/dk1s10/*
- include/configs/DK1S10.h
-
-2. Memory Organization
-=======================
-
- -The heap is placed below the monitor (U-Boot code).
- -Global data is placed below the heap.
- -The stack is placed below global data (&grows down).
-
-3. CPU Variations
-=================
-
-There are more than one NIOS CPU variation for the DK-1S10. U-Boot
-supports the following CPU configurations:
-
- - Altera Standard 32 (make DK1S10_standard_32_config)
- - Microtronix LDK 2.0 (make DK1S10_mtx_ldk_20_config)
-
-4. Examples
-============
-
-The hello_world example was never tested on DK-1S10. Neverthelse
-it should work as far as possible, because the DK-1S10 port is
-more than ninetieth percents equal to the DK-1C20 port and at
-this platform the hello_world example was already tested
-successfully (see README.dk1c20).
-
-
-5. Programming U-Boot into FLASH with GERMS
-============================================
-The current version of the DK-1S10 port with the default
-configuration settings occupies about 78 KBytes of flash.
-A minimal configuration occupies less than 60 KByte
-(network support disabled).
-
-To program U-Boot into the DK-1S10 flash using GERMS do the
-following:
-
-1. From the command line, download U-Boot using the nios-run:
-
- $ nios-run -r u-boot.srec
-
-This takes about 45 seconds (GERMS is not very speedy here).
-After u-boot is downloaded it will be executed. You should
-see the following:
-
- U-Boot 1.0.2 (Jan 28 2004 - 19:02:30)
-
- CPU: Nios-32 Rev. 3.3 (0x3038)
- Reg file size: 256 LO_LIMIT/HI_LIMIT: 2/14
- Board: Altera Nios 1S10 Development Kit
- In: serial
- Out: serial
- Err: serial
- DK1S10 >
-
-
-2. Quit nios-run and start your terminal application (e.g. start
- Hyperterminal or minicom).
-
-3. Download the u-boot code to RAM. When using Hyperterminal, do the
- following:
-
- a. From the u-boot command prompt start a binary download to
- SRAM / SDRAM:
-
- at the Altera Standard 32 to SRAM:
-
- ==> loadb 800000
-
- at the Microtronix LDK 2.0 to SDRAM:
-
- ==> loadb 1010000
-
- b. Download u-boot.bin using kermit.
-
-4. From the U-Boot command prompt, erase flash:
-
- at the Altera Standard 32 from 0x40000 to 0x5ffff:
-
- ==> erase 1:4-5
-
- at the Microtronix LDK 2.0 from 0x8000000 to 0x81ffff:
-
- ==> erase 1:0-1
-
-5. Copy the binary image from SRAM / SDRAM to flash:
-
- at the Altera Standard 32 to SRAM:
-
- ==> cp.b 800000 40000 ${filesize}
-
- at the Microtronix LDK 2.0 to SDRAM:
-
- ==> cp.b 1010000 8000000 ${filesize}
-
-U-Boot will now automatically start when the board is powered on or
-reset using the Standard-32 configuration. To start U-Boot with the
-Safe-32 configuration, enter the following GERMS command:
-
- + g 40000
+++ /dev/null
-
-TODO: specify IDE i/f
-
-
-===============================================================================
- C P U , M E M O R Y , I N / O U T C O M P O N E N T S
-===============================================================================
-see also [1]-[5]
-
-CPU: "LDK2"
- 32 bit NIOS for 75 MHz
- 512 Byte for register file (30 levels)
- with out instruction cache
- with out data cache
- 2 KByte On Chip ROM with GERMS boot monitor
- with out On Chip RAM
- MSTEP multiplier
- no Debug Core
- no On Chip Instrumentation (OCI)
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_CLK = 75000000
- CONFIG_SYS_NIOS_CPU_ICACHE = (not present)
- CONFIG_SYS_NIOS_CPU_DCACHE = (not present)
- CONFIG_SYS_NIOS_CPU_REG_NUMS = 512
- CONFIG_SYS_NIOS_CPU_MUL = 0
- CONFIG_SYS_NIOS_CPU_MSTEP = 1
- CONFIG_SYS_NIOS_CPU_DBG_CORE = 0
-
-IRQ: Nr. | used by
- ------+--------------------------------------------------------
- 16 | TIMER0 | CONFIG_SYS_NIOS_CPU_TIMER0_IRQ = 16
- 17 | UART0 | CONFIG_SYS_NIOS_CPU_UART0_IRQ = 17
- 18 | UART1 | CONFIG_SYS_NIOS_CPU_UART1_IRQ = 18
- 20 | LAN91C111 | CONFIG_SYS_NIOS_CPU_LAN0_IRQ = 20
- 25 | IDE0 | CONFIG_SYS_NIOS_CPU_IDE0_IRQ = 25
-
-MEMORY: 8 MByte Flash
- 16 MByte SDRAM
-
-Timer: TIMER0: high priority programmable timer (IRQ16)
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_TICK_TIMER = 0
- CONFIG_SYS_NIOS_CPU_USER_TIMER = (not present)
-
-PIO: Nr. | description
- ------+--------------------------------------------------------
- PIO0 | CFPOWER: 1 output to controll CF power supply
- PIO1 | BUTTON: 4 inputs for user push buttons (no IRQ)
- ------+--------------------------------------------------------
- not | LCD: 11 in/outputs for ASCII LCD
- pres.| LED: 8 outputs for user LEDs
- | SEVENSEG: 16 outputs for user seven segment display
- | RECONF: 1 in/output for . . . . . . . . . . . .
- | CFPRESENT: 1 input for CF present event (IRQ35)
- | CFATASEL: 1 output to controll CF ATA card select
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_BUTTON_PIO = 1
- CONFIG_SYS_NIOS_CPU_LCD_PIO = (not present)
- CONFIG_SYS_NIOS_CPU_LED_PIO = (not present)
- CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO = (not present)
- CONFIG_SYS_NIOS_CPU_RECONF_PIO = (not present)
- CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO = (not present)
- CONFIG_SYS_NIOS_CPU_CFPOWER_PIO = 0
- CONFIG_SYS_NIOS_CPU_CFATASEL_PIO = (not present)
-
-UART: UART0: fixed baudrate of 115200, fixed protocol 8N2,
- without handshake RTS/CTS (IRQ17)
- UART1: fixed baudrate of 115200, fixed protocol 8N1,
- without handshake RTS/CTS (IRQ18)
-
-LAN: SMsC LAN91C111 with:
- - offset 0x300 (LAN91C111_REGISTERS_OFFSET)
- - data bus width 32 bit (LAN91C111_DATA_BUS_WIDTH)
-
-IDE: (TODO)
-
-
-===============================================================================
- M E M O R Y M A P
-===============================================================================
-
-- - - - - - - - - - - external memory - - - - - - - - - - - - - - - - - - -
-
- 0x02000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_STACK
- 0x02000000 --+32-----------16|15------------0+
- | . | \ \
- | . | | |
- | . | | > stack area
- | . | | |
- | . | | V
- | . | |
- | . | |
- SDRAM | . | > CONFIG_SYS_NIOS_CPU_SDRAM_SIZE
- | . | | = 0x01000000
- | . | |
- 0x01000100 |- - - - - - - - - - - - - - - -+-|-
- | . | | \
- | . | | |
- | . | | > CONFIG_SYS_NIOS_CPU_VEC_SIZE
- | . | | | = 0x00000100
- | | / /
- 0x01000000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_VEC_BASE
- 0x01000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SDRAM_BASE
- | sector 127 | \
- + 0x7f0000 |- - - - - - - - - - - - - - - -| |
- | : | |
- Flash |- - - - : - - - -| > CONFIG_SYS_NIOS_CPU_FLASH_SIZE
- | sector 1 : | | = 0x00800000
- + 0x010000 |- - - - - - - - - - - - - - - -| |
- | sector 0 (size = 0x10000) | /
- 0x00800000 ---8-------------4|3-------------0- CONFIG_SYS_NIOS_CPU_FLASH_BASE
- | |
- : gap :
- : :
-
-- - - - - - - - - - - external i/o - - - - - - - - - - - - - - - - - - -
-
- : :
- : gap :
- | |
- 0x00020000 ---32-----------16|15------------0-
- | gap | \
- 0x00010310 --+-------------------------------| |
- | | |
- | register bank (size = 0x10) | |
- | +--------.---.---.--- | |
- | | bank 0 \ 1 \ 2 \ 3 \ | |
- | |---------------------------+ | |
- LAN91C111 | | BANK | RESERVED | | |
- | |- - - - - - -|- - - - - - -| | > na_enet_size
- | | RPCR | MIR | | | = 0x00010000
- | |- - - - - - -|- - - - - - -| | |
- | | COUNTER | RCR | | |
- | |- - - - - - -|- - - - - - -| | |
- | | EPH STATUS | TCR | | |
- | +---------------------------+ | |
- 0x00010300 --+--LAN91C111_REGISTERS_OFFSET---| |
- | gap | /
- 0x00010000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_LAN0_BASE
- | |
- : gap :
- : :
-
-- - - - - - - - - - - on chip i/o - - - - - - - - - - - - - - - - - - -
-
- : :
- : gap :
- | |
- 0x00000980 ---32-----------16|15------------0-
- | | | \
- : (real size : : |
- IDE i/f : and content : : > 0x00000080
- [5] : unknown) : : |
- | | | /
- 0x00000900 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_IDE0
- | | \
- : gap : > (space for PIO4..7)
- | | /
- 0x000008c0 ---32-----------16|15------------0-
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- UART1 | (unused) | > 0x00000020
- [2] + 0x10 |- - - - - - - - - - - - - - - -| |
- | control (10 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | status (10 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | txdata (8 bit) (wo) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | rxdata (8 bit) (ro) | /
- 0x000008a0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART1
- | | \
- : gap : > (space for PIO2..3)
- | | /
- 0x00000880 ---32-----------16|15------------0-
- | edgecapture (4 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO1 | interruptmask (4 bit) (rw) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (4 bit) (ro) | /
- 0x00000870 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO1
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO0 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (wo) | /
- 0x00000860 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO0
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | snaph (16 bit) (rw) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- TIMER0 | snapl (16 bit) (rw) | |
- [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020
- | periodh (16 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | periodl (16 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | control (4 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | status (2 bit) (rw) | /
- 0x00000840 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER0
- | | \
- : gap : > (space for UART2)
- | | /
- 0x00000820 ---32-----------16|15------------0-
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- UART0 | (unused) | > 0x00000020
- [2] + 0x10 |- - - - - - - - - - - - - - - -| |
- | control (10 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | status (10 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | txdata (8 bit) (wo) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | rxdata (8 bit) (ro) | /
- 0x00000800 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART0
-
-- - - - - - - - - - - on chip memory 1 - - - - - - - - - - -
-
- 0x00000800 ---32-----------16|15------------0-
- | : | \
- | : | |
- GERMS | : | > CONFIG_SYS_NIOS_CPU_ROM_SIZE
- | : | | = 0x00000800
- | : | /
- 0x00000000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_RST_VECT
- 0x00000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_ROM_BASE
-
-===============================================================================
- F L A S H M E M O R Y A L L O C A T I O N
-===============================================================================
-
- 0x01000000 ---8-------------4|3-------------0-
- | : | \
- SAFE | : | > 1 MByte
- FPGA conf. | : | / (NOT usable by software)
- 0x00f00000 --+- - - - - - - -:- - - - - - - -+-
- | : | \
- USER | : | > 1 MByte
- FPGA conf. | : | / (NOT usable by software)
- 0x00e00000 --+- - - - - - - -:- - - - - - - -+-
- | : | \
- | : | |
- WEB pages | : | > 2 MByte
- | : | | (provisory usable)
- | : | /
- 0x00c00000 --+- - - - - - - -:- - - - - - - -+-
- | : | \
- | : | |
- | : | |
- | : | > 4 MByte free for use
- | : | |
- 0x00840000 --+- - - - - - - -:- - - - - - - -+-|- u-boot environment
- | : | /
- 0x00800000 |- - - - - - - -:- - - - - - - -+- - u-boot _start()
- 0x00800000 ---8-------------4|3-------------0-
-
-
-===============================================================================
- R E F E R E N C E S
-===============================================================================
-[1] http://www.altera.com/literature/manual/mnl_nios_board_stratix_1s10.pdf
-[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf
-[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf
-[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf
-[5] http://www.opencores.org/projects/ata/
- http://www.t13.org/index.html
-
-
-===============================================================================
-Stephan Linz <linz@li-pro.net>
+++ /dev/null
-
-TODO: specify IDE i/f
- specify OCI
-
-
-===============================================================================
- C P U , M E M O R Y , I N / O U T C O M P O N E N T S
-===============================================================================
-see also [1]-[5]
-
-CPU: "standard_32"
- 32 bit NIOS for 50 MHz
- 256 Byte for register file (15 levels)
- 4 KByte instruction cache (4 bytes in each cache line)
- 4 KByte data cache (4 bytes in each cache line)
- 2 KByte On Chip ROM with GERMS boot monitor
- 64 KByte On Chip RAM
- MSTEP multiplier
- no Debug Core
- On Chip Instrumentation (OCI) enabled
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_CLK = 50000000
- CONFIG_SYS_NIOS_CPU_ICACHE = 4096
- CONFIG_SYS_NIOS_CPU_DCACHE = 4096
- CONFIG_SYS_NIOS_CPU_REG_NUMS = 256
- CONFIG_SYS_NIOS_CPU_MUL = 0
- CONFIG_SYS_NIOS_CPU_MSTEP = 1
- CONFIG_SYS_NIOS_CPU_DBG_CORE = 0
-
-OCI: (TODO)
-
-IRQ: Nr. | used by
- ------+--------------------------------------------------------
- 16 | TIMER0 | CONFIG_SYS_NIOS_CPU_TIMER0_IRQ = 16
- 25 | UART0 | CONFIG_SYS_NIOS_CPU_UART0_IRQ = 25
- 30 | LAN91C111 | CONFIG_SYS_NIOS_CPU_LAN0_IRQ = 30
- 35 | PIO5 | CONFIG_SYS_NIOS_CPU_PIO5_IRQ = 35
- 40 | PIO0 | CONFIG_SYS_NIOS_CPU_PIO0_IRQ = 40
- 50 | TIMER1 | CONFIG_SYS_NIOS_CPU_TIMER1_IRQ = 50
-
-MEMORY: 8 MByte Flash
- 1 MByte SRAM
- 16 MByte SDRAM
-
-Timer: TIMER0: high priority programmable timer (IRQ16)
- TIMER1: low priority fixed timer for 10 ms @ 50 MHz (IRQ50)
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_TICK_TIMER = 1
- CONFIG_SYS_NIOS_CPU_USER_TIMER = 0
-
-PIO: Nr. | description
- ------+--------------------------------------------------------
- PIO0 | BUTTON: 4 inputs for user push buttons (IRQ40)
- PIO1 | LCD: 11 in/outputs for ASCII LCD
- PIO2 | LED: 8 outputs for user LEDs
- PIO3 | SEVENSEG: 16 outputs for user seven segment display
- PIO4 | RECONF: 1 in/output for . . . . . . . . . . . .
- PIO5 | CFPRESENT: 1 input for CF present event (IRQ35)
- PIO6 | CFPOWER: 1 output to controll CF power supply
- PIO7 | CFATASEL: 1 output to controll CF ATA card select
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_BUTTON_PIO = 0
- CONFIG_SYS_NIOS_CPU_LCD_PIO = 1
- CONFIG_SYS_NIOS_CPU_LED_PIO = 2
- CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO = 3
- CONFIG_SYS_NIOS_CPU_RECONF_PIO = 4
- CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO = 5
- CONFIG_SYS_NIOS_CPU_CFPOWER_PIO = 6
- CONFIG_SYS_NIOS_CPU_CFATASEL_PIO = 7
-
-UART: UART0: fixed baudrate of 115200, fixed protocol 8N1,
- without handshake RTS/CTS (IRQ25)
-
-LAN: SMsC LAN91C111 with:
- - offset 0x300 (LAN91C111_REGISTERS_OFFSET)
- - data bus width 32 bit (LAN91C111_DATA_BUS_WIDTH)
-
-IDE: (TODO)
-
-
-===============================================================================
- M E M O R Y M A P
-===============================================================================
-
-- - - - - - - - - - - external memory 2 - - - - - - - - - - - - - - - - - - -
-
- 0x02000000 ---32-----------16|15------------0-
- | : | \
- | : | |
- SDRAM | : | > CONFIG_SYS_NIOS_CPU_SDRAM_SIZE
- | : | | = 0x01000000
- | : | /
- 0x01000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SDRAM_BASE
- | |
- : gap :
- : :
-
-- - - - - - - - - - - on chip i/o - - - - - - - - - - - - - - - - - - -
-
- : :
- : gap :
- | |
- 0x00920a80 ---32-----------16|15------------0-
- | | | \
- : (real size : : |
- IDE i/f : and content : : > 0x00000080
- [5] : unknown) : : |
- | | | /
- 0x00920a00 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_IDE0
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- TIMER1 | (unused) | |
- [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020
- | (unused) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | control (1 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | status (2 bit) (rw) | /
- 0x009209e0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER1
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO7 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (wo) | /
- 0x009209d0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO7
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO6 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (wo) | /
- 0x009209c0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO6
- | edgecapture (1 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO5 | interruptmask (1 bit) (rw) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (ro) | /
- 0x009209b0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO5
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO4 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | direction (1 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (rw) | /
- 0x009209a0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO4
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO3 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (16 bit) (wo) | /
- 0x00920990 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO3
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO2 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (8 bit) (wo) | /
- 0x00920980 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO2
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO1 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | direction (11 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (11 bit) (rw) | /
- 0x00920970 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO1
- | edgecapture (4 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO0 | interruptmask (4 bit) (rw) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (4 bit) (ro) | /
- 0x00920960 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO0
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | snaph (16 bit) (rw) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- TIMER0 | snapl (16 bit) (rw) | |
- [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020
- | periodh (16 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | periodl (16 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | control (4 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | status (2 bit) (rw) | /
- 0x00920940 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER0
- | | \
- : gap : > (space for UART1)
- | | /
- 0x00920920 ---32-----------16|15------------0-
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- UART0 | (unused) | > 0x00000020
- [2] + 0x10 |- - - - - - - - - - - - - - - -| |
- | control (10 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | status (10 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | txdata (8 bit) (wo) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | rxdata (8 bit) (ro) | /
- 0x00920900 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART0
-
-- - - - - - - - - - - on chip debugging - - - - - - - - - - - - - - - - - - -
-
- 0x00920900 -----------------------------------
- | | \
- : (real size : |
- OCI Debug : and content : > CONFIG_SYS_NIOS_CPU_OCI_SIZE
- : unknown) : | = 0x00000100
- | | /
- 0x00920800 ----------------------------------- CONFIG_SYS_NIOS_CPU_OCI_BASE
-
-- - - - - - - - - - - on chip memory 2 - - - - - - - - - - -
-
- 0x00920800 ---32-----------16|15------------0-
- | : | \
- | : | |
- GERMS | : | > CONFIG_SYS_NIOS_CPU_ROM_SIZE
- | : | | = 0x00000800
- | : | /
- 0x00920000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_RST_VECT
- 0x00920000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_ROM_BASE
-
-- - - - - - - - - - - external i/o - - - - - - - - - - - - - - - - - - -
-
- 0x00920000 ---32-----------16|15------------0-
- | gap | \
- 0x00910310 --+-------------------------------| |
- | | |
- | register bank (size = 0x10) | |
- | +--------.---.---.--- | |
- | | bank 0 \ 1 \ 2 \ 3 \ | |
- | |---------------------------+ | |
- LAN91C111 | | BANK | RESERVED | | |
- | |- - - - - - -|- - - - - - -| | > na_lan91c111_size
- | | RPCR | MIR | | | = 0x00010000
- | |- - - - - - -|- - - - - - -| | |
- | | COUNTER | RCR | | |
- | |- - - - - - -|- - - - - - -| | |
- | | EPH STATUS | TCR | | |
- | +---------------------------+ | |
- 0x00910300 --+--LAN91C111_REGISTERS_OFFSET---| |
- | gap | /
- 0x00910000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_LAN0_BASE
-
-- - - - - - - - - - - on chip memory 1 - - - - - - - - - - -
-
- 0x00910000 ---32-----------16|15------------0-
- | : | \
- | : | |
- onchip RAM | : | > CONFIG_SYS_NIOS_CPU_RAM_SIZE
- | : | | = 0x00010000
- | : | /
- 0x00900000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_RAM_BASE
-
-- - - - - - - - - - - external memory 1 - - - - - - - - - - - - - - - - - - -
-
- 0x00900000 ---32-----------16|15------------0-
- 0x00900000 --+32-----------16|15------------0+
- | . | \ \
- | . | | |
- | . | | > CONFIG_SYS_NIOS_CPU_VEC_SIZE
- | . | | | = 0x00000100
- | . | | /
- 0x008fff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_VEC_BASE
- 0x008fff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_STACK
- | . | | \
- | . | | |
- | . | | > stack area
- | . | | |
- | . | | V
- | . | |
- SRAM | . | > CONFIG_SYS_NIOS_CPU_SRAM_SIZE
- | . | | = 0x00100000
- | | /
- 0x00800000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SRAM_BASE
- 0x00800000 ---8-------------4|3-------------0-
- | sector 127 | \
- + 0x7f0000 |- - - - - - - - - - - - - - - -| |
- | : | |
- Flash |- - - - : - - - -| > CONFIG_SYS_NIOS_CPU_FLASH_SIZE
- | sector 1 : | | = 0x00800000
- + 0x010000 |- - - - - - - - - - - - - - - -| |
- | sector 0 (size = 0x10000) | /
- 0x00000000 ---8-------------4|3-------------0- CONFIG_SYS_NIOS_CPU_FLASH_BASE
-
-
-===============================================================================
- F L A S H M E M O R Y A L L O C A T I O N
-===============================================================================
-
- 0x00800000 ---8-------------4|3-------------0-
- | : | \
- SAFE | : | > 1 MByte
- FPGA conf. | : | / (NOT usable by software)
- 0x00700000 --+- - - - - - - -:- - - - - - - -+-
- | : | \
- USER | : | > 1 MByte
- FPGA conf. | : | / (NOT usable by software)
- 0x00600000 --+- - - - - - - -:- - - - - - - -+-
- | : | \
- | : | |
- WEB pages | : | > 2 MByte
- | : | | (provisory usable)
- | : | /
- 0x00400000 --+- - - - - - - -:- - - - - - - -+-
- | : | \
- | : | |
- | : | |
- | : | > 4 MByte free for use
- | : | |
- 0x00040000 --+- - - - - - - -:- - - - - - - -+-|- u-boot _start()
- | : | /
- 0x00000000 |- - - - - - - -:- - - - - - - -+- - u-boot environment
- 0x00000000 ---8-------------4|3-------------0-
-
-
-===============================================================================
- R E F E R E N C E S
-===============================================================================
-[1] http://www.altera.com/literature/manual/mnl_nios_board_stratix_1s10.pdf
-[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf
-[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf
-[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf
-[5] http://www.opencores.org/projects/ata/
- http://www.t13.org/index.html
-
-
-===============================================================================
-Stephan Linz <linz@li-pro.net>
+++ /dev/null
-
-TODO: specify IDE i/f
- specify OCI
-
-
-===============================================================================
- C P U , M E M O R Y , I N / O U T C O M P O N E N T S
-===============================================================================
-see also [1]-[5]
-
-CPU: "standard_32"
- 32 bit NIOS for 50 MHz
- 256 Byte for register file (15 levels)
- 4 KByte instruction cache (4 bytes in each cache line)
- 4 KByte data cache (4 bytes in each cache line)
- 2 KByte On Chip ROM with GERMS boot monitor
- 64 KByte On Chip RAM
- MSTEP multiplier
- no Debug Core
- On Chip Instrumentation (OCI) enabled
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_CLK = 50000000
- CONFIG_SYS_NIOS_CPU_ICACHE = 4096
- CONFIG_SYS_NIOS_CPU_DCACHE = 4096
- CONFIG_SYS_NIOS_CPU_REG_NUMS = 256
- CONFIG_SYS_NIOS_CPU_MUL = 0
- CONFIG_SYS_NIOS_CPU_MSTEP = 1
- CONFIG_SYS_NIOS_CPU_DBG_CORE = 0
-
-OCI: (TODO)
-
-IRQ: Nr. | used by
- ------+--------------------------------------------------------
- 16 | TIMER0 | CONFIG_SYS_NIOS_CPU_TIMER0_IRQ = 16
- 25 | UART0 | CONFIG_SYS_NIOS_CPU_UART0_IRQ = 25
- 30 | LAN91C111 | CONFIG_SYS_NIOS_CPU_LAN0_IRQ = 30
- 35 | PIO5 | CONFIG_SYS_NIOS_CPU_PIO5_IRQ = 35
- 40 | PIO0 | CONFIG_SYS_NIOS_CPU_PIO0_IRQ = 40
- 50 | TIMER1 | CONFIG_SYS_NIOS_CPU_TIMER1_IRQ = 50
-
-MEMORY: 8 MByte Flash
- 1 MByte SRAM
- 16 MByte SDRAM
-
-Timer: TIMER0: high priority programmable timer (IRQ16)
- TIMER1: low priority fixed timer for 10 ms @ 50 MHz (IRQ50)
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_TICK_TIMER = 1
- CONFIG_SYS_NIOS_CPU_USER_TIMER = 0
-
-PIO: Nr. | description
- ------+--------------------------------------------------------
- PIO0 | BUTTON: 4 inputs for user push buttons (IRQ40)
- PIO1 | LCD: 11 in/outputs for ASCII LCD
- PIO2 | LED: 8 outputs for user LEDs
- PIO3 | SEVENSEG: 16 outputs for user seven segment display
- PIO4 | RECONF: 1 in/output for . . . . . . . . . . . .
- PIO5 | CFPRESENT: 1 input for CF present event (IRQ35)
- PIO6 | CFPOWER: 1 output to controll CF power supply
- PIO7 | CFATASEL: 1 output to controll CF ATA card select
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_BUTTON_PIO = 0
- CONFIG_SYS_NIOS_CPU_LCD_PIO = 1
- CONFIG_SYS_NIOS_CPU_LED_PIO = 2
- CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO = 3
- CONFIG_SYS_NIOS_CPU_RECONF_PIO = 4
- CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO = 5
- CONFIG_SYS_NIOS_CPU_CFPOWER_PIO = 6
- CONFIG_SYS_NIOS_CPU_CFATASEL_PIO = 7
-
-UART: UART0: fixed baudrate of 115200, fixed protocol 8N1,
- without handshake RTS/CTS (IRQ25)
-
-LAN: SMsC LAN91C111 with:
- - offset 0x300 (LAN91C111_REGISTERS_OFFSET)
- - data bus width 32 bit (LAN91C111_DATA_BUS_WIDTH)
-
-IDE: (TODO)
-
-
-===============================================================================
- M E M O R Y M A P
-===============================================================================
-
-- - - - - - - - - - - external memory 2 - - - - - - - - - - - - - - - - - - -
-
- 0x02000000 ---32-----------16|15------------0-
- | : | \
- | : | |
- SDRAM | : | > CONFIG_SYS_NIOS_CPU_SRAM_SIZE
- | : | | = 0x01000000
- | : | /
- 0x01000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SRAM_BASE
- | |
- : gap :
- : :
-
-- - - - - - - - - - - on chip i/o - - - - - - - - - - - - - - - - - - -
-
- : :
- : gap :
- | |
- 0x00920a80 ---32-----------16|15------------0-
- | | | \
- : (real size : : |
- IDE i/f : and content : : > 0x00000080
- [5] : unknown) : : |
- | | | /
- 0x00920a00 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_IDE0
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- TIMER1 | (unused) | |
- [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020
- | (unused) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | control (1 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | status (2 bit) (rw) | /
- 0x009209e0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER1
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO7 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (wo) | /
- 0x009209d0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO7
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO6 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (wo) | /
- 0x009209c0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO6
- | edgecapture (1 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO5 | interruptmask (1 bit) (rw) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (ro) | /
- 0x009209b0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO5
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO4 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | direction (1 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (1 bit) (rw) | /
- 0x009209a0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO4
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO3 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (16 bit) (wo) | /
- 0x00920990 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO3
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO2 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (8 bit) (wo) | /
- 0x00920980 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO2
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO1 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | direction (11 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (11 bit) (rw) | /
- 0x00920970 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO1
- | edgecapture (4 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO0 | interruptmask (4 bit) (rw) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (4 bit) (ro) | /
- 0x00920960 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO0
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | snaph (16 bit) (rw) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- TIMER0 | snapl (16 bit) (rw) | |
- [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020
- | periodh (16 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | periodl (16 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | control (4 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | status (2 bit) (rw) | /
- 0x00920940 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER0
- | | \
- : gap : > (space for UART1)
- | | /
- 0x00920920 ---32-----------16|15------------0-
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- UART0 | (unused) | > 0x00000020
- [2] + 0x10 |- - - - - - - - - - - - - - - -| |
- | control (10 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | status (10 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | txdata (8 bit) (wo) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | rxdata (8 bit) (ro) | /
- 0x00920900 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART0
-
-- - - - - - - - - - - on chip debugging - - - - - - - - - - - - - - - - - - -
-
- 0x00920900 -----------------------------------
- | | \
- : (real size : |
- OCI Debug : and content : > CONFIG_SYS_NIOS_CPU_OCI_SIZE
- : unknown) : | = 0x00000100
- | | /
- 0x00920800 ----------------------------------- CONFIG_SYS_NIOS_CPU_OCI_BASE
-
-- - - - - - - - - - - on chip memory 2 - - - - - - - - - - -
-
- 0x00920800 ---32-----------16|15------------0-
- | : | \
- | : | |
- GERMS | : | > CONFIG_SYS_NIOS_CPU_ROM_SIZE
- | : | | = 0x00000800
- | : | /
- 0x00920000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_RST_VECT
- 0x00920000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_ROM_BASE
-
-- - - - - - - - - - - external i/o - - - - - - - - - - - - - - - - - - -
-
- 0x00920000 ---32-----------16|15------------0-
- | gap | \
- 0x00910310 --+-------------------------------| |
- | | |
- | register bank (size = 0x10) | |
- | +--------.---.---.--- | |
- | | bank 0 \ 1 \ 2 \ 3 \ | |
- | |---------------------------+ | |
- LAN91C111 | | BANK | RESERVED | | |
- | |- - - - - - -|- - - - - - -| | > na_lan91c111_size
- | | RPCR | MIR | | | = 0x00010000
- | |- - - - - - -|- - - - - - -| | |
- | | COUNTER | RCR | | |
- | |- - - - - - -|- - - - - - -| | |
- | | EPH STATUS | TCR | | |
- | +---------------------------+ | |
- 0x00910300 --+--LAN91C111_REGISTERS_OFFSET---| |
- | gap | /
- 0x00910000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_LAN0_BASE
-
-- - - - - - - - - - - on chip memory 1 - - - - - - - - - - -
-
- 0x00910000 ---32-----------16|15------------0-
- | : | \
- | : | |
- onchip RAM | : | > CONFIG_SYS_NIOS_CPU_RAM_SIZE
- | : | | = 0x00010000
- | : | /
- 0x00900000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_RAM_BASE
-
-- - - - - - - - - - - external memory 1 - - - - - - - - - - - - - - - - - - -
-
- 0x00900000 ---32-----------16|15------------0-
- 0x00900000 --+32-----------16|15------------0+
- | . | \ \
- | . | | |
- | . | | > CONFIG_SYS_NIOS_CPU_VEC_SIZE
- | . | | | = 0x00000100
- | . | | /
- 0x008fff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_VEC_BASE
- 0x008fff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_STACK
- | . | | \
- | . | | |
- | . | | > stack area
- | . | | |
- | . | | V
- | . | |
- SRAM | . | > CONFIG_SYS_NIOS_CPU_SRAM_SIZE
- | . | | = 0x00100000
- | | /
- 0x00800000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SRAM_BASE
- 0x00800000 ---8-------------4|3-------------0-
- | sector 127 | \
- + 0x7f0000 |- - - - - - - - - - - - - - - -| |
- | : | |
- Flash |- - - - : - - - -| > CONFIG_SYS_NIOS_CPU_FLASH_SIZE
- | sector 1 : | | = 0x00800000
- + 0x010000 |- - - - - - - - - - - - - - - -| |
- | sector 0 (size = 0x10000) | /
- 0x00000000 ---8-------------4|3-------------0- CONFIG_SYS_NIOS_CPU_FLASH_BASE
-
-
-===============================================================================
- F L A S H M E M O R Y A L L O C A T I O N
-===============================================================================
-
- 0x00800000 ---8-------------4|3-------------0-
- | : | \
- | : | |
- SAFE | : | > 2 MByte
- FPGA conf. | : | | (NOT usable by software)
- | : | /
- 0x00600000 --+- - - - - - - -:- - - - - - - -+-
- | : | \
- | : | |
- USER | : | > 2 MByte
- FPGA conf. | : | | (NOT usable by software)
- | : | /
- 0x00400000 --+- - - - - - - -:- - - - - - - -+-
- | : | \
- | : | |
- WEB pages | : | > 2 MByte
- | : | | (provisory usable)
- | : | /
- 0x00200000 --+- - - - - - - -:- - - - - - - -+-
- | : | \
- | : | |
- | : | > 2 MByte free for use
- 0x00040000 --+- - - - - - - -:- - - - - - - -+-|- u-boot _start()
- | : | /
- 0x00000000 ---8-------------4|3-------------0-
-
-
-===============================================================================
- R E F E R E N C E S
-===============================================================================
-[1] http://www.altera.com/literature/manual/mnl_nios_board_stratix_1s40.pdf
-[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf
-[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf
-[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf
-[5] http://www.opencores.org/projects/ata/
- http://www.t13.org/index.html
-
-
-===============================================================================
-Stephan Linz <linz@li-pro.net>
+++ /dev/null
-
-===============================================================================
- C P U , M E M O R Y , I N / O U T C O M P O N E N T S
-===============================================================================
-see also [1]-[4]
-
-CPU: "standard_32"
- 32 bit NIOS for 33.333 MHz (nasys_clock_freq = 33333000)
- 256 Byte for register file (15 levels)
- no instruction cache
- no data cache
- 1 KByte On Chip ROM with GERMS boot monitor
- no On Chip RAM
- MSTEP multiplier
- no Debug Core
- no On Chip Instrumentation (OCI) enabled
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_CLK = 50000000
- CONFIG_SYS_NIOS_CPU_ICACHE = 0
- CONFIG_SYS_NIOS_CPU_DCACHE = 0
- CONFIG_SYS_NIOS_CPU_REG_NUMS = 256
- CONFIG_SYS_NIOS_CPU_MUL = 0
- CONFIG_SYS_NIOS_CPU_MSTEP = 1
- CONFIG_SYS_NIOS_CPU_DBG_CORE = 0
-
-IRQ: Nr. | used by
- ------+--------------------------------------------------------
- 25 | TIMER0 | CONFIG_SYS_NIOS_CPU_TIMER0_IRQ = 25
- 26 | UART0 | CONFIG_SYS_NIOS_CPU_UART0_IRQ = 26
- 27 | PIO2 | CONFIG_SYS_NIOS_CPU_PIO2_IRQ = 27
- 28 | UART1 | CONFIG_SYS_NIOS_CPU_UART1_IRQ = 28 (debug)
-
-MEMORY: 1 MByte Flash
- 256 KByte SRAM
- (SDRAM with standard SODIMM only)
-
-Timer: TIMER0: high priority programmable timer (IRQ25)
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_TICK_TIMER = 0
-
-PIO: Nr. | description
- ------+--------------------------------------------------------
- PIO0 | SEVENSEG: 16 outputs for user seven segment display
- PIO1 | LED: 8 outputs for user LEDs
- PIO2 | BUTTON: 4 inputs for user push buttons (IRQ27)
- PIO3 | LCD: 11 in/outputs for ASCII LCD
-
- U-Boot CFG: CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO = 0
- CONFIG_SYS_NIOS_CPU_LED_PIO = 1
- CONFIG_SYS_NIOS_CPU_BUTTON_PIO = 2
- CONFIG_SYS_NIOS_CPU_LCD_PIO = 3
-
-UART: UART0: fixed baudrate of 115200, fixed protocol 8N2,
- without handshake RTS/CTS (IRQ26)
- UART1: fixed baudrate of 115200, fixed protocol 8N1,
- without handshake RTS/CTS (IRQ28)
-
-
-===============================================================================
- M E M O R Y M A P
-===============================================================================
-
-- - - - - - - - - - - external memory - - - - - - - - - - - - - - - - - - -
-
- 0x00200000 ---15------------8|7-------------0-
- | sector 18 | \
- + 0x0f0000 |- - - - - - - - - - - - - - - -| |
- | : | |
- Flash |- - - - : - - - -| |
- | sector 5 : | |
- + 0x020000 |- - - - - - - - -| |
- | sector 4 (size = 0x10000) | |
- + 0x010000 |- - - - - - - - - - - - - - - -| > CONFIG_SYS_NIOS_CPU_FLASH_SIZE
- | sector 3 (size = 0x08000) | | = 0x00100000
- + 0x008000 |- - - - - - - - - - - - - - - -| |
- | sector 2 (size = 0x02000) | |
- + 0x006000 |- - - - - - - - - - - - - - - -| |
- | sector 1 (size = 0x02000) | |
- + 0x004000 |- - - - - - - - - - - - - - - -| |
- | sector 0 (size = 0x04000) | /
- 0x00100000 ---15------------8|7-------------0- CONFIG_SYS_NIOS_CPU_FLASH_BASE
- | |
- : gap :
- | |
- 0x00080000 ---32-----------16|15------------0-
- 0x00080000 --+32-----------16|15------------0+
- | . | \ \
- | . | | |
- | . | | > CONFIG_SYS_NIOS_CPU_VEC_SIZE
- | . | | | = 0x00000100
- | . | | /
- 0x0007ff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_VEC_BASE
- 0x0007ff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_STACK
- | . | | \
- | . | | |
- | . | | > stack area
- | . | | |
- | . | | V
- | . | |
- SRAM | . | > CONFIG_SYS_NIOS_CPU_SRAM_SIZE
- | . | | = 0x00040000
- | | /
- 0x00040000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SRAM_BASE
- | |
- : gap :
- : :
-
-- - - - - - - - - - - on chip i/o - - - - - - - - - - - - - - - - - - -
-
- : :
- : gap :
- | |
- 0x00000400 ---32-----------16|15------------0-
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- UART1 | (unused) | > 0x00000020
- [2] + 0x10 |- - - - - - - - - - - - - - - -| |
- | control (10 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | status (10 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | txdata (8 bit) (wo) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | rxdata (8 bit) (ro) | /
- 0x000004c0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART1
- | |
- : gap :
- | |
- 0x00000490 ---32-----------16|15------------0-
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO3 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | direction (11 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (11 bit) (rw) | /
- 0x00000480 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO3
- | edgecapture (12 bit) (rw) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO2 | interruptmask (12 bit) (rw) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (12 bit) (ro) | /
- 0x00000470 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO2
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO1 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | direction (2 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (2 bit) (rw) | /
- 0x00000460 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO1
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | snaph (16 bit) (rw) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- TIMER0 | snapl (16 bit) (rw) | |
- [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020
- | periodh (16 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | periodl (16 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | control (4 bit) (rw) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | status (2 bit) (rw) | /
- 0x00000440 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER0
- | (unused) | \
- + 0x0c |- - - - - - - - - - - - - - - -| |
- PIO0 | (unused) | |
- [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010
- | (unused) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | data (16 bit) (wo) | /
- 0x00000420 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO0
- | (unused) | \
- + 0x1c |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x18 |- - - - - - - - - - - - - - - -| |
- | (unused) | |
- + 0x14 |- - - - - - - - - - - - - - - -| |
- UART0 | (unused) | > 0x00000020
- [2] + 0x10 |- - - - - - - - - - - - - - - -| |
- | control (10 bit) (rw) | |
- + 0x0c |- - - - - - - - - - - - - - - -| |
- | status (10 bit) (rw) | |
- + 0x08 |- - - - - - - - - - - - - - - -| |
- | txdata (8 bit) (wo) | |
- + 0x04 |- - - - - - - - - - - - - - - -| |
- | rxdata (8 bit) (ro) | /
- 0x00000400 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART0
-
-- - - - - - - - - - - on chip memory - - - - - - - - - - -
-
- 0x00000400 ---32-----------16|15------------0-
- | : | \
- | : | |
- GERMS | : | > na_boot_monitor_rom_size
- | : | | = 0x00000400
- | : | /
- 0x00000000 |- - - - - - - - - - - - - - - -+- - nasys_reset_address
- 0x00000000 ---32-----------16|15------------0- na_boot_monitor_rom
-
-
-===============================================================================
- F L A S H M E M O R Y A L L O C A T I O N
-===============================================================================
-
- 0x00200000 ---15------------8|7-------------0-
- | : | \
- SAFE | : | > 256 KByte
- FPGA conf. | : | / (NOT usable by software)
- 0x001c0000 --+- - - - - - - -:- - - - - - - -+-
- | : | \
- USER | : | > 256 KByte
- FPGA conf. | : | / (NOT usable by software)
- 0x00180000 --+- - - - - - - -:- - - - - - - -+-
- | : | \
- | : | |
- | : | > 512 KByte free for use
- 0x00140000 --+- - - - - - - -:- - - - - - - -+-|- u-boot _start()
- | : | /
- 0x00100000 ---15------------8|7-------------0-
-
-
-===============================================================================
- R E F E R E N C E S
-===============================================================================
-[1] http://www.altera.com/literature/ds/ds_nios_board_apex_20k200e.pdf
-[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf
-[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf
-[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf
-
-
-===============================================================================
-Stephan Linz <linz@li-pro.net>
+++ /dev/null
-
- U-Boot for Nios-32
-
- Last Update: February 1, 2004
-====================================================================
-
-This file contains information regarding U-Boot and the Altera
-Nios CPU. For information regarding U-Boot and the Nios Development
-Kits see:
-
- * Cyclone Edition (DK-1C20), see doc/README.dk1c20
- * Stratix Edition (DK-1S10), see doc/README.dk1s10 (TODO)
- * Stratix Edition (DK-1S40), see doc/README.dk1s40 (TODO)
- * Stratix Edition (DK-20K200), see doc/README.dk20k200 (TODO)
-
-For informations regarding Nios Development Kit hardware overview
-and the NIOS CPU standard configuration of all known boards made by
-Altera see:
-
- * Development Kit (DK) hardware overview, see doc/README.nios_DK
- * NIOS CPU standard_32 at DK-1C20, see doc/README.dk1c20_std32
- * NIOS CPU standard_32 at DK-1S10, see doc/README.dk1s10_std32
- * NIOS CPU standard_32 at DK-1S40, see doc/README.dk1s40_std32
- * NIOS CPU standard_32 at DK-20K200, see doc/README.dk20k200_std32
-
-For those interested in contributing ... see HELP WANTED below.
-
-
-1. OVERVIEW
-------------
-
-U-Boot has been successfully tested on the Nios Cyclone development
-board using both the 'safe' and 'standard 32' configurations with
-Nios CPU revision 3.1 (CPU_ID = 0x3018). U-Boot can be used with
-or without the GERMS monitor. The initial version of U-Boot for the
-Cyclone development kit is about 60 Kbyte and will fit in a single
-sector of on-board FLASH. Only the Nios 32-bit CPU is supported.
-
-1.1 GERMS Monitor
-------------------
-If GERMS is just not enough, then U-Boot is a great antibiotic.
-You will be very pleased with its high degree of configurability
-and its rich feature set.
-
-A few of the most obvious limitations of GERMS are overcome by
-using U-Boot (See 'Brain Damage'). Most notably, you can use
-minicom or Hyperterminal (duh).
-
-1.2 Altera Source Code
------------------------
-The Nios port does NOT include ANY sources that Altera has the
-copyright. This was a conscious decision ... not an accident.
-The Altera license is not clear in terms of distributing Altera
-sources (when altera silicon is not involved). This isn't really
-a problem as little, if any, of the Altera source contains
-features that are not already available in U-Boot.
-
-1.3 Debugging via OCI
----------------------
-The Nios port supports debugging with gdb and/or nios-console
-via the JTAG port. Stubs for debugging with gdb via the serial
-port are not currently implemented.
-
-
-2. CONFIGURATION OPTIONS/SETTINGS
-----------------------------------
-
-2.1 Nios-specific Options/Settings
------------------------------------
-All configuration options/settings that are specific to Nios begin
-with "CONFIG_NIOS_", "CONFIG_SYS_NIOS_", or "CONFIG_SYS_NIOS_CPU_".
-
-The configuration follows a two-stage process. In the first stage
-the NIOS CPU core will defined like defined in Alteras SOPC Builder.
-At this point we use the "CONFIG_SYS_NIOS_CPU_" defines exclusively. For
-more informations about all the definitions you have to setup see
-into current board configurations and doc/README.nios_CFG_NIOS_CPU.
-
-In second stage we bring the NIOS CPU configuration in relation to
-U-Boot configuration options/settings. The following is a list of
-currently defined Nios-specific options/parameters used inside of
-U-Boot. If any options are related to Standard-32 Nios SDK
-excalibur.h definitions, the related definition follows the
-description).
-
-CONFIG_NIOS -- defined for all Nios-32 boards.
-
-CONFIG_SYS_NIOS_CONSOLE -- the base address of the console UART or the JTAG
- stdio port. To enable a console via JTAG, define
- CONFIG_CONSOLE_JTAG and set CGF_NIOS_CONSOLE to the base address
- of the JTAG stdio port (normally OCI base + 0x00fa). Then
- run nios-console with the -w option.
- (standard-32: nasys_uart_0 resp. na_uart1_base).
-
-CONFIG_SYS_NIOS_FIXEDBAUD -- defined if the console UART PTF fixed_baud
- parameter is set to '1'.
-
-CONFIG_SYS_NIOS_MULT_HW -- use full hardware multiply (not yet implemented).
-
-CONFIG_SYS_NIOS_MULT_MSTEP -- use hardware assisted multiply using the
- MSTEP instruction (not yet implemented).
-
-CONFIG_SYS_NIOS_TMRBASE -- the base address of the timer used to support
- xxx_timer routines (e.g. set_timer(), get_timer(), etc.).
- (standard-32: nasys_timer_1 resp. na_lo_priority_timer2_base).
-
-CONFIG_SYS_NIOS_TMRIRQ -- the interrupt request (vector number) assigned to
- the timer. (standard-32: nasys_timer_1_irq resp.
- na_low_priority_timer2_irq).
-
-CONFIG_SYS_NIOS_TMRMS -- the period of the timer in milliseconds.
-
-CONFIG_SYS_NIOS_TMRCNT -- the preloadable counter value for the timer if it has
- no fixed period.
-
-CONFIG_SYS_NIOS_ASMIBASE -- the base address of the ASMI peripheral.
- (standard-32: na_asmi_base).
-
-CONFIG_SYS_NIOS_SPIBASE -- the base address of the SPI master (!) peripheral.
- (nasys_spi_0)
-
-CONFIG_SYS_NIOS_SPIBITS -- the amount of configured SPI data bits in PTF.
- This value can be 8 or 16 only! (PTF: databits)
-
-
-2.2 Differences in U-Boot Options/Settings
--------------------------------------------
-Some 'standard' U-Boot options/settings are treated differently in
-the Nios port. These are described below.
-
-CONFIG_SYS_GBL_DATA_OFFSET -- in the Nios port, this is the offset of the
- global data structure in the Nios memory space. More simply,
- the address of global data.
-
-
-3. ASSEMBLY CODING
--------------------
-
-In browsing the assembly source files, you may notice the absence
-of the 'magic macros' (e.g. MOVIA, MOVIP, ADDIP etc.). This is
-deliberate. The documentation for the magic macros is scant and
-it is hard to find ... it does not appear in the Nios programmer's
-manual, nor does it appear in the assembler manual. Regardless,
-the macros actually do very little to improve readability anyway.
-
-With this in mind, all assembler modules use only instructions that
-appear in the Nios programmer's manual OR are directly supported
-by the nios-elf toolchain. For example, the 'dec %rB' instruction
-is an alias for 'subi %rB,1' that is supported by the assembler
-but does not appear in the programmer's manual.
-
-
-4. BOOT PROCESS
----------------
-
-4.1 Boot process over GERMS
----------------------------
-When the NIOS CPU catch a reset signal it will begin to be running
-code from CONFIG_SYS_NIOS_CPU_RST_VECT. Normally at this place it will
-find the GERMS monitor. That's the case for the generic NIOS CPU
-configuration "standard_32". When the GERMS monitor starts running,
-it performs important system initializations and then looks for
-executable code in flash, using the following steps:
-
- 1. Examining the two bytes at CONFIG_SYS_NIOS_CPU_FLASH_BASE + 0x04000C.
- 2. Examining the button 0 on the PIO CONFIG_SYS_NIOS_CPU_BUTTON_PIO.
- 3. If the button is not pressed and the two bytes contain 'N'
- and 'i', the monitor executes a CALL to location
- CONFIG_SYS_NIOS_CPU_FLASH_BASE + 0x040000.
- 4. If the code is not executed in step 3 or the code returns,
- then prints an 8-digit version number to STDOUT and waits for
- user commands from STDIN.
-
-In normal case, for "standard_32", STDIN and STDOUT are the first
-serial port.
-
-4.2 Return to GERMS command line
---------------------------------
-During the boot process, the GERMS monitor checks for the existence
-of application software in flash memory. If found, the processor
-immediately executes the code. To return program execution to the
-GERMS monitor (that is, avoid running code stored in flash memory):
-
- 1. Hold down CONFIG_SYS_NIOS_CPU_BUTTON_PIO, button number 0.
- 2. Press then release the CPU reset button.
- 3. Release CONFIG_SYS_NIOS_CPU_BUTTON_PIO, button number 0.
-
-
-5. DEBUGGING WITH GDB
----------------------
-
-Debug sessions using gdb are currently supported only via JTAG. The
-stubs for debugging via a serial port are not implemented. To enable
-the gdb JTAG stubs, simply reference _brkpt_hw_int and _brkpt_sw_int
-at vector table offsets 3 and 4, respectively. For an example, see
-board/altera/dk1c20/vectors.S.
-
-5.1 Vector Table Initialization and ROM Stubs
----------------------------------------------
-If CONFIG_ROM_STUBS is defined, the debug breakpoint and single step
-entries in the vector table are restored to their initial values
-immediately _after_ initializing the vector table. Defining this macro
-is useful when ROM-based stubs are implemented.
-
-NOTE: The default GERMS monitor does NOT implement gdb stubs, nor does
-it initialize the vector table. Therefore, when debugging U-Boot, you
-should NOT set a software breakpoint prior to vector table initialization.
-
-5.2 Starting a Debug Session
-----------------------------
-If you're not familiar with gdb, you follow these step-by-step instructions.
-These instructions are NOT the only way to start a debug session, but they
-cover most of the individual functions to get you started.
-
- 1. Start the JTAG gdb server. Open a Nios shell window and start
- the server. When the server is started you must provide the base
- address of the OCI core. For example, when using the Cyclone
- development kit (DK1C20):
-
- $ nios-gdb-server --ocibase=0x00920800 --tcpport=2342
-
- 2. Start gdb. Open a Nios shell window, change to the top-level
- U-Boot directory and start gdb, specifying the u-boot elf file:
-
- $ nios-elf-gdb u-boot
-
- 3. Update target settings. From the file menu, select
- "Target Settings ..." and select the following, then click 'Ok':
-
- Target: Remote/TCP
- Port : 2342 (same as in step 1)
- Display download dialog: checked
- All other check boxes: unchecked
-
- 4. Connect to the target. Select menu: 'Run->Connect to target'.
- You should see a dialog box indicating the you successfully connected
- to the target.
-
- 5. Download U-Boot. Select menu: 'Run->Download'.
-
- 6. Open a gdb console window and set the source directory paths.
- Select menu: 'View->Console'. In the console window, enter the
- following commands, then close the console window:
-
- (gdb) directory common
- (gdb) directory arch/nios/cpu
- (gdb) directory arch/nios/lib
- (gdb) directory board/altera/dk1c20
-
- Note that the last command is for the DK1C20 board only. If you
- are using another board, specify that board's directory.
-
- 7. Open the file board.c (using the file menu in the lower
- left hand corner). Scroll to the board_init() routine and set
- a breakpoint.
-
- 8. Run U-Boot. Just click on the run icon, or select menu:
- 'Run->Run'. U-Boot should start running, then break at your
- breakpoint.
-
- 9. Have fun & start learning more about gdb.
-
-
-5.3 For advanced Users
-----------------------
-A few notes for those more familiar with gdb.
-
- -Serial port stubs are not implemented. Sorry, but it's just not
- worth _my_ effort. The JTAG stubs work great and are ridiculously
- simple to implement.
-
- -If you need to debug the early startup code (prior to the vector
- table initialization), use the nios-console debugger.
-
- - Connect, download & run -- there are some problems here. Connect
- download and run seperately to avoid trouble.
-
-6. BRAIN DAMAGE
-----------------
-
-This section describes some of the unfortunate and avoidable aspects
-of working with the Nios CPU ... and some things you can do to
-reduce your pain.
-
-6.1 GERMS doesn't work with Hyperterminal
-------------------------------------------
-GERMS doesn't do CR/LF mapping that is compatible with Hyperterminal
-(or minicom) -- geez. Regardless of you opion of Hyperterminal, this
-sad design decision is remedied by using U-Boot.
-
-6.2 cygwin Incompatibility
----------------------------
-The version of cygwin distributed with the nios GNUPro toolchain is
-out-of-date and incompatible with the latest cygwin distributions.
-In addition, many of the standard utilities are very dated as well.
-If you try to download and build the lastest version of grep for
-example, you'll quickly realize that a native gcc is not available
-(the next topic) which leads to U-Boot build problems (following
-topic).
-
-The solution ... well, you can wait for Altera ... or build as
-set of tools for linux.
-
-6.3 No native gcc
-------------------
-I'm not sure how this one slipped through the cracks ... but it is
-a real pain. Basically, if you want to build anything for the native
-environment -- forget it! A native (cygwin) gcc is not distributed,
-and the old version of cygwin makes locating one challenging.
-
-The solution ... same as above. Just download the gcc source from
-Altera and build up a set of cross tools for your favorite linux
-distro. Anybody who wants to use an already precompiled NIOS cross
-toolchain can it found in the CDK4NIOS project hosted by Source
-Forge at http://cdk4nios.sourceforge.net.
-
-6.4 Can't build default U-Boot
--------------------------------
-By default, when you build U-Boot you will be building some native
-tools along with the target elf, bin, and srec files. Without a
-native gcc, this (obviously) causes problems.
-
-For developers using the Altera cygwin tools you can remove the
-'tools' directory from SUBDIRS in the top-level Makefile. You will
-also have to edit common/Makefile:
-
-Replace:
-env_embedded.o: env_embedded.c ../tools/envcrc
- $(CC) $(AFLAGS) -Wa,--no-warn \
- -DENV_CRC=$(shell ../tools/envcrc) \
- -c -o $@ env_embedded.c
-
-With:
-env_embedded.o: env_embedded.c
- $(CC) $(AFLAGS) -Wa,--no-warn \
- -DENV_CRC=0 \
- -c -o $@ env_embedded.c
-
-BTW, thats a 'zero' ... not the letter 'O'. And not that the
-"../tools/envcrc" dependency is removed.
-
-
-7. HELP WANTED
----------------
-
-There are plenty of areas where help is needed. Here's are some ideas
-for those interested in contributing:
-
--CompactFlash. Port & test CF/FAT.
-
--Bedbug. Develop bedbug for Nios ... or at least provide a disassemble
- command.
-
--Add boot support for ucLinux (niosnommu).
-
--Implement (don't copy Altera code) the __mulxx routines using the
- MSTEP and MUL instructions (e.g. CONFIG_SYS_NIOS_MULT_HW and CONFIG_SYS_NIOS_MULT_MSTEP).
-
-
-Regards,
-
---Scott
-<smcnutt@psyent.com>
-
---Stephan
-<linz@li-pro.net>
+++ /dev/null
-
-===============================================================================
- C F G _ N I O S _ C P U _ * v s . N I O S S D K
-===============================================================================
-
-When ever you have to make a new NIOS CPU configuration you can use this table
-as a reference list to the original NIOS SDK symbols made by Alteras SOPC
-Builder. Look into excalibur.h and excalibur.s in your SDK path cpu_sdk/inc.
-Symbols beginning with a '[ptf]:' are coming from your SOPC sytem description
-(PTF file) in sections WIZARD_SCRIPT_ARGUMENTS or SYSTEM_BUILDER_INFO.
-
-C O R E N I O S S D K [1],[7]
--------------------------------------------------------------------------------
-CONFIG_SYS_NIOS_CPU_CLK nasys_clock_freq
-CONFIG_SYS_NIOS_CPU_ICACHE nasys_icache_size
-CONFIG_SYS_NIOS_CPU_DCACHE nasys_dcache_size
-CONFIG_SYS_NIOS_CPU_REG_NUMS nasys_nios_num_regs
-CONFIG_SYS_NIOS_CPU_MUL __nios_use_multiply__
-CONFIG_SYS_NIOS_CPU_MSTEP __nios_use_mstep__
-CONFIG_SYS_NIOS_CPU_STACK nasys_stack_top
-CONFIG_SYS_NIOS_CPU_VEC_BASE nasys_vector_table
-CONFIG_SYS_NIOS_CPU_VEC_SIZE nasys_vector_table_size
-CONFIG_SYS_NIOS_CPU_VEC_NUMS
-CONFIG_SYS_NIOS_CPU_RST_VECT nasys_reset_address
-CONFIG_SYS_NIOS_CPU_DBG_CORE nasys_debug_core
-CONFIG_SYS_NIOS_CPU_RAM_BASE na_onchip_ram_64_kbytes
-CONFIG_SYS_NIOS_CPU_RAM_SIZE na_onchip_ram_64_kbytes_size
-CONFIG_SYS_NIOS_CPU_ROM_BASE na_boot_monitor_rom
-CONFIG_SYS_NIOS_CPU_ROM_SIZE na_boot_monitor_rom_size
-CONFIG_SYS_NIOS_CPU_OCI_BASE nasys_oci_core
-CONFIG_SYS_NIOS_CPU_OCI_SIZE
-CONFIG_SYS_NIOS_CPU_SRAM_BASE na_ext_ram nasys_program_mem
- nasys_data_mem
-CONFIG_SYS_NIOS_CPU_SRAM_SIZE na_ext_ram_size nasys_program_mem_size
- nasys_data_mem_size
-CONFIG_SYS_NIOS_CPU_SDRAM_BASE na_sdram
-CONFIG_SYS_NIOS_CPU_SDRAM_SIZE na_sdram_size
-CONFIG_SYS_NIOS_CPU_FLASH_BASE na_ext_flash nasys_main_flash
- nasys_am29lv065d_flash_0
- nasys_flash_0
-CONFIG_SYS_NIOS_CPU_FLASH_SIZE na_ext_flash_size nasys_main_flash_size
-
-T I M E R N I O S S D K [3]
--------------------------------------------------------------------------------
-CONFIG_SYS_NIOS_CPU_TIMER_NUMS nasys_timer_count
-CONFIG_SYS_NIOS_CPU_TIMER[0-9] nasys_timer_[0-9]
-CONFIG_SYS_NIOS_CPU_TIMER[0-9]_IRQ nasys_timer_[0-9]_irq
-CONFIG_SYS_NIOS_CPU_TIMER[0-9]_PER [ptf]:period
- [ptf]:period_units
- [ptf]:mult
-CONFIG_SYS_NIOS_CPU_TIMER[0-9]_AR [ptf]:always_run
-CONFIG_SYS_NIOS_CPU_TIMER[0-9]_FP [ptf]:fixed_period
-CONFIG_SYS_NIOS_CPU_TIMER[0-9]_SS [ptf]:snapshot
-
-U A R T N I O S S D K [2]
--------------------------------------------------------------------------------
-CONFIG_SYS_NIOS_CPU_UART_NUMS nasys_uart_count
-CONFIG_SYS_NIOS_CPU_UART[0-9] nasys_uart_[0-9]
-CONFIG_SYS_NIOS_CPU_UART[0-9]_IRQ nasys_uart_[0-9]_irq
-CONFIG_SYS_NIOS_CPU_UART[0-9]_BR [ptf]:baud
-CONFIG_SYS_NIOS_CPU_UART[0-9]_DB [ptf]:data_bits
-CONFIG_SYS_NIOS_CPU_UART[0-9]_SB [ptf]:stop_bits
-CONFIG_SYS_NIOS_CPU_UART[0-9]_PA [ptf]:parity
-CONFIG_SYS_NIOS_CPU_UART[0-9]_HS [ptf]:use_cts_rts
-CONFIG_SYS_NIOS_CPU_UART[0-9]_EOP [ptf]:use_eop_register
-
-P I O N I O S S D K [4]
--------------------------------------------------------------------------------
-CONFIG_SYS_NIOS_CPU_PIO_NUMS nasys_pio_count
-CONFIG_SYS_NIOS_CPU_PIO[0-9] nasys_pio_[0-9]
-CONFIG_SYS_NIOS_CPU_PIO[0-9]_IRQ nasys_pio_[0-9]_irq
-CONFIG_SYS_NIOS_CPU_PIO[0-9]_BITS [ptf]:Data_Width
-CONFIG_SYS_NIOS_CPU_PIO[0-9]_TYPE [ptf]:has_tri
- [ptf]:has_out
- [ptf]:has_in
-CONFIG_SYS_NIOS_CPU_PIO[0-9]_CAP [ptf]:capture
-CONFIG_SYS_NIOS_CPU_PIO[0-9]_EDGE [ptf]:edge_type
-CONFIG_SYS_NIOS_CPU_PIO[0-9]_ITYPE [ptf]:irq_type
-
-S P I N I O S S D K [6]
--------------------------------------------------------------------------------
-CONFIG_SYS_NIOS_CPU_SPI_NUMS nasys_spi_count
-CONFIG_SYS_NIOS_CPU_SPI[0-9] nasys_spi_[0-9]
-CONFIG_SYS_NIOS_CPU_SPI[0-9]_IRQ nasys_spi_[0-9]_irq
-CONFIG_SYS_NIOS_CPU_SPI[0-9]_BITS [ptf]:databits
-CONFIG_SYS_NIOS_CPU_SPI[0-9]_MA [ptf]:ismaster
-CONFIG_SYS_NIOS_CPU_SPI[0-9]_SLN [ptf]:numslaves
-CONFIG_SYS_NIOS_CPU_SPI[0-9]_TCLK [ptf]:targetclock
-CONFIG_SYS_NIOS_CPU_SPI[0-9]_TDELAY [ptf]:targetdelay
-CONFIG_SYS_NIOS_CPU_SPI[0-9]_* [ptf]:*
-
-I D E N I O S S D K
--------------------------------------------------------------------------------
-CONFIG_SYS_NIOS_CPU_IDE_NUMS nasys_usersocket_count
-CONFIG_SYS_NIOS_CPU_IDE[0-9] nasys_usersocket_[0-9]
-
-A S M I N I O S S D K [5]
--------------------------------------------------------------------------------
-CONFIG_SYS_NIOS_CPU_ASMI_NUMS nasys_asmi_count
-CONFIG_SYS_NIOS_CPU_ASMI[0-9] nasys_asmi_[0-9]
-CONFIG_SYS_NIOS_CPU_ASMI[0-9]_IRQ nasys_asmi_[0-9]_irq
-
-E t h e r n e t ( L A N ) N I O S S D K
--------------------------------------------------------------------------------
-CONFIG_SYS_NIOS_CPU_LAN_NUMS
-CONFIG_SYS_NIOS_CPU_LAN[0-9]_BASE na_lan91c111
-CONFIG_SYS_NIOS_CPU_LAN[0-9]_OFFS LAN91C111_REGISTERS_OFFSET
-CONFIG_SYS_NIOS_CPU_LAN[0-9]_IRQ na_lan91c111_irq
-CONFIG_SYS_NIOS_CPU_LAN[0-9]_BUSW LAN91C111_DATA_BUS_WIDTH
-CONFIG_SYS_NIOS_CPU_LAN[0-9]_TYPE
-
-s y s t e m c o m p o s i n g N I O S S D K
--------------------------------------------------------------------------------
-CONFIG_SYS_NIOS_CPU_TICK_TIMER (na_low_priority_timer2)
-CONFIG_SYS_NIOS_CPU_USER_TIMER (na_timer1)
-CONFIG_SYS_NIOS_CPU_BUTTON_PIO (na_button_pio)
-CONFIG_SYS_NIOS_CPU_LCD_PIO (na_lcd_pio)
-CONFIG_SYS_NIOS_CPU_LED_PIO (na_led_pio)
-CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO (na_seven_seg_pio)
-CONFIG_SYS_NIOS_CPU_RECONF_PIO (na_reconfig_request_pio)
-CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO (na_cf_present_pio)
-CONFIG_SYS_NIOS_CPU_CFPOWER_PIO (na_cf_power_pio)
-CONFIG_SYS_NIOS_CPU_CFATASEL_PIO (na_cf_ata_select_pio)
-CONFIG_SYS_NIOS_CPU_USER_SPI (na_spi)
-
-
-===============================================================================
- R E F E R E N C E S
-===============================================================================
-[1] http://www.altera.com/literature/ds/ds_nioscpu.pdf
-[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf
-[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf
-[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf
-[5] http://www.altera.com/literature/ds/ds_nios_asmi.pdf
-[6] http://www.altera.com/literature/ds/ds_nios_spi.pdf
-[7] http://www.altera.com/literature/ds/ds_legacy_sdram_ctrl.pdf
-
-
-===============================================================================
-Stephan Linz <linz@li-pro.net>
+++ /dev/null
-
-===============================================================================
- H A R D W A R E O V E R V I E W
-===============================================================================
-===============|===============|===============|===============|===============
- | DK20K200 | DK1C20 | DK1S10 | DK1S40
----------------|---------------|---------------|---------------|---------------
- | | | |
- Schem. Nr. | Nios Dev.Brd. | P06-08713-00 | P06-08468-01 | P06-09178-00
- Rev. | pilot. | 01 | 01 | 00
- Date | 2001/02/06 | 2003/02/20 | 2003/02/14 | 2003/05/14
-[1] | | | |
-===============|===============|===============|===============|===============
- | | | |
- FPGA | "APEX" | "Cyclon" | "Stratix" | "Stratix"
- | EP20K200E | EP1C20 | EP1S10 | EP1S40
- | | |
- | (484 FBGA) | (400 FBGA) | (780 FBGA)
-[2],[3],[4] | | |
----------------|---------------|---------------|---------------|---------------
- | |
- Clock (OSC) | 33.333 MHz | 50 MHz
- | | (with ext. supply)
- |
- | PI49FCT3805
-[5] |
----------------|---------------|---------------|---------------|---------------
- | |
- Flash | 1 MByte | 8 MByte
- | |
- | AM29LV800BB | AM29LV065DU120REI
- | 8/16 bit bus | 8 bit bus
- | 1 chip | 1 chip
-[6],[7] | |
----------------|---------------|---------------|---------------|---------------
- | | |
- serial | no such | 4 MBits | no such
- Flash | | |
- | | EPCS4SI8 |
-[8] | | |
----------------|---------------|---------------|---------------|---------------
- | |
- Compact | no such, as | see below: prototype adapter
- Flash (CF) | module only |
- | |
----------------|---------------|---------------|---------------|---------------
- | |
- SRAM | 256 KByte | 1 MByte
- | |
- | IDT71V016S | IDT71V416S10PH
- | 32 bit bus | 32 bit bus
- | 2 chips | 2 chips
- | interlaced | interlaced
-[9],[10] | |
----------------|---------------|---------------|---------------|---------------
- | |
- SDRAM | SODIMM only | 16 MByte
- | |
- | | MT48LC4M32B2TG-7
- | 64 bit bus | 32 bit bus
- | | 1 chip
-[11] | |
-===============|===============|===============|===============|===============
- | |
- serial I/O | 1 RS232 | 2 RS232
- | |
- | LTC1386 | MAX3237CAI
- | |
- | port 1: | port 1:
- | RxD / TxD, | RxD / TxD,
- | RTS / CTS | RTS / CTS, DTR / DSR, DCD, RI
- | |
- | ! ! ! ! ! ! | port 2: | port 2:
- | RTS/CTS can | RxD / TxD | RxD / TxD
- | be RxD/TxD | | RTS / CTS, DTR / DSR
- | of 2nd port | | DCD, RI
-[12],[13] | ! ! ! ! ! ! | |
----------------|---------------|---------------|---------------|---------------
- | |
- Ethernet | no such, as | 1 10BaseT / 100BaseT
- | module only |
- | | LAN91C111-NE
- | | 32 bit bus
- | | no external EEPROM
- | | LEDA# for link
- | | LEDB# for Rx / Tx
-[14] | |
-===============|===============|===============|===============|===============
- | |
- user | 8 | no such
- switches | SW[7..0] |
- | |
----------------|---------------|---------------|---------------|---------------
- |
- user push | 4
- buttons | PB[3..0]
- |
----------------|---------------|---------------|---------------|---------------
- | |
- user LEDs | 2 | 8
- | LED[1..0] | LED[7..0]
- | |
----------------|---------------|---------------|---------------|---------------
- |
- user seven | 2
- segment | HEX[1..0][G..A,DP]
- |
-===============|===============|===============|===============|===============
- | |
- 3.3V proto- | w/o level | no such -- only 5V
- type adapter | shift buffer |
- | |
- | 40 I/O pins |
- | 1 card sel. |
- | 1 reset out. |
- | 1 OSC clock |
- | 1 CPU clock |
- | 1 clock out. |
- | |
----------------|---------------|---------------|---------------|---------------
- | |
- 5V prototype | with level | 2 ports -- both card ports supplied with its
- adapter | shift buffer | own level shift buffer
- | |
- | 40 I/O pins | port 1 & 2:
- | 1 card sel. | 41 I/O pins
- | 1 Vee ? ? ? | 1 card select
- | 1 reset out. | 1 reset output (from dev/board)
- | 1 OSC clock | 1 OSC clock (from dev/board)
- | 1 CPU clock | 1 CPU clock (from dev/board)
- | 1 clock inp. | 1 clock input (to dev/board)
- | |
- | | (special) port 1:
- | | 1 CF select
- | | 1 CF present
- | | 1 CF ATA select
- | | 1 CF power
- | |
- | | NOTE: Both card ports are prepared for raw
- | | IDE working. You can connect such
- | | devices directly to the 40 pin header.
- | | The signal PDIAG (passed diagnostic)
- | | is not connected to any I/O signal.
- | | Card port 1 is hard wired to the on
- | | board Copact Flash adapter together
- | | with all other signals needed by CF
- | | cards. Hot plug should be working too.
-[15],[16] | |
-===============|===============|===============|===============|===============
- | |
- config. CPLD | EPM7064 | EPM7128
- | |
- (alternative | decition by | decision by
- FPGA conf.) | jumper | push button
- | |
- | FPGA config. | FPGA config. | FPGA config.
- | from Flash | from Flash | from Flash
- | only | and EPCS4 | only
- | | |
-===============|===============|===============|===============|===============
-===============================================================================
-
-
-===============================================================================
- R E F E R E N C E S
-===============================================================================
-[1] http://www.altera.com/literature/lit-nio.jsp
-[2] http://www.altera.com/literature/lit-apx.jsp
-[3] http://www.altera.com/literature/lit-cyc.jsp
-[4] http://www.altera.com/literature/lit-stx.jsp
-[5] http://www.pericom.com/pdf/datasheets/PI49FCT3805.pdf
- http://www.pericom.com/products/clock/psempart.php?productID=PI49FCT3805
-[6] http://www.amd.com/us-en/FlashMemory/ProductInformation/0,,37_1447_1623_1468^1532,00.html
- http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/21490.pdf
-[7] http://www.amd.com/us-en/FlashMemory/ProductInformation/0,,37_1447_1623_1468^1596,00.html
- http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/23544b.pdf
-[8] http://www.altera.com/literature/lit-config.html
- http://preview.altera.com/literature/ds/micron.pdf
-[9] http://www.idt.com/products/pages/Asynchronous_SRAMs-71V016SA.html
-[10] http://www.idt.com/products/pages/Asynchronous_SRAMs-71V416SL.html
-[11] http://www.micron.com/products/dram/sdram/part.aspx?part=MT48LC4M32B2TG-7
-[12] http://www.linear.com/prod/datasheet.html?datasheet=33
- http://www.linear.com/pdf/1386fa.pdf
-[13] http://www.maxim-ic.com/quick_view2.cfm/qv_pk/1068/ln/en
- http://pdfserv.maxim-ic.com/en/ds/MAX3222-MAX3241.pdf
-[14] http://www.smsc.com/main/catalog/lan91c111.html
-[15] http://www.t13.org/index.html
-[16] http://www.compactflash.org/faqs/faq.htm
-
-
-===============================================================================
-Stephan Linz <linz@li-pro.net>
thus the compiler cannot perform type checks on these assignments.
2. The pointer to the jump table is passed to the application in a
- machine-dependent way. PowerPC, ARM, MIPS and Blackfin architectures
- use a dedicated register to hold the pointer to the 'global_data'
- structure: r2 on PowerPC, r8 on ARM, k0 on MIPS, and P3 on Blackfin.
- The x86 architecture does not use such a register; instead, the
- pointer to the 'global_data' structure is passed as 'argv[-1]'
- pointer.
+ machine-dependent way. PowerPC, ARM, MIPS, Blackfin and Nios II
+ architectures use a dedicated register to hold the pointer to the
+ 'global_data' structure: r2 on PowerPC, r8 on ARM, k0 on MIPS,
+ P3 on Blackfin and gp on Nios II. The x86 architecture does not
+ use such a register; instead, the pointer to the 'global_data'
+ structure is passed as 'argv[-1]' pointer.
The application can access the 'global_data' structure in the same
way as U-Boot does:
that returns the ABI version of the running U-Boot. I.e., a
typical application startup may look like this:
- int my_app (int argc, char *argv[])
+ int my_app (int argc, char * const argv[])
{
app_startup (argv);
if (get_version () != XF_VERSION)
ARM 0x0c100000 0x0c100000
MIPS 0x80200000 0x80200000
Blackfin 0x00001000 0x00001000
+ Nios II 0x02000000 0x02000000
For example, the "hello world" application may be loaded and
executed on a PowerPC board with the following commands:
- arch : Architecture name, mandatory for types: "standalone", "kernel",
"firmware", "ramdisk" and "fdt". Valid architecture names are: "alpha",
"arm", "i386", "ia64", "mips", "mips64", "ppc", "s390", "sh", "sparc",
- "sparc64", "m68k", "nios", "microblaze", "nios2", "blackfin", "avr32",
- "st200".
+ "sparc64", "m68k", "microblaze", "nios2", "blackfin", "avr32", "st200".
- entry : entry point address, address size is determined by
'#address-cells' property of the root node. Mandatory for for types:
"standalone" and "kernel".
#endif
};
-int do_pca953x(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_pca953x(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
static uint8_t chip = CONFIG_SYS_I2C_PCA953X_ADDR;
int val;
COBJS-$(CONFIG_ALI152X) += ali512x.o
COBJS-$(CONFIG_DS4510) += ds4510.o
COBJS-$(CONFIG_FSL_LAW) += fsl_law.o
+COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
COBJS-$(CONFIG_NS87308) += ns87308.o
COBJS-$(CONFIG_STATUS_LED) += status_led.o
COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o
#endif
};
-int do_ds4510(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_ds4510(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
static uint8_t chip = CONFIG_SYS_I2C_DS4510_ADDR;
cmd_tbl_t *c;
puts("\n");
}
-int do_pmic(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_pmic(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *cmd;
int nregs;
--- /dev/null
+/*
+ * Status LED driver based on GPIO access conventions of Linux
+ *
+ * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <common.h>
+#include <status_led.h>
+#include <asm/gpio.h>
+
+/* assume led is active low */
+
+void __led_init(led_id_t mask, int state)
+{
+ gpio_direction_output(mask, (state == STATUS_LED_ON) ? 0 : 1);
+}
+
+void __led_set(led_id_t mask, int state)
+{
+ gpio_set_value(mask, (state == STATUS_LED_ON) ? 0 : 1);
+}
+
+void __led_toggle(led_id_t mask)
+{
+ gpio_set_value(mask, !gpio_get_value(mask));
+}
MMC_I_MASK = ~MMC_I_MASK_RXFIFO_RD_REQ;
while (len) {
if (MMC_I_REG & MMC_I_REG_RXFIFO_RD_REQ) {
-#ifdef CONFIG_PXA27X
+#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
int i;
for (i = min(len, 32); i; i--) {
*dst++ = *((volatile uchar *)&MMC_RXFIFO);
set_GPIO_mode(GPIO6_MMCCLK_MD);
set_GPIO_mode(GPIO8_MMCCS0_MD);
#endif
+#ifdef CONFIG_CPU_MONAHANS /* pxa3xx */
+ CKENA |= CKENA_12_MMC0 | CKENA_13_MMC1;
+#else /* pxa2xx */
CKEN |= CKEN12_MMC; /* enable MMC unit clock */
-
+#endif
MMC_CLKRT = MMC_CLKRT_0_3125MHZ;
MMC_RESTO = MMC_RES_TO_MAX;
MMC_SPI = MMC_SPI_DISABLE;
debug("Detected SD card\n");
break;
}
-#ifdef CONFIG_PXA27X
- udelay(10000);
-#else
udelay(200000);
-#endif
}
if (retries <= 0 || !(IF_TYPE_SD == mmc_dev.if_type)) {
retries = 10;
while (retries-- && resp && !(resp[0] & 0x80000000)) {
-#ifdef CONFIG_PXA27X
- udelay(10000);
-#else
udelay(200000);
-#endif
resp =
mmc_cmd(MMC_CMD_SEND_OP_COND, 0x00ff, 0x8000,
MMC_CMDAT_R3);
MMC_CLKRT = 0; /* 20 MHz */
resp = mmc_cmd(MMC_CMD_SELECT_CARD, rca, 0, MMC_CMDAT_R1);
-#ifdef CONFIG_PXA27X
+#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
if (IF_TYPE_SD == mmc_dev.if_type) {
resp = mmc_cmd(MMC_CMD_APP_CMD, rca, 0, MMC_CMDAT_R1);
resp = mmc_cmd(SD_CMD_APP_SET_BUS_WIDTH, 0, 2, MMC_CMDAT_R1);
int bfin_nfc_devready(struct mtd_info *mtd)
{
pr_stamp();
- return (bfin_read_NFC_STAT() & NBUSY ? 1 : 0);
+ return (bfin_read_NFC_STAT() & NBUSY) ? 1 : 0;
}
/*
bfin_write_NFC_DATA_WR(buf[i]);
}
+
+ /* Wait for the buffer to drain before we return */
+ while (!(bfin_read_NFC_STAT() & WB_EMPTY))
+ if (ctrlc())
+ return;
}
/*
struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode)
{
const struct atmel_spi_flash_params *params;
- unsigned long page_size;
+ unsigned page_size;
unsigned int family;
struct atmel_spi_flash *asf;
unsigned int i;
* params->blocks_per_sector
* params->nr_sectors;
- debug("SF: Detected %s with page size %lu, total %u bytes\n",
- params->name, page_size, asf->flash.size);
+ printf("SF: Detected %s with page size %u, total ",
+ params->name, page_size);
+ print_size(asf->flash.size, "\n");
return &asf->flash;
mcx->flash.size = params->page_size * params->pages_per_sector
* params->sectors_per_block * params->nr_blocks;
- printf("SF: Detected %s with page size %u, total %u bytes\n",
- params->name, params->page_size, mcx->flash.size);
+ printf("SF: Detected %s with page size %u, total ",
+ params->name, params->page_size);
+ print_size(mcx->flash.size, "\n");
return &mcx->flash;
}
spsn->flash.size = params->page_size * params->pages_per_sector
* params->nr_sectors;
- debug("SF: Detected %s with page size %u, total %u bytes\n",
- params->name, params->page_size, spsn->flash.size);
+ printf("SF: Detected %s with page size %u, total ",
+ params->name, params->page_size);
+ print_size(spsn->flash.size, "\n");
return &spsn->flash;
}
spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
if (!spi) {
- debug("SF: Failed to set up slave\n");
+ printf("SF: Failed to set up slave\n");
return NULL;
}
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO
case 0x20:
+ case 0xff: /* Let the stmicro func handle non-JEDEC ids */
flash = spi_flash_probe_stmicro(spi, idcode);
break;
#endif
break;
#endif
default:
- debug("SF: Unsupported manufacturer %02X\n", idcode[0]);
+ printf("SF: Unsupported manufacturer %02X\n", idcode[0]);
flash = NULL;
break;
}
stm->flash.read = sst_read_fast;
stm->flash.size = SST_SECTOR_SIZE * params->nr_sectors;
- debug("SF: Detected %s with page size %u, total %u bytes\n",
- params->name, SST_SECTOR_SIZE, stm->flash.size);
+ printf("SF: Detected %s with page size %u, total ",
+ params->name, SST_SECTOR_SIZE);
+ print_size(stm->flash.size, "\n");
/* Flash powers up read-only, so clear BP# bits */
sst_unlock(&stm->flash);
#define CMD_M25PXX_DP 0xb9 /* Deep Power-down */
#define CMD_M25PXX_RES 0xab /* Release from DP, and Read Signature */
+#define STM_ID_M25P10 0x11
#define STM_ID_M25P16 0x15
#define STM_ID_M25P20 0x12
#define STM_ID_M25P32 0x16
}
static const struct stmicro_spi_flash_params stmicro_spi_flash_table[] = {
+ {
+ .idcode1 = STM_ID_M25P10,
+ .page_size = 256,
+ .pages_per_sector = 128,
+ .nr_sectors = 4,
+ .name = "M25P10",
+ },
{
.idcode1 = STM_ID_M25P16,
.page_size = 256,
struct stmicro_spi_flash *stm;
unsigned int i;
+ if (idcode[0] == 0xff) {
+ i = spi_flash_cmd(spi, CMD_M25PXX_RES,
+ idcode, 4);
+ if (i)
+ return NULL;
+ if ((idcode[3] & 0xf0) == 0x10) {
+ idcode[0] = 0x20;
+ idcode[1] = 0x20;
+ idcode[2] = idcode[3] + 1;
+ } else
+ return NULL;
+ }
+
for (i = 0; i < ARRAY_SIZE(stmicro_spi_flash_table); i++) {
params = &stmicro_spi_flash_table[i];
if (params->idcode1 == idcode[2]) {
stm->flash.size = params->page_size * params->pages_per_sector
* params->nr_sectors;
- debug("SF: Detected %s with page size %u, total %u bytes\n",
- params->name, params->page_size, stm->flash.size);
+ printf("SF: Detected %s with page size %u, total ",
+ params->name, params->page_size);
+ print_size(stm->flash.size, "\n");
return &stm->flash;
}
struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode)
{
const struct winbond_spi_flash_params *params;
- unsigned long page_size;
+ unsigned page_size;
struct winbond_spi_flash *stm;
unsigned int i;
* params->sectors_per_block
* params->nr_blocks;
- debug("SF: Detected %s with page size %u, total %u bytes\n",
- params->name, page_size, stm->flash.size);
+ printf("SF: Detected %s with page size %u, total ",
+ params->name, page_size);
+ print_size(stm->flash.size, "\n");
return &stm->flash;
}
vol->reserved_pebs = be32_to_cpu(vtbl[i].reserved_pebs);
vol->alignment = be32_to_cpu(vtbl[i].alignment);
vol->data_pad = be32_to_cpu(vtbl[i].data_pad);
+ vol->upd_marker = vtbl[i].upd_marker;
vol->vol_type = vtbl[i].vol_type == UBI_VID_DYNAMIC ?
UBI_DYNAMIC_VOLUME : UBI_STATIC_VOLUME;
vol->name_len = be16_to_cpu(vtbl[i].name_len);
| TBIANA_FULL_DUPLEX \
)
-/* Force the TBI PHY into 1000Mbps full duplex when in SGMII mode */
+/* By default force the TBI PHY into 1000Mbps full duplex when in SGMII mode */
+#ifndef CONFIG_TSEC_TBICR_SETTINGS
#define TBICR_SETTINGS ( \
TBICR_PHY_RESET \
| TBICR_FULL_DUPLEX \
| TBICR_SPEED1_SET \
)
+#else
+#define TBICR_SETTINGS CONFIG_TSEC_TBICR_SETTINGS
+#endif /* CONFIG_TSEC_TBICR_SETTINGS */
/* Configure the TBI for SGMII operation */
static void tsec_configure_serdes(struct tsec_private *priv)
return qe_firmware_uploaded ? &qe_firmware_info : NULL;
}
-static int qe_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int qe_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
ulong addr;
wday = rtc_read (RTC_DAY_OF_WEEK);
mon = rtc_read (RTC_MONTH);
year = rtc_read (RTC_YEAR);
-#ifdef CONFIG_AMIGAONEG3SE
- wday -= 1; /* VIA 686 stores Sunday = 1, Monday = 2, ... */
-#endif
#ifdef RTC_DEBUG
printf ( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
"hr: %02x min: %02x sec: %02x\n",
rtc_write (RTC_YEAR, bin2bcd(tmp->tm_year % 100));
rtc_write (RTC_MONTH, bin2bcd(tmp->tm_mon));
-#ifdef CONFIG_AMIGAONEG3SE
- rtc_write (RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday)+1);
-#else
rtc_write (RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday));
-#endif
rtc_write (RTC_DATE_OF_MONTH, bin2bcd(tmp->tm_mday));
rtc_write (RTC_HOURS, bin2bcd(tmp->tm_hour));
rtc_write (RTC_MINUTES, bin2bcd(tmp->tm_min ));
out8(RTC(reg),val);
}
-#elif defined(CONFIG_AMIGAONEG3SE)
-
-#include "../board/MAI/AmigaOneG3SE/via686.h"
-#include "../board/MAI/AmigaOneG3SE/memio.h"
-
-
-static uchar rtc_read (short reg)
-{
- out_byte(CMOS_ADDR, (uint8)reg);
- return in_byte(CMOS_DATA);
-}
-
-static void rtc_write (short reg, uchar val)
-{
- out_byte(CMOS_ADDR, (uint8)reg);
- out_byte(CMOS_DATA, (uint8)val);
-}
-
#elif defined(CONFIG_EVAL5200)
static uchar rtc_read (short reg)
#ifdef CONFIG_KIRKWOOD
#include <asm/arch/kirkwood.h>
#endif
+#ifdef CONFIG_ORION5X
+#include <asm/arch/orion5x.h>
+#endif
#if defined (CONFIG_SERIAL_MULTI)
#include <serial.h>
LIB := $(obj)libspi.a
+COBJS-$(CONFIG_ALTERA_SPI) += altera_spi.o
COBJS-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o
COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o
--- /dev/null
+/*
+ * Altera SPI driver
+ *
+ * based on bfin_spi.c
+ * Copyright (c) 2005-2008 Analog Devices Inc.
+ * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <malloc.h>
+#include <spi.h>
+
+#define ALTERA_SPI_RXDATA 0
+#define ALTERA_SPI_TXDATA 4
+#define ALTERA_SPI_STATUS 8
+#define ALTERA_SPI_CONTROL 12
+#define ALTERA_SPI_SLAVE_SEL 20
+
+#define ALTERA_SPI_STATUS_ROE_MSK (0x8)
+#define ALTERA_SPI_STATUS_TOE_MSK (0x10)
+#define ALTERA_SPI_STATUS_TMT_MSK (0x20)
+#define ALTERA_SPI_STATUS_TRDY_MSK (0x40)
+#define ALTERA_SPI_STATUS_RRDY_MSK (0x80)
+#define ALTERA_SPI_STATUS_E_MSK (0x100)
+
+#define ALTERA_SPI_CONTROL_IROE_MSK (0x8)
+#define ALTERA_SPI_CONTROL_ITOE_MSK (0x10)
+#define ALTERA_SPI_CONTROL_ITRDY_MSK (0x40)
+#define ALTERA_SPI_CONTROL_IRRDY_MSK (0x80)
+#define ALTERA_SPI_CONTROL_IE_MSK (0x100)
+#define ALTERA_SPI_CONTROL_SSO_MSK (0x400)
+
+#ifndef CONFIG_SYS_ALTERA_SPI_LIST
+#define CONFIG_SYS_ALTERA_SPI_LIST { CONFIG_SYS_SPI_BASE }
+#endif
+
+static ulong altera_spi_base_list[] = CONFIG_SYS_ALTERA_SPI_LIST;
+
+struct altera_spi_slave {
+ struct spi_slave slave;
+ ulong base;
+};
+#define to_altera_spi_slave(s) container_of(s, struct altera_spi_slave, slave)
+
+__attribute__((weak))
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return bus < ARRAY_SIZE(altera_spi_base_list) && cs < 32;
+}
+
+__attribute__((weak))
+void spi_cs_activate(struct spi_slave *slave)
+{
+ struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
+ writel(1 << slave->cs, altspi->base + ALTERA_SPI_SLAVE_SEL);
+ writel(ALTERA_SPI_CONTROL_SSO_MSK, altspi->base + ALTERA_SPI_CONTROL);
+}
+
+__attribute__((weak))
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+ struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
+ writel(0, altspi->base + ALTERA_SPI_CONTROL);
+ writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL);
+}
+
+void spi_init(void)
+{
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+ struct altera_spi_slave *altspi;
+
+ if (!spi_cs_is_valid(bus, cs))
+ return NULL;
+
+ altspi = malloc(sizeof(*altspi));
+ if (!altspi)
+ return NULL;
+
+ altspi->slave.bus = bus;
+ altspi->slave.cs = cs;
+ altspi->base = altera_spi_base_list[bus];
+ debug("%s: bus:%i cs:%i base:%lx\n", __func__,
+ bus, cs, altspi->base);
+
+ return &altspi->slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+ struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
+ free(altspi);
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+ struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
+
+ debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
+ writel(0, altspi->base + ALTERA_SPI_CONTROL);
+ writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL);
+ return 0;
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+ struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
+
+ debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
+ writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL);
+}
+
+#ifndef CONFIG_ALTERA_SPI_IDLE_VAL
+# define CONFIG_ALTERA_SPI_IDLE_VAL 0xff
+#endif
+
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
+ void *din, unsigned long flags)
+{
+ struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
+ /* assume spi core configured to do 8 bit transfers */
+ uint bytes = bitlen / 8;
+ const uchar *txp = dout;
+ uchar *rxp = din;
+
+ debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
+ slave->bus, slave->cs, bitlen, bytes, flags);
+ if (bitlen == 0)
+ goto done;
+
+ if (bitlen % 8) {
+ flags |= SPI_XFER_END;
+ goto done;
+ }
+
+ /* empty read buffer */
+ if (readl(altspi->base + ALTERA_SPI_STATUS) &
+ ALTERA_SPI_STATUS_RRDY_MSK)
+ readl(altspi->base + ALTERA_SPI_RXDATA);
+ if (flags & SPI_XFER_BEGIN)
+ spi_cs_activate(slave);
+
+ while (bytes--) {
+ uchar d = txp ? *txp++ : CONFIG_ALTERA_SPI_IDLE_VAL;
+ debug("%s: tx:%x ", __func__, d);
+ writel(d, altspi->base + ALTERA_SPI_TXDATA);
+ while (!(readl(altspi->base + ALTERA_SPI_STATUS) &
+ ALTERA_SPI_STATUS_RRDY_MSK))
+ ;
+ d = readl(altspi->base + ALTERA_SPI_RXDATA);
+ if (rxp)
+ *rxp++ = d;
+ debug("rx:%x\n", d);
+ }
+ done:
+ if (flags & SPI_XFER_END)
+ spi_cs_deactivate(slave);
+
+ return 0;
+}
int spi_claim_bus(struct spi_slave *slave)
{
struct davinci_spi_slave *ds = to_davinci_spi(slave);
- unsigned int scalar, data1_reg_val = 0;
+ unsigned int scalar;
/* Enable the SPI hardware */
writel(SPIGCR0_SPIRST_MASK, &ds->regs->gcr0);
writel(8 | (scalar << SPIFMT_PRESCALE_SHIFT) |
(1 << SPIFMT_PHASE_SHIFT), &ds->regs->fmt0);
- /* hold cs active at end of transfer until explicitly de-asserted */
- data1_reg_val = (1 << SPIDAT1_CSHOLD_SHIFT) |
- (slave->cs << SPIDAT1_CSNR_SHIFT);
- writel(data1_reg_val, &ds->regs->dat1);
-
/*
* Including a minor delay. No science here. Should be good even with
* no delay
writel(0, &ds->regs->lvl);
/* enable SPI */
- writel((readl(&ds->regs->gcr1) |
- SPIGCR1_SPIENA_MASK), &ds->regs->gcr1);
+ writel((readl(&ds->regs->gcr1) | SPIGCR1_SPIENA_MASK), &ds->regs->gcr1);
return 0;
}
writel(SPIGCR0_SPIRST_MASK, &ds->regs->gcr0);
}
+/*
+ * This functions needs to act like a macro to avoid pipeline reloads in the
+ * loops below. Use always_inline. This gains us about 160KiB/s and the bloat
+ * appears to be zero bytes (da830).
+ */
+__attribute__((always_inline))
+static inline u32 davinci_spi_xfer_data(struct davinci_spi_slave *ds, u32 data)
+{
+ u32 buf_reg_val;
+
+ /* send out data */
+ writel(data, &ds->regs->dat1);
+
+ /* wait for the data to clock in/out */
+ while ((buf_reg_val = readl(&ds->regs->buf)) & SPIBUF_RXEMPTY_MASK)
+ ;
+
+ return buf_reg_val;
+}
+
+static int davinci_spi_read(struct spi_slave *slave, unsigned int len,
+ u8 *rxp, unsigned long flags)
+{
+ struct davinci_spi_slave *ds = to_davinci_spi(slave);
+ unsigned int data1_reg_val;
+
+ /* enable CS hold, CS[n] and clear the data bits */
+ data1_reg_val = ((1 << SPIDAT1_CSHOLD_SHIFT) |
+ (slave->cs << SPIDAT1_CSNR_SHIFT));
+
+ /* wait till TXFULL is deasserted */
+ while (readl(&ds->regs->buf) & SPIBUF_TXFULL_MASK)
+ ;
+
+ /* preload the TX buffer to avoid clock starvation */
+ writel(data1_reg_val, &ds->regs->dat1);
+
+ /* keep reading 1 byte until only 1 byte left */
+ while ((len--) > 1)
+ *rxp++ = davinci_spi_xfer_data(ds, data1_reg_val);
+
+ /* clear CS hold when we reach the end */
+ if (flags & SPI_XFER_END)
+ data1_reg_val &= ~(1 << SPIDAT1_CSHOLD_SHIFT);
+
+ /* read the last byte */
+ *rxp = davinci_spi_xfer_data(ds, data1_reg_val);
+
+ return 0;
+}
+
+static int davinci_spi_write(struct spi_slave *slave, unsigned int len,
+ const u8 *txp, unsigned long flags)
+{
+ struct davinci_spi_slave *ds = to_davinci_spi(slave);
+ unsigned int data1_reg_val;
+
+ /* enable CS hold and clear the data bits */
+ data1_reg_val = ((1 << SPIDAT1_CSHOLD_SHIFT) |
+ (slave->cs << SPIDAT1_CSNR_SHIFT));
+
+ /* wait till TXFULL is deasserted */
+ while (readl(&ds->regs->buf) & SPIBUF_TXFULL_MASK)
+ ;
+
+ /* preload the TX buffer to avoid clock starvation */
+ if (len > 2) {
+ writel(data1_reg_val | *txp++, &ds->regs->dat1);
+ len--;
+ }
+
+ /* keep writing 1 byte until only 1 byte left */
+ while ((len--) > 1)
+ davinci_spi_xfer_data(ds, data1_reg_val | *txp++);
+
+ /* clear CS hold when we reach the end */
+ if (flags & SPI_XFER_END)
+ data1_reg_val &= ~(1 << SPIDAT1_CSHOLD_SHIFT);
+
+ /* write the last byte */
+ davinci_spi_xfer_data(ds, data1_reg_val | *txp);
+
+ return 0;
+}
+
+#ifndef CONFIG_SPI_HALF_DUPLEX
+static int davinci_spi_read_write(struct spi_slave *slave, unsigned int len,
+ u8 *rxp, const u8 *txp, unsigned long flags)
+{
+ struct davinci_spi_slave *ds = to_davinci_spi(slave);
+ unsigned int data1_reg_val;
+
+ /* enable CS hold and clear the data bits */
+ data1_reg_val = ((1 << SPIDAT1_CSHOLD_SHIFT) |
+ (slave->cs << SPIDAT1_CSNR_SHIFT));
+
+ /* wait till TXFULL is deasserted */
+ while (readl(&ds->regs->buf) & SPIBUF_TXFULL_MASK)
+ ;
+
+ /* keep reading and writing 1 byte until only 1 byte left */
+ while ((len--) > 1)
+ *rxp++ = davinci_spi_xfer_data(ds, data1_reg_val | *txp++);
+
+ /* clear CS hold when we reach the end */
+ if (flags & SPI_XFER_END)
+ data1_reg_val &= ~(1 << SPIDAT1_CSHOLD_SHIFT);
+
+ /* read and write the last byte */
+ *rxp = davinci_spi_xfer_data(ds, data1_reg_val | *txp);
+
+ return 0;
+}
+#endif
+
int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout, void *din, unsigned long flags)
{
- struct davinci_spi_slave *ds = to_davinci_spi(slave);
- unsigned int len, data1_reg_val = readl(&ds->regs->dat1);
- unsigned int i_cnt = 0, o_cnt = 0, buf_reg_val;
- const u8 *txp = dout; /* dout can be NULL for read operation */
- u8 *rxp = din; /* din can be NULL for write operation */
+ unsigned int len;
if (bitlen == 0)
/* Finish any previously submitted transfers */
len = bitlen / 8;
- /* do an empty read to clear the current contents */
- readl(&ds->regs->buf);
-
- /* keep writing and reading 1 byte until done */
- while ((i_cnt < len) || (o_cnt < len)) {
- /* read RX buffer and flags */
- buf_reg_val = readl(&ds->regs->buf);
-
- /* if data is available */
- if ((i_cnt < len) &&
- (buf_reg_val & SPIBUF_RXEMPTY_MASK) == 0) {
- /*
- * If there is no read buffer simply
- * ignore the read character
- */
- if (rxp)
- *rxp++ = buf_reg_val & 0xFF;
- /* increment read words count */
- i_cnt++;
- }
-
- /*
- * if the tx buffer is empty and there
- * is still data to transmit
- */
- if ((o_cnt < len) &&
- ((buf_reg_val & SPIBUF_TXFULL_MASK) == 0)) {
- /* write the data */
- data1_reg_val &= ~0xFFFF;
- if (txp)
- data1_reg_val |= *txp++;
- /*
- * Write to DAT1 is required to keep
- * the serial transfer going.
- * We just terminate when we reach the end.
- */
- if ((o_cnt == (len - 1)) && (flags & SPI_XFER_END)) {
- /* clear CS hold */
- writel(data1_reg_val &
- ~(1 << SPIDAT1_CSHOLD_SHIFT),
- &ds->regs->dat1);
- } else {
- /* enable CS hold and write TX register */
- data1_reg_val |= ((1 << SPIDAT1_CSHOLD_SHIFT) |
- (slave->cs << SPIDAT1_CSNR_SHIFT));
- writel(data1_reg_val, &ds->regs->dat1);
- }
- /* increment written words count */
- o_cnt++;
- }
- }
- return 0;
+ if (!dout)
+ return davinci_spi_read(slave, len, din, flags);
+ else if (!din)
+ return davinci_spi_write(slave, len, dout, flags);
+#ifndef CONFIG_SPI_HALF_DUPLEX
+ else
+ return davinci_spi_read_write(slave, len, din, dout, flags);
+#endif
out:
if (flags & SPI_XFER_END) {
- writel(data1_reg_val &
- ~(1 << SPIDAT1_CSHOLD_SHIFT), &ds->regs->dat1);
+ u8 dummy = 0;
+ davinci_spi_write(slave, 1, &dummy, flags);
}
return 0;
}
return NULL;
}
- memset(p, sz, 0);
+ memset(p, 0, sz);
return p;
}
(dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
qh->qh_endpt2 = cpu_to_hc32(endpt);
qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
- qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
td = NULL;
tdp = &qh->qh_overlay.qt_next;
writel(get_pllb_init(), &pmc->pllbr);
while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
;
+#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
+ /* Enable UPLL */
+ writel(readl(&pmc->uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN,
+ &pmc->uckr);
+ while ((readl(&pmc->sr) & AT91_PMC_LOCKU) != AT91_PMC_LOCKU)
+ ;
+
+ /* Select PLLA as input clock of OHCI */
+ writel(AT91_PMC_USBS_USB_UPLL | AT91_PMC_USBDIV_10, &pmc->usb);
#endif
/* Enable USB host clock. */
writel(0, &pmc->pllbr);
while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0)
;
+#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
+ /* Disable UPLL */
+ writel(readl(&pmc->uckr) & (~AT91_PMC_UPLLEN), &pmc->uckr);
+ while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU)
+ ;
#endif
return 0;
#define OHCI_CONTROL_INIT \
(OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
-/*
- * e.g. PCI controllers need this
- */
-#ifdef CONFIG_SYS_OHCI_SWAP_REG_ACCESS
-# define readl(a) __swap_32(*((volatile u32 *)(a)))
-# define writel(a, b) (*((volatile u32 *)(b)) = __swap_32((volatile u32)a))
-#else
-# define readl(a) (*((volatile u32 *)(a)))
-# define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
-#endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */
-
#define min_t(type, x, y) \
({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
struct usb_device *devgone;
static inline u32 roothub_a(struct ohci *hc)
- { return readl(&hc->regs->roothub.a); }
+ { return ohci_readl(&hc->regs->roothub.a); }
static inline u32 roothub_b(struct ohci *hc)
- { return readl(&hc->regs->roothub.b); }
+ { return ohci_readl(&hc->regs->roothub.b); }
static inline u32 roothub_status(struct ohci *hc)
- { return readl(&hc->regs->roothub.status); }
+ { return ohci_readl(&hc->regs->roothub.status); }
static inline u32 roothub_portstatus(struct ohci *hc, int i)
- { return readl(&hc->regs->roothub.portstatus[i]); }
+ { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
/* forward declaration */
static int hc_interrupt(void);
struct ohci_regs *regs = controller->regs;
__u32 temp;
- temp = readl(®s->revision) & 0xff;
+ temp = ohci_readl(®s->revision) & 0xff;
if (temp != 0x10)
dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
- temp = readl(®s->control);
+ temp = ohci_readl(®s->control);
dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
(temp & OHCI_CTRL_RWE) ? " RWE" : "",
(temp & OHCI_CTRL_RWC) ? " RWC" : "",
temp & OHCI_CTRL_CBSR
);
- temp = readl(®s->cmdstatus);
+ temp = ohci_readl(®s->cmdstatus);
dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
(temp & OHCI_SOC) >> 16,
(temp & OHCI_OCR) ? " OCR" : "",
(temp & OHCI_HCR) ? " HCR" : ""
);
- ohci_dump_intr_mask("intrstatus", readl(®s->intrstatus));
- ohci_dump_intr_mask("intrenable", readl(®s->intrenable));
+ ohci_dump_intr_mask("intrstatus", ohci_readl(®s->intrstatus));
+ ohci_dump_intr_mask("intrenable", ohci_readl(®s->intrenable));
- maybe_print_eds("ed_periodcurrent", readl(®s->ed_periodcurrent));
+ maybe_print_eds("ed_periodcurrent",
+ ohci_readl(®s->ed_periodcurrent));
- maybe_print_eds("ed_controlhead", readl(®s->ed_controlhead));
- maybe_print_eds("ed_controlcurrent", readl(®s->ed_controlcurrent));
+ maybe_print_eds("ed_controlhead", ohci_readl(®s->ed_controlhead));
+ maybe_print_eds("ed_controlcurrent",
+ ohci_readl(®s->ed_controlcurrent));
- maybe_print_eds("ed_bulkhead", readl(®s->ed_bulkhead));
- maybe_print_eds("ed_bulkcurrent", readl(®s->ed_bulkcurrent));
+ maybe_print_eds("ed_bulkhead", ohci_readl(®s->ed_bulkhead));
+ maybe_print_eds("ed_bulkcurrent", ohci_readl(®s->ed_bulkcurrent));
- maybe_print_eds("donehead", readl(®s->donehead));
+ maybe_print_eds("donehead", ohci_readl(®s->donehead));
}
static void ohci_dump_roothub(ohci_t *controller, int verbose)
/* implicitly requeued */
if (urb->dev->irq_handle &&
(urb->dev->irq_act_len = urb->actual_length)) {
- writel(OHCI_INTR_WDH, ®s->intrenable);
- readl(®s->intrenable); /* PCI posting flush */
+ ohci_writel(OHCI_INTR_WDH, ®s->intrenable);
+ ohci_readl(®s->intrenable); /* PCI posting flush */
urb->dev->irq_handle(urb->dev);
- writel(OHCI_INTR_WDH, ®s->intrdisable);
- readl(®s->intrdisable); /* PCI posting flush */
+ ohci_writel(OHCI_INTR_WDH, ®s->intrdisable);
+ ohci_readl(®s->intrdisable); /* PCI posting flush */
}
urb->actual_length = 0;
td_submit_job(
case PIPE_CONTROL:
ed->hwNextED = 0;
if (ohci->ed_controltail == NULL)
- writel(ed, &ohci->regs->ed_controlhead);
+ ohci_writel(ed, &ohci->regs->ed_controlhead);
else
ohci->ed_controltail->hwNextED =
m32_swap((unsigned long)ed);
if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
!ohci->ed_rm_list[1] && !ohci->sleeping) {
ohci->hc_control |= OHCI_CTRL_CLE;
- writel(ohci->hc_control, &ohci->regs->control);
+ ohci_writel(ohci->hc_control, &ohci->regs->control);
}
ohci->ed_controltail = edi;
break;
case PIPE_BULK:
ed->hwNextED = 0;
if (ohci->ed_bulktail == NULL)
- writel(ed, &ohci->regs->ed_bulkhead);
+ ohci_writel(ed, &ohci->regs->ed_bulkhead);
else
ohci->ed_bulktail->hwNextED =
m32_swap((unsigned long)ed);
if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
!ohci->ed_rm_list[1] && !ohci->sleeping) {
ohci->hc_control |= OHCI_CTRL_BLE;
- writel(ohci->hc_control, &ohci->regs->control);
+ ohci_writel(ohci->hc_control, &ohci->regs->control);
}
ohci->ed_bulktail = edi;
break;
if (ed->ed_prev == NULL) {
if (!ed->hwNextED) {
ohci->hc_control &= ~OHCI_CTRL_CLE;
- writel(ohci->hc_control, &ohci->regs->control);
+ ohci_writel(ohci->hc_control,
+ &ohci->regs->control);
}
- writel(m32_swap(*((__u32 *)&ed->hwNextED)),
+ ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
&ohci->regs->ed_controlhead);
} else {
ed->ed_prev->hwNextED = ed->hwNextED;
if (ed->ed_prev == NULL) {
if (!ed->hwNextED) {
ohci->hc_control &= ~OHCI_CTRL_BLE;
- writel(ohci->hc_control, &ohci->regs->control);
+ ohci_writel(ohci->hc_control,
+ &ohci->regs->control);
}
- writel(m32_swap(*((__u32 *)&ed->hwNextED)),
+ ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
&ohci->regs->ed_bulkhead);
} else {
ed->ed_prev->hwNextED = ed->hwNextED;
if (!ohci->sleeping) {
/* start bulk list */
- writel(OHCI_BLF, &ohci->regs->cmdstatus);
+ ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
}
break;
if (!ohci->sleeping) {
/* start Control list */
- writel(OHCI_CLF, &ohci->regs->cmdstatus);
+ ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
}
break;
#define OK(x) len = (x); break
#ifdef DEBUG
-#define WR_RH_STAT(x) {info("WR:status %#8x", (x)); writel((x), \
+#define WR_RH_STAT(x) {info("WR:status %#8x", (x)); ohci_writel((x), \
&gohci.regs->roothub.status); }
#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, \
- (x)); writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); }
+ (x)); ohci_writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); }
#else
-#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
-#define WR_RH_PORTSTAT(x) writel((x), \
+#define WR_RH_STAT(x) ohci_writel((x), &gohci.regs->roothub.status)
+#define WR_RH_PORTSTAT(x) ohci_writel((x), \
&gohci.regs->roothub.portstatus[wIndex-1])
#endif
#define RD_RH_STAT roothub_status(&gohci)
int timeout = 1000;
pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
- writel(readl(base + EHCI_USBCMD_OFF) | EHCI_USBCMD_HCRESET,
- base + EHCI_USBCMD_OFF);
+ base += EHCI_USBCMD_OFF;
+ ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
- while (readl(base + EHCI_USBCMD_OFF) & EHCI_USBCMD_HCRESET) {
+ while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
if (timeout-- <= 0) {
printf("USB RootHub reset timed out!");
break;
} else
printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
#endif
- if (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
- /* SMM owns the HC */
- writel(OHCI_OCR, &ohci->regs->cmdstatus);/* request ownership */
+ if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
+ /* SMM owns the HC, request ownership */
+ ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
info("USB HC TakeOver from SMM");
- while (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
+ while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
wait_ms(10);
if (--smm_timeout == 0) {
err("USB HC TakeOver failed!");
}
/* Disable HC interrupts */
- writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
+ ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
ohci->slot_name,
- readl(&ohci->regs->control));
+ ohci_readl(&ohci->regs->control));
/* Reset USB (needed by some controllers) */
ohci->hc_control = 0;
- writel(ohci->hc_control, &ohci->regs->control);
+ ohci_writel(ohci->hc_control, &ohci->regs->control);
/* HC Reset requires max 10 us delay */
- writel(OHCI_HCR, &ohci->regs->cmdstatus);
- while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
+ ohci_writel(OHCI_HCR, &ohci->regs->cmdstatus);
+ while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
if (--timeout == 0) {
err("USB HC reset timed out!");
return -1;
/* Tell the controller where the control and bulk lists are
* The lists are empty now. */
- writel(0, &ohci->regs->ed_controlhead);
- writel(0, &ohci->regs->ed_bulkhead);
+ ohci_writel(0, &ohci->regs->ed_controlhead);
+ ohci_writel(0, &ohci->regs->ed_bulkhead);
- writel((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
+ ohci_writel((__u32)ohci->hcca,
+ &ohci->regs->hcca); /* reset clears this */
fminterval = 0x2edf;
- writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
+ ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
- writel(fminterval, &ohci->regs->fminterval);
- writel(0x628, &ohci->regs->lsthresh);
+ ohci_writel(fminterval, &ohci->regs->fminterval);
+ ohci_writel(0x628, &ohci->regs->lsthresh);
/* start controller operations */
ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
ohci->disabled = 0;
- writel(ohci->hc_control, &ohci->regs->control);
+ ohci_writel(ohci->hc_control, &ohci->regs->control);
/* disable all interrupts */
mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
OHCI_INTR_OC | OHCI_INTR_MIE);
- writel(mask, &ohci->regs->intrdisable);
+ ohci_writel(mask, &ohci->regs->intrdisable);
/* clear all interrupts */
mask &= ~OHCI_INTR_MIE;
- writel(mask, &ohci->regs->intrstatus);
+ ohci_writel(mask, &ohci->regs->intrstatus);
/* Choose the interrupts we care about now - but w/o MIE */
mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
- writel(mask, &ohci->regs->intrenable);
+ ohci_writel(mask, &ohci->regs->intrenable);
#ifdef OHCI_USE_NPS
/* required for AMD-756 and some Mac platforms */
- writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
+ ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
&ohci->regs->roothub.a);
- writel(RH_HS_LPSC, &ohci->regs->roothub.status);
+ ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
#endif /* OHCI_USE_NPS */
#define mdelay(n) ({unsigned long msec = (n); while (msec--) udelay(1000); })
!(m32_swap(ohci->hcca->done_head) & 0x01)) {
ints = OHCI_INTR_WDH;
} else {
- ints = readl(®s->intrstatus);
+ ints = ohci_readl(®s->intrstatus);
if (ints == ~(u32)0) {
ohci->disabled++;
err("%s device removed!", ohci->slot_name);
return -1;
} else {
- ints &= readl(®s->intrenable);
+ ints &= ohci_readl(®s->intrenable);
if (ints == 0) {
dbg("hc_interrupt: returning..\n");
return 0xff;
if (ints & OHCI_INTR_WDH) {
wait_ms(1);
- writel(OHCI_INTR_WDH, ®s->intrdisable);
- (void)readl(®s->intrdisable); /* flush */
+ ohci_writel(OHCI_INTR_WDH, ®s->intrdisable);
+ (void)ohci_readl(®s->intrdisable); /* flush */
stat = dl_done_list(&gohci);
- writel(OHCI_INTR_WDH, ®s->intrenable);
- (void)readl(®s->intrdisable); /* flush */
+ ohci_writel(OHCI_INTR_WDH, ®s->intrenable);
+ (void)ohci_readl(®s->intrdisable); /* flush */
}
if (ints & OHCI_INTR_SO) {
dbg("USB Schedule overrun\n");
- writel(OHCI_INTR_SO, ®s->intrenable);
+ ohci_writel(OHCI_INTR_SO, ®s->intrenable);
stat = -1;
}
if (ints & OHCI_INTR_SF) {
unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
wait_ms(1);
- writel(OHCI_INTR_SF, ®s->intrdisable);
+ ohci_writel(OHCI_INTR_SF, ®s->intrdisable);
if (ohci->ed_rm_list[frame] != NULL)
- writel(OHCI_INTR_SF, ®s->intrenable);
+ ohci_writel(OHCI_INTR_SF, ®s->intrenable);
stat = 0xff;
}
- writel(ints, ®s->intrstatus);
+ ohci_writel(ints, ®s->intrstatus);
return stat;
}
* usb-ohci.h
*/
+/*
+ * e.g. PCI controllers need this
+ */
+#ifdef CONFIG_SYS_OHCI_SWAP_REG_ACCESS
+# define ohci_readl(a) __swap_32(*((volatile u32 *)(a)))
+# define ohci_writel(a, b) (*((volatile u32 *)(b)) = __swap_32((volatile u32)a))
+#else
+# define ohci_readl(a) (*((volatile u32 *)(a)))
+# define ohci_writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
+#endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */
+
/* functions for doing board or CPU specific setup/cleanup */
extern int usb_board_init(void);
extern int usb_board_stop(void);
/*
* This is the structure of the OHCI controller's memory mapped I/O
- * region. This is Memory Mapped I/O. You must use the readl() and
- * writel() macros defined in asm/io.h to access these!!
+ * region. This is Memory Mapped I/O. You must use the ohci_readl() and
+ * ohci_writel() macros defined in this file to access these!!
*/
struct ohci_regs {
/* control and status registers */
/* MUSB platform configuration */
struct musb_config musb_cfg = {
- (struct musb_regs *)DA8XX_USB_OTG_CORE_BASE,
- DA8XX_USB_OTG_TIMEOUT,
- 0
+ .regs = (struct musb_regs *)DA8XX_USB_OTG_CORE_BASE,
+ .timeout = DA8XX_USB_OTG_TIMEOUT,
+ .musb_speed = 0,
};
/*
/* MUSB platform configuration */
struct musb_config musb_cfg = {
- (struct musb_regs *)MENTOR_USB0_BASE,
- DAVINCI_USB_TIMEOUT,
- 0
+ .regs = (struct musb_regs *)MENTOR_USB0_BASE,
+ .timeout = DAVINCI_USB_TIMEOUT,
+ .musb_speed = 0,
};
/* MUSB module register overlay */
{
#if defined(CONFIG_MUSB_HCD)
u8 devctl;
+ u8 busctl;
#endif
/* disable all interrupts */
/* put into basic highspeed mode and start session */
writeb(MUSB_POWER_HSENAB, &musbr->power);
#if defined(CONFIG_MUSB_HCD)
+ /* Program PHY to use EXT VBUS if required */
+ if (musb_cfg.extvbus == 1) {
+ busctl = musb_read_ulpi_buscontrol(musbr);
+ musb_write_ulpi_buscontrol(musbr, busctl | ULPI_USE_EXTVBUS);
+ }
+
devctl = readb(&musbr->devctl);
writeb(devctl | MUSB_DEVCTL_SESSION, &musbr->devctl);
#endif
u16 rxfifoadd;
u32 vcontrol;
u16 hwvers;
- u16 reserved2[5];
+ u16 reserved2a[1];
+ u8 ulpi_busctl;
+ u8 reserved2b[1];
+ u16 reserved2[3];
u8 epinfo;
u8 raminfo;
u8 linkinfo;
#define MUSB_DEVCTL_HR 0x02
#define MUSB_DEVCTL_SESSION 0x01
+/* ULPI VBUSCONTROL */
+#define ULPI_USE_EXTVBUS 0x01
+#define ULPI_USE_EXTVBUSIND 0x02
+
/* TESTMODE */
#define MUSB_TEST_FORCE_HOST 0x80
#define MUSB_TEST_FIFO_ACCESS 0x40
struct musb_regs *regs;
u32 timeout;
u8 musb_speed;
+ u8 extvbus;
};
/* externally defined data */
# define readb(addr) (u8)bfin_read16(addr)
# undef writeb
# define writeb(b, addr) bfin_write16(addr, b)
+/*
+ * The USB PHY on current Blackfin processors is a UTMI+ level 2 PHY.
+ * However, it has no ULPI support - so there are no registers at all.
+ * That means accesses to ULPI_BUSCONTROL have to be abstracted away.
+ */
+static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr)
+{
+ return 0;
+}
+static inline void musb_write_ulpi_buscontrol(struct musb_regs *musbr, u8 val)
+{}
+#else
+static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr)
+{
+ return readb(&musbr->ulpi_busctl);
+}
+static inline void musb_write_ulpi_buscontrol(struct musb_regs *musbr, u8 val)
+{
+ writeb(val, &musbr->ulpi_busctl);
+}
#endif
#endif /* __MUSB_HDRC_DEFS_H__ */
static int platform_needs_initialization = 1;
struct musb_config musb_cfg = {
- (struct musb_regs *)MENTOR_USB0_BASE,
- OMAP3_USB_TIMEOUT,
- 0
+ .regs = (struct musb_regs *)MENTOR_USB0_BASE,
+ .timeout = OMAP3_USB_TIMEOUT,
+ .musb_speed = 0,
};
/*
stdby &= ~OMAP3_OTG_FORCESTDBY_STANDBY;
writel(stdby, &otg->forcestdby);
+#ifdef CONFIG_OMAP3_EVM
+ musb_cfg.extvbus = omap3_evm_need_extvbus();
+#endif
platform_needs_initialization = 0;
}
int musb_platform_init(void);
+#ifdef CONFIG_OMAP3_EVM
+extern u8 omap3_evm_use_extvbus(void);
+#endif
+
#endif /* _MUSB_OMAP3_H */
/*****************************************************************************/
+/*
+ * Do not enforce drivers (or board code) to provide empty
+ * video_set_lut() if they do not support 8 bpp format.
+ * Implement weak default function instead.
+ */
+void __video_set_lut (unsigned int index, unsigned char r,
+ unsigned char g, unsigned char b)
+{
+}
+void video_set_lut (unsigned int, unsigned char, unsigned char, unsigned char)
+ __attribute__((weak, alias("__video_set_lut")));
+
#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
#define FILL_8BIT_332RGB(r,g,b) { \
#include <common.h>
+#include <asm/io.h>
#include <video_fb.h>
#include <sm501.h>
GraphicDevice sm501;
+void write_be32(int off, unsigned int val)
+{
+ out_be32((unsigned __iomem *)(sm501.isaBase + off), val);
+}
+
+void write_le32(int off, unsigned int val)
+{
+ out_le32((unsigned __iomem *)(sm501.isaBase + off), val);
+}
+
+void (*write_reg32)(int off, unsigned int val) = write_be32;
+
/*-----------------------------------------------------------------------------
* SmiSetRegs --
*-----------------------------------------------------------------------------
*/
const SMI_REGS *preg = board_get_regs ();
while (preg->Index) {
- write32 (preg->Index, preg->Value);
+ write_reg32 (preg->Index, preg->Value);
/*
* Insert a delay between
*/
}
}
+#ifdef CONFIG_VIDEO_SM501_PCI
+static struct pci_device_id sm501_pci_tbl[] = {
+ { PCI_VENDOR_ID_SMI, PCI_DEVICE_ID_SMI_501 },
+ {}
+};
+#endif
+
+/*
+ * We do not enforce board code to provide empty/unused
+ * functions for this driver and define weak default
+ * functions here.
+ */
+unsigned int __board_video_init (void)
+{
+ return 0;
+}
+
+unsigned int board_video_init (void)
+ __attribute__((weak, alias("__board_video_init")));
+
+unsigned int __board_video_get_fb (void)
+{
+ return 0;
+}
+
+unsigned int board_video_get_fb (void)
+ __attribute__((weak, alias("__board_video_get_fb")));
+
+void __board_validate_screen (unsigned int base)
+{
+}
+
+void board_validate_screen (unsigned int base)
+ __attribute__((weak, alias("__board_validate_screen")));
+
/*-----------------------------------------------------------------------------
* video_hw_init --
*-----------------------------------------------------------------------------
*/
void *video_hw_init (void)
{
+#ifdef CONFIG_VIDEO_SM501_PCI
+ unsigned int pci_mem_base, pci_mmio_base;
+ unsigned int id;
+ unsigned short device_id;
+ pci_dev_t devbusfn;
+ int mem;
+#endif
unsigned int *vm, i;
memset (&sm501, 0, sizeof (GraphicDevice));
+#ifdef CONFIG_VIDEO_SM501_PCI
+ printf("Video: ");
+
+ /* Look for SM501/SM502 chips */
+ devbusfn = pci_find_devices(sm501_pci_tbl, 0);
+ if (devbusfn < 0) {
+ printf ("PCI Controller not found.\n");
+ goto not_pci;
+ }
+
+ /* Setup */
+ pci_write_config_dword (devbusfn, PCI_COMMAND,
+ (PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
+ pci_read_config_word (devbusfn, PCI_DEVICE_ID, &device_id);
+ pci_read_config_dword (devbusfn, PCI_REVISION_ID, &id);
+ pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, &pci_mem_base);
+ pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_1, &pci_mmio_base);
+ sm501.frameAdrs = pci_mem_to_phys (devbusfn, pci_mem_base);
+ sm501.isaBase = pci_mem_to_phys (devbusfn, pci_mmio_base);
+
+ if (sm501.isaBase)
+ write_reg32 = write_le32;
+
+ mem = in_le32 ((unsigned __iomem *)(sm501.isaBase + 0x10));
+ mem = (mem & 0x0000e000) >> 13;
+ switch (mem) {
+ case 1:
+ mem = 8;
+ break;
+ case 2:
+ mem = 16;
+ break;
+ case 3:
+ mem = 32;
+ break;
+ case 4:
+ mem = 64;
+ break;
+ case 5:
+ mem = 2;
+ break;
+ case 0:
+ default:
+ mem = 4;
+ }
+ printf ("PCI SM50%d %d MB\n", ((id & 0xff) == 0xC0) ? 2 : 1, mem);
+not_pci:
+#endif
/*
* Initialization of the access to the graphic chipset Retreive base
* address of the chipset (see board/RPXClassic/eccx.c)
*/
- if ((sm501.isaBase = board_video_init ()) == 0) {
- return (NULL);
+ if (!sm501.isaBase) {
+ sm501.isaBase = board_video_init ();
+ if (!sm501.isaBase)
+ return NULL;
}
- if ((sm501.frameAdrs = board_video_get_fb ()) == 0) {
- return (NULL);
+ if (!sm501.frameAdrs) {
+ sm501.frameAdrs = board_video_get_fb ();
+ if (!sm501.frameAdrs)
+ return NULL;
}
sm501.winSizeX = board_get_width ();
return (&sm501);
}
-
-/*-----------------------------------------------------------------------------
- * video_set_lut --
- *-----------------------------------------------------------------------------
- */
-void video_set_lut (
- unsigned int index, /* color number */
- unsigned char r, /* red */
- unsigned char g, /* green */
- unsigned char b /* blue */
- )
-{
-}
static char buf[BUF_SZ];
-int main(int argc, char *argv[])
+int main(int argc, char * const argv[])
{
int rv = 0, h, i, j, devs_no;
struct api_signature *sig = NULL;
/*
* printf() and vprintf() are stolen from u-boot/common/console.c
*/
-void printf (const char *fmt, ...)
+int printf (const char *fmt, ...)
{
va_list args;
uint i;
/* Print the string */
ub_puts (printbuffer);
+ return i;
}
-void vprintf (const char *fmt, va_list args)
+int vprintf (const char *fmt, va_list args)
{
uint i;
char printbuffer[256];
/* Print the string */
ub_puts (printbuffer);
+ return i;
}
void putc (const char c)
}
-int main (int argc, char *argv[])
+int main (int argc, char * const argv[])
{
unsigned char *eth_addr;
uchar buf[6];
CPPFLAGS += -I..
+# For PowerPC there's no need to compile standalone applications as a
+# relocatable executable. The relocation data is not needed, and
+# also causes the entry point of the standalone application to be
+# inconsistent.
+ifeq ($(ARCH),powerpc)
+AFLAGS := $(filter-out $(RELFLAGS),$(AFLAGS))
+CFLAGS := $(filter-out $(RELFLAGS),$(CFLAGS))
+CPPFLAGS := $(filter-out $(RELFLAGS),$(CPPFLAGS))
+endif
+
all: $(obj).depend $(OBJS) $(LIB) $(SREC) $(BIN) $(ELF)
#########################################################################
}
}
-int atmel_df_pow2(int argc, char *argv[])
+int atmel_df_pow2(int argc, char * const argv[])
{
/* Print the ABI version */
app_startup(argv);
static int reset_eeprom(unsigned long ioaddr, unsigned char *hwaddr);
-int eepro100_eeprom(int argc, char *argv[])
+int eepro100_eeprom(int argc, char * const argv[])
{
int ret = 0;
#include <common.h>
#include <exports.h>
-int hello_world (int argc, char *argv[])
+int hello_world (int argc, char * const argv[])
{
int i;
static void irq_handler (void *arg);
-int interrupt (int argc, char *argv[])
+int interrupt (int argc, char * const argv[])
{
int c, irq = -1;
#endif /* STANDALONE */
#ifdef STANDALONE
-int mem_to_mem_idma2intr (int argc, char *argv[])
+int mem_to_mem_idma2intr (int argc, char * const argv[])
#else
-int do_idma (bd_t * bd, int argc, char *argv[])
+int do_idma (bd_t * bd, int argc, char * const argv[])
#endif /* STANDALONE */
{
int i;
int read_eeprom_reg (struct eth_device *dev, int reg);
void print_macaddr (struct eth_device *dev);
-int smc91111_eeprom (int argc, char *argv[])
+int smc91111_eeprom (int argc, char * const argv[])
{
int c, i, j, done, line, reg, value, start, what;
char input[50];
/**
* smc911x_eeprom - our application's main() function
*/
-int smc911x_eeprom(int argc, char *argv[])
+int smc911x_eeprom(int argc, char * const argv[])
{
/* Avoid initializing on stack as gcc likes to call memset() */
struct eth_device dev;
" lw $25, %1($25)\n" \
" jr $25\n" \
: : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "t9");
-#elif defined(CONFIG_NIOS)
-/*
- * %g7 holds the pointer to the global_data. %g0 is call clobbered.
- */
-#define EXPORT_FUNC(x) \
- asm volatile ( \
-" .globl " #x "\n" \
-#x ":\n" \
-" pfx %%hi(%0)\n" \
-" movi %%g0, %%lo(%0)\n" \
-" add %%g0, %%g7\n" \
-" ld %%g0, [%%g0]\n" \
-" pfx %1\n" \
-" ld %%g0, [%%g0]\n" \
-" jmp %%g0\n" \
-" nop \n" \
- : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x) : "r0");
#elif defined(CONFIG_NIOS2)
/*
- * r15 holds the pointer to the global_data, r8 is call-clobbered
+ * gp holds the pointer to the global_data, r8 is call-clobbered
*/
#define EXPORT_FUNC(x) \
asm volatile ( \
#x ":\n" \
" movhi r8, %%hi(%0)\n" \
" ori r8, r0, %%lo(%0)\n" \
-" add r8, r8, r15\n" \
+" add r8, r8, gp\n" \
" ldw r8, 0(r8)\n" \
" ldw r8, %1(r8)\n" \
" jmp r8\n" \
- : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "r15");
+ : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "gp");
#elif defined(CONFIG_M68K)
/*
* d7 holds the pointer to the global_data, a0 is a call-clobbered
extern unsigned long __bss_start, _end;
-void app_startup(char **argv)
+void app_startup(char * const *argv)
{
unsigned char * cp = (unsigned char *) &__bss_start;
};
-int test_burst (int argc, char *argv[])
+int test_burst (int argc, char * const argv[])
{
unsigned long size = CACHE_LINE_SIZE;
unsigned int pass = 0;
static char *usage = "\n[q, b, e, ?] ";
-int timer (int argc, char *argv[])
+int timer (int argc, char * const argv[])
{
cpmtimer8xx_t *cpmtimerp; /* Pointer to the CPM Timer structure */
tid_8xx_cpmtimer_t hw;
do_fat_read (const char *filename, void *buffer, unsigned long maxsize,
int dols)
{
-#if CONFIG_NIOS /* NIOS CPU cannot access big automatic arrays */
- static
-#endif
char fnamecopy[2048];
boot_sector bs;
volume_info volinfo;
int current_bp;
struct pt_regs *regs;
- void (*do_break) (cmd_tbl_t *, int, int, char *[]);
+ void (*do_break) (cmd_tbl_t *, int, int, char * const []);
void (*break_isr) (struct pt_regs *);
int (*find_empty) (void);
int (*set) (int, unsigned long);
int maxargs; /* maximum number of arguments */
int repeatable; /* autorepeat allowed? */
/* Implementation function */
- int (*cmd)(struct cmd_tbl_s *, int, int, char *[]);
+ int (*cmd)(struct cmd_tbl_s *, int, int, char * const []);
char *usage; /* Usage message (short) */
#ifdef CONFIG_SYS_LONGHELP
char *help; /* Help message (long) */
#endif
#ifdef CONFIG_AUTO_COMPLETE
/* do auto completion on the arguments */
- int (*complete)(int argc, char *argv[], char last_char, int maxv, char *cmdv[]);
+ int (*complete)(int argc, char * const argv[], char last_char, int maxv, char *cmdv[]);
#endif
};
/* common/command.c */
int _do_help (cmd_tbl_t *cmd_start, int cmd_items, cmd_tbl_t * cmdtp, int
- flag, int argc, char *argv[]);
+ flag, int argc, char * const argv[]);
cmd_tbl_t *find_cmd(const char *cmd);
cmd_tbl_t *find_cmd_tbl (const char *cmd, cmd_tbl_t *table, int table_len);
*
* All commands use a common argument format:
*
- * void function (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+ * void function (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
*/
typedef void command_t (cmd_tbl_t *, int, int, char *[]);
* STDIO based functions (can always be used)
*/
/* serial stuff */
-void serial_printf (const char *fmt, ...)
+int serial_printf (const char *fmt, ...)
__attribute__ ((format (__printf__, 1, 2)));
/* stdin */
int getc(void);
/* stdout */
void putc(const char c);
void puts(const char *s);
-void printf(const char *fmt, ...)
+int printf(const char *fmt, ...)
__attribute__ ((format (__printf__, 1, 2)));
-void vprintf(const char *fmt, va_list args);
+int vprintf(const char *fmt, va_list args);
/* stderr */
#define eputc(c) fputc(stderr, c)
#define stderr 2
#define MAX_FILES 3
-void fprintf(int file, const char *fmt, ...)
+int fprintf(int file, const char *fmt, ...)
__attribute__ ((format (__printf__, 2, 3)));
void fputs(int file, const char *s);
void fputc(int file, const char c);
int cpu_status(int nr);
int cpu_reset(int nr);
int cpu_disable(int nr);
-int cpu_release(int nr, int argc, char *argv[]);
+int cpu_release(int nr, int argc, char * const argv[]);
#endif
#endif /* __ASSEMBLY__ */
#include <stdio.h>
#include <string.h>
-extern int errno;
-
#if !defined(__WIN32__) && !defined(__MINGW32__)
# include <sys/mman.h>
#endif
+++ /dev/null
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/***********************************************************************
- * Include the whole NIOS CPU configuration.
- *
- * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!!
- *
- ***********************************************************************/
-
-#if defined(CONFIG_NIOS_BASE_32)
-#include <configs/ADNPESC1_base_32.h>
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup right NIOS CPU configuration
-#endif
-
-/*------------------------------------------------------------------------
- * BOARD/CPU -- TOP-LEVEL
- *----------------------------------------------------------------------*/
-#define CONFIG_NIOS 1 /* NIOS-32 core */
-#define CONFIG_ADNPESC1 1 /* SSV ADNP/ESC1 board */
-#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */
-#define CONFIG_SYS_HZ 1000 /* 1 msec time tick */
-#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
-
-/*------------------------------------------------------------------------
- * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM)
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_SDRAM_SIZE != 0)
-
-#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_NIOS_CPU_SDRAM_BASE
-#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_NIOS_CPU_SDRAM_SIZE
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup any SDRAM in NIOS CPU config
-#endif
-
-#if defined(CONFIG_SYS_NIOS_CPU_SRAM_BASE) && defined(CONFIG_SYS_NIOS_CPU_SRAM_SIZE)
-
-#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_NIOS_CPU_SRAM_BASE
-#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_NIOS_CPU_SRAM_SIZE
-
-#else
-
-#undef CONFIG_SYS_SRAM_BASE
-#undef CONFIG_SYS_SRAM_SIZE
-
-#endif
-
-#define CONFIG_SYS_VECT_BASE CONFIG_SYS_NIOS_CPU_VEC_BASE
-
-/*------------------------------------------------------------------------
- * MEMORY ORGANIZATION - For the most part, you can put things pretty
- * much anywhere. This is pretty flexible for Nios. So here we make some
- * arbitrary choices & assume that the monitor is placed at the end of
- * a memory resource (so you must make sure TEXT_BASE is chosen
- * appropriately -- this is very important if you plan to move your
- * memory to another place as configured at this time !!!).
- *
- * -The heap is placed below the monitor.
- * -Global data is placed below the heap.
- * -The stack is placed below global data (&grows down).
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256k */
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET
-
-/*------------------------------------------------------------------------
- * FLASH (AM29LV065D)
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
-
-#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_NIOS_CPU_FLASH_BASE
-#define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_NIOS_CPU_FLASH_SIZE
-#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
-#define CONFIG_SYS_FLASH_WORD_SIZE unsigned short /* flash word size */
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup any Flash memory in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * ENVIRONMENT
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
-
-#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */
-
-/* Mem addr of environment */
-#if defined(CONFIG_NIOS_BASE_32)
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup the environment base address CONFIG_ENV_ADDR
-#endif
-
-#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
-#define CONFIG_ENV_OVERWRITE /* Serial/eth change Ok */
-
-#else
-#define CONFIG_ENV_IS_NOWHERE 1 /* NO Environment */
-#endif
-
-/*------------------------------------------------------------------------
- * NIOS APPLICATION CODE BASE AREA
- *----------------------------------------------------------------------*/
-#if ((CONFIG_ENV_ADDR + CONFIG_ENV_SIZE) == 0x1050000)
-#define CONFIG_SYS_ADNPESC1_UPDATE_LOAD_ADDR "0x2000100"
-#define CONFIG_SYS_ADNPESC1_NIOS_APPL_ENTRY "0x1050000"
-#define CONFIG_SYS_ADNPESC1_NIOS_APPL_IDENT "0x105000c"
-#define CONFIG_SYS_ADNPESC1_NIOS_APPL_END "0x11fffff"
-#define CONFIG_SYS_ADNPESC1_FILESYSTEM_BASE "0x1200000"
-#define CONFIG_SYS_ADNPESC1_FILESYSTEM_END "0x17fffff"
-#else
-#error *** CONFIG_SYS_ERROR: missing right appl.code base configuration, expand your config.h
-#endif
-#define CONFIG_SYS_ADNPESC1_NIOS_IDENTIFIER "Nios"
-
-/*------------------------------------------------------------------------
- * BOOT ENVIRONMENT
- *----------------------------------------------------------------------*/
-#ifdef CONFIG_DNPEVA2 /* DNP/EVA2 base board */
-#define CONFIG_SYS_ADNPESC1_SLED_BOOT_OFF "sled boot off; "
-#define CONFIG_SYS_ADNPESC1_SLED_RED_BLINK "sled red blink; "
-#else
-#define CONFIG_SYS_ADNPESC1_SLED_BOOT_OFF
-#define CONFIG_SYS_ADNPESC1_SLED_RED_BLINK
-#endif
-
-#define CONFIG_BOOTDELAY 5
-#define CONFIG_BOOTCOMMAND \
- "if itest.s *$appl_ident_addr == \"$appl_ident_str\"; " \
- "then " \
- "wd off; " \
- CONFIG_SYS_ADNPESC1_SLED_BOOT_OFF \
- "go $appl_entry_addr; " \
- "else " \
- CONFIG_SYS_ADNPESC1_SLED_RED_BLINK \
- "echo *** missing \"$appl_ident_str\" at $appl_ident_addr; "\
- "echo *** invalid application at $appl_entry_addr; " \
- "echo *** stop bootup...; " \
- "fi"
-
-/*------------------------------------------------------------------------
- * EXTRA ENVIRONMENT
- *----------------------------------------------------------------------*/
-#ifdef CONFIG_DNPEVA2 /* DNP/EVA2 base board */
-#define CONFIG_SYS_ADNPESC1_SLED_YELLO_ON "sled yellow on; "
-#define CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF "sled yellow off; "
-#else
-#define CONFIG_SYS_ADNPESC1_SLED_YELLO_ON
-#define CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF
-#endif
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "update_allowed=0\0" \
- "update_load_addr=" CONFIG_SYS_ADNPESC1_UPDATE_LOAD_ADDR "\0" \
- "appl_entry_addr=" CONFIG_SYS_ADNPESC1_NIOS_APPL_ENTRY "\0" \
- "appl_end_addr=" CONFIG_SYS_ADNPESC1_NIOS_APPL_END "\0" \
- "appl_ident_addr=" CONFIG_SYS_ADNPESC1_NIOS_APPL_IDENT "\0" \
- "appl_ident_str=" CONFIG_SYS_ADNPESC1_NIOS_IDENTIFIER "\0" \
- "appl_name=ADNPESC1/base32/linux.bin\0" \
- "appl_update=" \
- "if itest.b $update_allowed != 0; " \
- "then " \
- CONFIG_SYS_ADNPESC1_SLED_YELLO_ON \
- "tftp $update_load_addr $appl_name; " \
- "protect off $appl_entry_addr $appl_end_addr; " \
- "era $appl_entry_addr $appl_end_addr; " \
- "cp.b $update_load_addr $appl_entry_addr $filesize; "\
- CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF \
- "else " \
- "echo *** update not allowed (update_allowed=$update_allowed); "\
- "fi\0" \
- "fs_base_addr=" CONFIG_SYS_ADNPESC1_FILESYSTEM_BASE "\0" \
- "fs_end_addr=" CONFIG_SYS_ADNPESC1_FILESYSTEM_END "\0" \
- "fs_name=ADNPESC1/base32/romfs.img\0" \
- "fs_update=" \
- "if itest.b $update_allowed != 0; " \
- "then " \
- CONFIG_SYS_ADNPESC1_SLED_YELLO_ON \
- "tftp $update_load_addr $fs_name; " \
- "protect off $fs_base_addr $fs_end_addr; " \
- "era $fs_base_addr $fs_end_addr; " \
- "cp.b $update_load_addr $fs_base_addr $filesize; "\
- CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF \
- "else " \
- "echo *** update not allowed (update_allowed=$update_allowed); "\
- "fi\0" \
- "uboot_name=ADNPESC1/base32/u-boot.bin\0" \
- "uboot_loadnrun=" \
- "if ping $serverip; " \
- "then " \
- CONFIG_SYS_ADNPESC1_SLED_YELLO_ON \
- "tftp $update_load_addr $uboot_name; " \
- "wd off; " \
- "go $update_load_addr; " \
- "else " \
- "echo *** missing connection to $serverip; " \
- "echo *** check your network and try again...; "\
- "fi\0"
-
-/*------------------------------------------------------------------------
- * CONSOLE
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_UART_NUMS != 0)
-
-#define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_NIOS_CPU_UART0 /* 1st UART is Cons. */
-
-#if (CONFIG_SYS_NIOS_CPU_UART0_BR != 0)
-#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
-#define CONFIG_BAUDRATE CONFIG_SYS_NIOS_CPU_UART0_BR
-#else
-#undef CONFIG_SYS_NIOS_FIXEDBAUD
-#define CONFIG_BAUDRATE 115200
-#endif
-
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one UART in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc PIT,
- * so an avalon bus timer is required.
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_TIMER_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_TICK_TIMER)
-
-#if (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 0)
-
-#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER0 /* TIMER0 as tick */
-#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER0_IRQ
-
-#if (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 1) /* fixed period */
-
-#if (CONFIG_SYS_NIOS_CPU_TIMER0_PER >= CONFIG_SYS_HZ)
-#define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER0_PER / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
-#endif
-
-#undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */
-
-#elif (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 0) /* variable period */
-
-#if (CONFIG_SYS_HZ <= 1000)
-#define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
-#endif
-
-#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER0_FP correct
-#endif
-
-#elif (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 1)
-
-#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER1 /* TIMER1 as tick */
-#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER1_IRQ
-
-#if (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 1) /* fixed period */
-
-#if (CONFIG_SYS_NIOS_CPU_TIMER1_PER >= CONFIG_SYS_HZ)
-#define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER1_PER / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
-#endif
-
-#undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */
-
-#elif (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 0) /* variable period */
-
-#if (CONFIG_SYS_HZ <= 1000)
-#define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
-#endif
-
-#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER1_FP correct
-#endif
-
-#endif /* CONFIG_SYS_NIOS_CPU_TICK_TIMER */
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one TIMER in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * WATCHDOG (or better MAX823 supervisory circuite access)
- *----------------------------------------------------------------------*/
-#define CONFIG_HW_WATCHDOG 1 /* board specific WD */
-
-#ifdef CONFIG_HW_WATCHDOG
-
-/* MAX823 supervisor -- watchdog enable port at: */
-#if (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 0)
-#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO0 /* PIO0 */
-#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 1)
-#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO1 /* PIO1 */
-#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 2)
-#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO2 /* PIO2 */
-#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 3)
-#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO3 /* PIO3 */
-#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 4)
-#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO4 /* PIO4 */
-#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 5)
-#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO5 /* PIO5 */
-#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 6)
-#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO6 /* PIO6 */
-#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 7)
-#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO7 /* PIO7 */
-#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 8)
-#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO8 /* PIO8 */
-#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 9)
-#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO9 /* PIO9 */
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one WDENA_PIO in NIOS CPU config
-#endif
-
-/* MAX823 supervisor -- watchdog trigger port at: */
-#if (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 0)
-#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO0 /* PIO0 */
-#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 1)
-#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO1 /* PIO1 */
-#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 2)
-#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO2 /* PIO2 */
-#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 3)
-#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO3 /* PIO3 */
-#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 4)
-#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO4 /* PIO4 */
-#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 5)
-#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO5 /* PIO5 */
-#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 6)
-#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO6 /* PIO6 */
-#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 7)
-#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO7 /* PIO7 */
-#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 8)
-#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO8 /* PIO8 */
-#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 9)
-#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO9 /* PIO9 */
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one WDTOG_PIO in NIOS CPU config
-#endif
-
-#if defined(CONFIG_NIOS_BASE_32) /* NIOS CPU specifics */
-#define CONFIG_HW_WDENA_BIT 0 /* WD enable @ Bit 0 */
-#define CONFIG_HW_WDTOG_BIT 0 /* WD trigger @ Bit 0 */
-#define CONFIG_HW_WDPORT_WRONLY 1 /* each WD port wr/only*/
-#else
-#error *** CONFIG_SYS_ERROR: missing watchdog bit configuration, expand your config.h
-#endif
-
-#endif /* CONFIG_HW_WATCHDOG */
-
-/*------------------------------------------------------------------------
- * SERIAL PERIPHAREL INTERFACE
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_SPI_NUMS == 1)
-
-#define CONFIG_NIOS_SPI 1 /* SPI support active */
-#define CONFIG_SYS_NIOS_SPIBASE CONFIG_SYS_NIOS_CPU_SPI0
-#define CONFIG_SYS_NIOS_SPIBITS CONFIG_SYS_NIOS_CPU_SPI0_BITS
-
-#define CONFIG_RTC_DS1306 1 /* Dallas 1306 real time clock */
-#define CONFIG_SYS_SPI_RTC_DEVID 0 /* as 1st SPI device */
-
-#else
-#undef CONFIG_NIOS_SPI /* NO SPI support */
-#endif
-
-/*------------------------------------------------------------------------
- * Ethernet -- needs work!
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_LAN_NUMS == 1)
-
-#if (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 0) /* LAN91C111 */
-
-#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
-#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
-#define CONFIG_SMC91111_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
-
-#if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
-#define CONFIG_SMC_USE_32_BIT 1
-#else /* no */
-#undef CONFIG_SMC_USE_32_BIT
-#endif
-
-#elif (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 1) /* CS8900A */
-
- /********************************************/
- /* !!! CS8900 is __not__ tested on NIOS !!! */
- /********************************************/
-#define CONFIG_NET_MULTI
-#define CONFIG_CS8900 /* Using CS8900 */
-#define CONFIG_CS8900_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + \
- CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
-
-#if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
-#undef CONFIG_CS8900_BUS16
-#define CONFIG_CS8900_BUS32
-#else /* no */
-#define CONFIG_CS8900_BUS16
-#undef CONFIG_CS8900_BUS32
-#endif
-
-#else
-#error *** CONFIG_SYS_ERROR: invalid LAN0 chip type, check your NIOS CPU config
-#endif
-
-#define CONFIG_ETHADDR 02:80:ae:20:60:6f
-#define CONFIG_NETMASK 255.255.255.248
-#define CONFIG_IPADDR 192.168.161.84
-#define CONFIG_SERVERIP 192.168.161.85
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup just one LAN only or expand your config.h
-#endif
-
-/*------------------------------------------------------------------------
- * STATUS LEDs
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_LED_PIO)
-
-#if (CONFIG_SYS_NIOS_CPU_LED_PIO == 0)
-
-#define STATUS_LED_BASE CONFIG_SYS_NIOS_CPU_PIO0
-#define STATUS_LED_BITS CONFIG_SYS_NIOS_CPU_PIO0_BITS
-#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */
-
-#if (CONFIG_SYS_NIOS_CPU_PIO0_TYPE == 1)
-#define STATUS_LED_WRONLY 1
-#else
-#undef STATUS_LED_WRONLY
-#endif
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 1)
-
-#define STATUS_LED_BASE CONFIG_SYS_NIOS_CPU_PIO1
-#define STATUS_LED_BITS CONFIG_SYS_NIOS_CPU_PIO1_BITS
-#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */
-
-#if (CONFIG_SYS_NIOS_CPU_PIO1_TYPE == 1)
-#define STATUS_LED_WRONLY 1
-#else
-#undef STATUS_LED_WRONLY
-#endif
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 2)
-
-#define STATUS_LED_BASE CONFIG_SYS_NIOS_CPU_PIO2
-#define STATUS_LED_BITS CONFIG_SYS_NIOS_CPU_PIO2_BITS
-#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */
-
-#if (CONFIG_SYS_NIOS_CPU_PIO2_TYPE == 1)
-#define STATUS_LED_WRONLY 1
-#else
-#undef STATUS_LED_WRONLY
-#endif
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 3)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO3 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 4)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO4 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 5)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO5 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 6)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO6 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 7)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO7 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 8)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO8 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 9)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO9 not supported, expand your config.h
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_LED_PIO in right case
-#endif
-
-#define CONFIG_STATUS_LED 1 /* enable status led driver */
-
-#define STATUS_LED_BIT (1 << 0) /* LED[0] */
-#define STATUS_LED_STATE STATUS_LED_BLINKING
-#define STATUS_LED_BOOT_STATE STATUS_LED_OFF
-#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) /* ca. 1 Hz */
-#define STATUS_LED_BOOT 0 /* boot LED */
-
-#if (STATUS_LED_BITS > 1)
-#define STATUS_LED_BIT1 (1 << 1) /* LED[1] */
-#define STATUS_LED_STATE1 STATUS_LED_OFF
-#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 10) /* ca. 5 Hz */
-#define STATUS_LED_RED 1 /* fail LED */
-#endif
-
-#if (STATUS_LED_BITS > 2)
-#define STATUS_LED_BIT2 (1 << 2) /* LED[2] */
-#define STATUS_LED_STATE2 STATUS_LED_OFF
-#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2) /* ca. 1 Hz */
-#define STATUS_LED_YELLOW 2 /* info LED */
-#endif
-
-#if (STATUS_LED_BITS > 3)
-#define STATUS_LED_BIT3 (1 << 3) /* LED[3] */
-#define STATUS_LED_STATE3 STATUS_LED_OFF
-#define STATUS_LED_PERIOD3 (CONFIG_SYS_HZ / 2) /* ca. 1 Hz */
-#define STATUS_LED_GREEN 3 /* info LED */
-#endif
-
-#define STATUS_LED_PAR 1 /* makes status_led.h happy */
-
-#endif /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
-
-/*------------------------------------------------------------------------
- * Diagnostics / Power On Self Tests
- *----------------------------------------------------------------------*/
-#define CONFIG_POST CONFIG_SYS_POST_RTC
-#define CONFIG_SYS_NIOS_POST_WORD_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_BSP
-#define CONFIG_CMD_CDP
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_DISPLAY
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_IMMAP
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_PORTIO
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_REISER
-#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_SNTP
-
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_XIMG
-
-#if (CONFIG_SYS_NIOS_CPU_SPI_NUMS == 1)
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_SPI
-#endif
-
-/*------------------------------------------------------------------------
- * KGDB
- *----------------------------------------------------------------------*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 9600
-#endif
-
-/*------------------------------------------------------------------------
- * MISC
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser
- undef to save memory */
-#define CONFIG_SYS_PROMPT "ADNPESC1 > " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 64 /* max number of command args*/
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#ifdef CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "[]> "
-#endif
-
-/* Default load address */
-#if (CONFIG_SYS_SRAM_SIZE != 0)
-
-/* default in SRAM */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SRAM_BASE
-
-#elif (CONFIG_SYS_SDRAM_SIZE != 0)
-
-/* default in SDRAM */
-#if (CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE)
-#if 1
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE)
-#else
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x400000)
-#endif
-#else
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
-#endif
-
-#else
-#undef CONFIG_SYS_LOAD_ADDR /* force error break */
-#endif
-
-/* MEM test area */
-#if (CONFIG_SYS_SDRAM_SIZE != 0)
-
-/* SDRAM begin to stack area (1MB stack) */
-#if (CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE)
-#if 0
-#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE)
-#else
-#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x400000)
-#endif
-#else
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#endif
-
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - (1024 * 1024))
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - (1024 * 1024))
-
-#else
-#undef CONFIG_SYS_MEMTEST_START /* force error break */
-#undef CONFIG_SYS_MEMTEST_END
-#endif
-
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition */
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV "nor"
-#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET 0x00000000
-
-/* mtdparts command line support */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT ""
-#define MTDPARTS_DEFAULT ""
-*/
-
-#endif /* __CONFIG_H */
+++ /dev/null
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_ADNPESC1_BASE_32_H
-#define __CONFIG_ADNPESC1_BASE_32_H
-
-/*
- * NIOS CPU configuration. (PART OF configs/ADNPESC1.h)
- *
- * Here we must define CPU dependencies. Any unsupported option have to
- * be undefined or defined with zero, example CPU without data cache / OCI:
- *
- * #define CONFIG_SYS_NIOS_CPU_ICACHE 4096
- * #define CONFIG_SYS_NIOS_CPU_DCACHE 0
- * #undef CONFIG_SYS_NIOS_CPU_OCI_BASE
- * #undef CONFIG_SYS_NIOS_CPU_OCI_SIZE
- */
-
-/* CPU core */
-#define CONFIG_SYS_NIOS_CPU_CLK 50000000 /* NIOS CPU clock */
-#define CONFIG_SYS_NIOS_CPU_ICACHE (0) /* instruction cache */
-#define CONFIG_SYS_NIOS_CPU_DCACHE (0) /* data cache */
-#define CONFIG_SYS_NIOS_CPU_REG_NUMS 512 /* number of register */
-#define CONFIG_SYS_NIOS_CPU_MUL 0 /* 16x16 MUL: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_MSTEP 1 /* 16x16 MSTEP: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_STACK 0x03000000 /* stack top addr */
-#define CONFIG_SYS_NIOS_CPU_VEC_BASE 0x02000000 /* IRQ vectors addr */
-#define CONFIG_SYS_NIOS_CPU_VEC_SIZE 256 /* size */
-#define CONFIG_SYS_NIOS_CPU_VEC_NUMS 64 /* numbers */
-#define CONFIG_SYS_NIOS_CPU_RST_VECT 0x00000000 /* RESET vector addr */
-#define CONFIG_SYS_NIOS_CPU_DBG_CORE 0 /* CPU debug: no(0) */
- /* yes(1) */
-
-/* The offset address in flash to check for the Nios signature "Ni".
- * (see GM_FlashExec in germs_monitor.s) */
-#define CONFIG_SYS_NIOS_CPU_EXES_OFFS 0x0C
-
-/* on-chip extensions */
-#undef CONFIG_SYS_NIOS_CPU_RAM_BASE /* on chip RAM addr */
-#undef CONFIG_SYS_NIOS_CPU_RAM_SIZE /* 64 KB size */
-
-#define CONFIG_SYS_NIOS_CPU_ROM_BASE 0x00000000 /* on chip ROM addr */
-#define CONFIG_SYS_NIOS_CPU_ROM_SIZE (2 * 1024) /* 2 KB size */
-
-#undef CONFIG_SYS_NIOS_CPU_OCI_BASE /* OCI core addr */
-#undef CONFIG_SYS_NIOS_CPU_OCI_SIZE /* size */
-
-/* timer */
-#define CONFIG_SYS_NIOS_CPU_TIMER_NUMS 1 /* number of timer */
-
-#define CONFIG_SYS_NIOS_CPU_TIMER0 0x00000840 /* TIMER0 addr */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_IRQ 16 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_PER 1000 /* periode usec */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_AR 0 /* always run: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_FP 0 /* fixed per: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_SS 1 /* snaphot: no(0) */
- /* yes(1) */
-
-/* serial i/o */
-#define CONFIG_SYS_NIOS_CPU_UART_NUMS 2 /* number of uarts */
-
-#define CONFIG_SYS_NIOS_CPU_UART0 0x00000800 /* UART0 addr */
-#define CONFIG_SYS_NIOS_CPU_UART0_IRQ 17 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_UART0_BR 115200 /* baudrate var(0) */
-#define CONFIG_SYS_NIOS_CPU_UART0_DB 8 /* data bit */
-#define CONFIG_SYS_NIOS_CPU_UART0_SB 1 /* stop bit */
-#define CONFIG_SYS_NIOS_CPU_UART0_PA 0 /* parity none(0) */
- /* odd(1) */
- /* even(2) */
-#define CONFIG_SYS_NIOS_CPU_UART0_HS 1 /* handshake: no(0) */
- /* crts(1) */
-#define CONFIG_SYS_NIOS_CPU_UART0_EOP 0 /* eop reg: no(0) */
- /* yes(1) */
-
-#define CONFIG_SYS_NIOS_CPU_UART1 0x00000820 /* UART1 addr */
-#define CONFIG_SYS_NIOS_CPU_UART1_IRQ 18 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_UART1_BR 115200 /* baudrate var(0) */
-#define CONFIG_SYS_NIOS_CPU_UART1_DB 8 /* data bit */
-#define CONFIG_SYS_NIOS_CPU_UART1_SB 1 /* stop bit */
-#define CONFIG_SYS_NIOS_CPU_UART1_PA 0 /* parity none(0) */
- /* odd(1) */
- /* even(2) */
-#define CONFIG_SYS_NIOS_CPU_UART1_HS 0 /* handshake: no(0) */
- /* crts(1) */
-#define CONFIG_SYS_NIOS_CPU_UART1_EOP 0 /* eop reg: no(0) */
- /* yes(1) */
-
-/* serial peripheral i/o */
-#define CONFIG_SYS_NIOS_CPU_SPI_NUMS 1 /* number of spis */
-
-#define CONFIG_SYS_NIOS_CPU_SPI0 0x000008c0 /* SPI0 addr */
-#define CONFIG_SYS_NIOS_CPU_SPI0_IRQ 25 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_SPI0_BITS 16 /* data bit */
-#define CONFIG_SYS_NIOS_CPU_SPI0_MA 1 /* is master: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_SPI0_SLN 1 /* num slaves */
-#define CONFIG_SYS_NIOS_CPU_SPI0_TCLK 250000 /* clock (Hz) */
-#define CONFIG_SYS_NIOS_CPU_SPI0_TDELAY 2 /* delay (usec) */
-#define CONFIG_SYS_NIOS_CPU_SPI0_FB 0 /* first bit msb(0) */
- /* lsb(1) */
-
-/* parallel i/o */
-#define CONFIG_SYS_NIOS_CPU_PIO_NUMS 14 /* number of parports */
-
-#define CONFIG_SYS_NIOS_CPU_PIO0 0x00000860 /* PIO0 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO0_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO0_BITS 8 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO0_TYPE 0 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO0_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO0_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO0_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO1 0x00000870 /* PIO1 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO1_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO1_BITS 8 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO1_TYPE 0 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO1_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO1_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO1_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO2 0x00000880 /* PIO2 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO2_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO2_BITS 4 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO2_TYPE 0 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO2_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO2_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO2_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO3 0x00000890 /* PIO3 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO3_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO3_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO3_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO3_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO3_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO3_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO3 0x00000890 /* PIO3 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO3_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO3_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO3_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO3_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO3_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO3_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO4 0x000008a0 /* PIO4 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO4_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO4_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO4_TYPE 1 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO4_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO4_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO4_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO5 0x000008b0 /* PIO5 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO5_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO5_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO5_TYPE 1 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO5_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO5_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO5_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO6 0x00000900 /* PIO6 addr */
-#define CONFIG_SYS_NIOS_CPU_PIO6_IRQ 20 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO6_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO6_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO6_CAP 1 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO6_EDGE 2 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO6_ITYPE 1 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO7 0x00000910 /* PIO7 addr */
-#define CONFIG_SYS_NIOS_CPU_PIO7_IRQ 31 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO7_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO7_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO7_CAP 1 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO7_EDGE 2 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO7_ITYPE 1 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO8 0x00000920 /* PIO8 addr */
-#define CONFIG_SYS_NIOS_CPU_PIO8_IRQ 32 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO8_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO8_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO8_CAP 1 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO8_EDGE 2 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO8_ITYPE 1 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO9 0x00000930 /* PIO9 addr */
-#define CONFIG_SYS_NIOS_CPU_PIO9_IRQ 33 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO9_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO9_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO9_CAP 1 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO9_EDGE 2 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO9_ITYPE 1 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO10 0x00000940 /* PIO10 addr */
-#define CONFIG_SYS_NIOS_CPU_PIO10_IRQ 34 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO10_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO10_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO10_CAP 1 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO10_EDGE 2 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO10_ITYPE 1 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO11 0x00000950 /* PIO11 addr */
-#define CONFIG_SYS_NIOS_CPU_PIO11_IRQ 35 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO11_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO11_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO11_CAP 1 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO11_EDGE 2 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO11_ITYPE 1 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO12 0x00000960 /* PIO12 addr */
-#define CONFIG_SYS_NIOS_CPU_PIO12_IRQ 36 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO12_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO12_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO12_CAP 1 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO12_EDGE 2 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO12_ITYPE 1 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO13 0x00000970 /* PIO113 addr */
-#define CONFIG_SYS_NIOS_CPU_PIO13_IRQ 37 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO13_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO13_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO13_CAP 1 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO13_EDGE 2 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO13_ITYPE 1 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-/* IDE i/f */
-#define CONFIG_SYS_NIOS_CPU_IDE_NUMS 2 /* number of IDE contr. */
-
-#define CONFIG_SYS_NIOS_CPU_IDE0 0x00001000 /* IDE0 addr */
-#define CONFIG_SYS_NIOS_CPU_IDE0_IRQ 36 /* IRQ */
-
-#define CONFIG_SYS_NIOS_CPU_IDE1 0x00001020 /* IDE1 addr */
-#define CONFIG_SYS_NIOS_CPU_IDE1_IRQ 37 /* IRQ */
-
-/* memory accessibility */
-#undef CONFIG_SYS_NIOS_CPU_SRAM_BASE /* board SRAM addr */
-#undef CONFIG_SYS_NIOS_CPU_SRAM_SIZE /* 1 MB size */
-
-#define CONFIG_SYS_NIOS_CPU_SDRAM_BASE 0x02000000 /* board SDRAM addr */
-#define CONFIG_SYS_NIOS_CPU_SDRAM_SIZE (16*1024*1024) /* 16 MB size */
-
-#define CONFIG_SYS_NIOS_CPU_FLASH_BASE 0x01000000 /* board Flash addr */
-#define CONFIG_SYS_NIOS_CPU_FLASH_SIZE (8*1024*1024) /* 8 MB size */
-
-/* LAN */
-#define CONFIG_SYS_NIOS_CPU_LAN_NUMS 1 /* number of LAN i/f */
-
-#define CONFIG_SYS_NIOS_CPU_LAN0_BASE 0x00010000 /* LAN0 addr */
-#define CONFIG_SYS_NIOS_CPU_LAN0_OFFS (0) /* offset */
-#define CONFIG_SYS_NIOS_CPU_LAN0_IRQ 20 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_LAN0_BUSW 16 /* buswidth*/
-#define CONFIG_SYS_NIOS_CPU_LAN0_TYPE 0 /* smc91111(0) */
- /* cs8900(1) */
- /* ex: openmac(2) */
- /* ex: alteramac(3) */
-
-/* external extension */
-#define CONFIG_SYS_NIOS_CPU_CS0_BASE 0x40000000 /* board EXT0 addr */
-#define CONFIG_SYS_NIOS_CPU_CS0_SIZE (16*1024*1024) /* max. 16 MB size */
-
-#define CONFIG_SYS_NIOS_CPU_CS1_BASE 0x41000000 /* board EXT1 addr */
-#define CONFIG_SYS_NIOS_CPU_CS1_SIZE (16*1024*1024) /* max. 16 MB size */
-
-#define CONFIG_SYS_NIOS_CPU_CS2_BASE 0x42000000 /* board EXT2 addr */
-#define CONFIG_SYS_NIOS_CPU_CS2_SIZE (16*1024*1024) /* max. 16 MB size */
-
-#define CONFIG_SYS_NIOS_CPU_CS3_BASE 0x43000000 /* board EXT3 addr */
-#define CONFIG_SYS_NIOS_CPU_CS3_SIZE (16*1024*1024) /* max. 16 MB size */
-
-/* symbolic redefinition (undef, if not present) */
-#define CONFIG_SYS_NIOS_CPU_TICK_TIMER 0 /* TIMER0: tick (needed)*/
-#undef CONFIG_SYS_NIOS_CPU_USER_TIMER /* TIMERx: users choice */
-
-#define CONFIG_SYS_NIOS_CPU_PORTA_PIO 0 /* PIO0: Port A */
-#define CONFIG_SYS_NIOS_CPU_PORTB_PIO 1 /* PIO1: Port D */
-#define CONFIG_SYS_NIOS_CPU_PORTC_PIO 2 /* PIO2: Port C */
-#define CONFIG_SYS_NIOS_CPU_RCM_PIO 3 /* PIO3: RCM jumper */
-#define CONFIG_SYS_NIOS_CPU_WDENA_PIO 4 /* PIO4: watchdog enable*/
-#define CONFIG_SYS_NIOS_CPU_WDTOG_PIO 5 /* PIO5: watchdog trigg.*/
-
-/* PIOx: LED bar */
-#ifdef CONFIG_DNPEVA2 /* DNP/EVA2 base board */
-#define CONFIG_SYS_NIOS_CPU_LED_PIO CONFIG_SYS_NIOS_CPU_PORTA_PIO
-#else
-#undef CONFIG_SYS_NIOS_CPU_LED_PIO /* no LED bar */
-#endif
-
-#endif /* __CONFIG_ADNPESC1_BASE_32_H */
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- *
- * Configuration settings for the AmigaOneG3SE board.
- *
- */
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_AMIGAONEG3SE 1
-
-#define CONFIG_BOARD_EARLY_INIT_F 1
-#define CONFIG_MISC_INIT_R 1
-
-#define CONFIG_VERY_BIG_RAM 1
-
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_BAUDRATE 9600
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-#undef CONFIG_CLOCKS_IN_MHZ /* clocks passed to Linux in Hz */
-
-#define CONFIG_BOOTARGS "root=/dev/ram rw ramdisk_size=4096"
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_BOOTFILESIZE
-
-
-#define CONFIG_MAC_PARTITION
-#define CONFIG_DOS_PARTITION
-#define CONFIG_AMIGA_PARTITION
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_BSP
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_FDC
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_CONSOLE
-#define CONFIG_CMD_USB
-#define CONFIG_CMD_BSP
-#define CONFIG_CMD_PCI
-
-
-#define CONFIG_PCI 1
-/* #define CONFIG_PCI_SCAN_SHOW 1 */
-#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
-
-#define atoi(x) simple_strtoul(x,NULL,10)
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "] " /* Monitor Command Prompt */
-
-#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
-/* #undef CONFIG_SYS_HUSH_PARSER */
-#ifdef CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-#endif
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-
-/* Print Buffer Size
- */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-
-#define CONFIG_SYS_MAXARGS 64 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_LOAD_ADDR 0x00500000 /* Default load address */
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_FLASH_BASE 0xFFF00000
-#define CONFIG_SYS_FLASH_MAX_SIZE 0x00080000
-/* Maximum amount of RAM.
- */
-#define CONFIG_SYS_MAX_RAM_SIZE 0x80000000 /* 2G */
-
-#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
-
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-
-#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* Reserve 512 kB for Monitor */
-#define CONFIG_SYS_MALLOC_LEN (2500 << 10) /* Reserve 128 kB for malloc() */
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_SDRAM_BASE && \
- CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_MAX_RAM_SIZE
-#define CONFIG_SYS_RAMBOOT
-#else
-#undef CONFIG_SYS_RAMBOOT
-#endif
-
-#define CONFIG_SYS_MEMTEST_START 0x00004000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x02000000 /* 0 ... 32 MB in DRAM */
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area
- */
-
-/* Size in bytes reserved for initial data
- */
-/* HJF: used to be 0x400000 */
-#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
-#define CONFIG_SYS_INIT_RAM_END 0x8000
-#define CONFIG_SYS_GBL_DATA_SIZE 128
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_SYS_INIT_RAM_LOCK
-
-/*
- * Temporary buffer for serial data until the real serial driver
- * is initialised (memtest will destroy this buffer)
- */
-#define CONFIG_SYS_SCONSOLE_ADDR CONFIG_SYS_INIT_RAM_ADDR
-#define CONFIG_SYS_SCONSOLE_SIZE 0x0002000
-
-/* SDRAM 0 - 256MB
- */
-
-/*HJF: #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_4M | BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U*/
-
-#define CONFIG_SYS_DBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_DBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
-/* PCI Range
- */
-#define CONFIG_SYS_DBAT1L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT1U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT1L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT1U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-/* HJF:
-#define CONFIG_SYS_IBAT1L ((CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_INIT_RAM_ADDR) | BATL_PP_RW)
-#define CONFIG_SYS_IBAT1U ((CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_INIT_RAM_ADDR) | BATU_BL_256M | BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT1L ((CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_INIT_RAM_ADDR + 0x20000) | BATL_PP_RW )
-#define CONFIG_SYS_DBAT1U ((CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_INIT_RAM_ADDR + 0x20000) | BATU_BL_256M | BATU_VS | BATU_VP)
-*/
-
-/* Init RAM in the CPU DCache (no backing memory)
- */
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_DBAT2U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
-/* This used to be commented out */
-#define CONFIG_SYS_IBAT2L CONFIG_SYS_DBAT2L
-/* This here too */
-#define CONFIG_SYS_IBAT2U CONFIG_SYS_DBAT2U
-
-
-/* I/O and PCI memory at 0xf0000000
- */
-#define CONFIG_SYS_DBAT3L (0xf0000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT3U (0xf0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT3L (0xf0000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT3U (0xf0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- */
-#define CONFIG_SYS_HZ 1000
-#define CONFIG_SYS_BUS_HZ 133000000 /* bus speed - 100 mhz */
-#define CONFIG_SYS_CPU_CLK 133000000
-#define CONFIG_SYS_BUS_CLK 133000000
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 8 /* Max number of sectors in one bank */
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT 1000 /* Timeout for Flash Write (in ms) */
-
-/*
- * Environment is stored in NVRAM.
- */
-#define CONFIG_ENV_IS_IN_NVRAM 1
-#define CONFIG_ENV_ADDR 0xFD0E0000 /* This should be 0xFD0E0000, but we skip bytes to
- * protect softex's settings for now.
- * Original 768 bytes where not enough.
- */
-#define CONFIG_ENV_SIZE 0x8000 /* Size of the Environment. See comment above */
-
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 /* stdin/stdout/stderr are in environment */
-#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 1
-#define CONFIG_ENV_OVERWRITE 1
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE 32
-#if defined(CONFIG_CMD_KGDB)
-# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
-/*
- * L2 cache
- */
-#define CONFIG_SYS_L2
-#define L2_INIT (L2CR_L2SIZ_2M | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \
- L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT)
-#define L2_ENABLE (L2_INIT | L2CR_L2E)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
-/*-----------------------------------------------------------------------
- * IDE ATAPI Configuration
- */
-
-#define CONFIG_ATAPI 1
-#define CONFIG_SYS_IDE_MAXBUS 2
-#define CONFIG_SYS_IDE_MAXDEVICE 4
-#define CONFIG_ISO_PARTITION 1
-
-#define CONFIG_SYS_ATA_BASE_ADDR 0xFE000000 /* was: via_get_base_addr() */
-#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1F0
-#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
-
-#define CONFIG_SYS_ATA_REG_OFFSET 0
-#define CONFIG_SYS_ATA_DATA_OFFSET 0
-#define CONFIG_SYS_ATA_ALT_OFFSET 0x0200
-
-/*-----------------------------------------------------------------------
- * Disk-On-Chip configuration
- */
-
-#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
-
-#define CONFIG_SYS_DOC_SUPPORT_2000
-#undef CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
-
-/*-----------------------------------------------------------------------
- RTC
-*/
-#define CONFIG_RTC_MC146818
-
-/*-----------------------------------------------------------------------
- * NS16550 Configuration
- */
-
-#define CONFIG_SYS_NS16550
-
-#define CONFIG_SYS_NS16550_COM1 0xFE0003F8
-#define CONFIG_SYS_NS16550_COM2 0xFE0002F8
-
-#define CONFIG_SYS_NS16550_REG_SIZE 1
-
-/* base address for ISA I/O
- */
-#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xFE000000
-
-/* ISA Interrupt stuff (taken from JWL) */
-
-#define ISA_INT1_OCW1 0x21
-#define ISA_INT2_OCW1 0xA1
-#define ISA_INT1_OCW2 0x20
-#define ISA_INT2_OCW2 0xA0
-#define ISA_INT1_OCW3 0x20
-#define ISA_INT2_OCW3 0xA0
-
-#define ISA_INT1_ICW1 0x20
-#define ISA_INT2_ICW1 0xA0
-#define ISA_INT1_ICW2 0x21
-#define ISA_INT2_ICW2 0xA1
-#define ISA_INT1_ICW3 0x21
-#define ISA_INT2_ICW3 0xA1
-#define ISA_INT1_ICW4 0x21
-#define ISA_INT2_ICW4 0xA1
-
-
-/*
- * misc
- */
-
-#define CONFIG_NET_MULTI
-#define CONFIG_SYS_BOARD_ASM_INIT
-#define CONFIG_LAST_STAGE_INIT
-
-/* #define CONFIG_ETHADDR 00:09:D2:10:00:76 */
-/* #define CONFIG_IPADDR 192.168.0.2 */
-/* #define CONFIG_NETMASK 255.255.255.240 */
-/* #define CONFIG_GATEWAYIP 192.168.0.3 */
-
-#define CONFIG_3COM
-/* #define CONFIG_BOOTP_RANDOM_DELAY */
-
-/*
- * USB configuration
- */
-#define CONFIG_USB_UHCI 1
-#define CONFIG_USB_STORAGE 1
-#define CONFIG_USB_KEYBOARD 1
-#define CONFIG_SYS_STDIO_DEREGISTER 1 /* needed by CONFIG_USB_KEYBOARD */
-
-/*
- * Autoboot stuff
- */
-#define CONFIG_BOOTDELAY 5 /* Boot automatically after five seconds */
-#define CONFIG_PREBOOT ""
-#define CONFIG_BOOTCOMMAND "fdcboot; diskboot"
-#define CONFIG_MENUPROMPT \
- "Press any key to interrupt autoboot: %2d ", bootdelay
-#define CONFIG_MENUKEY ' '
-#define CONFIG_MENUCOMMAND "menu"
-/* #define CONFIG_AUTOBOOT_KEYED */
-
-/*
- * Extra ENV stuff
- */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "stdout=vga\0" \
- "stdin=ps2kbd\0" \
- "ide_doreset=on\0" \
- "ide_maxbus=2\0" \
- "ide_cd_timeout=30\0" \
- "menucmd=menu\0" \
- "pci_irqa=9\0" \
- "pci_irqa_select=edge\0" \
- "pci_irqb=10\0" \
- "pci_irqb_select=edge\0" \
- "pci_irqc=11\0" \
- "pci_irqc_select=edge\0" \
- "pci_irqd=7\0" \
- "pci_irqd_select=edge\0"
-
-
-/* #define CONFIG_MII 1 */
-/* #define CONFIG_BITBANGMII 1 */
-
-
-#endif /* __CONFIG_H */
extern unsigned long bab7xx_get_bus_freq (void);
extern unsigned long bab7xx_get_gclk_freq (void);
#endif
-#define CONFIG_SYS_BUS_HZ bab7xx_get_bus_freq()
-#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ
-#define CONFIG_SYS_CPU_CLK bab7xx_get_gclk_freq()
+#define CONFIG_SYS_BUS_CLK bab7xx_get_bus_freq()
+#define CONFIG_SYS_CPU_CLK bab7xx_get_gclk_freq()
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_LOAD_ADDR 0x00300000 /* default load address */
#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
-#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
-#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ
+#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
/*ronen - this the Sys clock (cpu bus,internal dram and SDRAM) */
-#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
-#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ
+#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
#define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP 7 /* define the SDRAM cycle count */
#define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP 50 /* for 400MHZ -> 5.0 ns, for 133MHZ -> 7.50 ns */
#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
/*ronen - this the Sys clock (cpu bus,internal dram and SDRAM) */
-#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
-#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ
+#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
#define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP 7 /* define the SDRAM cycle count */
#define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP 50 /* for 200MHZ -> 5.0 ns, 166MHZ -> 6.0, 133MHZ -> 7.50 ns */
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- * Stephan Linz <linz@li-pro.net>
- *
- * CompactFlash/IDE:
- * (C) Copyright 2004, Shlomo Kut <skut@vyyo.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/***********************************************************************
- * Include the whole NIOS CPU configuration.
- *
- * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!!
- *
- ***********************************************************************/
-
-#if defined(CONFIG_NIOS_SAFE_32)
-#include <configs/DK1C20_safe_32.h>
-#elif defined(CONFIG_NIOS_STANDARD_32)
-#include <configs/DK1C20_standard_32.h>
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup right NIOS CPU configuration
-#endif
-
-/*------------------------------------------------------------------------
- * BOARD/CPU -- TOP-LEVEL
- *----------------------------------------------------------------------*/
-#define CONFIG_NIOS 1 /* NIOS-32 core */
-#define CONFIG_DK1C20 1 /* Cyclone DK-1C20 board*/
-#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */
-#define CONFIG_SYS_HZ 1000 /* 1 msec time tick */
-#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
-
-/*------------------------------------------------------------------------
- * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM)
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_SDRAM_SIZE != 0)
-
-#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_NIOS_CPU_SDRAM_BASE
-#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_NIOS_CPU_SDRAM_SIZE
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup any SDRAM in NIOS CPU config
-#endif
-
-#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_NIOS_CPU_SRAM_BASE
-#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_NIOS_CPU_SRAM_SIZE
-#define CONFIG_SYS_VECT_BASE CONFIG_SYS_NIOS_CPU_VEC_BASE
-
-/*------------------------------------------------------------------------
- * MEMORY ORGANIZATION - For the most part, you can put things pretty
- * much anywhere. This is pretty flexible for Nios. So here we make some
- * arbitrary choices & assume that the monitor is placed at the end of
- * a memory resource (so you must make sure TEXT_BASE is chosen
- * appropriately).
- *
- * -The heap is placed below the monitor.
- * -Global data is placed below the heap.
- * -The stack is placed below global data (&grows down).
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256k */
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET
-
-/*------------------------------------------------------------------------
- * FLASH (AM29LV065D)
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
-
-#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_NIOS_CPU_FLASH_BASE
-#define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_NIOS_CPU_FLASH_SIZE
-#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
-#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size */
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup any Flash memory in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * ENVIRONMENT
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
-
-#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */
-#define CONFIG_ENV_ADDR CONFIG_SYS_FLASH_BASE /* Mem addr of env */
-#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
-#define CONFIG_ENV_OVERWRITE /* Serial/eth change Ok */
-
-#else
-#define CONFIG_ENV_IS_NOWHERE 1 /* NO Environment */
-#endif
-
-/*------------------------------------------------------------------------
- * CONSOLE
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_UART_NUMS != 0)
-
-#define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_NIOS_CPU_UART0 /* 1st UART is Cons. */
-
-#if (CONFIG_SYS_NIOS_CPU_UART0_BR != 0)
-#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
-#define CONFIG_BAUDRATE CONFIG_SYS_NIOS_CPU_UART0_BR
-#else
-#undef CONFIG_SYS_NIOS_FIXEDBAUD
-#define CONFIG_BAUDRATE 115200
-#endif
-
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one UART in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc PIT,
- * so an avalon bus timer is required.
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_TIMER_NUMS != 0)
-
-#if (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 0)
-
-#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER0 /* TIMER0 as tick */
-#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER0_IRQ
-
-#if (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 1) /* fixed period */
-
-#if (CONFIG_SYS_NIOS_CPU_TIMER0_PER >= CONFIG_SYS_HZ)
-#define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER0_PER / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
-#endif
-
-#undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */
-
-#elif (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 0) /* variable period */
-
-#if (CONFIG_SYS_HZ <= 1000)
-#define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
-#endif
-
-#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER0_FP correct
-#endif
-
-#elif (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 1)
-
-#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER1 /* TIMER1 as tick */
-#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER1_IRQ
-
-#if (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 1) /* fixed period */
-
-#if (CONFIG_SYS_NIOS_CPU_TIMER1_PER >= CONFIG_SYS_HZ)
-#define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER1_PER / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
-#endif
-
-#undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */
-
-#elif (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 0) /* variable period */
-
-#if (CONFIG_SYS_HZ <= 1000)
-#define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
-#endif
-
-#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER1_FP correct
-#endif
-
-#endif /* CONFIG_SYS_NIOS_CPU_TICK_TIMER */
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one TIMER in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * Ethernet
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_LAN_NUMS == 1)
-
-#if (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 0) /* LAN91C111 */
-
-#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
-#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
-#define CONFIG_SMC91111_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
-
-#if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
-#define CONFIG_SMC_USE_32_BIT 1
-#else /* no */
-#undef CONFIG_SMC_USE_32_BIT
-#endif
-
-#elif (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 1) /* CS8900A */
-
- /********************************************/
- /* !!! CS8900 is __not__ tested on NIOS !!! */
- /********************************************/
-#define CONFIG_NET_MULTI
-#define CONFIG_CS8900 /* Using CS8900 */
-#define CONFIG_CS8900_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + \
- CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
-
-#if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
-#undef CONFIG_CS8900_BUS16
-#define CONFIG_CS8900_BUS32
-#else /* no */
-#define CONFIG_CS8900_BUS16
-#undef CONFIG_CS8900_BUS32
-#endif
-
-#else
-#error *** CONFIG_SYS_ERROR: invalid LAN0 chip type, check your NIOS CPU config
-#endif
-
-#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 192.168.2.21
-#define CONFIG_SERVERIP 192.168.2.16
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup just one LAN only or expand your config.h
-#endif
-
-/*------------------------------------------------------------------------
- * STATUS LEDs
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0)
-
-#if (CONFIG_SYS_NIOS_CPU_LED_PIO == 0)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO0 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 1)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO1 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 2)
-
-#define STATUS_LED_BASE CONFIG_SYS_NIOS_CPU_PIO2
-#define STATUS_LED_BITS CONFIG_SYS_NIOS_CPU_PIO2_BITS
-#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */
-
-#if (CONFIG_SYS_NIOS_CPU_PIO2_TYPE == 1)
-#define STATUS_LED_WRONLY 1
-#else
-#undef STATUS_LED_WRONLY
-#endif
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 3)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO3 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 4)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO4 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 5)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO5 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 6)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO6 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 7)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO7 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 8)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO8 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 9)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO9 not supported, expand your config.h
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_LED_PIO in right case
-#endif
-
-#define CONFIG_STATUS_LED 1 /* enable status led driver */
-
-#define STATUS_LED_BIT (1 << 0) /* LED[0] */
-#define STATUS_LED_STATE STATUS_LED_BLINKING
-#define STATUS_LED_BOOT_STATE STATUS_LED_OFF
-#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */
-#define STATUS_LED_BOOT 0 /* boot LED */
-
-#if (STATUS_LED_BITS > 1)
-#define STATUS_LED_BIT1 (1 << 1) /* LED[1] */
-#define STATUS_LED_STATE1 STATUS_LED_OFF
-#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 50) /* ca. 5 Hz */
-#define STATUS_LED_RED 1 /* fail LED */
-#endif
-
-#if (STATUS_LED_BITS > 2)
-#define STATUS_LED_BIT2 (1 << 2) /* LED[2] */
-#define STATUS_LED_STATE2 STATUS_LED_OFF
-#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */
-#define STATUS_LED_YELLOW 2 /* info LED */
-#endif
-
-#if (STATUS_LED_BITS > 3)
-#define STATUS_LED_BIT3 (1 << 3) /* LED[3] */
-#define STATUS_LED_STATE3 STATUS_LED_OFF
-#define STATUS_LED_PERIOD3 (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */
-#define STATUS_LED_GREEN 3 /* info LED */
-#endif
-
-#define STATUS_LED_PAR 1 /* makes status_led.h happy */
-
-#endif /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
-
-/*------------------------------------------------------------------------
- * SEVEN SEGMENT LED DISPLAY
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0)
-
-#if (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 0)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO0 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 1)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO1 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 2)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO2 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 3)
-
-#define SEVENSEG_BASE CONFIG_SYS_NIOS_CPU_PIO3
-#define SEVENSEG_BITS CONFIG_SYS_NIOS_CPU_PIO3_BITS
-#define SEVENSEG_ACTIVE 0 /* LED on for bit == 1 */
-
-#if (CONFIG_SYS_NIOS_CPU_PIO3_TYPE == 1)
-#define SEVENSEG_WRONLY 1
-#else
-#undef SEVENSEG_WRONLY
-#endif
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 4)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO4 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 5)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO5 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 6)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO6 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 7)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO7 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 8)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO8 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 9)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO9 not supported, expand your config.h
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO in right case
-#endif
-
-#define CONFIG_SEVENSEG 1 /* enable seven segment led driver */
-
-/*
- * Dual 7-Segment Display pin assignment -- read more in your
- * "Nios Development Board Reference Manual"
- *
- *
- * (U8) HI:D[15..8] (U9) LO:D[7..0]
- * ______ ______
- * | D14 | | D6 |
- * | | | |
- * D9| |D13 D1| |D5
- * |______| |______| ___
- * | D8 | | D0 | | A |
- * | | | | F|___|B
- * D10| |D12 D2| |D4 | G |
- * |______| |______| E|___|C
- * D11 * D3 * D *
- * D15 D7 DP
- *
- */
-#define SEVENSEG_DIGIT_HI_LO_EQUAL 1 /* high nibble equal low nibble */
-#define SEVENSEG_DIGIT_A (1 << 6) /* bit 6 is segment A */
-#define SEVENSEG_DIGIT_B (1 << 5) /* bit 5 is segment B */
-#define SEVENSEG_DIGIT_C (1 << 4) /* bit 4 is segment C */
-#define SEVENSEG_DIGIT_D (1 << 3) /* bit 3 is segment D */
-#define SEVENSEG_DIGIT_E (1 << 2) /* bit 2 is segment E */
-#define SEVENSEG_DIGIT_F (1 << 1) /* bit 1 is segment F */
-#define SEVENSEG_DIGIT_G (1 << 0) /* bit 0 is segment G */
-#define SEVENSEG_DIGIT_DP (1 << 7) /* bit 7 is decimal point */
-
-#endif /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
-
-/*------------------------------------------------------------------------
- * ASMI - Active Serial Memory Interface.
- *
- * ASMI is for Cyclone devices only and only works when the configuration
- * is loaded via JTAG or ASMI. Please see doc/README.dk1c20 for details.
- *----------------------------------------------------------------------*/
-#define CONFIG_NIOS_ASMI /* Enable ASMI */
-#define CONFIG_SYS_NIOS_ASMIBASE CONFIG_SYS_NIOS_CPU_ASMI0 /* ASMI base address */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_CDP
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_DISPLAY
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_IMMAP
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_PORTIO
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_SNTP
-
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_XIMG
-
-/*------------------------------------------------------------------------
- * COMPACT FLASH
- *----------------------------------------------------------------------*/
-#if defined(CONFIG_CMD_IDE)
-#define CONFIG_IDE_PREINIT /* Implement id_preinit */
-#define CONFIG_SYS_IDE_MAXBUS 1 /* 1 IDE bus */
-#define CONFIG_SYS_IDE_MAXDEVICE 1 /* 1 drive per IDE bus */
-
-#define CONFIG_SYS_ATA_BASE_ADDR 0x00920a00 /* IDE/ATA base addr */
-#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 /* IDE0 offset */
-#define CONFIG_SYS_ATA_DATA_OFFSET 0x0040 /* Data IO offset */
-#define CONFIG_SYS_ATA_REG_OFFSET 0x0040 /* Register offset */
-#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 /* Alternate reg offset */
-#define CONFIG_SYS_ATA_STRIDE 4 /* Width betwix addrs */
-#define CONFIG_DOS_PARTITION
-
-/* Board-specific cf regs */
-#define CONFIG_SYS_CF_PRESENT 0x009209b0 /* CF Present PIO base */
-#define CONFIG_SYS_CF_POWER 0x009209c0 /* CF Power FET PIO base*/
-#define CONFIG_SYS_CF_ATASEL 0x009209d0 /* CF ATASEL PIO base */
-
-#endif
-
-/*------------------------------------------------------------------------
- * KGDB
- *----------------------------------------------------------------------*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 9600
-#endif
-
-/*------------------------------------------------------------------------
- * MISC
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "DK1C20 > " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#if (CONFIG_SYS_SRAM_SIZE != 0)
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SRAM_BASE /* Default load address */
-#else
-#undef CONFIG_SYS_LOAD_ADDR
-#endif
-
-#if (CONFIG_SYS_SDRAM_SIZE != 0)
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* SDRAM til stack area */
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - (1024 * 1024)) /* 1MB stack */
-#else
-#undef CONFIG_SYS_MEMTEST_START
-#undef CONFIG_SYS_MEMTEST_END
-#endif
-
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition, whole device */
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV "nor0"
-#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET 0x00000000
-
-/* mtdparts command line support */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT ""
-#define MTDPARTS_DEFAULT ""
-*/
-
-#endif /* __CONFIG_H */
+++ /dev/null
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_DK1C20_SAFE_32_H
-#define __CONFIG_DK1C20_SAFE_32_H
-
-/*
- * NIOS CPU configuration. (PART OF configs/DK1C20.h)
- *
- * !!! TODO !!! TODO !!!
- */
-#error *** CONFIG_SYS_ERROR: DK1C20_safe_32 have to be defined (use DK1C20_standard_32 as template)
-
-#endif /* __CONFIG_DK1C20_SAFE_32_H */
+++ /dev/null
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_DK1C20_STANDARD_32_H
-#define __CONFIG_DK1C20_STANDARD_32_H
-
-/*
- * NIOS CPU configuration. (PART OF configs/DK1C20.h)
- *
- * Here we must define CPU dependencies. Any unsupported option have to
- * be defined with zero, example CPU without data cache / OCI:
- *
- * #define CONFIG_SYS_NIOS_CPU_ICACHE 4096
- * #define CONFIG_SYS_NIOS_CPU_DCACHE 0
- * #define CONFIG_SYS_NIOS_CPU_OCI_BASE 0
- * #define CONFIG_SYS_NIOS_CPU_OCI_SIZE 0
- */
-
-/* CPU core */
-#define CONFIG_SYS_NIOS_CPU_CLK 50000000 /* NIOS CPU clock */
-#define CONFIG_SYS_NIOS_CPU_ICACHE (4 * 1024) /* instruction cache */
-#define CONFIG_SYS_NIOS_CPU_DCACHE (4 * 1024) /* data cache */
-#define CONFIG_SYS_NIOS_CPU_REG_NUMS 256 /* number of register */
-#define CONFIG_SYS_NIOS_CPU_MUL 0 /* 16x16 MUL: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_MSTEP 1 /* 16x16 MSTEP: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_STACK 0x008fff00 /* stack top addr */
-#define CONFIG_SYS_NIOS_CPU_VEC_BASE 0x008fff00 /* IRQ vectors addr */
-#define CONFIG_SYS_NIOS_CPU_VEC_SIZE 256 /* size */
-#define CONFIG_SYS_NIOS_CPU_VEC_NUMS 64 /* numbers */
-#define CONFIG_SYS_NIOS_CPU_RST_VECT 0x00920000 /* RESET vector addr */
-#define CONFIG_SYS_NIOS_CPU_DBG_CORE 0 /* CPU debug: no(0) */
- /* yes(1) */
-
-/* on-chip extensions */
-#define CONFIG_SYS_NIOS_CPU_RAM_BASE 0 /* on chip RAM addr */
-#define CONFIG_SYS_NIOS_CPU_RAM_SIZE 0 /* size */
-
-#define CONFIG_SYS_NIOS_CPU_ROM_BASE 0x00920000 /* on chip ROM addr */
-#define CONFIG_SYS_NIOS_CPU_ROM_SIZE (2 * 1024) /* 2 KB size */
-
-#define CONFIG_SYS_NIOS_CPU_OCI_BASE 0x00920800 /* OCI core addr */
-#define CONFIG_SYS_NIOS_CPU_OCI_SIZE 256 /* size */
-
-/* timer */
-#define CONFIG_SYS_NIOS_CPU_TIMER_NUMS 2 /* number of timer */
-
-#define CONFIG_SYS_NIOS_CPU_TIMER0 0x00920940 /* TIMER0 addr */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_IRQ 16 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_PER 1000 /* periode usec */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_AR 0 /* always run: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_FP 0 /* fixed per: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_SS 1 /* snaphot: no(0) */
- /* yes(1) */
-
-#define CONFIG_SYS_NIOS_CPU_TIMER1 0x009209e0 /* TIMER1 addr */
-#define CONFIG_SYS_NIOS_CPU_TIMER1_IRQ 50 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_TIMER1_PER 10000 /* periode usec */
-#define CONFIG_SYS_NIOS_CPU_TIMER1_AR 1 /* always run: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_TIMER1_FP 1 /* fixed per: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_TIMER1_SS 0 /* snaphot: no(0) */
- /* yes(1) */
-
-/* serial i/o */
-#define CONFIG_SYS_NIOS_CPU_UART_NUMS 1 /* number of uarts */
-
-#define CONFIG_SYS_NIOS_CPU_UART0 0x00920900 /* UART0 addr */
-#define CONFIG_SYS_NIOS_CPU_UART0_IRQ 25 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_UART0_BR 115200 /* baudrate var(0) */
-#define CONFIG_SYS_NIOS_CPU_UART0_DB 8 /* data bit */
-#define CONFIG_SYS_NIOS_CPU_UART0_SB 1 /* stop bit */
-#define CONFIG_SYS_NIOS_CPU_UART0_PA 0 /* parity none(0) */
- /* odd(1) */
- /* even(2) */
-#define CONFIG_SYS_NIOS_CPU_UART0_HS 0 /* handshake: no(0) */
- /* crts(1) */
-#define CONFIG_SYS_NIOS_CPU_UART0_EOP 0 /* eop reg: no(0) */
- /* yes(1) */
-
-/* parallel i/o */
-#define CONFIG_SYS_NIOS_CPU_PIO_NUMS 8 /* number of parports */
-
-#define CONFIG_SYS_NIOS_CPU_PIO0 0x00920960 /* PIO0 addr */
-#define CONFIG_SYS_NIOS_CPU_PIO0_IRQ 40 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO0_BITS 4 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO0_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO0_CAP 1 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO0_EDGE 3 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO0_ITYPE 2 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO1 0x00920970 /* PIO1 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO1_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO1_BITS 11 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO1_TYPE 0 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO1_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO1_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO1_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO2 0x00920980 /* PIO2 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO2_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO2_BITS 8 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO2_TYPE 1 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO2_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO2_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO2_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO3 0x00920990 /* PIO3 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO3_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO3_BITS 16 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO3_TYPE 1 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO3_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO3_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO3_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO4 0x009209a0 /* PIO4 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO4_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO4_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO4_TYPE 0 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO4_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO4_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO4_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO5 0x009209b0 /* PIO5 addr */
-#define CONFIG_SYS_NIOS_CPU_PIO5_IRQ 35 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO5_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO5_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO5_CAP 1 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO5_EDGE 3 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO5_ITYPE 2 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO6 0x009209c0 /* PIO6 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO6_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO6_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO6_TYPE 1 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO6_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO6_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO6_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO7 0x009209d0 /* PIO7 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO7_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO7_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO7_TYPE 1 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO7_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO7_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO7_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-/* IDE i/f */
-#define CONFIG_SYS_NIOS_CPU_IDE_NUMS 1 /* number of IDE contr. */
-#define CONFIG_SYS_NIOS_CPU_IDE0 0x00920a00 /* IDE0 addr */
-
-/* active serial memory i/f */
-#define CONFIG_SYS_NIOS_CPU_ASMI_NUMS 1 /* number of ASMI */
-#define CONFIG_SYS_NIOS_CPU_ASMI0 0x00920b00 /* ASMI0 addr */
-#define CONFIG_SYS_NIOS_CPU_ASMI0_IRQ 45 /* IRQ */
-
-/* memory accessibility */
-#define CONFIG_SYS_NIOS_CPU_SRAM_BASE 0x00800000 /* board SRAM addr */
-#define CONFIG_SYS_NIOS_CPU_SRAM_SIZE (1024 * 1024) /* 1 MB size */
-
-#define CONFIG_SYS_NIOS_CPU_SDRAM_BASE 0x01000000 /* board SDRAM addr */
-#define CONFIG_SYS_NIOS_CPU_SDRAM_SIZE (16*1024*1024) /* 16 MB size */
-
-#define CONFIG_SYS_NIOS_CPU_FLASH_BASE 0x00000000 /* board Flash addr */
-#define CONFIG_SYS_NIOS_CPU_FLASH_SIZE (8*1024*1024) /* 8 MB size */
-
-/* LAN */
-#define CONFIG_SYS_NIOS_CPU_LAN_NUMS 1 /* number of LAN i/f */
-
-#define CONFIG_SYS_NIOS_CPU_LAN0_BASE 0x00910000 /* LAN0 addr */
-#define CONFIG_SYS_NIOS_CPU_LAN0_OFFS 0x0300 /* offset */
-#define CONFIG_SYS_NIOS_CPU_LAN0_IRQ 30 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_LAN0_BUSW 32 /* buswidth*/
-#define CONFIG_SYS_NIOS_CPU_LAN0_TYPE 0 /* smc91111(0) */
- /* cs8900(1) */
- /* ex: alteramac(2) */
-
-/* symbolic redefinition (undef, if not present) */
-#define CONFIG_SYS_NIOS_CPU_USER_TIMER 0 /* TIMER0: users choice */
-#define CONFIG_SYS_NIOS_CPU_TICK_TIMER 1 /* TIMER1: tick (needed)*/
-
-#define CONFIG_SYS_NIOS_CPU_BUTTON_PIO 0 /* PIO0: buttons */
-#define CONFIG_SYS_NIOS_CPU_LCD_PIO 1 /* PIO1: ASCII LCD */
-#define CONFIG_SYS_NIOS_CPU_LED_PIO 2 /* PIO2: LED bar */
-#define CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO 3 /* PIO3: 7-seg. display */
-#define CONFIG_SYS_NIOS_CPU_RECONF_PIO 4 /* PIO4: reconf pin */
-#define CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO 5 /* PIO5: CF present IRQ */
-#define CONFIG_SYS_NIOS_CPU_CFPOWER_PIO 6 /* PIO6: CF power/sw. */
-#define CONFIG_SYS_NIOS_CPU_CFATASEL_PIO 7 /* PIO7: CF ATA select */
-
-#endif /* __CONFIG_DK1C20_STANDARD_32_H */
+++ /dev/null
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/***********************************************************************
- * Include the whole NIOS CPU configuration.
- *
- * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!!
- *
- ***********************************************************************/
-
-#if defined(CONFIG_NIOS_SAFE_32)
-#include <configs/DK1S10_safe_32.h>
-#elif defined(CONFIG_NIOS_STANDARD_32)
-#include <configs/DK1S10_standard_32.h>
-#elif defined(CONFIG_NIOS_MTX_LDK_20)
-#include <configs/DK1S10_mtx_ldk_20.h>
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup right NIOS CPU configuration
-#endif
-
-/*------------------------------------------------------------------------
- * BOARD/CPU -- TOP-LEVEL
- *----------------------------------------------------------------------*/
-#define CONFIG_NIOS 1 /* NIOS-32 core */
-#define CONFIG_DK1S10 1 /* Stratix DK-1S10 board*/
-#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */
-#define CONFIG_SYS_HZ 1000 /* 1 msec time tick */
-#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
-
-/*------------------------------------------------------------------------
- * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM)
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_SDRAM_SIZE != 0)
-
-#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_NIOS_CPU_SDRAM_BASE
-#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_NIOS_CPU_SDRAM_SIZE
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup any SDRAM in NIOS CPU config
-#endif
-
-#if defined(CONFIG_SYS_NIOS_CPU_SRAM_BASE) && defined(CONFIG_SYS_NIOS_CPU_SRAM_SIZE)
-
-#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_NIOS_CPU_SRAM_BASE
-#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_NIOS_CPU_SRAM_SIZE
-
-#else
-
-#undef CONFIG_SYS_SRAM_BASE
-#undef CONFIG_SYS_SRAM_SIZE
-
-#endif
-
-#define CONFIG_SYS_VECT_BASE CONFIG_SYS_NIOS_CPU_VEC_BASE
-
-/*------------------------------------------------------------------------
- * MEMORY ORGANIZATION - For the most part, you can put things pretty
- * much anywhere. This is pretty flexible for Nios. So here we make some
- * arbitrary choices & assume that the monitor is placed at the end of
- * a memory resource (so you must make sure TEXT_BASE is chosen
- * appropriately).
- *
- * -The heap is placed below the monitor.
- * -Global data is placed below the heap.
- * -The stack is placed below global data (&grows down).
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256k */
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET
-
-/*------------------------------------------------------------------------
- * FLASH (AM29LV065D)
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
-
-#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_NIOS_CPU_FLASH_BASE
-#define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_NIOS_CPU_FLASH_SIZE
-#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
-#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size */
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup any Flash memory in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * ENVIRONMENT
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
-
-#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */
-
-#if defined(CONFIG_NIOS_STANDARD_32)
-#define CONFIG_ENV_ADDR CONFIG_SYS_FLASH_BASE /* Mem addr of env */
-#elif defined(CONFIG_NIOS_MTX_LDK_20)
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup the environment base address CONFIG_ENV_ADDR
-#endif
-
-#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
-#define CONFIG_ENV_OVERWRITE /* Serial/eth change Ok */
-
-#else
-#define CONFIG_ENV_IS_NOWHERE 1 /* NO Environment */
-#endif
-
-/*------------------------------------------------------------------------
- * CONSOLE
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_UART_NUMS != 0)
-
-#define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_NIOS_CPU_UART0 /* 1st UART is Cons. */
-#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
-
-#if (CONFIG_SYS_NIOS_CPU_UART0_BR != 0)
-#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
-#define CONFIG_BAUDRATE CONFIG_SYS_NIOS_CPU_UART0_BR
-#else
-#undef CONFIG_SYS_NIOS_FIXEDBAUD
-#define CONFIG_BAUDRATE 115200
-#endif
-
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one UART in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc PIT,
- * so an avalon bus timer is required.
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_TIMER_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_TICK_TIMER)
-
-#if (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 0)
-
-#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER0 /* TIMER0 as tick */
-#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER0_IRQ
-
-#if (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 1) /* fixed period */
-
-#if (CONFIG_SYS_NIOS_CPU_TIMER0_PER >= CONFIG_SYS_HZ)
-#define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER0_PER / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
-#endif
-
-#undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */
-
-#elif (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 0) /* variable period */
-
-#if (CONFIG_SYS_HZ <= 1000)
-#define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
-#endif
-
-#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER0_FP correct
-#endif
-
-#elif (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 1)
-
-#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER1 /* TIMER1 as tick */
-#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER1_IRQ
-
-#if (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 1) /* fixed period */
-
-#if (CONFIG_SYS_NIOS_CPU_TIMER1_PER >= CONFIG_SYS_HZ)
-#define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER1_PER / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
-#endif
-
-#undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */
-
-#elif (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 0) /* variable period */
-
-#if (CONFIG_SYS_HZ <= 1000)
-#define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
-#endif
-
-#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER1_FP correct
-#endif
-
-#endif /* CONFIG_SYS_NIOS_CPU_TICK_TIMER */
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one TIMER in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * Ethernet -- needs work!
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_LAN_NUMS == 1)
-
-#if (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 0) /* LAN91C111 */
-
-#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
-#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
-#define CONFIG_SMC91111_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
-
-#if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
-#define CONFIG_SMC_USE_32_BIT 1
-#else /* no */
-#undef CONFIG_SMC_USE_32_BIT
-#endif
-
-#elif (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 1) /* CS8900A */
-
- /********************************************/
- /* !!! CS8900 is __not__ tested on NIOS !!! */
- /********************************************/
-#define CONFIG_NET_MULTI
-#define CONFIG_CS8900 /* Using CS8900 */
-#define CONFIG_CS8900_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + \
- CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
-
-#if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
-#undef CONFIG_CS8900_BUS16
-#define CONFIG_CS8900_BUS32
-#else /* no */
-#define CONFIG_CS8900_BUS16
-#undef CONFIG_CS8900_BUS32
-#endif
-
-#else
-#error *** CONFIG_SYS_ERROR: invalid LAN0 chip type, check your NIOS CPU config
-#endif
-
-#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 192.168.2.21
-#define CONFIG_SERVERIP 192.168.2.16
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup just one LAN only or expand your config.h
-#endif
-
-/*------------------------------------------------------------------------
- * STATUS LEDs
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_LED_PIO)
-
-#if (CONFIG_SYS_NIOS_CPU_LED_PIO == 0)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO0 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 1)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO1 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 2)
-
-#define STATUS_LED_BASE CONFIG_SYS_NIOS_CPU_PIO2
-#define STATUS_LED_BITS CONFIG_SYS_NIOS_CPU_PIO2_BITS
-#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */
-
-#if (CONFIG_SYS_NIOS_CPU_PIO2_TYPE == 1)
-#define STATUS_LED_WRONLY 1
-#else
-#undef STATUS_LED_WRONLY
-#endif
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 3)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO3 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 4)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO4 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 5)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO5 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 6)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO6 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 7)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO7 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 8)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO8 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 9)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO9 not supported, expand your config.h
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_LED_PIO in right case
-#endif
-
-#define CONFIG_STATUS_LED 1 /* enable status led driver */
-
-#define STATUS_LED_BIT (1 << 0) /* LED[0] */
-#define STATUS_LED_STATE STATUS_LED_BLINKING
-#define STATUS_LED_BOOT_STATE STATUS_LED_OFF
-#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */
-#define STATUS_LED_BOOT 0 /* boot LED */
-
-#if (STATUS_LED_BITS > 1)
-#define STATUS_LED_BIT1 (1 << 1) /* LED[1] */
-#define STATUS_LED_STATE1 STATUS_LED_OFF
-#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 50) /* ca. 5 Hz */
-#define STATUS_LED_RED 1 /* fail LED */
-#endif
-
-#if (STATUS_LED_BITS > 2)
-#define STATUS_LED_BIT2 (1 << 2) /* LED[2] */
-#define STATUS_LED_STATE2 STATUS_LED_OFF
-#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */
-#define STATUS_LED_YELLOW 2 /* info LED */
-#endif
-
-#if (STATUS_LED_BITS > 3)
-#define STATUS_LED_BIT3 (1 << 3) /* LED[3] */
-#define STATUS_LED_STATE3 STATUS_LED_OFF
-#define STATUS_LED_PERIOD3 (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */
-#define STATUS_LED_GREEN 3 /* info LED */
-#endif
-
-#define STATUS_LED_PAR 1 /* makes status_led.h happy */
-
-#endif /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
-
-/*------------------------------------------------------------------------
- * SEVEN SEGMENT LED DISPLAY
- *----------------------------------------------------------------------*/
-#if (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO)
-
-#if (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 0)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO0 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 1)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO1 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 2)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO2 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 3)
-
-#define SEVENSEG_BASE CONFIG_SYS_NIOS_CPU_PIO3
-#define SEVENSEG_BITS CONFIG_SYS_NIOS_CPU_PIO3_BITS
-#define SEVENSEG_ACTIVE 0 /* LED on for bit == 1 */
-
-#if (CONFIG_SYS_NIOS_CPU_PIO3_TYPE == 1)
-#define SEVENSEG_WRONLY 1
-#else
-#undef SEVENSEG_WRONLY
-#endif
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 4)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO4 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 5)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO5 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 6)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO6 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 7)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO7 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 8)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO8 not supported, expand your config.h
-
-#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 9)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO9 not supported, expand your config.h
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO in right case
-#endif
-
-#define CONFIG_SEVENSEG 1 /* enable seven segment led driver */
-
-/*
- * Dual 7-Segment Display pin assignment -- read more in your
- * "Nios Development Board Reference Manual"
- *
- *
- * (U8) HI:D[15..8] (U9) LO:D[7..0]
- * ______ ______
- * | D14 | | D6 |
- * | | | |
- * D9| |D13 D1| |D5
- * |______| |______| ___
- * | D8 | | D0 | | A |
- * | | | | F|___|B
- * D10| |D12 D2| |D4 | G |
- * |______| |______| E|___|C
- * D11 * D3 * D *
- * D15 D7 DP
- *
- */
-#define SEVENSEG_DIGIT_HI_LO_EQUAL 1 /* high nibble equal low nibble */
-#define SEVENSEG_DIGIT_A (1 << 6) /* bit 6 is segment A */
-#define SEVENSEG_DIGIT_B (1 << 5) /* bit 5 is segment B */
-#define SEVENSEG_DIGIT_C (1 << 4) /* bit 4 is segment C */
-#define SEVENSEG_DIGIT_D (1 << 3) /* bit 3 is segment D */
-#define SEVENSEG_DIGIT_E (1 << 2) /* bit 2 is segment E */
-#define SEVENSEG_DIGIT_F (1 << 1) /* bit 1 is segment F */
-#define SEVENSEG_DIGIT_G (1 << 0) /* bit 0 is segment G */
-#define SEVENSEG_DIGIT_DP (1 << 7) /* bit 7 is decimal point */
-
-#endif /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_CDP
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_DISPLAY
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_IMMAP
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_PORTIO
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_REISER
-#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_SNTP
-
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_XIMG
-
-/*------------------------------------------------------------------------
- * KGDB
- *----------------------------------------------------------------------*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 9600
-#endif
-
-/*------------------------------------------------------------------------
- * MISC
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "DK1S10 > " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-/* Default load address */
-#if (CONFIG_SYS_SRAM_SIZE != 0)
-
-/* default in SRAM */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SRAM_BASE
-
-#elif (CONFIG_SYS_SDRAM_SIZE != 0)
-
-/* default in SDRAM */
-#if (CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE)
-#else
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
-#endif
-
-#else
-#undef CONFIG_SYS_LOAD_ADDR /* force error break */
-#endif
-
-
-/* MEM test area */
-#if (CONFIG_SYS_SDRAM_SIZE != 0)
-
-/* SDRAM begin to stack area (1MB stack) */
-#if (CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE)
-#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE)
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - (1024 * 1024))
-#else
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - (1024 * 1024))
-#endif
-
-#else
-#undef CONFIG_SYS_MEMTEST_START /* force error break */
-#undef CONFIG_SYS_MEMTEST_END
-#endif
-
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition, whole device */
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV "nor0"
-#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET 0x00000000
-
-/* mtdparts command line support */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT ""
-#define MTDPARTS_DEFAULT ""
-*/
-
-#endif /* __CONFIG_H */
+++ /dev/null
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_DK1S10_MTX_LDK_20_H
-#define __CONFIG_DK1S10_MTX_LDK_20_H
-
-/*
- * NIOS CPU configuration. (PART OF configs/DK1S10.h)
- *
- * Here we must define CPU dependencies. Any unsupported option have to
- * be defined with zero, example CPU without data cache / OCI:
- *
- * #define CONFIG_SYS_NIOS_CPU_ICACHE 4096
- * #define CONFIG_SYS_NIOS_CPU_DCACHE 0
- * #define CONFIG_SYS_NIOS_CPU_OCI_BASE 0
- * #define CONFIG_SYS_NIOS_CPU_OCI_SIZE 0
- */
-
-/* CPU core */
-#define CONFIG_SYS_NIOS_CPU_CLK 75000000 /* NIOS CPU clock */
-#define CONFIG_SYS_NIOS_CPU_ICACHE (0) /* instruction cache */
-#define CONFIG_SYS_NIOS_CPU_DCACHE (0) /* data cache */
-#define CONFIG_SYS_NIOS_CPU_REG_NUMS 512 /* number of register */
-#define CONFIG_SYS_NIOS_CPU_MUL 0 /* 16x16 MUL: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_MSTEP 1 /* 16x16 MSTEP: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_STACK 0x02000000 /* stack top addr */
-#define CONFIG_SYS_NIOS_CPU_VEC_BASE 0x01000000 /* IRQ vectors addr */
-#define CONFIG_SYS_NIOS_CPU_VEC_SIZE 256 /* size */
-#define CONFIG_SYS_NIOS_CPU_VEC_NUMS 64 /* numbers */
-#define CONFIG_SYS_NIOS_CPU_RST_VECT 0x00000000 /* RESET vector addr */
-#define CONFIG_SYS_NIOS_CPU_DBG_CORE 0 /* CPU debug: no(0) */
- /* yes(1) */
-
-/* The offset address in flash to check for the Nios signature "Ni".
- * (see GM_FlashExec in germs_monitor.s) */
-#define CONFIG_SYS_NIOS_CPU_EXES_OFFS 0x0C
-
-/* on-chip extensions */
-#undef CONFIG_SYS_NIOS_CPU_RAM_BASE /* on chip RAM addr */
-#undef CONFIG_SYS_NIOS_CPU_RAM_SIZE /* 64 KB size */
-
-#define CONFIG_SYS_NIOS_CPU_ROM_BASE 0x00000000 /* on chip ROM addr */
-#define CONFIG_SYS_NIOS_CPU_ROM_SIZE (2 * 1024) /* 2 KB size */
-
-#undef CONFIG_SYS_NIOS_CPU_OCI_BASE /* OCI core addr */
-#undef CONFIG_SYS_NIOS_CPU_OCI_SIZE /* size */
-
-/* timer */
-#define CONFIG_SYS_NIOS_CPU_TIMER_NUMS 1 /* number of timer */
-
-#define CONFIG_SYS_NIOS_CPU_TIMER0 0x00000840 /* TIMER0 addr */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_IRQ 16 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_PER 1000 /* periode usec */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_AR 0 /* always run: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_FP 0 /* fixed per: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_SS 1 /* snaphot: no(0) */
- /* yes(1) */
-
-/* serial i/o */
-#define CONFIG_SYS_NIOS_CPU_UART_NUMS 2 /* number of uarts */
-
-#define CONFIG_SYS_NIOS_CPU_UART0 0x00000800 /* UART0 addr */
-#define CONFIG_SYS_NIOS_CPU_UART0_IRQ 17 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_UART0_BR 115200 /* baudrate var(0) */
-#define CONFIG_SYS_NIOS_CPU_UART0_DB 8 /* data bit */
-#define CONFIG_SYS_NIOS_CPU_UART0_SB 2 /* stop bit */
-#define CONFIG_SYS_NIOS_CPU_UART0_PA 0 /* parity none(0) */
- /* odd(1) */
- /* even(2) */
-#define CONFIG_SYS_NIOS_CPU_UART0_HS 0 /* handshake: no(0) */
- /* crts(1) */
-#define CONFIG_SYS_NIOS_CPU_UART0_EOP 0 /* eop reg: no(0) */
- /* yes(1) */
-
-#define CONFIG_SYS_NIOS_CPU_UART1 0x000008a0 /* UART1 addr */
-#define CONFIG_SYS_NIOS_CPU_UART1_IRQ 18 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_UART1_BR 115200 /* baudrate var(0) */
-#define CONFIG_SYS_NIOS_CPU_UART1_DB 8 /* data bit */
-#define CONFIG_SYS_NIOS_CPU_UART1_SB 1 /* stop bit */
-#define CONFIG_SYS_NIOS_CPU_UART1_PA 0 /* parity none(0) */
- /* odd(1) */
- /* even(2) */
-#define CONFIG_SYS_NIOS_CPU_UART1_HS 0 /* handshake: no(0) */
- /* crts(1) */
-#define CONFIG_SYS_NIOS_CPU_UART1_EOP 0 /* eop reg: no(0) */
- /* yes(1) */
-
-/* parallel i/o */
-#define CONFIG_SYS_NIOS_CPU_PIO_NUMS 2 /* number of parports */
-
-#define CONFIG_SYS_NIOS_CPU_PIO0 0x00000860 /* PIO0 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO0_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO0_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO0_TYPE 1 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO0_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO0_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO0_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO1 0x00000870 /* PIO1 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO1_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO1_BITS 4 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO1_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO1_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO1_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO1_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-/* IDE i/f */
-#define CONFIG_SYS_NIOS_CPU_IDE_NUMS 1 /* number of IDE contr. */
-#define CONFIG_SYS_NIOS_CPU_IDE0 0x00000900 /* IDE0 addr */
-#define CONFIG_SYS_NIOS_CPU_IDE0_IRQ 25 /* IRQ */
-
-/* memory accessibility */
-#undef CONFIG_SYS_NIOS_CPU_SRAM_BASE /* board SRAM addr */
-#undef CONFIG_SYS_NIOS_CPU_SRAM_SIZE /* 1 MB size */
-
-#define CONFIG_SYS_NIOS_CPU_SDRAM_BASE 0x01000000 /* board SDRAM addr */
-#define CONFIG_SYS_NIOS_CPU_SDRAM_SIZE (16*1024*1024) /* 16 MB size */
-
-#define CONFIG_SYS_NIOS_CPU_FLASH_BASE 0x00800000 /* board Flash addr */
-#define CONFIG_SYS_NIOS_CPU_FLASH_SIZE (8*1024*1024) /* 8 MB size */
-
-/* LAN */
-#define CONFIG_SYS_NIOS_CPU_LAN_NUMS 1 /* number of LAN i/f */
-
-#define CONFIG_SYS_NIOS_CPU_LAN0_BASE 0x00010000 /* LAN0 addr */
-#define CONFIG_SYS_NIOS_CPU_LAN0_OFFS 0x0300 /* offset */
-#define CONFIG_SYS_NIOS_CPU_LAN0_IRQ 20 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_LAN0_BUSW 32 /* buswidth*/
-#define CONFIG_SYS_NIOS_CPU_LAN0_TYPE 0 /* smc91111(0) */
- /* cs8900(1) */
- /* ex: openmac(2) */
- /* ex: alteramac(3) */
-
-/* symbolic redefinition (undef, if not present) */
-#define CONFIG_SYS_NIOS_CPU_TICK_TIMER 0 /* TIMER0: tick (needed)*/
-#undef CONFIG_SYS_NIOS_CPU_USER_TIMER /* TIMERx: users choice */
-
-#define CONFIG_SYS_NIOS_CPU_CFPOWER_PIO 0 /* PIO0: CF power/sw. */
-#define CONFIG_SYS_NIOS_CPU_BUTTON_PIO 1 /* PIO1: buttons */
-#undef CONFIG_SYS_NIOS_CPU_LCD_PIO /* PIOx: ASCII LCD */
-#undef CONFIG_SYS_NIOS_CPU_LED_PIO /* PIOx: LED bar */
-#undef CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO /* PIOx: 7-seg. display */
-#undef CONFIG_SYS_NIOS_CPU_RECONF_PIO /* PIOx: reconf pin */
-#undef CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO /* PIOx: CF present IRQ */
-#undef CONFIG_SYS_NIOS_CPU_CFATASEL_PIO /* PIOx: CF ATA select */
-
-#endif /* __CONFIG_DK1S10_MTX_LDK_20_H */
+++ /dev/null
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_DK1S10_SAFE_32_H
-#define __CONFIG_DK1S10_SAFE_32_H
-
-/*
- * NIOS CPU configuration. (PART OF configs/DK1S10.h)
- *
- * !!! TODO !!! TODO !!!
- */
-#error *** CONFIG_SYS_ERROR: DK1S10_safe_32 have to be defined (use DK1S10_standard_32 as template)
-
-#endif /* __CONFIG_DK1S10_SAFE_32_H */
+++ /dev/null
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_DK1S10_STANDARD_32_H
-#define __CONFIG_DK1S10_STANDARD_32_H
-
-/*
- * NIOS CPU configuration. (PART OF configs/DK1S10.h)
- *
- * Here we must define CPU dependencies. Any unsupported option have to
- * be defined with zero, example CPU without data cache / OCI:
- *
- * #define CONFIG_SYS_NIOS_CPU_ICACHE 4096
- * #define CONFIG_SYS_NIOS_CPU_DCACHE 0
- * #define CONFIG_SYS_NIOS_CPU_OCI_BASE 0
- * #define CONFIG_SYS_NIOS_CPU_OCI_SIZE 0
- */
-
-/* CPU core */
-#define CONFIG_SYS_NIOS_CPU_CLK 50000000 /* NIOS CPU clock */
-#define CONFIG_SYS_NIOS_CPU_ICACHE (4 * 1024) /* instruction cache */
-#define CONFIG_SYS_NIOS_CPU_DCACHE (4 * 1024) /* data cache */
-#define CONFIG_SYS_NIOS_CPU_REG_NUMS 256 /* number of register */
-#define CONFIG_SYS_NIOS_CPU_MUL 0 /* 16x16 MUL: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_MSTEP 1 /* 16x16 MSTEP: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_STACK 0x008fff00 /* stack top addr */
-#define CONFIG_SYS_NIOS_CPU_VEC_BASE 0x008fff00 /* IRQ vectors addr */
-#define CONFIG_SYS_NIOS_CPU_VEC_SIZE 256 /* size */
-#define CONFIG_SYS_NIOS_CPU_VEC_NUMS 64 /* numbers */
-#define CONFIG_SYS_NIOS_CPU_RST_VECT 0x00920000 /* RESET vector addr */
-#define CONFIG_SYS_NIOS_CPU_DBG_CORE 0 /* CPU debug: no(0) */
- /* yes(1) */
-
-/* on-chip extensions */
-#define CONFIG_SYS_NIOS_CPU_RAM_BASE 0x00900000 /* on chip RAM addr */
-#define CONFIG_SYS_NIOS_CPU_RAM_SIZE (64 * 1024) /* 64 KB size */
-
-#define CONFIG_SYS_NIOS_CPU_ROM_BASE 0x00920000 /* on chip ROM addr */
-#define CONFIG_SYS_NIOS_CPU_ROM_SIZE (2 * 1024) /* 2 KB size */
-
-#define CONFIG_SYS_NIOS_CPU_OCI_BASE 0x00920800 /* OCI core addr */
-#define CONFIG_SYS_NIOS_CPU_OCI_SIZE 256 /* size */
-
-/* timer */
-#define CONFIG_SYS_NIOS_CPU_TIMER_NUMS 2 /* number of timer */
-
-#define CONFIG_SYS_NIOS_CPU_TIMER0 0x00920940 /* TIMER0 addr */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_IRQ 16 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_PER 1000 /* periode usec */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_AR 0 /* always run: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_FP 0 /* fixed per: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_TIMER0_SS 1 /* snaphot: no(0) */
- /* yes(1) */
-
-#define CONFIG_SYS_NIOS_CPU_TIMER1 0x009209e0 /* TIMER1 addr */
-#define CONFIG_SYS_NIOS_CPU_TIMER1_IRQ 50 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_TIMER1_PER 10000 /* periode usec */
-#define CONFIG_SYS_NIOS_CPU_TIMER1_AR 1 /* always run: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_TIMER1_FP 1 /* fixed per: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_TIMER1_SS 0 /* snaphot: no(0) */
- /* yes(1) */
-
-/* serial i/o */
-#define CONFIG_SYS_NIOS_CPU_UART_NUMS 1 /* number of uarts */
-
-#define CONFIG_SYS_NIOS_CPU_UART0 0x00920900 /* UART0 addr */
-#define CONFIG_SYS_NIOS_CPU_UART0_IRQ 25 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_UART0_BR 115200 /* baudrate var(0) */
-#define CONFIG_SYS_NIOS_CPU_UART0_DB 8 /* data bit */
-#define CONFIG_SYS_NIOS_CPU_UART0_SB 1 /* stop bit */
-#define CONFIG_SYS_NIOS_CPU_UART0_PA 0 /* parity none(0) */
- /* odd(1) */
- /* even(2) */
-#define CONFIG_SYS_NIOS_CPU_UART0_HS 0 /* handshake: no(0) */
- /* crts(1) */
-#define CONFIG_SYS_NIOS_CPU_UART0_EOP 0 /* eop reg: no(0) */
- /* yes(1) */
-
-/* parallel i/o */
-#define CONFIG_SYS_NIOS_CPU_PIO_NUMS 8 /* number of parports */
-
-#define CONFIG_SYS_NIOS_CPU_PIO0 0x00920960 /* PIO0 addr */
-#define CONFIG_SYS_NIOS_CPU_PIO0_IRQ 40 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO0_BITS 4 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO0_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO0_CAP 1 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO0_EDGE 3 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO0_ITYPE 2 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO1 0x00920970 /* PIO1 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO1_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO1_BITS 11 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO1_TYPE 0 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO1_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO1_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO1_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO2 0x00920980 /* PIO2 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO2_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO2_BITS 8 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO2_TYPE 1 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO2_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO2_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO2_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO3 0x00920990 /* PIO3 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO3_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO3_BITS 16 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO3_TYPE 1 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO3_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO3_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO3_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO4 0x009209a0 /* PIO4 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO4_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO4_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO4_TYPE 0 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO4_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO4_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO4_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO5 0x009209b0 /* PIO5 addr */
-#define CONFIG_SYS_NIOS_CPU_PIO5_IRQ 35 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO5_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO5_TYPE 2 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO5_CAP 1 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO5_EDGE 3 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO5_ITYPE 2 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO6 0x009209c0 /* PIO6 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO6_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO6_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO6_TYPE 1 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO6_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO6_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO6_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-#define CONFIG_SYS_NIOS_CPU_PIO7 0x009209d0 /* PIO7 addr */
-#undef CONFIG_SYS_NIOS_CPU_PIO7_IRQ /* w/o IRQ */
-#define CONFIG_SYS_NIOS_CPU_PIO7_BITS 1 /* number of bits */
-#define CONFIG_SYS_NIOS_CPU_PIO7_TYPE 1 /* io type: tris(0) */
- /* out(1) */
- /* in(2) */
-#define CONFIG_SYS_NIOS_CPU_PIO7_CAP 0 /* capture: no(0) */
- /* yes(1) */
-#define CONFIG_SYS_NIOS_CPU_PIO7_EDGE 0 /* edge type: none(0) */
- /* fall(1) */
- /* rise(2) */
- /* any(3) */
-#define CONFIG_SYS_NIOS_CPU_PIO7_ITYPE 0 /* IRQ type: none(0) */
- /* level(1)*/
- /* edge(2) */
-
-/* IDE i/f */
-#define CONFIG_SYS_NIOS_CPU_IDE_NUMS 1 /* number of IDE contr. */
-#define CONFIG_SYS_NIOS_CPU_IDE0 0x00920a00 /* IDE0 addr */
-
-/* memory accessibility */
-#define CONFIG_SYS_NIOS_CPU_SRAM_BASE 0x00800000 /* board SRAM addr */
-#define CONFIG_SYS_NIOS_CPU_SRAM_SIZE (1024 * 1024) /* 1 MB size */
-
-#define CONFIG_SYS_NIOS_CPU_SDRAM_BASE 0x01000000 /* board SDRAM addr */
-#define CONFIG_SYS_NIOS_CPU_SDRAM_SIZE (16*1024*1024) /* 16 MB size */
-
-#define CONFIG_SYS_NIOS_CPU_FLASH_BASE 0x00000000 /* board Flash addr */
-#define CONFIG_SYS_NIOS_CPU_FLASH_SIZE (8*1024*1024) /* 8 MB size */
-
-/* LAN */
-#define CONFIG_SYS_NIOS_CPU_LAN_NUMS 1 /* number of LAN i/f */
-
-#define CONFIG_SYS_NIOS_CPU_LAN0_BASE 0x00910000 /* LAN0 addr */
-#define CONFIG_SYS_NIOS_CPU_LAN0_OFFS 0x0300 /* offset */
-#define CONFIG_SYS_NIOS_CPU_LAN0_IRQ 30 /* IRQ */
-#define CONFIG_SYS_NIOS_CPU_LAN0_BUSW 32 /* buswidth*/
-#define CONFIG_SYS_NIOS_CPU_LAN0_TYPE 0 /* smc91111(0) */
- /* cs8900(1) */
- /* ex: alteramac(2) */
-
-/* symbolic redefinition (undef, if not present) */
-#define CONFIG_SYS_NIOS_CPU_USER_TIMER 0 /* TIMER0: users choice */
-#define CONFIG_SYS_NIOS_CPU_TICK_TIMER 1 /* TIMER1: tick (needed)*/
-
-#define CONFIG_SYS_NIOS_CPU_BUTTON_PIO 0 /* PIO0: buttons */
-#define CONFIG_SYS_NIOS_CPU_LCD_PIO 1 /* PIO1: ASCII LCD */
-#define CONFIG_SYS_NIOS_CPU_LED_PIO 2 /* PIO2: LED bar */
-#define CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO 3 /* PIO3: 7-seg. display */
-#define CONFIG_SYS_NIOS_CPU_RECONF_PIO 4 /* PIO4: reconf pin */
-#define CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO 5 /* PIO5: CF present IRQ */
-#define CONFIG_SYS_NIOS_CPU_CFPOWER_PIO 6 /* PIO6: CF power/sw. */
-#define CONFIG_SYS_NIOS_CPU_CFATASEL_PIO 7 /* PIO7: CF ATA select */
-
-#endif /* __CONFIG_DK1S10_STANDARD_32_H */
/*
* Speed settings are board specific
*/
-#define CONFIG_SYS_BUS_HZ 100000000
-#define CONFIG_SYS_CPU_CLK 400000000
-#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ
+#define CONFIG_SYS_BUS_CLK 100000000
+#define CONFIG_SYS_CPU_CLK 400000000
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_LOAD_ADDR 0x00300000 /* default load address */
#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
-#define CONFIG_SYS_BUS_HZ 100000000 /* 100 MHz */
-#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ
+#define CONFIG_SYS_BUS_CLK 100000000 /* 100 MHz */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
/* System IO Config */
#define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */
-#define CONFIG_SYS_SICRL SICRL_USBDR /* Enable Internal USB Phy */
+#define CONFIG_SYS_SICRL SICRL_USBDR_10 /* Enable Internal USB Phy */
#define CONFIG_SYS_HID0_INIT 0x000000000
#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
#define CONFIG_ETHPRIME "eTSEC1"
#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
+
+/* TBI PHY configuration for SGMII mode */
+#define CONFIG_TSEC_TBICR_SETTINGS ( \
+ TBICR_PHY_RESET \
+ | TBICR_ANEG_ENABLE \
+ | TBICR_FULL_DUPLEX \
+ | TBICR_SPEED1_SET \
+ )
+
#endif /* CONFIG_TSEC_ENET */
/*
"netdev=eth0\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"loadaddr=1000000\0" \
- "bootfile=uImage\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
"protect off " MK_STR(TEXT_BASE) " +$filesize; " \
"erase " MK_STR(TEXT_BASE) " +$filesize; " \
#define CONFIG_SYS_LOAD_ADDR 0x00300000 /* default load address */
#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
-#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz */
-#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ
+#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
* For the detail description refer to the PCIPPC2 user's manual.
*/
#define CONFIG_SYS_HZ 1000
-#define CONFIG_SYS_BUS_HZ 100000000 /* bus speed - 100 mhz */
+#define CONFIG_SYS_BUS_CLK 100000000 /* bus speed - 100 mhz */
#define CONFIG_SYS_CPU_CLK 300000000
-#define CONFIG_SYS_BUS_CLK 100000000
/*
* For booting Linux, the board info and command line data
* For the detail description refer to the PCIPPC2 user's manual.
*/
#define CONFIG_SYS_HZ 1000
-#define CONFIG_SYS_BUS_HZ 100000000 /* bus speed - 100 mhz */
+#define CONFIG_SYS_BUS_CLK 100000000 /* bus speed - 100 mhz */
#define CONFIG_SYS_CPU_CLK 300000000
-#define CONFIG_SYS_BUS_CLK 100000000
/*
* For booting Linux, the board info and command line data
| SICRH_TSOBI1 \
| SICRH_TSOBI2 )
#define CONFIG_SYS_SICRL ( SICRL_LBC \
- | SICRL_USBDR \
+ | SICRL_USBDR_10 \
| SICRL_ETSEC2_A )
#define CONFIG_SYS_HID0_INIT 0x000000000
#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
-#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz */
-
-#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ
+#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
* Network & Ethernet Configuration
*/
#ifdef CONFIG_DRIVER_TI_EMAC
+#define CONFIG_EMAC_MDIO_PHY_NUM 1
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
--- /dev/null
+/*
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Based on davinci_dvevm.h. Original Copyrights follow:
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * Board
+ */
+
+/*
+ * SoC Configuration
+ */
+#define CONFIG_MACH_DAVINCI_DA850_EVM
+#define CONFIG_ARM926EJS /* arm926ejs CPU core */
+#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
+#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
+#define CONFIG_SYS_OSCIN_FREQ 24000000
+#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
+#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
+#define CONFIG_SYS_HZ 1000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
+
+/*
+ * Memory Info
+ */
+#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */
+#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
+#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
+
+/* memtest start addr */
+#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000)
+
+/* memtest will be run on 16MB */
+#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
+
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE (256*1024) /* regular stack */
+
+/*
+ * Serial Driver info
+ */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */
+#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */
+#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
+#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
+#define CONFIG_BAUDRATE 115200 /* Default baud rate */
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * I2C Configuration
+ */
+#define CONFIG_HARD_I2C
+#define CONFIG_DRIVER_DAVINCI_I2C
+#define CONFIG_SYS_I2C_SPEED 25000
+#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
+
+/*
+ * U-Boot general configuration
+ */
+#define CONFIG_BOOTFILE "uImage" /* Boot file name */
+#define CONFIG_SYS_PROMPT "DA850-evm > " /* Command Prompt */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
+#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+
+/*
+ * Linux Information
+ */
+#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100)
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTARGS \
+ "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
+#define CONFIG_BOOTDELAY 3
+
+/*
+ * U-Boot commands
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_MEMORY
+
+#ifndef CONFIG_DRIVER_TI_EMAC
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_PING
+#endif
+
+#if !defined(CONFIG_USE_NAND) && \
+ !defined(CONFIG_USE_NOR) && \
+ !defined(CONFIG_USE_SPIFLASH)
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_SIZE (16 << 10)
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_ENV
+#endif
+
+#endif /* __CONFIG_H */
/* Network Configuration */
#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_EMAC_MDIO_PHY_NUM 0
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
/* Network & Ethernet Configuration */
/*==================================*/
#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_EMAC_MDIO_PHY_NUM 1
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
/* Network & Ethernet Configuration */
/*==================================*/
#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_EMAC_MDIO_PHY_NUM 1
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
/* Network & Ethernet Configuration */
#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_EMAC_MDIO_PHY_NUM 1
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
/* Network & Ethernet Configuration */
/*==================================*/
#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_EMAC_MDIO_PHY_NUM 1
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
--- /dev/null
+/*
+ * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ *
+ * Based on original Kirkwood support which is
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _CONFIG_EDMINIV2_H
+#define _CONFIG_EDMINIV2_H
+
+/*
+ * Version number information
+ */
+
+#define CONFIG_IDENT_STRING " EDMiniV2"
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+
+#define CONFIG_MARVELL 1
+#define CONFIG_ARM926EJS 1 /* Basic Architecture */
+#define CONFIG_FEROCEON 1 /* CPU Core subversion */
+#define CONFIG_ORION5X 1 /* SOC Family Name */
+#define CONFIG_88F5182 1 /* SOC Name */
+#define CONFIG_MACH_EDMINIV2 1 /* Machine type */
+
+/*
+ * CLKs configurations
+ */
+
+#define CONFIG_SYS_HZ 1000
+
+/*
+ * Board-specific values for Orion5x MPP low level init:
+ * - MPPs 12 to 15 are SATA LEDs (mode 5)
+ * - Others are GPIO/unused (mode 3 for MPP0, mode 5 for
+ * MPP16 to MPP19, mode 0 for others
+ */
+
+#define ORION5X_MPP0_7 0x00000003
+#define ORION5X_MPP8_15 0x55550000
+#define ORION5X_MPP16_23 0x00000000
+
+/*
+ * Board-specific values for Orion5x GPIO low level init:
+ * - GPIO3 is input (RTC interrupt)
+ * - GPIO16 is Power LED control (0 = on, 1 = off)
+ * - GPIO17 is Power LED source select (0 = CPLD, 1 = GPIO16)
+ * - GPIO18 is Power Button status (0 = Released, 1 = Pressed)
+ * - Last GPIO is 26, further bits are supposed to be 0.
+ * Enable mask has ones for INPUT, 0 for OUTPUT.
+ * Default is LED ON.
+ */
+
+#define ORION5X_GPIO_OUT_ENABLE 0x03fcffff
+#define ORION5X_GPIO_OUT_VALUE 0x03fcffff
+
+/*
+ * NS16550 Configuration
+ */
+
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE (-4)
+#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
+#define CONFIG_SYS_NS16550_COM1 ORION5X_UART0_BASE
+
+/*
+ * Serial Port configuration
+ * The following definitions let you select what serial you want to use
+ * for your console driver.
+ */
+
+#define CONFIG_CONS_INDEX 1 /*Console on UART0 */
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ { 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 }
+
+/*
+ * FLASH configuration
+ */
+
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_LEGACY
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max num of sects on one chip */
+#define CONFIG_SYS_FLASH_BASE 0xfff80000
+#define CONFIG_SYS_FLASH_SECTSZ \
+ {16384, 8192, 8192, 32768, \
+ 65536, 65536, 65536, 65536, 65536, 65536, 65536}
+
+/* auto boot */
+#define CONFIG_BOOTDELAY 3 /* default enable autoboot */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
+#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
+
+#define CONFIG_SYS_PROMPT "EDMiniV2> " /* Command Prompt */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
+ +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */
+/*
+ * Commands configuration - using default command set for now
+ */
+#include <config_cmd_default.h>
+/*
+ * Disabling some default commands for staggered bring-up
+ */
+#undef CONFIG_CMD_BOOTD /* no bootd since no net */
+#undef CONFIG_CMD_NET /* no net since no eth */
+#undef CONFIG_CMD_NFS /* no NFS since no net */
+
+/*
+ * Environment variables configurations
+ */
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_SECT_SIZE 0x2000 /* 16K */
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_OFFSET 0x4000 /* env starts here */
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */
+/* size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE 128
+
+/*
+ * Other required minimal configurations
+ */
+#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
+#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
+#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
+#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
+#define CONFIG_NR_DRAM_BANKS 1
+
+#define CONFIG_STACKSIZE 0x00100000
+#define CONFIG_SYS_LOAD_ADDR 0x00800000
+#define CONFIG_SYS_MEMTEST_START 0x00400000
+#define CONFIG_SYS_MEMTEST_END 0x007fffff
+#define CONFIG_SYS_RESET_ADDRESS 0xffff0000
+#define CONFIG_SYS_MAXARGS 16
+
+#endif /* _CONFIG_EDMINIV2_H */
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
#define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* play along with linux */
+/*
+ * Video options
+ */
+#define CONFIG_VIDEO
+
+#ifdef CONFIG_VIDEO
+#define CONFIG_VIDEO_SM501
+#define CONFIG_VIDEO_SM501_32BPP
+#define CONFIG_VIDEO_SM501_PCI
+#define VIDEO_FB_LITTLE_ENDIAN
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_CONSOLE_EXTRA_INFO
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_VIDEO_SW_CURSOR
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_SPLASH_SCREEN
+#define CFG_CONSOLE_IS_IN_ENV
+#endif
+
/*
* Environment
*/
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_SNTP
+#ifdef CONFIG_VIDEO
+#define CONFIG_CMD_BMP
+#endif
#define CONFIG_IBM_EMAC4_V4 /* 440SPe has this EMAC version */
#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
#define CONFIG_IDENT_STRING " Freescale MPC7448 HPC II"
#define CONFIG_SYS_OCN_CLK 133000000 /* 133 MHz */
-#define CONFIG_SYS_CONFIG_BUS_CLK 133000000
+#define CONFIG_SYS_BUS_CLK 133000000
#define CONFIG_SYS_CLK_SPREAD /* Enable Spread-Spectrum Clock generation */
* STATUS LED
*/
#define CONFIG_STATUS_LED /* Enable status driver */
-#define CONFIG_EPLED /* Enable LED PIO driver */
-#define CONFIG_SYS_LEDPIO_ADDR LED_PIO_BASE
+#define CONFIG_GPIO_LED /* Enable GPIO LED driver */
+#define CONFIG_GPIO /* Enable GPIO driver */
-#define STATUS_LED_BIT 1 /* Bit-0 on PIO */
+#define STATUS_LED_BIT 0 /* Bit-0 on GPIO */
#define STATUS_LED_STATE 1 /* Blinking */
#define STATUS_LED_PERIOD (500 / CONFIG_SYS_NIOS_TMRMS) /* 500 msec */
#define CONFIG_750FX /* 750GL/GX/FX */
#define CONFIG_HIGH_BATS /* High BATs supported */
#define CONFIG_SYS_BOARD_NAME "P3M750"
-#define CONFIG_SYS_BUS_HZ 100000000
-#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ
+#define CONFIG_SYS_BUS_CLK 100000000
#define CONFIG_SYS_TCLK 100000000
#elif defined (CONFIG_P3M7448)
#define CONFIG_74xx
#define CONFIG_SYS_BOARD_NAME "P3M7448"
-#define CONFIG_SYS_BUS_HZ 133333333
-#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ
+#define CONFIG_SYS_BUS_CLK 133333333
#define CONFIG_SYS_TCLK 133333333
#endif
#define CONFIG_SYS_GT_DUAL_CPU /* also for JTAG even with one cpu */
/*
* Clocks config
*
- * CONFIG_SYS_BUS_HZ - Bus clock frequency in Hz
- * CONFIG_SYS_BUS_CLK - As above (?)
+ * CONFIG_SYS_BUS_CLK - Bus clock frequency in Hz
* CONFIG_SYS_HZ - Decrementer freq in Hz
*/
-#define CONFIG_SYS_BUS_HZ CONFIG_BUS_CLK
#define CONFIG_SYS_BUS_CLK CONFIG_BUS_CLK
#define CONFIG_SYS_HZ 1000
#define CONFIG_ENV_IS_IN_FLASH 1
#ifdef CONFIG_INFERNO
-/* we take the last sector, 128 KB in size, but we only use 4 KB of it for stack reasons */
+/* we take the last sector, 128 KB in size, but we only use 16 KB of it for stack reasons */
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x003E0000) /* Addr of Environment Sector */
-#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
+#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment */
+#define CONFIG_ENV_SECT_SIZE (128 << 10) /* size of environment sector */
#else
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
-#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
+#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment */
#endif
/*-----------------------------------------------------------------------
--- /dev/null
+/*
+ * (C) Copyright 2010
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * t3corp.h - configuration for T3CORP (460GT)
+ */
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_460GT 1 /* Specific PPC460GT */
+#define CONFIG_440 1
+#define CONFIG_4xx 1 /* ... PPC4xx family */
+
+#define CONFIG_HOSTNAME t3corp
+
+/*
+ * Include common defines/options for all AMCC/APM eval boards
+ */
+#include "amcc-common.h"
+
+#define CONFIG_SYS_CLK_FREQ 66666667 /* external freq to pll */
+
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
+#define CONFIG_BOARD_EARLY_INIT_R 1 /* Call board_early_init_r */
+#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
+#define CONFIG_BOARD_TYPES 1 /* support board types */
+#define CONFIG_FIT
+#define CFG_ALT_MEMTEST
+
+/*
+ * Base addresses -- Note these are effective addresses where the
+ * actual resources get mapped (not physical addresses)
+ */
+#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped PCI memory */
+#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
+#define CONFIG_SYS_PCI_TARGBASE CONFIG_SYS_PCI_MEMBASE
+
+#define CONFIG_SYS_PCIE_MEMBASE 0xb0000000 /* mapped PCIe mem */
+#define CONFIG_SYS_PCIE_MEMSIZE 0x08000000 /* incr for PCIe */
+#define CONFIG_SYS_PCIE_BASE 0xc4000000 /* PCIe UTL regs */
+
+#define CONFIG_SYS_PCIE0_CFGBASE 0xc0000000
+#define CONFIG_SYS_PCIE1_CFGBASE 0xc1000000
+#define CONFIG_SYS_PCIE0_XCFGBASE 0xc3000000
+#define CONFIG_SYS_PCIE1_XCFGBASE 0xc3001000
+
+#define CONFIG_SYS_PCIE0_UTLBASE 0xc08010000ULL /* 36bit phys addr */
+
+/* base address of inbound PCIe window */
+#define CONFIG_SYS_PCIE_INBOUND_BASE 0x000000000ULL /* 36bit phys addr */
+
+/* EBC stuff */
+#define CONFIG_SYS_FLASH_BASE 0xFC000000 /* later mapped here */
+#define CONFIG_SYS_FLASH_SIZE (64 << 20)
+
+#define CONFIG_SYS_FPGA1_BASE 0xe0000000
+#define CONFIG_SYS_FPGA2_BASE 0xe0100000
+#define CONFIG_SYS_FPGA3_BASE 0xe0200000
+
+#define CONFIG_SYS_BOOT_BASE_ADDR 0xFF000000 /* EBC Boot Space */
+#define CONFIG_SYS_FLASH_BASE_PHYS_H 0x4
+#define CONFIG_SYS_FLASH_BASE_PHYS_L 0xCC000000
+#define CONFIG_SYS_FLASH_BASE_PHYS \
+ (((u64)CONFIG_SYS_FLASH_BASE_PHYS_H << 32) \
+ | (u64)CONFIG_SYS_FLASH_BASE_PHYS_L)
+
+#define CONFIG_SYS_OCM_BASE 0xE3000000 /* OCM: 64k */
+#define CONFIG_SYS_SRAM_BASE 0xE8000000 /* SRAM: 256k */
+#define CONFIG_SYS_LOCAL_CONF_REGS 0xEF000000
+
+#define CONFIG_SYS_PERIPHERAL_BASE 0xEF600000 /* internal periph. */
+
+#define CONFIG_SYS_AHB_BASE 0xE2000000 /* int. AHB periph. */
+
+/*
+ * Initial RAM & stack pointer (placed in OCM)
+ */
+#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_BASE /* OCM */
+#define CONFIG_SYS_INIT_RAM_END (4 << 10)
+#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */
+#define CONFIG_SYS_GBL_DATA_OFFSET \
+ (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+
+/*
+ * Serial Port
+ */
+#undef CONFIG_UART1_CONSOLE /* define this if you want console on UART1 */
+
+/*
+ * Environment
+ */
+/*
+ * Define here the location of the environment variables (flash).
+ */
+#define CONFIG_ENV_IS_IN_FLASH /* use flash for environment vars */
+
+/*
+ * Flash related
+ */
+#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
+#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
+#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD reset cmd */
+
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sectors p. chip*/
+
+#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase/ms*/
+#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write/ms*/
+
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buff'd writes (20x faster)*/
+#define CONFIG_SYS_FLASH_EMPTY_INFO /* 'E' for empty sector on flinfo */
+
+#define CONFIG_ENV_SECT_SIZE 0x20000 /* sector size */
+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - \
+ CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE 0x4000 /* env sector size */
+
+/* Address and size of Redundant Environment Sector */
+#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR - CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
+
+/*
+ * DDR2 SDRAM
+ */
+#define CONFIG_AUTOCALIB "silent\0" /* default is non-verbose */
+#define CONFIG_PPC4xx_DDR_AUTOCALIBRATION /* IBM DDR autocalibration */
+#define DEBUG_PPC4xx_DDR_AUTOCALIBRATION /* dynamic DDR autocal debug */
+#undef CONFIG_PPC4xx_DDR_METHOD_A
+
+/* DDR1/2 SDRAM Device Control Register Data Values */
+/* Memory Queue */
+#define CONFIG_SYS_SDRAM_R0BAS (SDRAM_RXBAS_SDBA_ENCODE(0) | \
+ SDRAM_RXBAS_SDSZ_256)
+#define CONFIG_SYS_SDRAM_R1BAS 0x00000000
+#define CONFIG_SYS_SDRAM_R2BAS 0x00000000
+#define CONFIG_SYS_SDRAM_R3BAS 0x00000000
+#define CONFIG_SYS_SDRAM_PLBADDULL 0x00000000
+#define CONFIG_SYS_SDRAM_PLBADDUHB 0x00000008
+#define CONFIG_SYS_SDRAM_CONF1LL 0x80001C00
+#define CONFIG_SYS_SDRAM_CONF1HB 0x80001C80
+#define CONFIG_SYS_SDRAM_CONFPATHB 0x10a68000
+
+#define CONFIG_DDR_ECC
+#define CONFIG_SYS_MBYTES_SDRAM 256
+
+#define CAS_LATENCY JEDEC_MA_MR_CL_DDR2_5_0_CLK
+
+/* DDR1/2 SDRAM Device Control Register Data Values */
+#define CONFIG_SYS_SDRAM0_MB0CF (SDRAM_RXBAS_SDAM_MODE7 | \
+ SDRAM_RXBAS_SDBE_ENABLE)
+#define CONFIG_SYS_SDRAM0_MB1CF SDRAM_RXBAS_SDBE_DISABLE
+#define CONFIG_SYS_SDRAM0_MB2CF SDRAM_RXBAS_SDBE_DISABLE
+#define CONFIG_SYS_SDRAM0_MB3CF SDRAM_RXBAS_SDBE_DISABLE
+#define CONFIG_SYS_SDRAM0_MCOPT1 (SDRAM_MCOPT1_MCHK_GEN | \
+ SDRAM_MCOPT1_PMU_OPEN | \
+ SDRAM_MCOPT1_DMWD_32 | \
+ SDRAM_MCOPT1_8_BANKS | \
+ SDRAM_MCOPT1_DDR2_TYPE | \
+ SDRAM_MCOPT1_QDEP | \
+ SDRAM_MCOPT1_RWOO_DISABLED | \
+ SDRAM_MCOPT1_WOOO_DISABLED | \
+ SDRAM_MCOPT1_DREF_NORMAL)
+#define CONFIG_SYS_SDRAM0_MCOPT2 0x00000000
+#define CONFIG_SYS_SDRAM0_MODT0 SDRAM_MODT_EB0W_ENABLE
+#define CONFIG_SYS_SDRAM0_MODT1 0x00000000
+#define CONFIG_SYS_SDRAM0_MODT2 0x00000000
+#define CONFIG_SYS_SDRAM0_MODT3 0x00000000
+#define CONFIG_SYS_SDRAM0_CODT (SDRAM_CODT_RK0R_ON | \
+ SDRAM_CODT_DQS_1_8_V_DDR2 | \
+ SDRAM_CODT_IO_NMODE)
+#define CONFIG_SYS_SDRAM0_RTR SDRAM_RTR_RINT_ENCODE(1560)
+#define CONFIG_SYS_SDRAM0_INITPLR0 \
+ (SDRAM_INITPLR_ENABLE | \
+ SDRAM_INITPLR_IMWT_ENCODE(80) | \
+ SDRAM_INITPLR_ICMD_ENCODE(JEDEC_CMD_NOP))
+#define CONFIG_SYS_SDRAM0_INITPLR1 \
+ (SDRAM_INITPLR_ENABLE | \
+ SDRAM_INITPLR_IMWT_ENCODE(3) | \
+ SDRAM_INITPLR_ICMD_ENCODE(JEDEC_CMD_PRECHARGE) | \
+ SDRAM_INITPLR_IBA_ENCODE(JEDEC_BA_MR) | \
+ SDRAM_INITPLR_IMA_ENCODE(JEDEC_MA_PRECHARGE_ALL))
+#define CONFIG_SYS_SDRAM0_INITPLR2 \
+ (SDRAM_INITPLR_ENABLE | \
+ SDRAM_INITPLR_IMWT_ENCODE(2) | \
+ SDRAM_INITPLR_ICMD_ENCODE(JEDEC_CMD_EMR) | \
+ SDRAM_INITPLR_IBA_ENCODE(JEDEC_BA_EMR2) | \
+ SDRAM_INITPLR_IMA_ENCODE(JEDEC_MA_EMR2_TEMP_COMMERCIAL))
+#define CONFIG_SYS_SDRAM0_INITPLR3 \
+ (SDRAM_INITPLR_ENABLE | \
+ SDRAM_INITPLR_IMWT_ENCODE(2) | \
+ SDRAM_INITPLR_ICMD_ENCODE(JEDEC_CMD_EMR) | \
+ SDRAM_INITPLR_IBA_ENCODE(JEDEC_BA_EMR3) | \
+ SDRAM_INITPLR_IMA_ENCODE(0))
+#define CONFIG_SYS_SDRAM0_INITPLR4 \
+ (SDRAM_INITPLR_ENABLE | \
+ SDRAM_INITPLR_IMWT_ENCODE(2) | \
+ SDRAM_INITPLR_ICMD_ENCODE(JEDEC_CMD_EMR) | \
+ SDRAM_INITPLR_IBA_ENCODE(JEDEC_BA_EMR) | \
+ SDRAM_INITPLR_IMA_ENCODE(JEDEC_MA_EMR_DQS_ENABLE | \
+ JEDEC_MA_EMR_RTT_150OHM))
+#define CONFIG_SYS_SDRAM0_INITPLR5 \
+ (SDRAM_INITPLR_ENABLE | \
+ SDRAM_INITPLR_IMWT_ENCODE(200) | \
+ SDRAM_INITPLR_ICMD_ENCODE(JEDEC_CMD_EMR) | \
+ SDRAM_INITPLR_IBA_ENCODE(JEDEC_BA_MR) | \
+ SDRAM_INITPLR_IMA_ENCODE(JEDEC_MA_MR_WR_DDR2_3_CYC | \
+ CAS_LATENCY | \
+ JEDEC_MA_MR_BLEN_4 | \
+ JEDEC_MA_MR_DLL_RESET))
+#define CONFIG_SYS_SDRAM0_INITPLR6 \
+ (SDRAM_INITPLR_ENABLE | \
+ SDRAM_INITPLR_IMWT_ENCODE(3) | \
+ SDRAM_INITPLR_ICMD_ENCODE(JEDEC_CMD_PRECHARGE) | \
+ SDRAM_INITPLR_IBA_ENCODE(0x0) | \
+ SDRAM_INITPLR_IMA_ENCODE(JEDEC_MA_PRECHARGE_ALL))
+#define CONFIG_SYS_SDRAM0_INITPLR7 \
+ (SDRAM_INITPLR_ENABLE | \
+ SDRAM_INITPLR_IMWT_ENCODE(26) | \
+ SDRAM_INITPLR_ICMD_ENCODE(JEDEC_CMD_REFRESH))
+#define CONFIG_SYS_SDRAM0_INITPLR8 \
+ (SDRAM_INITPLR_ENABLE | \
+ SDRAM_INITPLR_IMWT_ENCODE(26) | \
+ SDRAM_INITPLR_ICMD_ENCODE(JEDEC_CMD_REFRESH))
+#define CONFIG_SYS_SDRAM0_INITPLR9 \
+ (SDRAM_INITPLR_ENABLE | \
+ SDRAM_INITPLR_IMWT_ENCODE(26) | \
+ SDRAM_INITPLR_ICMD_ENCODE(JEDEC_CMD_REFRESH))
+#define CONFIG_SYS_SDRAM0_INITPLR10 \
+ (SDRAM_INITPLR_ENABLE | \
+ SDRAM_INITPLR_IMWT_ENCODE(26) | \
+ SDRAM_INITPLR_ICMD_ENCODE(JEDEC_CMD_REFRESH))
+#define CONFIG_SYS_SDRAM0_INITPLR11 \
+ (SDRAM_INITPLR_ENABLE | \
+ SDRAM_INITPLR_IMWT_ENCODE(2) | \
+ SDRAM_INITPLR_ICMD_ENCODE(JEDEC_CMD_EMR) | \
+ SDRAM_INITPLR_IBA_ENCODE(JEDEC_BA_MR) | \
+ SDRAM_INITPLR_IMA_ENCODE(JEDEC_MA_MR_WR_DDR2_3_CYC | \
+ CAS_LATENCY | \
+ JEDEC_MA_MR_BLEN_4))
+#define CONFIG_SYS_SDRAM0_INITPLR12 \
+ (SDRAM_INITPLR_ENABLE | \
+ SDRAM_INITPLR_IMWT_ENCODE(2) | \
+ SDRAM_INITPLR_ICMD_ENCODE(JEDEC_CMD_EMR) | \
+ SDRAM_INITPLR_IBA_ENCODE(JEDEC_BA_EMR) | \
+ SDRAM_INITPLR_IMA_ENCODE(JEDEC_MA_EMR_OCD_ENTER | \
+ JEDEC_MA_EMR_RDQS_DISABLE | \
+ JEDEC_MA_EMR_DQS_ENABLE | \
+ JEDEC_MA_EMR_RTT_150OHM | \
+ JEDEC_MA_EMR_ODS_NORMAL))
+#define CONFIG_SYS_SDRAM0_INITPLR13 \
+ (SDRAM_INITPLR_ENABLE | \
+ SDRAM_INITPLR_IMWT_ENCODE(2) | \
+ SDRAM_INITPLR_ICMD_ENCODE(JEDEC_CMD_EMR) | \
+ SDRAM_INITPLR_IBA_ENCODE(JEDEC_BA_EMR) | \
+ SDRAM_INITPLR_IMA_ENCODE(JEDEC_MA_EMR_OCD_EXIT | \
+ JEDEC_MA_EMR_RDQS_DISABLE | \
+ JEDEC_MA_EMR_DQS_ENABLE | \
+ JEDEC_MA_EMR_RTT_150OHM | \
+ JEDEC_MA_EMR_ODS_NORMAL))
+#define CONFIG_SYS_SDRAM0_INITPLR14 SDRAM_INITPLR_DISABLE
+#define CONFIG_SYS_SDRAM0_INITPLR15 SDRAM_INITPLR_DISABLE
+#define CONFIG_SYS_SDRAM0_RQDC (SDRAM_RQDC_RQDE_ENABLE | \
+ SDRAM_RQDC_RQFD_ENCODE(56))
+#define CONFIG_SYS_SDRAM0_RFDC SDRAM_RFDC_RFFD_ENCODE(599)
+#define CONFIG_SYS_SDRAM0_RDCC (SDRAM_RDCC_RDSS_T2)
+#define CONFIG_SYS_SDRAM0_DLCR (SDRAM_DLCR_DCLM_AUTO | \
+ SDRAM_DLCR_DLCS_CONT_DONE | \
+ SDRAM_DLCR_DLCV_ENCODE(155))
+#define CONFIG_SYS_SDRAM0_CLKTR SDRAM_CLKTR_CLKP_90_DEG_ADV
+#define CONFIG_SYS_SDRAM0_WRDTR SDRAM_WRDTR_WTR_90_DEG_ADV
+#define CONFIG_SYS_SDRAM0_SDTR1 (SDRAM_SDTR1_LDOF_2_CLK | \
+ SDRAM_SDTR1_RTW_2_CLK | \
+ SDRAM_SDTR1_RTRO_1_CLK)
+#define CONFIG_SYS_SDRAM0_SDTR2 (SDRAM_SDTR2_RCD_3_CLK | \
+ SDRAM_SDTR2_WTR_2_CLK | \
+ SDRAM_SDTR2_XSNR_32_CLK | \
+ SDRAM_SDTR2_WPC_4_CLK | \
+ SDRAM_SDTR2_RPC_2_CLK | \
+ SDRAM_SDTR2_RP_3_CLK | \
+ SDRAM_SDTR2_RRD_2_CLK)
+#define CONFIG_SYS_SDRAM0_SDTR3 (SDRAM_SDTR3_RAS_ENCODE(8) | \
+ SDRAM_SDTR3_RC_ENCODE(11) | \
+ SDRAM_SDTR3_XCS | \
+ SDRAM_SDTR3_RFC_ENCODE(26))
+#define CONFIG_SYS_SDRAM0_MMODE (SDRAM_MMODE_WR_DDR2_3_CYC | \
+ CAS_LATENCY | \
+ SDRAM_MMODE_BLEN_4)
+#define CONFIG_SYS_SDRAM0_MEMODE (SDRAM_MEMODE_DQS_ENABLE | \
+ SDRAM_MEMODE_RTT_150OHM)
+
+/*
+ * I2C
+ */
+#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
+
+#define CONFIG_SYS_I2C_MULTI_EEPROMS
+#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
+
+/* I2C bootstrap EEPROM */
+#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR 0x52
+#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET 0
+#define CONFIG_4xx_CONFIG_BLOCKSIZE 16
+
+/*
+ * Ethernet
+ */
+#define CONFIG_IBM_EMAC4_V4 1
+
+#define CONFIG_HAS_ETH0
+
+#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
+#define CONFIG_M88E1111_PHY
+/* Disable fiber since fiber/copper auto-selection doesn't seem to work */
+#define CONFIG_M88E1111_DISABLE_FIBER
+
+#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
+#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
+#define CONFIG_PHY_DYNAMIC_ANEG 1
+
+/*
+ * Default environment variables
+ */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ CONFIG_AMCC_DEF_ENV \
+ CONFIG_AMCC_DEF_ENV_POWERPC \
+ CONFIG_AMCC_DEF_ENV_NOR_UPD \
+ "kernel_addr=fc000000\0" \
+ "fdt_addr=fc1e0000\0" \
+ "ramdisk_addr=fc200000\0" \
+ "pciconfighost=1\0" \
+ "pcie_mode=RP:RP\0" \
+ ""
+
+/*
+ * Commands additional to the ones defined in amcc-common.h
+ */
+#define CONFIG_CMD_CHIP_CONFIG
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_SDRAM
+
+/*
+ * PCI stuff
+ */
+/* General PCI */
+#define CONFIG_PCI /* include pci support */
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+#define CONFIG_PCI_CONFIG_HOST_BRIDGE
+
+/* Board-specific PCI, no PCI support, only PCIe */
+#undef CONFIG_SYS_PCI_TARGET_INIT
+#undef CONFIG_SYS_PCI_MASTER_INIT
+
+#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
+#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
+
+
+/*
+ * External Bus Controller (EBC) Setup
+ */
+
+/*
+ * T3CORP has 64MBytes of NOR flash (Spansion 29GL512), but the
+ * boot EBC mapping only supports a maximum of 16MBytes
+ * (4.ff00.0000 - 4.ffff.ffff).
+ * To solve this problem, the flash has to get remapped to another
+ * EBC address which accepts bigger regions:
+ *
+ * 0xfc00.0000 -> 4.cc00.0000
+ */
+
+/* Memory Bank 0 (NOR-flash) */
+#define CONFIG_SYS_EBC_PB0AP (EBC_BXAP_BME_DISABLED | \
+ EBC_BXAP_TWT_ENCODE(16) | \
+ EBC_BXAP_BCE_DISABLE | \
+ EBC_BXAP_BCT_2TRANS | \
+ EBC_BXAP_CSN_ENCODE(1) | \
+ EBC_BXAP_OEN_ENCODE(1) | \
+ EBC_BXAP_WBN_ENCODE(1) | \
+ EBC_BXAP_WBF_ENCODE(1) | \
+ EBC_BXAP_TH_ENCODE(7) | \
+ EBC_BXAP_RE_DISABLED | \
+ EBC_BXAP_SOR_DELAYED | \
+ EBC_BXAP_BEM_WRITEONLY | \
+ EBC_BXAP_PEN_DISABLED)
+#define CONFIG_SYS_EBC_PB0CR (EBC_BXCR_BAS_ENCODE(CONFIG_SYS_BOOT_BASE_ADDR) | \
+ EBC_BXCR_BS_16MB | \
+ EBC_BXCR_BU_RW | \
+ EBC_BXCR_BW_16BIT)
+
+/* Memory Bank 1 (FPGA 1) */
+#define CONFIG_SYS_EBC_PB1AP (EBC_BXAP_BME_DISABLED | \
+ EBC_BXAP_TWT_ENCODE(5) | \
+ EBC_BXAP_CSN_ENCODE(0) | \
+ EBC_BXAP_OEN_ENCODE(4) | \
+ EBC_BXAP_WBN_ENCODE(0) | \
+ EBC_BXAP_WBF_ENCODE(0) | \
+ EBC_BXAP_TH_ENCODE(1) | \
+ EBC_BXAP_RE_DISABLED | \
+ EBC_BXAP_SOR_DELAYED | \
+ EBC_BXAP_BEM_RW | \
+ EBC_BXAP_PEN_DISABLED)
+#define CONFIG_SYS_EBC_PB1CR (EBC_BXCR_BAS_ENCODE(CONFIG_SYS_FPGA1_BASE) | \
+ EBC_BXCR_BS_1MB | \
+ EBC_BXCR_BU_RW | \
+ EBC_BXCR_BW_32BIT)
+
+/* Memory Bank 2 (FPGA 2) */
+#define CONFIG_SYS_EBC_PB2AP (EBC_BXAP_BME_DISABLED | \
+ EBC_BXAP_TWT_ENCODE(5) | \
+ EBC_BXAP_CSN_ENCODE(0) | \
+ EBC_BXAP_OEN_ENCODE(4) | \
+ EBC_BXAP_WBN_ENCODE(0) | \
+ EBC_BXAP_WBF_ENCODE(0) | \
+ EBC_BXAP_TH_ENCODE(1) | \
+ EBC_BXAP_RE_DISABLED | \
+ EBC_BXAP_SOR_DELAYED | \
+ EBC_BXAP_BEM_RW | \
+ EBC_BXAP_PEN_DISABLED)
+#define CONFIG_SYS_EBC_PB2CR (EBC_BXCR_BAS_ENCODE(CONFIG_SYS_FPGA2_BASE) | \
+ EBC_BXCR_BS_1MB | \
+ EBC_BXCR_BU_RW | \
+ EBC_BXCR_BW_32BIT)
+
+/* Memory Bank 3 (FPGA 3) */
+#define CONFIG_SYS_EBC_PB3AP (EBC_BXAP_BME_DISABLED | \
+ EBC_BXAP_TWT_ENCODE(5) | \
+ EBC_BXAP_CSN_ENCODE(0) | \
+ EBC_BXAP_OEN_ENCODE(4) | \
+ EBC_BXAP_WBN_ENCODE(0) | \
+ EBC_BXAP_WBF_ENCODE(0) | \
+ EBC_BXAP_TH_ENCODE(1) | \
+ EBC_BXAP_RE_DISABLED | \
+ EBC_BXAP_SOR_DELAYED | \
+ EBC_BXAP_BEM_RW | \
+ EBC_BXAP_PEN_DISABLED)
+#define CONFIG_SYS_EBC_PB3CR (EBC_BXCR_BAS_ENCODE(CONFIG_SYS_FPGA3_BASE) | \
+ EBC_BXCR_BS_1MB | \
+ EBC_BXCR_BU_RW | \
+ EBC_BXCR_BW_32BIT)
+
+/*
+ * PPC4xx GPIO Configuration
+ */
+
+#define CONFIG_SYS_4xx_GPIO_TABLE { /* GPIO Alternate1 Alternate2 Alternate3 */ \
+{ \
+/* GPIO Core 0 */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO0 GMC1TxD(0) USB2HostD(0) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO1 GMC1TxD(1) USB2HostD(1) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO2 GMC1TxD(2) USB2HostD(2) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO3 GMC1TxD(3) USB2HostD(3) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO4 GMC1TxD(4) USB2HostD(4) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO5 GMC1TxD(5) USB2HostD(5) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO6 GMC1TxD(6) USB2HostD(6) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO7 GMC1TxD(7) USB2HostD(7) */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO8 GMC1RxD(0) USB2OTGD(0) */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO9 GMC1RxD(1) USB2OTGD(1) */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO10 GMC1RxD(2) USB2OTGD(2) */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO11 GMC1RxD(3) USB2OTGD(3) */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO12 GMC1RxD(4) USB2OTGD(4) */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO13 GMC1RxD(5) USB2OTGD(5) */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO14 GMC1RxD(6) USB2OTGD(6) */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO15 GMC1RxD(7) USB2OTGD(7) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO16 GMC1TxER USB2HostStop */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO17 GMC1CD USB2HostNext */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO18 GMC1RxER USB2HostDir */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO19 GMC1TxEN USB2OTGStop */ \
+{GPIO0_BASE, GPIO_BI , GPIO_ALT1, GPIO_OUT_0}, /* GPIO20 GMC1CRS USB2OTGNext */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO21 GMC1RxDV USB2OTGDir */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO22 NFRDY */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO23 NFREN */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO24 NFWEN */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO25 NFCLE */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO26 NFALE */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO27 IRQ(0) */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO28 IRQ(1) */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO29 IRQ(2) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO30 PerPar0 DMAReq2 IRQ(7)*/ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO31 PerPar1 DMAAck2 IRQ(8)*/ \
+}, \
+{ \
+/* GPIO Core 1 */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO32 PerPar2 EOT2/TC2 IRQ(9)*/ \
+{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO33 PerPar3 DMAReq3 IRQ(4)*/ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT3, GPIO_OUT_1}, /* GPIO34 UART0_DCD_N UART1_DSR_CTS_N UART2_SOUT*/ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO35 UART0_8PIN_DSR_N UART1_RTS_DTR_N UART2_SIN*/ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO36 UART0_8PIN_CTS_N DMAAck3 UART3_SIN*/ \
+{GPIO1_BASE, GPIO_BI , GPIO_ALT2, GPIO_OUT_0}, /* GPIO37 UART0_RTS_N EOT3/TC3 UART3_SOUT*/ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_1}, /* GPIO38 UART0_DTR_N UART1_SOUT */ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT2, GPIO_OUT_0}, /* GPIO39 UART0_RI_N UART1_SIN */ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO40 IRQ(3) */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO41 CS(1) */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO42 CS(2) */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO43 CS(3) DMAReq1 IRQ(10)*/ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO44 CS(4) DMAAck1 IRQ(11)*/ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO45 CS(5) EOT/TC1 IRQ(12)*/ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO46 PerAddr(5) DMAReq0 IRQ(13)*/ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO47 PerAddr(6) DMAAck0 IRQ(14)*/ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO48 PerAddr(7) EOT/TC0 IRQ(15)*/ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO49 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO50 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO51 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO52 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO53 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO54 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO55 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO56 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO57 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO58 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO59 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO60 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO61 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO62 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO63 Unselect via TraceSelect Bit */ \
+} \
+}
+
+#endif /* __CONFIG_H */
#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT
# define ENV_HEADER_SIZE (sizeof(uint32_t) + 1)
+
+# define ACTIVE_FLAG 1
+# define OBSOLETE_FLAG 0
#else
# define ENV_HEADER_SIZE (sizeof(uint32_t))
#endif
int tstc(void);
void putc(const char);
void puts(const char*);
-void printf(const char* fmt, ...);
+int printf(const char* fmt, ...);
void install_hdlr(int, interrupt_handler_t*, void*);
void free_hdlr(int);
void *malloc(size_t);
void free(void*);
void __udelay(unsigned long);
unsigned long get_timer(unsigned long);
-void vprintf(const char *, va_list);
+int vprintf(const char *, va_list);
void do_reset (void);
unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base);
char *getenv (char *name);
#endif
#include <spi.h>
-void app_startup(char **);
+void app_startup(char * const *);
#endif /* ifndef __ASSEMBLY__ */
#define IH_ARCH_SPARC 10 /* Sparc */
#define IH_ARCH_SPARC64 11 /* Sparc 64 Bit */
#define IH_ARCH_M68K 12 /* M68K */
-#define IH_ARCH_NIOS 13 /* Nios-32 */
#define IH_ARCH_MICROBLAZE 14 /* MicroBlaze */
#define IH_ARCH_NIOS2 15 /* Nios-II */
#define IH_ARCH_BLACKFIN 16 /* Blackfin */
int genimg_has_config (bootm_headers_t *images);
ulong genimg_get_image (ulong img_addr);
-int boot_get_ramdisk (int argc, char *argv[], bootm_headers_t *images,
+int boot_get_ramdisk (int argc, char * const argv[], bootm_headers_t *images,
uint8_t arch, ulong *rd_start, ulong *rd_end);
#ifdef CONFIG_OF_LIBFDT
-int boot_get_fdt (int flag, int argc, char *argv[], bootm_headers_t *images,
+int boot_get_fdt (int flag, int argc, char * const argv[], bootm_headers_t *images,
char **of_flat_tree, ulong *of_size);
int boot_relocate_fdt (struct lmb *lmb, ulong bootmap_base,
char **of_flat_tree, ulong *of_size);
{ \
return uimage_to_cpu (hdr->ih_##f); \
}
-image_get_hdr_l (magic); /* image_get_magic */
-image_get_hdr_l (hcrc); /* image_get_hcrc */
-image_get_hdr_l (time); /* image_get_time */
-image_get_hdr_l (size); /* image_get_size */
-image_get_hdr_l (load); /* image_get_load */
-image_get_hdr_l (ep); /* image_get_ep */
-image_get_hdr_l (dcrc); /* image_get_dcrc */
+image_get_hdr_l (magic) /* image_get_magic */
+image_get_hdr_l (hcrc) /* image_get_hcrc */
+image_get_hdr_l (time) /* image_get_time */
+image_get_hdr_l (size) /* image_get_size */
+image_get_hdr_l (load) /* image_get_load */
+image_get_hdr_l (ep) /* image_get_ep */
+image_get_hdr_l (dcrc) /* image_get_dcrc */
#define image_get_hdr_b(f) \
static inline uint8_t image_get_##f(const image_header_t *hdr) \
{ \
return hdr->ih_##f; \
}
-image_get_hdr_b (os); /* image_get_os */
-image_get_hdr_b (arch); /* image_get_arch */
-image_get_hdr_b (type); /* image_get_type */
-image_get_hdr_b (comp); /* image_get_comp */
+image_get_hdr_b (os) /* image_get_os */
+image_get_hdr_b (arch) /* image_get_arch */
+image_get_hdr_b (type) /* image_get_type */
+image_get_hdr_b (comp) /* image_get_comp */
static inline char *image_get_name (const image_header_t *hdr)
{
{ \
hdr->ih_##f = cpu_to_uimage (val); \
}
-image_set_hdr_l (magic); /* image_set_magic */
-image_set_hdr_l (hcrc); /* image_set_hcrc */
-image_set_hdr_l (time); /* image_set_time */
-image_set_hdr_l (size); /* image_set_size */
-image_set_hdr_l (load); /* image_set_load */
-image_set_hdr_l (ep); /* image_set_ep */
-image_set_hdr_l (dcrc); /* image_set_dcrc */
+image_set_hdr_l (magic) /* image_set_magic */
+image_set_hdr_l (hcrc) /* image_set_hcrc */
+image_set_hdr_l (time) /* image_set_time */
+image_set_hdr_l (size) /* image_set_size */
+image_set_hdr_l (load) /* image_set_load */
+image_set_hdr_l (ep) /* image_set_ep */
+image_set_hdr_l (dcrc) /* image_set_dcrc */
#define image_set_hdr_b(f) \
static inline void image_set_##f(image_header_t *hdr, uint8_t val) \
{ \
hdr->ih_##f = val; \
}
-image_set_hdr_b (os); /* image_set_os */
-image_set_hdr_b (arch); /* image_set_arch */
-image_set_hdr_b (type); /* image_set_type */
-image_set_hdr_b (comp); /* image_set_comp */
+image_set_hdr_b (os) /* image_set_os */
+image_set_hdr_b (arch) /* image_set_arch */
+image_set_hdr_b (type) /* image_set_type */
+image_set_hdr_b (comp) /* image_set_comp */
static inline void image_set_name (image_header_t *hdr, const char *name)
{
if (!image_check_arch (hdr, IH_ARCH_MICROBLAZE))
#elif defined(__mips__)
if (!image_check_arch (hdr, IH_ARCH_MIPS))
-#elif defined(__nios__)
- if (!image_check_arch (hdr, IH_ARCH_NIOS))
#elif defined(__nios2__)
if (!image_check_arch (hdr, IH_ARCH_NIOS2))
#elif defined(__PPC__)
if (!fit_image_check_arch (fdt, node, IH_ARCH_MICROBLAZE))
#elif defined(__mips__)
if (!fit_image_check_arch (fdt, node, IH_ARCH_MIPS))
-#elif defined(__nios__)
- if (!fit_image_check_arch (fdt, node, IH_ARCH_NIOS))
#elif defined(__nios2__)
if (!fit_image_check_arch (fdt, node, IH_ARCH_NIOS2))
#elif defined(__PPC__)
extern void kgdb_putreg(struct pt_regs *, int, char *, int);
extern void kgdb_putregs(struct pt_regs *, char *, int);
extern int kgdb_trap(struct pt_regs *);
-extern void kgdb_breakpoint(int argc, char *argv[]);
+extern void kgdb_breakpoint(int argc, char * const argv[]);
/* these functions are provided by the platform serial driver */
extern void kgdb_serial_init(void);
#define SICRL_SPI_B 0x00C00000
#define SICRL_SPI_C 0x00300000
#define SICRL_SPI_D 0x000C0000
-#define SICRL_USBDR 0x00000C00
+#define SICRL_USBDR_11 0x00000C00
+#define SICRL_USBDR_10 0x00000800
+#define SICRL_USBDR_01 0x00000400
+#define SICRL_USBDR_00 0x00000000
#define SICRL_ETSEC1_A 0x0000000C
#define SICRL_ETSEC2_A 0x00000003
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*************************************************************************
- * Altera Nios Standard Peripherals
- ************************************************************************/
-
-#ifndef __NIOSIO_H__
-#define __NIOSIO_H__
-
-/*------------------------------------------------------------------------
- * UART (http://www.altera.com/literature/ds/ds_nios_uart.pdf)
- *----------------------------------------------------------------------*/
-typedef volatile struct nios_uart_t {
- unsigned rxdata; /* Rx data reg */
- unsigned txdata; /* Tx data reg */
- unsigned status; /* Status reg */
- unsigned control; /* Control reg */
- unsigned divisor; /* Baud rate divisor reg */
- unsigned endofpacket; /* End-of-packet reg */
-}nios_uart_t;
-
-/* status register */
-#define NIOS_UART_PE (1 << 0) /* parity error */
-#define NIOS_UART_FE (1 << 1) /* frame error */
-#define NIOS_UART_BRK (1 << 2) /* break detect */
-#define NIOS_UART_ROE (1 << 3) /* rx overrun */
-#define NIOS_UART_TOE (1 << 4) /* tx overrun */
-#define NIOS_UART_TMT (1 << 5) /* tx empty */
-#define NIOS_UART_TRDY (1 << 6) /* tx ready */
-#define NIOS_UART_RRDY (1 << 7) /* rx ready */
-#define NIOS_UART_E (1 << 8) /* exception */
-#define NIOS_UART_DCTS (1 << 10) /* cts change */
-#define NIOS_UART_CTS (1 << 11) /* cts */
-#define NIOS_UART_EOP (1 << 12) /* eop detected */
-
-/* control register */
-#define NIOS_UART_IPE (1 << 0) /* parity error int ena*/
-#define NIOS_UART_IFE (1 << 1) /* frame error int ena */
-#define NIOS_UART_IBRK (1 << 2) /* break detect int ena */
-#define NIOS_UART_IROE (1 << 3) /* rx overrun int ena */
-#define NIOS_UART_ITOE (1 << 4) /* tx overrun int ena */
-#define NIOS_UART_ITMT (1 << 5) /* tx empty int ena */
-#define NIOS_UART_ITRDY (1 << 6) /* tx ready int ena */
-#define NIOS_UART_IRRDY (1 << 7) /* rx ready int ena */
-#define NIOS_UART_IE (1 << 8) /* exception int ena */
-#define NIOS_UART_TBRK (1 << 9) /* transmit break */
-#define NIOS_UART_IDCTS (1 << 10) /* cts change int ena */
-#define NIOS_UART_RTS (1 << 11) /* rts */
-#define NIOS_UART_IEOP (1 << 12) /* eop detected int ena */
-
-
-/*------------------------------------------------------------------------
- * TIMER (http://www.altera.com/literature/ds/ds_nios_timer.pdf)
- *----------------------------------------------------------------------*/
-typedef volatile struct nios_timer_t {
- unsigned status; /* Timer status reg */
- unsigned control; /* Timer control reg */
- unsigned periodl; /* Timeout period low */
- unsigned periodh; /* Timeout period high */
- unsigned snapl; /* Snapshot low */
- unsigned snaph; /* Snapshot high */
-}nios_timer_t;
-
-/* status register */
-#define NIOS_TIMER_TO (1 << 0) /* Timeout */
-#define NIOS_TIMER_RUN (1 << 1) /* Timer running */
-
-/* control register */
-#define NIOS_TIMER_ITO (1 << 0) /* Timeout int ena */
-#define NIOS_TIMER_CONT (1 << 1) /* Continuous mode */
-#define NIOS_TIMER_START (1 << 2) /* Start timer */
-#define NIOS_TIMER_STOP (1 << 3) /* Stop timer */
-
-
-/*------------------------------------------------------------------------
- * PIO (http://www.altera.com/literature/ds/ds_nios_pio.pdf)
- *----------------------------------------------------------------------*/
-typedef volatile struct nios_pio_t {
- unsigned int data; /* Data value at each PIO in/out */
- unsigned int direction; /* Data direct. for each PIO bit */
- unsigned int interruptmask; /* Per-bit IRQ enable/disable */
- unsigned int edgecapture; /* Per-bit sync. edge detect & hold */
-}nios_pio_t;
-
-/* direction register */
-#define NIOS_PIO_OUT (1) /* PIO bit is output */
-#define NIOS_PIO_IN (0) /* PIO bit is input */
-
-
-/*------------------------------------------------------------------------
- * SPI (http://www.altera.com/literature/ds/ds_nios_spi.pdf)
- *----------------------------------------------------------------------*/
-typedef volatile struct nios_spi_t {
- unsigned rxdata; /* Rx data reg */
- unsigned txdata; /* Tx data reg */
- unsigned status; /* Status reg */
- unsigned control; /* Control reg */
- unsigned reserved; /* (master only) */
- unsigned slaveselect; /* SPI slave select mask (master only) */
-}nios_spi_t;
-
-/* status register */
-#define NIOS_SPI_ROE (1 << 3) /* rx overrun */
-#define NIOS_SPI_TOE (1 << 4) /* tx overrun */
-#define NIOS_SPI_TMT (1 << 5) /* tx empty */
-#define NIOS_SPI_TRDY (1 << 6) /* tx ready */
-#define NIOS_SPI_RRDY (1 << 7) /* rx ready */
-#define NIOS_SPI_E (1 << 8) /* exception */
-
-/* control register */
-#define NIOS_SPI_IROE (1 << 3) /* rx overrun int ena */
-#define NIOS_SPI_ITOE (1 << 4) /* tx overrun int ena */
-#define NIOS_SPI_ITRDY (1 << 6) /* tx ready int ena */
-#define NIOS_SPI_IRRDY (1 << 7) /* rx ready int ena */
-#define NIOS_SPI_IE (1 << 8) /* exception int ena */
-#define NIOS_SPI_SSO (1 << 10) /* override SS_n output */
-
-/*------------------------------------------------------------------------
- * ASMI
- *----------------------------------------------------------------------*/
-typedef volatile struct nios_asmi_t {
- unsigned rxdata; /* Rx data reg */
- unsigned txdata; /* Tx data reg */
- unsigned status; /* Status reg */
- unsigned control; /* Control reg */
- unsigned reserved;
- unsigned slavesel; /* Slave select */
- unsigned endofpacket; /* End-of-packet reg */
-}nios_asmi_t;
-
-/* status register */
-#define NIOS_ASMI_ROE (1 << 3) /* rx overrun */
-#define NIOS_ASMI_TOE (1 << 4) /* tx overrun */
-#define NIOS_ASMI_TMT (1 << 5) /* tx empty */
-#define NIOS_ASMI_TRDY (1 << 6) /* tx ready */
-#define NIOS_ASMI_RRDY (1 << 7) /* rx ready */
-#define NIOS_ASMI_E (1 << 8) /* exception */
-#define NIOS_ASMI_EOP (1 << 9) /* eop detected */
-
-/* control register */
-#define NIOS_ASMI_IROE (1 << 3) /* rx overrun int ena */
-#define NIOS_ASMI_ITOE (1 << 4) /* tx overrun int ena */
-#define NIOS_ASMI_ITRDY (1 << 6) /* tx ready int ena */
-#define NIOS_ASMI_IRRDY (1 << 7) /* rx ready int ena */
-#define NIOS_ASMI_IE (1 << 8) /* exception int ena */
-#define NIOS_ASMI_IEOP (1 << 9) /* rx eop int ena */
-#define NIOS_ASMI_SSO (1 << 10) /* slave select enable */
-
-/*------------------------------------------------------------------------
- * JTAG UART
- *----------------------------------------------------------------------*/
-typedef volatile struct nios_jtag_t {
- unsigned short rxcntl; /* Rx data/cntl reg */
- unsigned short txcntl; /* Tx data/cntl reg */
- unsigned short errcntl; /* Err dta/cntl reg */
-}nios_jtag_t;
-
-/* status register */
-#define NIOS_JTAG_TRDY (1 << 8) /* tx ready bit */
-#define NIOS_JTAG_RRDY (1 << 8) /* rx ready bit */
-
-#endif /* __NIOSIO_H__ */
+++ /dev/null
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __NIOS_H__
-#define __NIOS_H__
-
-/*------------------------------------------------------------------------
- * Control registers -- use with wrctl() & rdctl()
- *----------------------------------------------------------------------*/
-#define CTL_STATUS 0x00 /* Processor status */
-#define CTL_ISTATUS 0x01 /* Saved status (exception) */
-#define CTL_WVALID 0x02 /* Valid window limit */
-#define CTL_ICACHE 0x05 /* I-cache line-invalidate */
-#define CTL_CPU_ID 0x06 /* CPU version id */
-#define CTL_DCACHE 0x07 /* D-cache line-invalidate */
-#define CTL_CLR_IE 0x08 /* Interrupt clear (disable) */
-#define CTL_SET_IE 0x09 /* Interrupt set (enable) */
-
-/*------------------------------------------------------------------------
- * Access to control regs
- *----------------------------------------------------------------------*/
-#define _str_(s) #s
-
-#define rdctl(reg)\
- ({unsigned int val;\
- asm volatile( "pfx " _str_(reg) "\n\t rdctl %0"\
- : "=r" (val) ); val;})
-
-#define wrctl(reg,val)\
- asm volatile( "pfx " _str_(reg) "\n\t wrctl %0 \n\t nop"\
- : : "r" (val))
-
-/*------------------------------------------------------------------------
- * Control reg bit masks
- *----------------------------------------------------------------------*/
-#define STATUS_DC (1<<17) /* Data cache enable */
-#define STATUS_IC (1<<16) /* Instruction cache enable */
-#define STATUS_IE (1<<15) /* Interrupt enable */
-#define STATUS_IPRI (0x3f<<9) /* Interrupt priority */
-#define STATUS_CWP (0x1f<<4) /* Current window pointer */
-#define STATUS_N (1<<3) /* Condition code: negative */
-#define STATUS_V (1<<2) /* Condition code: overflow */
-#define STATUS_Z (1<<1) /* Condition code: zero */
-#define STATUS_C (1<<0) /* Condition code: carry/borrow */
-
-static inline unsigned ipri( unsigned prio )
-{
- unsigned tmp;
- unsigned status = rdctl(CTL_STATUS);
- prio = (prio << 9) & STATUS_IPRI;
- tmp = (status & ~STATUS_IPRI) | prio;
- wrctl(CTL_STATUS,tmp);
- return( (status & STATUS_IPRI) >> 9);
-}
-
-
-#endif /* __NIOS_H__ */
#define PCI_DEVICE_ID_SMI_710 0x0710
#define PCI_DEVICE_ID_SMI_712 0x0712
#define PCI_DEVICE_ID_SMI_810 0x0810
+#define PCI_DEVICE_ID_SMI_501 0x0501
#define PCI_VENDOR_ID_HUGHES 0x1273
#define PCI_DEVICE_ID_HUGHES_DIRECPC 0x0002
#define CPR0_PERD_PERDV0_MASK 0x07000000
#endif
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#define CPR0_ICFG_RLI_MASK 0x80000000
+
+#define CPR0_PLLC_RST 0x80000000
+#define CPR0_PLLC_ENG 0x40000000
+#endif
+
/*-----------------------------------------------------------------------------
| PCI Internal Registers et. al. (accessed via plb)
+----------------------------------------------------------------------------*/
*
* Stolen from prepboot/bootldr.h, (C) 1998 Gabriel Paubert, paubert@iram.es
*
- * Uses r14 to access the GOT
+ * Uses r12 to access the GOT
*/
#define START_GOT \
*/
/* Create various pipes... */
#define create_pipe(dev,endpoint) \
- (((dev)->devnum << 8) | (endpoint << 15) | \
+ (((dev)->devnum << 8) | ((endpoint) << 15) | \
((dev)->speed << 26) | (dev)->maxpacketsize)
#define default_pipe(dev) ((dev)->speed << 26)
#ifndef _VXWORKS_H_
#define _VXWORKS_H_
-int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
/*
* Use bootaddr to find the location in memory that VxWorks
# error "Configuration error: CONFIG_HW_WATCHDOG and CONFIG_WATCHDOG can't be used together."
#endif
-#if defined(__ASSEMBLY__) && defined(__NIOS__)
-# error "Configuration error: WATCHDOG_RESET inside assembler not supported for Nios platforms."
-#endif
-
/*
* Hardware watchdog
*/
#if !defined (CONFIG_PANIC_HANG)
#include <command.h>
/*cmd_boot.c*/
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
#endif
#include <div64.h>
BOARD_NAME="" # Name to print in make output
TARGETS=""
+arch=""
+cpu=""
+board=""
+vendor=""
+soc=""
+
+if [ \( $# -eq 2 \) -a \( "$1" = "-A" \) ] ; then
+ # Automatic mode
+ line=`egrep -i "^[[:space:]]*${2}[[:space:]]" boards.cfg` || {
+ echo "make: *** No rule to make target \`$2_config'. Stop." >&2
+ exit 1
+ }
+
+ set ${line}
+ # add default board name if needed
+ [ $# = 3 ] && set ${line} ${1}
+fi
+
while [ $# -gt 0 ] ; do
case "$1" in
--) shift ; break ;;
-a) shift ; APPEND=yes ;;
- -n) shift ; BOARD_NAME="${1%%_config}" ; shift ;;
+ -n) shift ; BOARD_NAME="${1%_config}" ; shift ;;
-t) shift ; TARGETS="`echo $1 | sed 's:_: :g'` ${TARGETS}" ; shift ;;
*) break ;;
esac
done
-[ "${BOARD_NAME}" ] || BOARD_NAME="$1"
-
[ $# -lt 4 ] && exit 1
[ $# -gt 6 ] && exit 1
-if [ "${ARCH}" -a "${ARCH}" != "$2" ]; then
- echo "Failed: \$ARCH=${ARCH}, should be '$2' for ${BOARD_NAME}" 1>&2
+CONFIG_NAME="${1%_config}"
+
+[ "${BOARD_NAME}" ] || BOARD_NAME="${CONFIG_NAME}"
+
+arch="$2"
+cpu="$3"
+if [ "$4" = "-" ] ; then
+ board=${BOARD_NAME}
+else
+ board="$4"
+fi
+[ $# -gt 4 ] && [ "$5" != "-" ] && vendor="$5"
+[ $# -gt 5 ] && [ "$6" != "-" ] && soc="$6"
+
+if [ "${ARCH}" -a "${ARCH}" != "${arch}" ]; then
+ echo "Failed: \$ARCH=${ARCH}, should be '${arch}' for ${BOARD_NAME}" 1>&2
exit 1
fi
mkdir -p ${OBJTREE}/include2
cd ${OBJTREE}/include2
rm -f asm
- ln -s ${SRCTREE}/arch/$2/include/asm asm
- LNPREFIX=${SRCTREE}/arch/$2/include/asm/
+ ln -s ${SRCTREE}/arch/${arch}/include/asm asm
+ LNPREFIX=${SRCTREE}/arch/${arch}/include/asm/
cd ../include
rm -f asm
- ln -s ${SRCTREE}/arch/$2/include/asm asm
+ ln -s ${SRCTREE}/arch/${arch}/include/asm asm
else
cd ./include
rm -f asm
- ln -s ../arch/$2/include/asm asm
+ ln -s ../arch/${arch}/include/asm asm
fi
rm -f asm/arch
-if [ -z "$6" -o "$6" = "NULL" ] ; then
- ln -s ${LNPREFIX}arch-$3 asm/arch
+if [ -z "${soc}" ] ; then
+ ln -s ${LNPREFIX}arch-${cpu} asm/arch
else
- ln -s ${LNPREFIX}arch-$6 asm/arch
+ ln -s ${LNPREFIX}arch-${soc} asm/arch
fi
-if [ "$2" = "arm" ] ; then
+if [ "${arch}" = "arm" ] ; then
rm -f asm/proc
ln -s ${LNPREFIX}proc-armv asm/proc
fi
#
# Create include file for Make
#
-echo "ARCH = $2" > config.mk
-echo "CPU = $3" >> config.mk
-echo "BOARD = $4" >> config.mk
+echo "ARCH = ${arch}" > config.mk
+echo "CPU = ${cpu}" >> config.mk
+echo "BOARD = ${board}" >> config.mk
-[ "$5" ] && [ "$5" != "NULL" ] && echo "VENDOR = $5" >> config.mk
+[ "${vendor}" ] && echo "VENDOR = ${vendor}" >> config.mk
-[ "$6" ] && [ "$6" != "NULL" ] && echo "SOC = $6" >> config.mk
+[ "${soc}" ] && echo "SOC = ${soc}" >> config.mk
# Assign board directory to BOARDIR variable
-if [ -z "$5" -o "$5" = "NULL" ] ; then
- BOARDDIR=$4
+if [ -z "${vendor}" ] ; then
+ BOARDDIR=${board}
else
- BOARDDIR=$5/$4
+ BOARDDIR=${vendor}/${board}
fi
#
cat << EOF >> config.h
#define CONFIG_BOARDDIR board/$BOARDDIR
#include <config_defaults.h>
-#include <configs/$1.h>
+#include <configs/${CONFIG_NAME}.h>
#include <asm/config.h>
EOF
return eth_getenv_enetaddr(enetvar, enetaddr);
}
+#ifdef CONFIG_NET_MULTI
+
static int eth_mac_skip(int index)
{
char enetvar[15];
return ((skip_state = getenv(enetvar)) != NULL);
}
-#ifdef CONFIG_NET_MULTI
-
/*
* CPU and board-specific Ethernet initializations. Aliased function
* signals caller to move on
h = payload + h->next_hole;
}
- if (offset8 + (len / 8) <= h - payload) {
+ /* last fragment may be 1..7 bytes, the "+7" forces acceptance */
+ if (offset8 + ((len + 7) / 8) <= h - payload) {
/* no overlap with holes (dup fragment?) */
return NULL;
}
#include "fw_env.h"
-#define CMD_GETENV "fw_printenv"
-#define CMD_SETENV "fw_setenv"
+#define WHITESPACE(c) ((c == '\t') || (c == ' '))
#define min(x, y) ({ \
typeof(x) _min1 = (x); \
static int flash_io (int mode);
static char *envmatch (char * s1, char * s2);
-static int env_init (void);
static int parse_config (void);
#if defined(CONFIG_FILE)
return rc;
}
+static char *fw_string_blank(char *s, int noblank)
+{
+ int i;
+ int len = strlen(s);
+
+ for (i = 0; i < len; i++, s++) {
+ if ((noblank && !WHITESPACE(*s)) ||
+ (!noblank && WHITESPACE(*s)))
+ break;
+ }
+ if (i == len)
+ return NULL;
+
+ return s;
+}
+
/*
* Search the environment for a variable.
* Return the value, if found, or NULL, if not found.
{
char *env, *nxt;
- if (env_init ())
+ if (fw_env_open())
return NULL;
for (env = environment.data; *env; env = nxt + 1) {
int i, n_flag;
int rc = 0;
- if (env_init ())
+ if (fw_env_open())
return -1;
if (argc == 1) { /* Print all env variables */
return rc;
}
-/*
- * Deletes or sets environment variables. Returns -1 and sets errno error codes:
- * 0 - OK
- * EINVAL - need at least 1 argument
- * EROFS - certain variables ("ethaddr", "serial#") cannot be
- * modified or deleted
- *
- */
-int fw_setenv (int argc, char *argv[])
+int fw_env_close(void)
{
- int i, len;
- char *env, *nxt;
- char *oldval = NULL;
- char *name;
+ /*
+ * Update CRC
+ */
+ *environment.crc = crc32(0, (uint8_t *) environment.data, ENV_SIZE);
- if (argc < 2) {
- errno = EINVAL;
- return -1;
+ /* write environment back to flash */
+ if (flash_io(O_RDWR)) {
+ fprintf(stderr,
+ "Error: can't write fw_env to flash\n");
+ return -1;
}
- if (env_init ())
- return -1;
+ return 0;
+}
- name = argv[1];
+
+/*
+ * Set/Clear a single variable in the environment.
+ * This is called in sequence to update the environment
+ * in RAM without updating the copy in flash after each set
+ */
+int fw_env_write(char *name, char *value)
+{
+ int len;
+ char *env, *nxt;
+ char *oldval = NULL;
/*
* search if variable with this name already exists
for (nxt = env = environment.data; *env; env = nxt + 1) {
for (nxt = env; *nxt; ++nxt) {
if (nxt >= &environment.data[ENV_SIZE]) {
- fprintf (stderr, "## Error: "
+ fprintf(stderr, "## Error: "
"environment not terminated\n");
errno = EINVAL;
return -1;
}
/* Delete only ? */
- if (argc < 3)
- goto WRITE_FLASH;
+ if (!value || !strlen(value))
+ return 0;
/*
* Append new definition at the end
*/
len = strlen (name) + 2;
/* add '=' for first arg, ' ' for all others */
- for (i = 2; i < argc; ++i) {
- len += strlen (argv[i]) + 1;
- }
+ len += strlen(value) + 1;
+
if (len > (&environment.data[ENV_SIZE] - env)) {
fprintf (stderr,
"Error: environment overflow, \"%s\" deleted\n",
name);
return -1;
}
+
while ((*env = *name++) != '\0')
env++;
+ *env = '=';
+ while ((*++env = *value++) != '\0')
+ ;
+
+ /* end is marked with double '\0' */
+ *++env = '\0';
+
+ return 0;
+}
+
+/*
+ * Deletes or sets environment variables. Returns -1 and sets errno error codes:
+ * 0 - OK
+ * EINVAL - need at least 1 argument
+ * EROFS - certain variables ("ethaddr", "serial#") cannot be
+ * modified or deleted
+ *
+ */
+int fw_setenv(int argc, char *argv[])
+{
+ int i, len;
+ char *name;
+ char *value = NULL;
+ char *tmpval = NULL;
+
+ if (argc < 2) {
+ errno = EINVAL;
+ return -1;
+ }
+
+ if (fw_env_open()) {
+ fprintf(stderr, "Error: environment not initialized\n");
+ return -1;
+ }
+
+ name = argv[1];
+
+ len = strlen(name) + 2;
+ for (i = 2; i < argc; ++i)
+ len += strlen(argv[i]) + 1;
+
+ /* Allocate enough place to the data string */
for (i = 2; i < argc; ++i) {
char *val = argv[i];
-
- *env = (i == 2) ? '=' : ' ';
- while ((*++env = *val++) != '\0');
+ if (!value) {
+ value = (char *)malloc(len - strlen(name));
+ if (!value) {
+ fprintf(stderr,
+ "Cannot malloc %u bytes: %s\n",
+ len - strlen(name), strerror(errno));
+ return -1;
+ }
+ memset(value, 0, len - strlen(name));
+ tmpval = value;
+ }
+ if (i != 2)
+ *tmpval++ = ' ';
+ while (*val != '\0')
+ *tmpval++ = *val++;
}
- /* end is marked with double '\0' */
- *++env = '\0';
+ fw_env_write(name, value);
- WRITE_FLASH:
+ if (value)
+ free(value);
- /*
- * Update CRC
- */
- *environment.crc = crc32 (0, (uint8_t *) environment.data, ENV_SIZE);
+ return fw_env_close();
+}
- /* write environment back to flash */
- if (flash_io (O_RDWR)) {
- fprintf (stderr, "Error: can't write fw_env to flash\n");
+/*
+ * Parse a file and configure the u-boot variables.
+ * The script file has a very simple format, as follows:
+ *
+ * Each line has a couple with name, value:
+ * <white spaces>variable_name<white spaces>variable_value
+ *
+ * Both variable_name and variable_value are interpreted as strings.
+ * Any character after <white spaces> and before ending \r\n is interpreted
+ * as variable's value (no comment allowed on these lines !)
+ *
+ * Comments are allowed if the first character in the line is #
+ *
+ * Returns -1 and sets errno error codes:
+ * 0 - OK
+ * -1 - Error
+ */
+int fw_parse_script(char *fname)
+{
+ FILE *fp;
+ char dump[1024]; /* Maximum line length in the file */
+ char *name;
+ char *val;
+ int lineno = 0;
+ int len;
+ int ret = 0;
+
+ if (fw_env_open()) {
+ fprintf(stderr, "Error: environment not initialized\n");
return -1;
}
- return 0;
+ if (strcmp(fname, "-") == 0)
+ fp = stdin;
+ else {
+ fp = fopen(fname, "r");
+ if (fp == NULL) {
+ fprintf(stderr, "I cannot open %s for reading\n",
+ fname);
+ return -1;
+ }
+ }
+
+ while (fgets(dump, sizeof(dump), fp)) {
+ lineno++;
+ len = strlen(dump);
+
+ /*
+ * Read a whole line from the file. If the line is too long
+ * or is not terminated, reports an error and exit.
+ */
+ if (dump[len - 1] != '\n') {
+ fprintf(stderr,
+ "Line %d not corrected terminated or too long\n",
+ lineno);
+ ret = -1;
+ break;
+ }
+
+ /* Drop ending line feed / carriage return */
+ while (len > 0 && (dump[len - 1] == '\n' ||
+ dump[len - 1] == '\r')) {
+ dump[len - 1] = '\0';
+ len--;
+ }
+
+ /* Skip comment or empty lines */
+ if ((len == 0) || dump[0] == '#')
+ continue;
+
+ /*
+ * Search for variable's name,
+ * remove leading whitespaces
+ */
+ name = fw_string_blank(dump, 1);
+ if (!name)
+ continue;
+
+ /* The first white space is the end of variable name */
+ val = fw_string_blank(name, 0);
+ len = strlen(name);
+ if (val) {
+ *val++ = '\0';
+ if ((val - name) < len)
+ val = fw_string_blank(val, 1);
+ else
+ val = NULL;
+ }
+
+#ifdef DEBUG
+ fprintf(stderr, "Setting %s : %s\n",
+ name, val ? val : " removed");
+#endif
+
+ /*
+ * If there is an error setting a variable,
+ * try to save the environment and returns an error
+ */
+ if (fw_env_write(name, val)) {
+ fprintf(stderr,
+ "fw_env_write returns with error : %s\n",
+ strerror(errno));
+ ret = -1;
+ break;
+ }
+
+ }
+
+ /* Close file if not stdin */
+ if (strcmp(fname, "-") != 0)
+ fclose(fp);
+
+ ret |= fw_env_close();
+
+ return ret;
+
}
/*
/*
* Prevent confusion if running from erased flash memory
*/
-static int env_init (void)
+int fw_env_open(void)
{
int crc0, crc0_ok;
char flag0;
extern int fw_printenv(int argc, char *argv[]);
extern char *fw_getenv (char *name);
extern int fw_setenv (int argc, char *argv[]);
+extern int fw_parse_script(char *fname);
+extern int fw_env_open(void);
+extern int fw_env_write(char *name, char *value);
+extern int fw_env_close(void);
extern unsigned long crc32 (unsigned long, const unsigned char *, unsigned);
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
+#include <getopt.h>
#include "fw_env.h"
#define CMD_PRINTENV "fw_printenv"
#define CMD_SETENV "fw_setenv"
+static struct option long_options[] = {
+ {"script", required_argument, NULL, 's'},
+ {"help", no_argument, NULL, 'h'},
+ {NULL, 0, NULL, 0}
+};
+
+void usage(void)
+{
+
+ fprintf(stderr, "fw_printenv/fw_setenv, "
+ "a command line interface to U-Boot environment\n\n"
+ "usage:\tfw_printenv\n"
+ "\tfw_setenv [variable name] [variable value]\n"
+ "\tfw_setenv -s [ file ]\n"
+ "\tfw_setenv -s - < [ file ]\n\n"
+ "The file passed as argument contains only pairs "
+ "name / value\n"
+ "Example:\n"
+ "# Any line starting with # is treated as comment\n"
+ "\n"
+ "\t netdev eth0\n"
+ "\t kernel_addr 400000\n"
+ "\t var1\n"
+ "\t var2 The quick brown fox jumps over the "
+ "lazy dog\n"
+ "\n"
+ "A variable without value will be dropped. It is possible\n"
+ "to put any number of spaces between the fields, but any\n"
+ "space inside the value is treated as part of the value "
+ "itself.\n\n"
+ );
+}
+
int
main(int argc, char *argv[])
{
char *p;
char *cmdname = *argv;
+ char *script_file = NULL;
+ int c;
if ((p = strrchr (cmdname, '/')) != NULL) {
cmdname = p + 1;
}
+ while ((c = getopt_long (argc, argv, "s:h",
+ long_options, NULL)) != EOF) {
+ switch (c) {
+ case 's':
+ script_file = optarg;
+ break;
+ case 'h':
+ usage();
+ return EXIT_SUCCESS;
+ }
+ }
+
+
if (strcmp(cmdname, CMD_PRINTENV) == 0) {
if (fw_printenv (argc, argv) != 0)
- return (EXIT_FAILURE);
+ return EXIT_FAILURE;
- return (EXIT_SUCCESS);
+ return EXIT_SUCCESS;
} else if (strcmp(cmdname, CMD_SETENV) == 0) {
+ if (!script_file) {
+ if (fw_setenv(argc, argv) != 0)
+ return EXIT_FAILURE;
+ } else {
+ if (fw_parse_script(script_file) != 0)
+ return EXIT_FAILURE;
+ }
- if (fw_setenv (argc, argv) != 0)
- return (EXIT_FAILURE);
-
- return (EXIT_SUCCESS);
+ return EXIT_SUCCESS;
}
"Identity crisis - may be called as `" CMD_PRINTENV
"' or as `" CMD_SETENV "' but not as `%s'\n",
cmdname);
- return (EXIT_FAILURE);
+ return EXIT_FAILURE;
}
projects / karo-tx-uboot.git / commitdiff