Merge branch 'master' of git://git.denx.de/u-boot-arm
authorTom Rini <trini@ti.com>
Thu, 13 Nov 2014 14:32:45 +0000 (09:32 -0500)
committerTom Rini <trini@ti.com>
Thu, 13 Nov 2014 14:32:45 +0000 (09:32 -0500)
arch/arm/cpu/arm_intcm/Makefile [deleted file]
arch/arm/cpu/arm_intcm/config.mk [deleted file]
arch/arm/cpu/arm_intcm/cpu.c [deleted file]
arch/arm/cpu/arm_intcm/start.S [deleted file]
arch/arm/cpu/armv7/cache_v7.c
arch/arm/include/asm/system.h
arch/arm/lib/cache-cp15.c
common/dlmalloc.c
include/configs/km/km_arm.h

diff --git a/arch/arm/cpu/arm_intcm/Makefile b/arch/arm/cpu/arm_intcm/Makefile
deleted file mode 100644 (file)
index 3279f12..0000000
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:     GPL-2.0+
-#
-
-extra-y        = start.o
-obj-y  = cpu.o
diff --git a/arch/arm/cpu/arm_intcm/config.mk b/arch/arm/cpu/arm_intcm/config.mk
deleted file mode 100644 (file)
index 438668d..0000000
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
-#
-# SPDX-License-Identifier:     GPL-2.0+
-#
-
-PLATFORM_CPPFLAGS +=  -march=armv4
diff --git a/arch/arm/cpu/arm_intcm/cpu.c b/arch/arm/cpu/arm_intcm/cpu.c
deleted file mode 100644 (file)
index 0d00e4b..0000000
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-/*
- * CPU specific code for an unknown cpu
- * - hence fairly empty......
- */
-
-#include <common.h>
-#include <command.h>
-
-int cleanup_before_linux (void)
-{
-       /*
-        * this function is called just before we call linux
-        * it prepares the processor for linux
-        *
-        * we turn off caches etc ...
-        */
-
-       disable_interrupts ();
-
-       /* Since the CM has unknown processor we do not support
-        * cache operations
-        */
-
-       return (0);
-}
diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S
deleted file mode 100644 (file)
index c0c07b6..0000000
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- *  armboot - Startup Code for ARM926EJS CPU-core
- *
- *  Copyright (c) 2003  Texas Instruments
- *
- *  ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
- *
- *  Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- *  Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
- *  Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
- *  Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
- *  Copyright (c) 2003 Kshitij <kshitij@ti.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#include <asm-offsets.h>
-#include <config.h>
-#include <version.h>
-
-/*
- *************************************************************************
- *
- * Startup Code (reset vector)
- *
- * do important init only if we don't start from memory!
- * setup memory and board specific bits prior to relocation.
- * relocate armboot to ram
- * setup stack
- *
- *************************************************************************
- */
-
-       .globl  reset
-
-reset:
-       /*
-        * set the cpu to SVC32 mode
-        */
-       mrs     r0,cpsr
-       bic     r0,r0,#0x1f
-       orr     r0,r0,#0xd3
-       msr     cpsr,r0
-
-       /*
-        * we do sys-critical inits only at reboot,
-        * not when booting from ram!
-        */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-       bl      cpu_init_crit
-#endif
-
-       bl      _main
-
-/*------------------------------------------------------------------------------*/
-
-       .globl  c_runtime_cpu_setup
-c_runtime_cpu_setup:
-
-       mov     pc, lr
-
-/*
- *************************************************************************
- *
- * CPU_init_critical registers
- *
- * setup important registers
- * setup memory timing
- *
- *************************************************************************
- */
-
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-cpu_init_crit:
-       /*  arm_int_generic assumes the ARM boot monitor, or user software,
-        * has initialized the platform
-        */
-       mov     pc, lr          /* back to my caller */
-#endif
index a2c4032..0f9d837 100644 (file)
@@ -21,7 +21,8 @@
  * to get size details from Current Cache Size ID Register(CCSIDR)
  */
 static void set_csselr(u32 level, u32 type)
-{      u32 csselr = level << 1 | type;
+{
+       u32 csselr = level << 1 | type;
 
        /* Write to Cache Size Selection Register(CSSELR) */
        asm volatile ("mcr p15, 2, %0, c0, c0, 0" : : "r" (csselr));
@@ -49,7 +50,8 @@ static void v7_inval_dcache_level_setway(u32 level, u32 num_sets,
                                         u32 num_ways, u32 way_shift,
                                         u32 log2_line_len)
 {
-       int way, set, setway;
+       int way, set;
+       u32 setway;
 
        /*
         * For optimal assembly code:
@@ -73,7 +75,8 @@ static void v7_clean_inval_dcache_level_setway(u32 level, u32 num_sets,
                                               u32 num_ways, u32 way_shift,
                                               u32 log2_line_len)
 {
-       int way, set, setway;
+       int way, set;
+       u32 setway;
 
        /*
         * For optimal assembly code:
@@ -134,7 +137,6 @@ static void v7_maint_dcache_level_setway(u32 level, u32 operation)
 static void v7_maint_dcache_all(u32 operation)
 {
        u32 level, cache_type, level_start_bit = 0;
-
        u32 clidr = get_clidr();
 
        for (level = 0; level < 7; level++) {
@@ -147,8 +149,7 @@ static void v7_maint_dcache_all(u32 operation)
        }
 }
 
-static void v7_dcache_clean_inval_range(u32 start,
-                                       u32 stop, u32 line_len)
+static void v7_dcache_clean_inval_range(u32 start, u32 stop, u32 line_len)
 {
        u32 mva;
 
@@ -256,7 +257,6 @@ void flush_dcache_all(void)
  */
 void invalidate_dcache_range(unsigned long start, unsigned long stop)
 {
-
        v7_dcache_maint_range(start, stop, ARMV7_DCACHE_INVAL_RANGE);
 
        v7_outer_cache_inval_range(start, stop);
index ca2d44f..61e2914 100644 (file)
@@ -201,7 +201,7 @@ enum {
  * \param size         size of memory region to change
  * \param option       dcache option to select
  */
-void mmu_set_region_dcache_behaviour(u32 start, int size,
+void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
                                     enum dcache_option option);
 
 /**
index 2155fe8..0291afa 100644 (file)
@@ -47,15 +47,15 @@ __weak void mmu_page_table_flush(unsigned long start, unsigned long stop)
        debug("%s: Warning: not implemented\n", __func__);
 }
 
-void mmu_set_region_dcache_behaviour(u32 start, int size,
+void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
                                     enum dcache_option option)
 {
        u32 *page_table = (u32 *)gd->arch.tlb_addr;
-       u32 upto, end;
+       unsigned long upto, end;
 
        end = ALIGN(start + size, MMU_SECTION_SIZE) >> MMU_SECTION_SHIFT;
        start = start >> MMU_SECTION_SHIFT;
-       debug("%s: start=%x, size=%x, option=%d\n", __func__, start, size,
+       debug("%s: start=%pa, size=%zu, option=%d\n", __func__, &start, size,
              option);
        for (upto = start; upto < end; upto++)
                set_section_dcache(upto, option);
index d87834d..991229d 100644 (file)
@@ -1533,6 +1533,9 @@ void mem_malloc_init(ulong start, ulong size)
        mem_malloc_end = start + size;
        mem_malloc_brk = start;
 
+       debug("using memory %#lx-%#lx for malloc()\n", mem_malloc_start,
+             mem_malloc_end);
+
        memset((void *)mem_malloc_start, 0, size);
 
        malloc_bin_reloc();
index d31e674..f780f8b 100644 (file)
@@ -20,6 +20,8 @@
 #ifndef _CONFIG_KM_ARM_H
 #define _CONFIG_KM_ARM_H
 
+#define CONFIG_SYS_GENERIC_BOARD
+
 /* We got removed from Linux mach-types.h */
 #define MACH_TYPE_KM_KIRKWOOD          2255