Changes for U-Boot 1.1.3:
======================================================================
+* Prepare for SoC rework of ARM code:
+ - rename CONFIG_BOOTBINFUNC into CONFIG_INIT_CRITICAL
+ - rename memsetup into lowlevel_init (function name and source files)
+
* Fix problems with SNTP support;
enable SNTP support in some boards.
This only takes effect if the memory commands are activated
globally (CFG_CMD_MEM).
+- CONFIG_INIT_CRITICAL
+ [ARM only] If this variable is NOT defined, then
+ certain critical initializations (like setting up the
+ memory controller) are omitted. Normally this
+ variable MUST be defined for all boards. The only
+ exception is when U-Boot is loaded (to RAM) by some
+ other boot loader or by a debugger which performs
+ these intializations itself.
+
Building the Software:
======================
LEDS: .long NEPONSET_LEDS
- .globl memsetup
-memsetup:
+ .globl lowlevel_init
+lowlevel_init:
/* Setting up the memory and stuff */
LIB = lib$(BOARD).a
OBJS := cerf250.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
*
* NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See
- * board/cradle/memsetup.S for another PXA250 setup that is
+ * board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner.
*
* See file CREDITS for list of people who contributed to this
* Memory setup
*/
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
/* Set up GPIO pins first ----------------------------------------- */
#endif
/* ---------------------------------------------------------------- */
- /* End memsetup */
+ /* End lowlevel_init */
/* ---------------------------------------------------------------- */
-endmemsetup:
+endlowlevel_init:
mov pc, lr
LIB = lib$(BOARD).a
OBJS := cradle.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
.endm
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
mov r10, lr
mov pc, r10
-@ End memsetup
+@ End lowlevel_init
LIB = lib$(BOARD).a
OBJS := csb226.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
*
* NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See
- * board/cradle/memsetup.S for another PXA250 setup that is
+ * board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner.
*
* See file CREDITS for list of people who contributed to this
* Memory setup
*/
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
mov r10, lr
#endif
/* ---------------------------------------------------------------- */
- /* End memsetup */
+ /* End lowlevel_init */
/* ---------------------------------------------------------------- */
-endmemsetup:
+endlowlevel_init:
mov pc, lr
LIB = lib$(BOARD).a
OBJS := B2.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
.word 0x20 /*MRSR7*/
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
/*
the next instruction fail due memory relocation...
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o
-SOBJS = memsetup.o
+SOBJS = lowlevel_init.o
$(LIB): .depend $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
.set noreorder
.set mips32
- .globl memsetup
-memsetup:
+ .globl lowlevel_init
+lowlevel_init:
/*
* Step 1) Establish CPU endian mode.
* Db1500-specific:
LIB = lib$(BOARD).a
OBJS := dnp1110.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
/* setting up the memory */
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
ldr r0, MEM_BASE
LIB = lib$(BOARD).a
OBJS := ep7312.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
sdconf_val: .long 0x00000522
/* setting up the memory */
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
/*
* SYSCON1-3
*/
LIB = lib$(BOARD).a
OBJS := evb4510.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $^
*
* This memory map allows us to relocate from FLASH to SRAM. After
* power-on reset the CPU only knows about the FLASH memory at address
- * 0x00000000. After memsetup completes the memory map will be:
+ * 0x00000000. After lowlevel_init completes the memory map will be:
*
* Memory Addr
* 0x00000000
*
***********************************************************************/
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
/* preserve the temp register (r12 AKA ip) and remap it. */
ldr r1, =SRAM_BASE+0xC
LIB = lib$(BOARD).a
OBJS := gcplus.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
#include "version.h"
- .globl memsetup
-memsetup:
+ .globl lowlevel_init
+lowlevel_init:
/* The ADS GC+ for Linux Boot Rom Ver. 1.73 does memory init for us.
* However the darn thing leaves the MMU enabled before handing control
- * over to us. So we need to disable the MMU and we use memsetup
+ * over to us. So we need to disable the MMU and we use lowlevel_init
* to do it.
*/
LIB = lib$(BOARD).a
OBJS := impa7.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
drfpr_val: .long 0x00000081
/* setting up the memory */
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
/*
* DRFPR
* 64kHz DRAM refresh
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o
-SOBJS = memsetup.o
+SOBJS = lowlevel_init.o
$(LIB): .depend $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
.end sdram_init
- .globl memsetup
- .ent memsetup
-memsetup:
+ .globl lowlevel_init
+ .ent lowlevel_init
+lowlevel_init:
/* EBU, CGU and SDRAM Initialization.
*/
j ra
nop
- .end memsetup
+ .end lowlevel_init
LIB = lib$(BOARD).a
OBJS := innokom.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
*
* NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See
- * board/cradle/memsetup.S for another PXA250 setup that is
+ * board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner.
*
* See file CREDITS for list of people who contributed to this
* Memory setup
*/
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
mov r10, lr
#endif
/* ---------------------------------------------------------------- */
- /* End memsetup */
+ /* End lowlevel_init */
/* ---------------------------------------------------------------- */
-endmemsetup:
+endlowlevel_init:
mov pc, lr
LIB = lib$(BOARD).a
OBJS := lart.o flash.o
-SOBJS := flashasm.o memsetup.o
+SOBJS := flashasm.o lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
/* setting up the memory */
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
ldr r0, MEM_BASE
/* Setup the flash memory */
LIB = lib$(BOARD).a
OBJS := logodl.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $^
*
* NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See
- * board/cradle/memsetup.S for another PXA250 setup that is
+ * board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner.
*
* See file CREDITS for list of people who contributed to this
* Memory setup
*/
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
mov r10, lr
#endif
/* ---------------------------------------------------------------- */
- /* End memsetup */
+ /* End lowlevel_init */
/* ---------------------------------------------------------------- */
-endmemsetup:
+endlowlevel_init:
mov pc, lr
LIB = lib$(BOARD).a
OBJS := lpd7a40x.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
_TEXT_BASE:
.word TEXT_BASE
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
mov r9, lr @ save return address
/* memory control configuration */
LIB = lib$(BOARD).a
OBJS := lubbock.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
*
* NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See
- * board/cradle/memsetup.S for another PXA250 setup that is
+ * board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner.
*
* See file CREDITS for list of people who contributed to this
* Memory setup
*/
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
mov r10, lr
#endif
/* ---------------------------------------------------------------- */
- /* End memsetup */
+ /* End lowlevel_init */
/* ---------------------------------------------------------------- */
-endmemsetup:
+endlowlevel_init:
mov pc, lr
LIB = lib$(BOARD).a
OBJS := modnet50.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $^
#define NETARM_MMAP_CS4_MASK (~(PHYS_EXT_SIZE - 1))
/* setting up the memory */
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
#if defined(CONFIG_MODNET50)
ldr pc, =(_jump_to_high + NETARM_MMAP_CS0_BASE - TEXT_BASE)
#endif /* CONFIG_MODNET50 */
-memsetup_end:
+lowlevel_init_end:
/*
* manipulate address in lr and ip to match new
* address space
OBJS := vcma9.o flash.o cmd_vcma9.o
OBJS += ../common/common_util.o ../common/memtst.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
_TEXT_BASE:
.word TEXT_BASE
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
/* memory control configuration */
/* make r0 relative the current location so that it */
/* reads SMRDATA out of FLASH rather than memory ! */
LIB = lib$(BOARD).a
OBJS := mx1ads.o syncflash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
/*
- * board/mx1ads/memsetup.S
+ * board/mx1ads/lowlevel_init.S
*
* (c) Copyright 2004
* Techware Information Technology, Inc.
_TEXT_BASE:
.word TEXT_BASE
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
/* memory controller init */
ldr r1, =SDCTL0
LIB = lib$(BOARD).a
OBJS := mx1fs2.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $^
#include <version.h>
#include <asm/arch/imx-regs.h>
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
mov r10, lr
LIB = lib$(BOARD).a
OBJS := pleb2.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
sub pc,pc,#4
.endm
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
mov r10, lr
mov pc, r10
-@ End memsetup
+@ End lowlevel_init
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o sconsole.o
-SOBJS = memsetup.o
+SOBJS = lowlevel_init.o
$(LIB): .depend $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS)
#define MC_IOGP 0xBF800800
- .globl memsetup
-memsetup:
+ .globl lowlevel_init
+lowlevel_init:
li t0, MC_IOGP
li t1, 0xf24
sw t1, 0(t0)
.text :
{
cpu/mips/start.o (.text)
- board/purple/memsetup.o (.text)
+ board/purple/lowlevel_init.o (.text)
cpu/mips/cache.o (.text)
common/main.o (.text)
common/dlmalloc.o (.text)
LIB = lib$(BOARD).a
OBJS := scb9328.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $^
#include <version.h>
#include <asm/arch/imx-regs.h>
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
mov r10, lr
LIB = lib$(BOARD).a
OBJS := shannon.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
/* setting up the memory */
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
ldr r0, MEM_BASE
/* Setup the flash memory */
LIB = lib$(BOARD).a
OBJS := smdk2400.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
_TEXT_BASE:
.word TEXT_BASE
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
/* memory control configuration */
/* make r0 relative the current location so that it */
/* reads SMRDATA out of FLASH rather than memory ! */
LIB = lib$(BOARD).a
OBJS := smdk2410.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
_TEXT_BASE:
.word TEXT_BASE
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
/* memory control configuration */
/* make r0 relative the current location so that it */
/* reads SMRDATA out of FLASH rather than memory ! */
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o vr4131-pci.o
-SOBJS = memsetup.o
+SOBJS = lowlevel_init.o
$(LIB): .depend $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
#include <asm/regdef.h>
- .globl memsetup
-memsetup:
+ .globl lowlevel_init
+lowlevel_init:
/* BCUCNTREG1 = 0x0040 */
la t0, 0xaf000000
LIB = lib$(BOARD).a
OBJS := trab.o flash.o vfd.o cmd_trab.o memory.o tsc2000.o auto_update.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`)
_TEXT_BASE:
.word TEXT_BASE
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
/* memory control configuration */
/* make r0 relative the current location so that it */
/* reads SMRDATA out of FLASH rather than memory ! */
LIB = lib$(BOARD).a
OBJS := wepep250.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
#include <version.h>
#include <asm/arch/pxa-regs.h>
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
mov r10, lr
LIB = lib$(BOARD).a
OBJS := xaeniax.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
*
* NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See
- * board/cradle/memsetup.S for another PXA250 setup that is
+ * board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner.
*
* See file CREDITS for list of people who contributed to this
.endm
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
mov r10, lr
#endif
/* ---------------------------------------------------------------- */
- /* End memsetup */
+ /* End lowlevel_init */
/* ---------------------------------------------------------------- */
-endmemsetup:
+endlowlevel_init:
mov pc, lr
LIB = lib$(BOARD).a
OBJS := xm250.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $^
.endm
*/
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
mov r10, lr
mov pc, r10
-@ End memsetup
+@ End lowlevel_init
LIB = lib$(BOARD).a
OBJS := xsengine.o flash.o
-SOBJS := memsetup.o
+SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
DRAM_SIZE: .long CFG_DRAM_SIZE
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
mov r10, lr
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependent, you will
- * find a memsetup.S in your board directory.
+ * find a lowlevel_init.S in your board directory.
*/
mov ip, lr
- bl memsetup
+ bl lowlevel_init
mov lr, ip
mov pc, lr
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
- * find a memsetup.S in your board directory.
+ * find a lowlevel_init.S in your board directory.
*/
mov ip, lr
- bl memsetup
+ bl lowlevel_init
mov lr, ip
mov pc, lr
#include <config.h>
#include <version.h>
-#ifdef CONFIG_BOOTBINFUNC
+#ifdef CONFIG_INIT_CRITICAL
/*
* some parameters for the board
*
.word SDRAM
.word SDRAM_VAL
/* SMRDATA1 is 176 bytes long */
-#endif /* CONFIG_BOOTBINFUNC */
+#endif /* CONFIG_INIT_CRITICAL */
orr r0,r0,#0xd3 /* was 13 */
msr cpsr,r0
-#ifdef CONFIG_BOOTBINFUNC
+#ifdef CONFIG_INIT_CRITICAL
/* scratch stack */
ldr r1, =0x00204000
/* Insure word alignment */
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
orr r0, r0, #0xC0000000 @ set bits 31:30 (iA, nF)
mcr p15, 0, r0, c1, c0, 0 @ write r0 in cp15 control register (cp15 r1)
-#endif /* CONFIG_BOOTBINFUNC */
+#endif /* CONFIG_INIT_CRITICAL */
/*
* relocate exeception table
*/
*/
#ifdef CONFIG_INIT_CRITICAL
bl cpu_init_crit
-#endif
-#ifdef CONFIG_BOOTBINFUNC
relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
-#endif /* CONFIG_BOOTBINFUNC */
+#endif /* CONFIG_INIT_CRITICAL */
/* Set up the stack */
stack_setup:
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
- * find a memsetup.S in your board directory.
+ * find a lowlevel_init.S in your board directory.
*/
mov ip, lr
- bl memsetup
+ bl lowlevel_init
mov lr, ip
mov pc, lr
/* Initialize any external memory.
*/
- bal memsetup
+ bal lowlevel_init
nop
/* Initialize caches...
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
- * find a memsetup.S in your board directory.
+ * find a lowlevel_init.S in your board directory.
*/
mov ip, lr
- bl memsetup
+ bl lowlevel_init
mov lr, ip
/* Memory interfaces are working. Disable MMU and enable I-cache. */
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
- * find a memsetup.S in your board directory.
+ * find a lowlevel_init.S in your board directory.
*/
- bl memsetup
+ bl lowlevel_init
#endif
relocate: /* relocate U-Boot to RAM */
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
- * find a memsetup.S in your board directory.
+ * find a lowlevel_init.S in your board directory.
*/
mov ip, lr
- bl memsetup
+ bl lowlevel_init
mov lr, ip
/*
cpu/arm720t/serial_netarm.c .. serial I/O for the cpu
-board/modnet50/memsetup.S .. memory setup for ModNET50
+board/modnet50/lowlevel_init.S .. memory setup for ModNET50
board/modnet50/flash.c .. flash routines
board/modnet50/modnet50.c .. some board init stuff
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/* ARM asynchronous clock */
#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
-/* define this to include the functionality of boot.bin in u-boot */
-#undef CONFIG_BOOTBINFUNC
-
-#ifdef CONFIG_BOOTBINFUNC
+#ifdef CONFIG_INIT_CRITICAL
#define CFG_USE_MAIN_OSCILLATOR 1
/* flash */
#define MC_PUIA_VAL 0x00000000
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
-#endif
+#endif /* CONFIG_INIT_CRITICAL */
/*
* Size of malloc() pool
*/
#define CFG_ENV_SIZE 0x2000 /* 0x8000 */
#else
#define CFG_ENV_IS_IN_FLASH 1
-#ifdef CONFIG_BOOTBINFUNC
+#ifdef CONFIG_INIT_CRITICAL
#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
#define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */
#else
#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
#define CFG_ENV_SIZE 0x2000 /* 0x8000 */
-#endif
-#endif
+#endif /* CONFIG_INIT_CRITICAL */
+#endif /* CFG_ENV_IS_IN_DATAFLASH */
#define CFG_LOAD_ADDR 0x21000000 /* default load address */
-#ifdef CONFIG_BOOTBINFUNC
+#ifdef CONFIG_INIT_CRITICAL
#define CFG_BOOT_SIZE 0x00 /* 0 KBytes */
#define CFG_U_BOOT_BASE PHYS_FLASH_1
#define CFG_U_BOOT_SIZE 0x60000 /* 384 KBytes */
#define CFG_BOOT_SIZE 0x6000 /* 24 KBytes */
#define CFG_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
#define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */
-#endif
+#endif /* CONFIG_INIT_CRITICAL */
#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/* ARM asynchronous clock */
#define AT91C_MAIN_CLOCK 207360000 /* from 18.432 MHz crystal (18432000 / 4 * 45) */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
-/* define this to include the functionality of boot.bin in u-boot */
-#define CONFIG_BOOTBINFUNC
-
-/* just to make sure */
-#ifndef CONFIG_BOOTBINFUNC
-#define CONFIG_BOOTBINFUNC
-#endif
-
-#ifdef CONFIG_BOOTBINFUNC
+#ifdef CONFIG_INIT_CRITICAL
#define CFG_USE_MAIN_OSCILLATOR 1
/* flash */
#define MC_PUIA_VAL 0x00000000
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
-#endif
+#endif /* CONFIG_INIT_CRITICAL */
/*
* Size of malloc() pool
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
#else
#define CFG_MDCNFG_VAL 0x00001aa1 /* FIXME can DTC be 01? */
#define CFG_MDMRS_VAL 0x00000000
-#define CFG_MDREFR_VAL 0x00403018 /* Initial setting, individual bits set in memsetup.S */
+#define CFG_MDREFR_VAL 0x00403018 /* Initial setting, individual bits set in lowlevel_init.S */
#endif
/*
* If we are developing, we might want to start U-Boot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
-#undef CONFIG_INIT_CRITICAL /* undef for developing */
+#undef CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* Also swap the flash1 and flash2 addresses during debug.
*
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* e.g. bootp/tftp download of the kernel is a far more convenient
* when testing new kernels on this target. However the ADS GCPlus Linux
* boot ROM leaves the MMU enabled when it passes control to U-Boot. So
- * we use memsetup (CONFIG_INIT_CRITICAL) to remedy that problem.
+ * we use lowlevel_init (CONFIG_INIT_CRITICAL) to remedy that problem.
*/
#define CONFIG_INIT_CRITICAL
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start U-Boot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start U-Boot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
#undef CONFIG_USE_IRQ
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
#undef CONFIG_USE_IRQ
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start u-boot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-
-#define CONFIG_INIT_CRITICAL /*undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
#define CFG_MDCNFG_VAL 0x00000aC9 /* Memory timings for the SDRAM.
tRP=2, CL=2, tRCD=2, tRAS=5, tRC=8 */
-#define CFG_MDREFR_VAL 0x00403018 /* Initial setting, individual
- bits set in memsetup.S */
+#define CFG_MDREFR_VAL 0x00403018 /* Initial setting, individual */
+ /* bits set in lowlevel_init.S */
#define CFG_MDMRS_VAL 0x00000000
/*
* bring us to live
*/
#define CONFIG_INFERNO /* we are using the inferno bootldr */
-#undef CONFIG_INIT_CRITICAL /* undef for developing */
+#undef CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
#define CONFIG_PXA250 1 /* this is an PXA250 CPU */
#define CONFIG_WEPEP250 1 /* config for wepep250 board */
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
#undef CONFIG_INIT_CRITICAL
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/*
* High Level Configuration Options
#define CFG_MSC2_VAL 0x35f435fc /* IDE / BCR + WatchDog (cs4)/(cS5) */
#define CFG_MDCNFG_VAL 0x000009c9
#define CFG_MDMRS_VAL 0x00220022
-#define CFG_MDREFR_VAL 0x000da018 /* Initial setting, individual bits set in memsetup.S */
+#define CFG_MDREFR_VAL 0x000da018 /* Initial setting, individual bits set in lowlevel_init.S */
/*
* PCMCIA and CF Interfaces (NOT USED, these values from lubbock init)
* If we are developing, we might want to start armboot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
-#define CONFIG_INIT_CRITICAL /* undef for developing */
+#define CONFIG_INIT_CRITICAL
/* High Level Configuration Options */
#define CONFIG_PXA250 1 /* This is an PXA250 CPU */
projects / karo-tx-uboot.git / commitdiff