]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
x86: Set CONFIG_NR_DRAM_BANKS to 8 and move it to x86-common.h
authorBin Meng <bmeng.cn@gmail.com>
Thu, 7 May 2015 13:34:10 +0000 (21:34 +0800)
committerLothar Waßmann <LW@KARO-electronics.de>
Tue, 8 Sep 2015 20:48:14 +0000 (22:48 +0200)
Some x86 boards set CONFIG_NR_DRAM_BANKS to 1, which causes incorrect
DRAM size printed when booting from coreboot, like this:

CPU: x86, vendor Intel, device 663h
DRAM:  636 KiB
Using default environment

Change it to 8 which should be enough for both coreboot and bare
cases, and move it to x86-common.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
include/configs/crownbay.h
include/configs/galileo.h
include/configs/minnowmax.h
include/configs/qemu-x86.h
include/configs/x86-chromebook.h
include/configs/x86-common.h

index 4fef433252c598604406ddcdb94d749b4a6b6b03..0e1f0467c78067d94c01e109210901166f97a02c 100644 (file)
@@ -17,8 +17,6 @@
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_ARCH_MISC_INIT
 
-#define CONFIG_NR_DRAM_BANKS           1
-
 #define CONFIG_X86_SERIAL
 #define CONFIG_SMSC_LPC47M
 
index f780b8fa512a2d888dffc3f82669c5b2ce419355..083d8b41051d22d630d1f71dee7926723232130b 100644 (file)
@@ -16,8 +16,6 @@
 #define CONFIG_SYS_MONITOR_LEN         (1 << 20)
 #define CONFIG_BOARD_EARLY_INIT_F
 
-#define CONFIG_NR_DRAM_BANKS           1
-
 #define CONFIG_X86_SERIAL
 
 /* ns16550 UART is memory-mapped in Quark SoC */
index 2a1915d8722bce83b5fc4138c6b9841dc3e50033..bc2c580c0f23313969fb29f8bb91ff613feb6b02 100644 (file)
@@ -16,8 +16,6 @@
 #define CONFIG_SYS_MONITOR_LEN         (1 << 20)
 #define CONFIG_BOARD_EARLY_INIT_F
 
-#define CONFIG_NR_DRAM_BANKS           1
-
 #define CONFIG_X86_SERIAL
 #define CONFIG_SMSC_LPC47M
 
index 463620d80992459e15aca7019e17a1d29c71d4b4..bb3c085dd86427e1413b072bd2b936528ba306e6 100644 (file)
@@ -15,8 +15,6 @@
 
 #define CONFIG_SYS_MONITOR_LEN         (1 << 20)
 
-#define CONFIG_NR_DRAM_BANKS           1
-
 #define CONFIG_X86_SERIAL
 
 #define CONFIG_PCI_MEM_BUS             0xc0000000
index b6a76fe0755aa86b2fc717dc626ba79403189583..e0e7fca9f86161c01d59ee2275ddb3bb5850c55b 100644 (file)
@@ -14,7 +14,6 @@
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_MISC_INIT_R
 
-#define CONFIG_NR_DRAM_BANKS                   8
 #define CONFIG_X86_MRC_ADDR                    0xfffa0000
 #define CONFIG_CACHE_MRC_SIZE_KB               512
 
index bf4758e3b3877e454dbf156d325f532e524b5aa7..31f9904ed77e1b86dc3db48bffd52a6e42a0da31 100644 (file)
@@ -21,6 +21,7 @@
 #define CONFIG_DISPLAY_BOARDINFO_LATE
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_LAST_STAGE_INIT
+#define CONFIG_NR_DRAM_BANKS           8
 
 #define CONFIG_LMB
 #define CONFIG_OF_LIBFDT