sunxi_nand_spl: Make sure the DMA controller is enabled
authorHans de Goede <hdegoede@redhat.com>
Sat, 15 Aug 2015 09:58:03 +0000 (11:58 +0200)
committerLothar Waßmann <LW@KARO-electronics.de>
Thu, 10 Sep 2015 10:19:13 +0000 (12:19 +0200)
We use DMA for nand data transfers in the SPL, so make sure the DMA
controller is enabled.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
board/sunxi/board.c

index b76bb83..1ebd0a4 100644 (file)
@@ -125,7 +125,13 @@ static void nand_clock_setup(void)
 {
        struct sunxi_ccm_reg *const ccm =
                (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
        setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0));
+#ifdef CONFIG_MACH_SUN9I
+       setbits_le32(&ccm->ahb_gate1, (1 << AHB_GATE_OFFSET_DMA));
+#else
+       setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_DMA));
+#endif
        setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1);
 }