karo: tx6: remove bogus writes to MMDC2_MDPDC

MMDC2_MDPDC does not need to be written in DDR3 configuration.

diff --git a/board/karo/tx6/lowlevel_init.S b/board/karo/tx6/lowlevel_init.S
index 1f140ecd9bf2344ee643a7c207466468592435a0..8c3f8f2ddd16e1cc56f47553aa227f90e807203a 100644 (file)
--- a/board/karo/tx6/lowlevel_init.S
+++ b/board/karo/tx6/lowlevel_init.S
@@ -862,7 +862,6 @@ dcd_hdr:
        MXC_DCD_ITEM(MMDC1_MDOR,   MDOR_VAL)
        MXC_DCD_ITEM(MMDC1_MDOTC,  MDOTC_VAL)
        MXC_DCD_ITEM(MMDC1_MDPDC,  MDPDC_VAL_0)
-       MXC_DCD_ITEM_64(MMDC2_MDPDC,  MDPDC_VAL_0)
        MXC_DCD_ITEM(MMDC1_MDASP,  (PHYS_SDRAM_1_SIZE + SZ_256M) / SZ_32M - 1)
 
        /* CS0 MRS: */
@@ -1003,7 +1002,6 @@ dcd_hdr:
        MXC_DCD_ITEM(MMDC1_MDREF, (3 << 11) | (0 << 14)) /* 4 cycles per 64kHz period (3.9us) */
        MXC_DCD_ITEM(MMDC1_MAPSR, 0x00001006)
        MXC_DCD_ITEM(MMDC1_MDPDC, MDPDC_VAL_1)
-       MXC_DCD_ITEM_64(MMDC2_MDPDC, MDPDC_VAL_1)
 
        /* MDSCR: Normal operation */
        MXC_DCD_ITEM(MMDC1_MDSCR, 0x00000000)